cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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emad.h (2750B)

      1/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
      2/* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
      3
      4#ifndef _MLXSW_EMAD_H
      5#define _MLXSW_EMAD_H
      6
      7#define MLXSW_EMAD_MAX_FRAME_LEN 1518	/* Length in u8 */
      8#define MLXSW_EMAD_MAX_RETRY 5
      9
     10/* EMAD Ethernet header */
     11#define MLXSW_EMAD_ETH_HDR_LEN 0x10	/* Length in u8 */
     12#define MLXSW_EMAD_EH_DMAC "\x01\x02\xc9\x00\x00\x01"
     13#define MLXSW_EMAD_EH_SMAC "\x00\x02\xc9\x01\x02\x03"
     14#define MLXSW_EMAD_EH_ETHERTYPE 0x8932
     15#define MLXSW_EMAD_EH_MLX_PROTO 0
     16#define MLXSW_EMAD_EH_PROTO_VERSION 0
     17
     18/* EMAD TLV Types */
     19enum {
     20	MLXSW_EMAD_TLV_TYPE_END,
     21	MLXSW_EMAD_TLV_TYPE_OP,
     22	MLXSW_EMAD_TLV_TYPE_STRING,
     23	MLXSW_EMAD_TLV_TYPE_REG,
     24};
     25
     26/* OP TLV */
     27#define MLXSW_EMAD_OP_TLV_LEN 4		/* Length in u32 */
     28
     29enum {
     30	MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS = 1,
     31	MLXSW_EMAD_OP_TLV_CLASS_IPC = 2,
     32};
     33
     34enum mlxsw_emad_op_tlv_status {
     35	MLXSW_EMAD_OP_TLV_STATUS_SUCCESS,
     36	MLXSW_EMAD_OP_TLV_STATUS_BUSY,
     37	MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED,
     38	MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV,
     39	MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED,
     40	MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED,
     41	MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED,
     42	MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER,
     43	MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE,
     44	MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK,
     45	MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR = 0x70,
     46};
     47
     48static inline char *mlxsw_emad_op_tlv_status_str(u8 status)
     49{
     50	switch (status) {
     51	case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
     52		return "operation performed";
     53	case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
     54		return "device is busy";
     55	case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
     56		return "version not supported";
     57	case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
     58		return "unknown TLV";
     59	case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
     60		return "register not supported";
     61	case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
     62		return "class not supported";
     63	case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
     64		return "method not supported";
     65	case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
     66		return "bad parameter";
     67	case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
     68		return "resource not available";
     69	case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
     70		return "acknowledged. retransmit";
     71	case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
     72		return "internal error";
     73	default:
     74		return "*UNKNOWN*";
     75	}
     76}
     77
     78enum {
     79	MLXSW_EMAD_OP_TLV_REQUEST,
     80	MLXSW_EMAD_OP_TLV_RESPONSE
     81};
     82
     83enum {
     84	MLXSW_EMAD_OP_TLV_METHOD_QUERY = 1,
     85	MLXSW_EMAD_OP_TLV_METHOD_WRITE = 2,
     86	MLXSW_EMAD_OP_TLV_METHOD_SEND = 3,
     87	MLXSW_EMAD_OP_TLV_METHOD_EVENT = 5,
     88};
     89
     90/* STRING TLV */
     91#define MLXSW_EMAD_STRING_TLV_LEN 33	/* Length in u32 */
     92
     93/* END TLV */
     94#define MLXSW_EMAD_END_TLV_LEN 1	/* Length in u32 */
     95
     96#endif