cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sparx5_port.h (2189B)

      1/* SPDX-License-Identifier: GPL-2.0+ */
      2/* Microchip Sparx5 Switch driver
      3 *
      4 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
      5 */
      6
      7#ifndef __SPARX5_PORT_H__
      8#define __SPARX5_PORT_H__
      9
     10#include "sparx5_main.h"
     11
     12static inline bool sparx5_port_is_2g5(int portno)
     13{
     14	return portno >= 16 && portno <= 47;
     15}
     16
     17static inline bool sparx5_port_is_5g(int portno)
     18{
     19	return portno <= 11 || portno == 64;
     20}
     21
     22static inline bool sparx5_port_is_10g(int portno)
     23{
     24	return (portno >= 12 && portno <= 15) || (portno >= 48 && portno <= 55);
     25}
     26
     27static inline bool sparx5_port_is_25g(int portno)
     28{
     29	return portno >= 56 && portno <= 63;
     30}
     31
     32static inline u32 sparx5_to_high_dev(int port)
     33{
     34	if (sparx5_port_is_5g(port))
     35		return TARGET_DEV5G;
     36	if (sparx5_port_is_10g(port))
     37		return TARGET_DEV10G;
     38	return TARGET_DEV25G;
     39}
     40
     41static inline u32 sparx5_to_pcs_dev(int port)
     42{
     43	if (sparx5_port_is_5g(port))
     44		return TARGET_PCS5G_BR;
     45	if (sparx5_port_is_10g(port))
     46		return TARGET_PCS10G_BR;
     47	return TARGET_PCS25G_BR;
     48}
     49
     50static inline int sparx5_port_dev_index(int port)
     51{
     52	if (sparx5_port_is_2g5(port))
     53		return port;
     54	if (sparx5_port_is_5g(port))
     55		return (port <= 11 ? port : 12);
     56	if (sparx5_port_is_10g(port))
     57		return (port >= 12 && port <= 15) ?
     58			port - 12 : port - 44;
     59	return (port - 56);
     60}
     61
     62int sparx5_port_init(struct sparx5 *sparx5,
     63		     struct sparx5_port *spx5_port,
     64		     struct sparx5_port_config *conf);
     65
     66int sparx5_port_config(struct sparx5 *sparx5,
     67		       struct sparx5_port *spx5_port,
     68		       struct sparx5_port_config *conf);
     69
     70int sparx5_port_pcs_set(struct sparx5 *sparx5,
     71			struct sparx5_port *port,
     72			struct sparx5_port_config *conf);
     73
     74int sparx5_serdes_set(struct sparx5 *sparx5,
     75		      struct sparx5_port *spx5_port,
     76		      struct sparx5_port_config *conf);
     77
     78struct sparx5_port_status {
     79	bool link;
     80	bool link_down;
     81	int  speed;
     82	bool an_complete;
     83	int  duplex;
     84	int  pause;
     85};
     86
     87int sparx5_get_port_status(struct sparx5 *sparx5,
     88			   struct sparx5_port *port,
     89			   struct sparx5_port_status *status);
     90
     91void sparx5_port_enable(struct sparx5_port *port, bool enable);
     92int sparx5_port_fwd_urg(struct sparx5 *sparx5, u32 speed);
     93
     94#endif	/* __SPARX5_PORT_H__ */