cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ionic.h (2901B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
      3
      4#ifndef _IONIC_H_
      5#define _IONIC_H_
      6
      7struct ionic_lif;
      8
      9#include "ionic_if.h"
     10#include "ionic_dev.h"
     11#include "ionic_devlink.h"
     12
     13#define IONIC_DRV_NAME		"ionic"
     14#define IONIC_DRV_DESCRIPTION	"Pensando Ethernet NIC Driver"
     15
     16#define PCI_VENDOR_ID_PENSANDO			0x1dd8
     17
     18#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF	0x1002
     19#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF	0x1003
     20
     21#define DEVCMD_TIMEOUT			5
     22#define IONIC_ADMINQ_TIME_SLICE		msecs_to_jiffies(100)
     23
     24#define IONIC_PHC_UPDATE_NS	10000000000	    /* 10s in nanoseconds */
     25#define NORMAL_PPB		1000000000	    /* one billion parts per billion */
     26#define SCALED_PPM		(1000000ull << 16)  /* 2^16 million parts per 2^16 million */
     27
     28struct ionic_vf {
     29	u16	 index;
     30	u8	 macaddr[6];
     31	__le32	 maxrate;
     32	__le16	 vlanid;
     33	u8	 spoofchk;
     34	u8	 trusted;
     35	u8	 linkstate;
     36	dma_addr_t       stats_pa;
     37	struct ionic_lif_stats stats;
     38};
     39
     40struct ionic {
     41	struct pci_dev *pdev;
     42	struct device *dev;
     43	struct devlink_port dl_port;
     44	struct ionic_dev idev;
     45	struct mutex dev_cmd_lock;	/* lock for dev_cmd operations */
     46	struct dentry *dentry;
     47	struct ionic_dev_bar bars[IONIC_BARS_MAX];
     48	unsigned int num_bars;
     49	struct ionic_identity ident;
     50	struct ionic_lif *lif;
     51	unsigned int nnqs_per_lif;
     52	unsigned int neqs_per_lif;
     53	unsigned int ntxqs_per_lif;
     54	unsigned int nrxqs_per_lif;
     55	unsigned int nintrs;
     56	DECLARE_BITMAP(intrs, IONIC_INTR_CTRL_REGS_MAX);
     57	struct work_struct nb_work;
     58	struct notifier_block nb;
     59	struct rw_semaphore vf_op_lock;	/* lock for VF operations */
     60	struct ionic_vf *vfs;
     61	int num_vfs;
     62	struct timer_list watchdog_timer;
     63	int watchdog_period;
     64};
     65
     66struct ionic_admin_ctx {
     67	struct completion work;
     68	union ionic_adminq_cmd cmd;
     69	union ionic_adminq_comp comp;
     70};
     71
     72int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);
     73int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx,
     74		      const int err, const bool do_msg);
     75int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);
     76int ionic_adminq_post_wait_nomsg(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);
     77void ionic_adminq_netdev_err_print(struct ionic_lif *lif, u8 opcode,
     78				   u8 status, int err);
     79
     80int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_wait);
     81int ionic_dev_cmd_wait_nomsg(struct ionic *ionic, unsigned long max_wait);
     82void ionic_dev_cmd_dev_err_print(struct ionic *ionic, u8 opcode, u8 status,
     83				 int err);
     84int ionic_set_dma_mask(struct ionic *ionic);
     85int ionic_setup(struct ionic *ionic);
     86
     87int ionic_identify(struct ionic *ionic);
     88int ionic_init(struct ionic *ionic);
     89int ionic_reset(struct ionic *ionic);
     90
     91int ionic_port_identify(struct ionic *ionic);
     92int ionic_port_init(struct ionic *ionic);
     93int ionic_port_reset(struct ionic *ionic);
     94
     95const char *ionic_vf_attr_to_str(enum ionic_vf_attr attr);
     96
     97#endif /* _IONIC_H_ */