ionic_lif.h (8975B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ 3 4#ifndef _IONIC_LIF_H_ 5#define _IONIC_LIF_H_ 6 7#include <linux/ptp_clock_kernel.h> 8#include <linux/timecounter.h> 9#include <uapi/linux/net_tstamp.h> 10#include <linux/dim.h> 11#include <linux/pci.h> 12#include "ionic_rx_filter.h" 13 14#define IONIC_ADMINQ_LENGTH 16 /* must be a power of two */ 15#define IONIC_NOTIFYQ_LENGTH 64 /* must be a power of two */ 16 17#define ADD_ADDR true 18#define DEL_ADDR false 19#define CAN_SLEEP true 20#define CAN_NOT_SLEEP false 21 22#define IONIC_RX_COPYBREAK_DEFAULT 256 23#define IONIC_TX_BUDGET_DEFAULT 256 24 25struct ionic_tx_stats { 26 u64 pkts; 27 u64 bytes; 28 u64 csum_none; 29 u64 csum; 30 u64 tso; 31 u64 tso_bytes; 32 u64 frags; 33 u64 vlan_inserted; 34 u64 clean; 35 u64 linearize; 36 u64 crc32_csum; 37 u64 dma_map_err; 38 u64 hwstamp_valid; 39 u64 hwstamp_invalid; 40}; 41 42struct ionic_rx_stats { 43 u64 pkts; 44 u64 bytes; 45 u64 csum_none; 46 u64 csum_complete; 47 u64 dropped; 48 u64 vlan_stripped; 49 u64 csum_error; 50 u64 dma_map_err; 51 u64 alloc_err; 52 u64 hwstamp_valid; 53 u64 hwstamp_invalid; 54}; 55 56#define IONIC_QCQ_F_INITED BIT(0) 57#define IONIC_QCQ_F_SG BIT(1) 58#define IONIC_QCQ_F_INTR BIT(2) 59#define IONIC_QCQ_F_TX_STATS BIT(3) 60#define IONIC_QCQ_F_RX_STATS BIT(4) 61#define IONIC_QCQ_F_NOTIFYQ BIT(5) 62 63struct ionic_qcq { 64 void *q_base; 65 dma_addr_t q_base_pa; 66 u32 q_size; 67 void *cq_base; 68 dma_addr_t cq_base_pa; 69 u32 cq_size; 70 void *sg_base; 71 dma_addr_t sg_base_pa; 72 u32 sg_size; 73 struct dim dim; 74 struct ionic_queue q; 75 struct ionic_cq cq; 76 struct ionic_intr_info intr; 77 struct napi_struct napi; 78 unsigned int flags; 79 struct dentry *dentry; 80}; 81 82#define q_to_qcq(q) container_of(q, struct ionic_qcq, q) 83#define q_to_tx_stats(q) (&(q)->lif->txqstats[(q)->index]) 84#define q_to_rx_stats(q) (&(q)->lif->rxqstats[(q)->index]) 85#define napi_to_qcq(napi) container_of(napi, struct ionic_qcq, napi) 86#define napi_to_cq(napi) (&napi_to_qcq(napi)->cq) 87 88enum ionic_deferred_work_type { 89 IONIC_DW_TYPE_RX_MODE, 90 IONIC_DW_TYPE_LINK_STATUS, 91 IONIC_DW_TYPE_LIF_RESET, 92}; 93 94struct ionic_deferred_work { 95 struct list_head list; 96 enum ionic_deferred_work_type type; 97 union { 98 u8 addr[ETH_ALEN]; 99 u8 fw_status; 100 }; 101}; 102 103struct ionic_deferred { 104 spinlock_t lock; /* lock for deferred work list */ 105 struct list_head list; 106 struct work_struct work; 107}; 108 109struct ionic_lif_sw_stats { 110 u64 tx_packets; 111 u64 tx_bytes; 112 u64 rx_packets; 113 u64 rx_bytes; 114 u64 tx_tso; 115 u64 tx_tso_bytes; 116 u64 tx_csum_none; 117 u64 tx_csum; 118 u64 rx_csum_none; 119 u64 rx_csum_complete; 120 u64 rx_csum_error; 121 u64 tx_hwstamp_valid; 122 u64 tx_hwstamp_invalid; 123 u64 rx_hwstamp_valid; 124 u64 rx_hwstamp_invalid; 125 u64 hw_tx_dropped; 126 u64 hw_rx_dropped; 127 u64 hw_rx_over_errors; 128 u64 hw_rx_missed_errors; 129 u64 hw_tx_aborted_errors; 130}; 131 132enum ionic_lif_state_flags { 133 IONIC_LIF_F_INITED, 134 IONIC_LIF_F_UP, 135 IONIC_LIF_F_LINK_CHECK_REQUESTED, 136 IONIC_LIF_F_FILTER_SYNC_NEEDED, 137 IONIC_LIF_F_FW_RESET, 138 IONIC_LIF_F_FW_STOPPING, 139 IONIC_LIF_F_SPLIT_INTR, 140 IONIC_LIF_F_BROKEN, 141 IONIC_LIF_F_TX_DIM_INTR, 142 IONIC_LIF_F_RX_DIM_INTR, 143 144 /* leave this as last */ 145 IONIC_LIF_F_STATE_SIZE 146}; 147 148struct ionic_qtype_info { 149 u8 version; 150 u8 supported; 151 u64 features; 152 u16 desc_sz; 153 u16 comp_sz; 154 u16 sg_desc_sz; 155 u16 max_sg_elems; 156 u16 sg_desc_stride; 157}; 158 159struct ionic_phc; 160 161#define IONIC_LIF_NAME_MAX_SZ 32 162struct ionic_lif { 163 struct net_device *netdev; 164 DECLARE_BITMAP(state, IONIC_LIF_F_STATE_SIZE); 165 struct ionic *ionic; 166 unsigned int index; 167 unsigned int hw_index; 168 struct mutex queue_lock; /* lock for queue structures */ 169 struct mutex config_lock; /* lock for config actions */ 170 spinlock_t adminq_lock; /* lock for AdminQ operations */ 171 struct ionic_qcq *adminqcq; 172 struct ionic_qcq *notifyqcq; 173 struct ionic_qcq **txqcqs; 174 struct ionic_qcq *hwstamp_txq; 175 struct ionic_tx_stats *txqstats; 176 struct ionic_qcq **rxqcqs; 177 struct ionic_qcq *hwstamp_rxq; 178 struct ionic_rx_stats *rxqstats; 179 struct ionic_deferred deferred; 180 struct work_struct tx_timeout_work; 181 u64 last_eid; 182 unsigned int kern_pid; 183 u64 __iomem *kern_dbpage; 184 unsigned int neqs; 185 unsigned int nxqs; 186 unsigned int ntxq_descs; 187 unsigned int nrxq_descs; 188 u32 rx_copybreak; 189 u64 rxq_features; 190 u16 rx_mode; 191 u64 hw_features; 192 bool registered; 193 u16 lif_type; 194 unsigned int nmcast; 195 unsigned int nucast; 196 unsigned int nvlans; 197 unsigned int max_vlans; 198 char name[IONIC_LIF_NAME_MAX_SZ]; 199 200 union ionic_lif_identity *identity; 201 struct ionic_lif_info *info; 202 dma_addr_t info_pa; 203 u32 info_sz; 204 struct ionic_qtype_info qtype_info[IONIC_QTYPE_MAX]; 205 206 u16 rss_types; 207 u8 rss_hash_key[IONIC_RSS_HASH_KEY_SIZE]; 208 u8 *rss_ind_tbl; 209 dma_addr_t rss_ind_tbl_pa; 210 u32 rss_ind_tbl_sz; 211 212 struct ionic_rx_filters rx_filters; 213 u32 rx_coalesce_usecs; /* what the user asked for */ 214 u32 rx_coalesce_hw; /* what the hw is using */ 215 u32 tx_coalesce_usecs; /* what the user asked for */ 216 u32 tx_coalesce_hw; /* what the hw is using */ 217 unsigned int dbid_count; 218 219 struct ionic_phc *phc; 220 221 struct dentry *dentry; 222}; 223 224struct ionic_phc { 225 spinlock_t lock; /* lock for cc and tc */ 226 struct cyclecounter cc; 227 struct timecounter tc; 228 229 struct mutex config_lock; /* lock for ts_config */ 230 struct hwtstamp_config ts_config; 231 u64 ts_config_rx_filt; 232 u32 ts_config_tx_mode; 233 234 u32 init_cc_mult; 235 long aux_work_delay; 236 237 struct ptp_clock_info ptp_info; 238 struct ptp_clock *ptp; 239 struct ionic_lif *lif; 240}; 241 242struct ionic_queue_params { 243 unsigned int nxqs; 244 unsigned int ntxq_descs; 245 unsigned int nrxq_descs; 246 unsigned int intr_split; 247 u64 rxq_features; 248}; 249 250static inline void ionic_init_queue_params(struct ionic_lif *lif, 251 struct ionic_queue_params *qparam) 252{ 253 qparam->nxqs = lif->nxqs; 254 qparam->ntxq_descs = lif->ntxq_descs; 255 qparam->nrxq_descs = lif->nrxq_descs; 256 qparam->intr_split = test_bit(IONIC_LIF_F_SPLIT_INTR, lif->state); 257 qparam->rxq_features = lif->rxq_features; 258} 259 260static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs) 261{ 262 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult); 263 u32 div = le32_to_cpu(ionic->ident.dev.intr_coal_div); 264 265 /* Div-by-zero should never be an issue, but check anyway */ 266 if (!div || !mult) 267 return 0; 268 269 /* Round up in case usecs is close to the next hw unit */ 270 usecs += (div / mult) >> 1; 271 272 /* Convert from usecs to device units */ 273 return (usecs * mult) / div; 274} 275 276void ionic_link_status_check_request(struct ionic_lif *lif, bool can_sleep); 277void ionic_get_stats64(struct net_device *netdev, 278 struct rtnl_link_stats64 *ns); 279void ionic_lif_deferred_enqueue(struct ionic_deferred *def, 280 struct ionic_deferred_work *work); 281int ionic_lif_alloc(struct ionic *ionic); 282int ionic_lif_init(struct ionic_lif *lif); 283void ionic_lif_free(struct ionic_lif *lif); 284void ionic_lif_deinit(struct ionic_lif *lif); 285 286int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr); 287int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr); 288 289int ionic_lif_register(struct ionic_lif *lif); 290void ionic_lif_unregister(struct ionic_lif *lif); 291int ionic_lif_identify(struct ionic *ionic, u8 lif_type, 292 union ionic_lif_identity *lif_ident); 293int ionic_lif_size(struct ionic *ionic); 294 295#if IS_ENABLED(CONFIG_PTP_1588_CLOCK) 296void ionic_lif_hwstamp_replay(struct ionic_lif *lif); 297void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif); 298int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr); 299int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr); 300ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter); 301void ionic_lif_register_phc(struct ionic_lif *lif); 302void ionic_lif_unregister_phc(struct ionic_lif *lif); 303void ionic_lif_alloc_phc(struct ionic_lif *lif); 304void ionic_lif_free_phc(struct ionic_lif *lif); 305#else 306static inline void ionic_lif_hwstamp_replay(struct ionic_lif *lif) {} 307static inline void ionic_lif_hwstamp_recreate_queues(struct ionic_lif *lif) {} 308 309static inline int ionic_lif_hwstamp_set(struct ionic_lif *lif, struct ifreq *ifr) 310{ 311 return -EOPNOTSUPP; 312} 313 314static inline int ionic_lif_hwstamp_get(struct ionic_lif *lif, struct ifreq *ifr) 315{ 316 return -EOPNOTSUPP; 317} 318 319static inline ktime_t ionic_lif_phc_ktime(struct ionic_lif *lif, u64 counter) 320{ 321 return ns_to_ktime(0); 322} 323 324static inline void ionic_lif_register_phc(struct ionic_lif *lif) {} 325static inline void ionic_lif_unregister_phc(struct ionic_lif *lif) {} 326static inline void ionic_lif_alloc_phc(struct ionic_lif *lif) {} 327static inline void ionic_lif_free_phc(struct ionic_lif *lif) {} 328#endif 329 330int ionic_lif_create_hwstamp_txq(struct ionic_lif *lif); 331int ionic_lif_create_hwstamp_rxq(struct ionic_lif *lif); 332int ionic_lif_config_hwstamp_rxq_all(struct ionic_lif *lif, bool rx_all); 333int ionic_lif_set_hwstamp_txmode(struct ionic_lif *lif, u16 txstamp_mode); 334int ionic_lif_set_hwstamp_rxfilt(struct ionic_lif *lif, u64 pkt_class); 335 336int ionic_lif_rss_config(struct ionic_lif *lif, u16 types, 337 const u8 *key, const u32 *indir); 338void ionic_lif_rx_mode(struct ionic_lif *lif); 339int ionic_reconfigure_queues(struct ionic_lif *lif, 340 struct ionic_queue_params *qparam); 341#endif /* _IONIC_LIF_H_ */