am65-cpsw-nuss.h (4689B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 */ 5 6#ifndef AM65_CPSW_NUSS_H_ 7#define AM65_CPSW_NUSS_H_ 8 9#include <linux/if_ether.h> 10#include <linux/kernel.h> 11#include <linux/module.h> 12#include <linux/netdevice.h> 13#include <linux/phylink.h> 14#include <linux/platform_device.h> 15#include <linux/soc/ti/k3-ringacc.h> 16#include <net/devlink.h> 17#include "am65-cpsw-qos.h" 18 19struct am65_cpts; 20 21#define HOST_PORT_NUM 0 22 23#define AM65_CPSW_MAX_TX_QUEUES 8 24#define AM65_CPSW_MAX_RX_QUEUES 1 25#define AM65_CPSW_MAX_RX_FLOWS 1 26 27#define AM65_CPSW_PORT_VLAN_REG_OFFSET 0x014 28 29struct am65_cpsw_slave_data { 30 bool mac_only; 31 struct cpsw_sl *mac_sl; 32 struct device_node *phy_node; 33 phy_interface_t phy_if; 34 struct phy *ifphy; 35 bool rx_pause; 36 bool tx_pause; 37 u8 mac_addr[ETH_ALEN]; 38 int port_vlan; 39 struct phylink *phylink; 40 struct phylink_config phylink_config; 41}; 42 43struct am65_cpsw_port { 44 struct am65_cpsw_common *common; 45 struct net_device *ndev; 46 const char *name; 47 u32 port_id; 48 void __iomem *port_base; 49 void __iomem *stat_base; 50 void __iomem *fetch_ram_base; 51 bool disabled; 52 struct am65_cpsw_slave_data slave; 53 bool tx_ts_enabled; 54 bool rx_ts_enabled; 55 struct am65_cpsw_qos qos; 56 struct devlink_port devlink_port; 57}; 58 59struct am65_cpsw_host { 60 struct am65_cpsw_common *common; 61 void __iomem *port_base; 62 void __iomem *stat_base; 63}; 64 65struct am65_cpsw_tx_chn { 66 struct device *dma_dev; 67 struct napi_struct napi_tx; 68 struct am65_cpsw_common *common; 69 struct k3_cppi_desc_pool *desc_pool; 70 struct k3_udma_glue_tx_channel *tx_chn; 71 spinlock_t lock; /* protect TX rings in multi-port mode */ 72 int irq; 73 u32 id; 74 u32 descs_num; 75 char tx_chn_name[128]; 76}; 77 78struct am65_cpsw_rx_chn { 79 struct device *dev; 80 struct device *dma_dev; 81 struct k3_cppi_desc_pool *desc_pool; 82 struct k3_udma_glue_rx_channel *rx_chn; 83 u32 descs_num; 84 int irq; 85}; 86 87#define AM65_CPSW_QUIRK_I2027_NO_TX_CSUM BIT(0) 88 89struct am65_cpsw_pdata { 90 u32 quirks; 91 enum k3_ring_mode fdqring_mode; 92 const char *ale_dev_id; 93}; 94 95enum cpsw_devlink_param_id { 96 AM65_CPSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, 97 AM65_CPSW_DL_PARAM_SWITCH_MODE, 98}; 99 100struct am65_cpsw_devlink { 101 struct am65_cpsw_common *common; 102}; 103 104struct am65_cpsw_common { 105 struct device *dev; 106 struct device *mdio_dev; 107 struct am65_cpsw_pdata pdata; 108 109 void __iomem *ss_base; 110 void __iomem *cpsw_base; 111 112 u32 port_num; 113 struct am65_cpsw_host host; 114 struct am65_cpsw_port *ports; 115 u32 disabled_ports_mask; 116 struct net_device *dma_ndev; 117 118 int usage_count; /* number of opened ports */ 119 struct cpsw_ale *ale; 120 int tx_ch_num; 121 u32 rx_flow_id_base; 122 123 struct am65_cpsw_tx_chn tx_chns[AM65_CPSW_MAX_TX_QUEUES]; 124 struct completion tdown_complete; 125 atomic_t tdown_cnt; 126 127 struct am65_cpsw_rx_chn rx_chns; 128 struct napi_struct napi_rx; 129 130 bool rx_irq_disabled; 131 132 u32 nuss_ver; 133 u32 cpsw_ver; 134 unsigned long bus_freq; 135 bool pf_p0_rx_ptype_rrobin; 136 struct am65_cpts *cpts; 137 int est_enabled; 138 139 bool is_emac_mode; 140 u16 br_members; 141 int default_vlan; 142 struct devlink *devlink; 143 struct net_device *hw_bridge_dev; 144 struct notifier_block am65_cpsw_netdevice_nb; 145 unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; 146}; 147 148struct am65_cpsw_ndev_stats { 149 u64 tx_packets; 150 u64 tx_bytes; 151 u64 rx_packets; 152 u64 rx_bytes; 153 struct u64_stats_sync syncp; 154}; 155 156struct am65_cpsw_ndev_priv { 157 u32 msg_enable; 158 struct am65_cpsw_port *port; 159 struct am65_cpsw_ndev_stats __percpu *stats; 160 bool offload_fwd_mark; 161}; 162 163#define am65_ndev_to_priv(ndev) \ 164 ((struct am65_cpsw_ndev_priv *)netdev_priv(ndev)) 165#define am65_ndev_to_port(ndev) (am65_ndev_to_priv(ndev)->port) 166#define am65_ndev_to_common(ndev) (am65_ndev_to_port(ndev)->common) 167#define am65_ndev_to_slave(ndev) (&am65_ndev_to_port(ndev)->slave) 168 169#define am65_common_get_host(common) (&(common)->host) 170#define am65_common_get_port(common, id) (&(common)->ports[(id) - 1]) 171 172#define am65_cpsw_napi_to_common(pnapi) \ 173 container_of(pnapi, struct am65_cpsw_common, napi_rx) 174#define am65_cpsw_napi_to_tx_chn(pnapi) \ 175 container_of(pnapi, struct am65_cpsw_tx_chn, napi_tx) 176 177#define AM65_CPSW_DRV_NAME "am65-cpsw-nuss" 178 179#define AM65_CPSW_IS_CPSW2G(common) ((common)->port_num == 1) 180 181extern const struct ethtool_ops am65_cpsw_ethtool_ops_slave; 182 183void am65_cpsw_nuss_adjust_link(struct net_device *ndev); 184void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common); 185void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common); 186int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx); 187 188bool am65_cpsw_port_dev_check(const struct net_device *dev); 189 190#endif /* AM65_CPSW_NUSS_H_ */