cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

skfbiinc.h (2335B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/******************************************************************************
      3 *
      4 *	(C)Copyright 1998,1999 SysKonnect,
      5 *	a business unit of Schneider & Koch & Co. Datensysteme GmbH.
      6 *
      7 *	The information in this file is provided "AS IS" without warranty.
      8 *
      9 ******************************************************************************/
     10
     11#ifndef	_SKFBIINC_
     12#define _SKFBIINC_
     13
     14#include "supern_2.h"
     15
     16/*
     17 * special defines for use into .asm files
     18 */
     19#define ERR_FLAGS (FS_MSRABT | FS_SEAC2 | FS_SFRMERR | FS_SFRMTY1)
     20
     21#ifdef PCI
     22#define	IMASK_FAST	(IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TOKEN | \
     23			 IS_MINTR2 | IS_MINTR3 | IS_R1_P | \
     24			 IS_R1_C | IS_XA_C | IS_XS_C)
     25#endif
     26
     27#ifdef	PCI
     28#define	ISR_MASK	(IS_MINTR1 | IS_R1_F | IS_XS_F| IS_XA_F | IMASK_FAST)
     29#else
     30#define	ISR_MASK	(IS_MINTR1 | IS_MINTR2 | IMASK_FAST)
     31#endif
     32
     33#define	FMA_FM_CMDREG1	FMA(FM_CMDREG1)
     34#define	FMA_FM_CMDREG2	FMA(FM_CMDREG2)
     35#define	FMA_FM_STMCHN	FMA(FM_STMCHN)
     36#define	FMA_FM_RPR	FMA(FM_RPR)
     37#define	FMA_FM_WPXA0	FMA(FM_WPXA0)
     38#define	FMA_FM_WPXA2	FMA(FM_WPXA2)
     39#define	FMA_FM_MARR	FMA(FM_MARR)
     40#define	FMA_FM_MARW	FMA(FM_MARW)
     41#define	FMA_FM_MDRU	FMA(FM_MDRU)
     42#define	FMA_FM_MDRL	FMA(FM_MDRL)
     43#define	FMA_ST1L	FMA(FM_ST1L)
     44#define	FMA_ST1U	FMA(FM_ST1U)
     45#define	FMA_ST2L	FMA(FM_ST2L)
     46#define	FMA_ST2U	FMA(FM_ST2U)
     47#ifdef	SUPERNET_3
     48#define FMA_ST3L	FMA(FM_ST3L)
     49#define FMA_ST3U	FMA(FM_ST3U)
     50#endif
     51
     52#define TMODE_RRQ	RQ_RRQ
     53#define TMODE_WAQ2	RQ_WA2
     54#define	HSRA		HSR(0)
     55
     56
     57#define FMA_FM_ST1L	FMA_ST1L
     58#define FMA_FM_ST1U	FMA_ST1U
     59#define FMA_FM_ST2L	FMA_ST2L
     60#define FMA_FM_ST2U	FMA_ST2U
     61#ifdef	SUPERNET_3
     62#define FMA_FM_ST3L	FMA_ST3L
     63#define FMA_FM_ST3U	FMA_ST3U
     64#endif
     65
     66#define FMA_FM_SWPR	FMA(FM_SWPR)
     67
     68#define FMA_FM_RPXA0	FMA(FM_RPXA0)
     69
     70#define	FMA_FM_RPXS	FMA(FM_RPXS)
     71#define	FMA_FM_WPXS	FMA(FM_WPXS)
     72
     73#define	FMA_FM_IMSK1U	FMA(FM_IMSK1U)
     74#define	FMA_FM_IMSK1L	FMA(FM_IMSK1L)
     75
     76#define	FMA_FM_EAS	FMA(FM_EAS)
     77#define	FMA_FM_EAA0	FMA(FM_EAA0)
     78
     79#define	TMODE_WAQ0	RQ_WA0
     80#define TMODE_WSQ	RQ_WSQ
     81
     82/* Define default for DRV_PCM_STATE_CHANGE */
     83#ifndef	DRV_PCM_STATE_CHANGE
     84#define	DRV_PCM_STATE_CHANGE(smc,plc,p_state)	/* nothing */
     85#endif
     86
     87/* Define default for DRV_RMT_INDICATION */
     88#ifndef	DRV_RMT_INDICATION
     89#define	DRV_RMT_INDICATION(smc,i)	/* nothing */
     90#endif
     91
     92#endif	/* n_SKFBIINC_ */
     93