cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

baycom_epp.c (35165B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*****************************************************************************/
      3
      4/*
      5 *	baycom_epp.c  -- baycom epp radio modem driver.
      6 *
      7 *	Copyright (C) 1998-2000
      8 *          Thomas Sailer (sailer@ife.ee.ethz.ch)
      9 *
     10 *  Please note that the GPL allows you to use the driver, NOT the radio.
     11 *  In order to use the radio, you need a license from the communications
     12 *  authority of your country.
     13 *
     14 *  History:
     15 *   0.1  xx.xx.1998  Initial version by Matthias Welwarsky (dg2fef)
     16 *   0.2  21.04.1998  Massive rework by Thomas Sailer
     17 *                    Integrated FPGA EPP modem configuration routines
     18 *   0.3  11.05.1998  Took FPGA config out and moved it into a separate program
     19 *   0.4  26.07.1999  Adapted to new lowlevel parport driver interface
     20 *   0.5  03.08.1999  adapt to Linus' new __setup/__initcall
     21 *                    removed some pre-2.2 kernel compatibility cruft
     22 *   0.6  10.08.1999  Check if parport can do SPP and is safe to access during interrupt contexts
     23 *   0.7  12.02.2000  adapted to softnet driver interface
     24 */
     25
     26/*****************************************************************************/
     27
     28#include <linux/crc-ccitt.h>
     29#include <linux/module.h>
     30#include <linux/kernel.h>
     31#include <linux/init.h>
     32#include <linux/sched.h>
     33#include <linux/string.h>
     34#include <linux/workqueue.h>
     35#include <linux/fs.h>
     36#include <linux/parport.h>
     37#include <linux/if_arp.h>
     38#include <linux/hdlcdrv.h>
     39#include <linux/baycom.h>
     40#include <linux/jiffies.h>
     41#include <linux/random.h>
     42#include <net/ax25.h> 
     43#include <linux/uaccess.h>
     44
     45/* --------------------------------------------------------------------- */
     46
     47#define BAYCOM_DEBUG
     48#define BAYCOM_MAGIC 19730510
     49
     50/* --------------------------------------------------------------------- */
     51
     52static const char paranoia_str[] = KERN_ERR 
     53	"baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
     54
     55static const char bc_drvname[] = "baycom_epp";
     56static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
     57"baycom_epp: version 0.7\n";
     58
     59/* --------------------------------------------------------------------- */
     60
     61#define NR_PORTS 4
     62
     63static struct net_device *baycom_device[NR_PORTS];
     64
     65/* --------------------------------------------------------------------- */
     66
     67/* EPP status register */
     68#define EPP_DCDBIT      0x80
     69#define EPP_PTTBIT      0x08
     70#define EPP_NREF        0x01
     71#define EPP_NRAEF       0x02
     72#define EPP_NRHF        0x04
     73#define EPP_NTHF        0x20
     74#define EPP_NTAEF       0x10
     75#define EPP_NTEF        EPP_PTTBIT
     76
     77/* EPP control register */
     78#define EPP_TX_FIFO_ENABLE 0x10
     79#define EPP_RX_FIFO_ENABLE 0x08
     80#define EPP_MODEM_ENABLE   0x20
     81#define EPP_LEDS           0xC0
     82#define EPP_IRQ_ENABLE     0x10
     83
     84/* LPT registers */
     85#define LPTREG_ECONTROL       0x402
     86#define LPTREG_CONFIGB        0x401
     87#define LPTREG_CONFIGA        0x400
     88#define LPTREG_EPPDATA        0x004
     89#define LPTREG_EPPADDR        0x003
     90#define LPTREG_CONTROL        0x002
     91#define LPTREG_STATUS         0x001
     92#define LPTREG_DATA           0x000
     93
     94/* LPT control register */
     95#define LPTCTRL_PROGRAM       0x04   /* 0 to reprogram */
     96#define LPTCTRL_WRITE         0x01
     97#define LPTCTRL_ADDRSTB       0x08
     98#define LPTCTRL_DATASTB       0x02
     99#define LPTCTRL_INTEN         0x10
    100
    101/* LPT status register */
    102#define LPTSTAT_SHIFT_NINTR   6
    103#define LPTSTAT_WAIT          0x80
    104#define LPTSTAT_NINTR         (1<<LPTSTAT_SHIFT_NINTR)
    105#define LPTSTAT_PE            0x20
    106#define LPTSTAT_DONE          0x10
    107#define LPTSTAT_NERROR        0x08
    108#define LPTSTAT_EPPTIMEOUT    0x01
    109
    110/* LPT data register */
    111#define LPTDATA_SHIFT_TDI     0
    112#define LPTDATA_SHIFT_TMS     2
    113#define LPTDATA_TDI           (1<<LPTDATA_SHIFT_TDI)
    114#define LPTDATA_TCK           0x02
    115#define LPTDATA_TMS           (1<<LPTDATA_SHIFT_TMS)
    116#define LPTDATA_INITBIAS      0x80
    117
    118
    119/* EPP modem config/status bits */
    120#define EPP_DCDBIT            0x80
    121#define EPP_PTTBIT            0x08
    122#define EPP_RXEBIT            0x01
    123#define EPP_RXAEBIT           0x02
    124#define EPP_RXHFULL           0x04
    125
    126#define EPP_NTHF              0x20
    127#define EPP_NTAEF             0x10
    128#define EPP_NTEF              EPP_PTTBIT
    129
    130#define EPP_TX_FIFO_ENABLE    0x10
    131#define EPP_RX_FIFO_ENABLE    0x08
    132#define EPP_MODEM_ENABLE      0x20
    133#define EPP_LEDS              0xC0
    134#define EPP_IRQ_ENABLE        0x10
    135
    136/* Xilinx 4k JTAG instructions */
    137#define XC4K_IRLENGTH   3
    138#define XC4K_EXTEST     0
    139#define XC4K_PRELOAD    1
    140#define XC4K_CONFIGURE  5
    141#define XC4K_BYPASS     7
    142
    143#define EPP_CONVENTIONAL  0
    144#define EPP_FPGA          1
    145#define EPP_FPGAEXTSTATUS 2
    146
    147#define TXBUFFER_SIZE     ((HDLCDRV_MAXFLEN*6/5)+8)
    148
    149/* ---------------------------------------------------------------------- */
    150/*
    151 * Information that need to be kept for each board.
    152 */
    153
    154struct baycom_state {
    155	int magic;
    156
    157        struct pardevice *pdev;
    158	struct net_device *dev;
    159	unsigned int work_running;
    160	struct delayed_work run_work;
    161	unsigned int modem;
    162	unsigned int bitrate;
    163	unsigned char stat;
    164
    165	struct {
    166		unsigned int intclk;
    167		unsigned int fclk;
    168		unsigned int bps;
    169		unsigned int extmodem;
    170		unsigned int loopback;
    171	} cfg;
    172
    173        struct hdlcdrv_channel_params ch_params;
    174
    175        struct {
    176		unsigned int bitbuf, bitstream, numbits, state;
    177		unsigned char *bufptr;
    178		int bufcnt;
    179		unsigned char buf[TXBUFFER_SIZE];
    180        } hdlcrx;
    181
    182        struct {
    183		int calibrate;
    184                int slotcnt;
    185		int flags;
    186		enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
    187		unsigned char *bufptr;
    188		int bufcnt;
    189		unsigned char buf[TXBUFFER_SIZE];
    190        } hdlctx;
    191
    192	unsigned int ptt_keyed;
    193	struct sk_buff *skb;  /* next transmit packet  */
    194
    195#ifdef BAYCOM_DEBUG
    196	struct debug_vals {
    197		unsigned long last_jiffies;
    198		unsigned cur_intcnt;
    199		unsigned last_intcnt;
    200		int cur_pllcorr;
    201		int last_pllcorr;
    202		unsigned int mod_cycles;
    203		unsigned int demod_cycles;
    204	} debug_vals;
    205#endif /* BAYCOM_DEBUG */
    206};
    207
    208/* --------------------------------------------------------------------- */
    209
    210#define KISS_VERBOSE
    211
    212/* --------------------------------------------------------------------- */
    213
    214#define PARAM_TXDELAY   1
    215#define PARAM_PERSIST   2
    216#define PARAM_SLOTTIME  3
    217#define PARAM_TXTAIL    4
    218#define PARAM_FULLDUP   5
    219#define PARAM_HARDWARE  6
    220#define PARAM_RETURN    255
    221
    222/* --------------------------------------------------------------------- */
    223/*
    224 * the CRC routines are stolen from WAMPES
    225 * by Dieter Deyke
    226 */
    227
    228
    229/*---------------------------------------------------------------------------*/
    230
    231#if 0
    232static inline void append_crc_ccitt(unsigned char *buffer, int len)
    233{
    234	unsigned int crc = 0xffff;
    235
    236	for (;len>0;len--)
    237		crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
    238	crc ^= 0xffff;
    239	*buffer++ = crc;
    240	*buffer++ = crc >> 8;
    241}
    242#endif
    243
    244/*---------------------------------------------------------------------------*/
    245
    246static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
    247{
    248	return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
    249}
    250
    251/*---------------------------------------------------------------------------*/
    252
    253static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
    254{
    255	return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
    256}
    257
    258/* ---------------------------------------------------------------------- */
    259
    260#define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
    261
    262/* --------------------------------------------------------------------- */
    263
    264static inline void baycom_int_freq(struct baycom_state *bc)
    265{
    266#ifdef BAYCOM_DEBUG
    267	unsigned long cur_jiffies = jiffies;
    268	/*
    269	 * measure the interrupt frequency
    270	 */
    271	bc->debug_vals.cur_intcnt++;
    272	if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
    273		bc->debug_vals.last_jiffies = cur_jiffies;
    274		bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
    275		bc->debug_vals.cur_intcnt = 0;
    276		bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
    277		bc->debug_vals.cur_pllcorr = 0;
    278	}
    279#endif /* BAYCOM_DEBUG */
    280}
    281
    282/* ---------------------------------------------------------------------- */
    283/*
    284 *    eppconfig_path should be setable  via /proc/sys.
    285 */
    286
    287static char const eppconfig_path[] = "/usr/sbin/eppfpga";
    288
    289static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
    290
    291/* eppconfig: called during ifconfig up to configure the modem */
    292static int eppconfig(struct baycom_state *bc)
    293{
    294	char modearg[256];
    295	char portarg[16];
    296        char *argv[] = {
    297		(char *)eppconfig_path,
    298		"-s",
    299		"-p", portarg,
    300		"-m", modearg,
    301		NULL };
    302
    303	/* set up arguments */
    304	sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
    305		bc->cfg.intclk ? "int" : "ext",
    306		bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
    307		(bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
    308		bc->cfg.loopback ? ",loopback" : "");
    309	sprintf(portarg, "%ld", bc->pdev->port->base);
    310	printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
    311
    312	return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC);
    313}
    314
    315/* ---------------------------------------------------------------------- */
    316
    317static inline void do_kiss_params(struct baycom_state *bc,
    318				  unsigned char *data, unsigned long len)
    319{
    320
    321#ifdef KISS_VERBOSE
    322#define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
    323#else /* KISS_VERBOSE */	      
    324#define PKP(a,b) 
    325#endif /* KISS_VERBOSE */	      
    326
    327	if (len < 2)
    328		return;
    329	switch(data[0]) {
    330	case PARAM_TXDELAY:
    331		bc->ch_params.tx_delay = data[1];
    332		PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
    333		break;
    334	case PARAM_PERSIST:   
    335		bc->ch_params.ppersist = data[1];
    336		PKP("p persistence = %u", bc->ch_params.ppersist);
    337		break;
    338	case PARAM_SLOTTIME:  
    339		bc->ch_params.slottime = data[1];
    340		PKP("slot time = %ums", bc->ch_params.slottime);
    341		break;
    342	case PARAM_TXTAIL:    
    343		bc->ch_params.tx_tail = data[1];
    344		PKP("TX tail = %ums", bc->ch_params.tx_tail);
    345		break;
    346	case PARAM_FULLDUP:   
    347		bc->ch_params.fulldup = !!data[1];
    348		PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
    349		break;
    350	default:
    351		break;
    352	}
    353#undef PKP
    354}
    355
    356/* --------------------------------------------------------------------- */
    357
    358static void encode_hdlc(struct baycom_state *bc)
    359{
    360	struct sk_buff *skb;
    361	unsigned char *wp, *bp;
    362	int pkt_len;
    363        unsigned bitstream, notbitstream, bitbuf, numbit, crc;
    364	unsigned char crcarr[2];
    365	int j;
    366	
    367	if (bc->hdlctx.bufcnt > 0)
    368		return;
    369	skb = bc->skb;
    370	if (!skb)
    371		return;
    372	bc->skb = NULL;
    373	pkt_len = skb->len-1; /* strip KISS byte */
    374	wp = bc->hdlctx.buf;
    375	bp = skb->data+1;
    376	crc = calc_crc_ccitt(bp, pkt_len);
    377	crcarr[0] = crc;
    378	crcarr[1] = crc >> 8;
    379	*wp++ = 0x7e;
    380	bitstream = bitbuf = numbit = 0;
    381	while (pkt_len > -2) {
    382		bitstream >>= 8;
    383		bitstream |= ((unsigned int)*bp) << 8;
    384		bitbuf |= ((unsigned int)*bp) << numbit;
    385		notbitstream = ~bitstream;
    386		bp++;
    387		pkt_len--;
    388		if (!pkt_len)
    389			bp = crcarr;
    390		for (j = 0; j < 8; j++)
    391			if (unlikely(!(notbitstream & (0x1f0 << j)))) {
    392				bitstream &= ~(0x100 << j);
    393				bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
    394					((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
    395				numbit++;
    396				notbitstream = ~bitstream;
    397			}
    398		numbit += 8;
    399		while (numbit >= 8) {
    400			*wp++ = bitbuf;
    401			bitbuf >>= 8;
    402			numbit -= 8;
    403		}
    404	}
    405	bitbuf |= 0x7e7e << numbit;
    406	numbit += 16;
    407	while (numbit >= 8) {
    408		*wp++ = bitbuf;
    409		bitbuf >>= 8;
    410		numbit -= 8;
    411	}
    412	bc->hdlctx.bufptr = bc->hdlctx.buf;
    413	bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
    414	dev_kfree_skb(skb);
    415	bc->dev->stats.tx_packets++;
    416}
    417
    418/* ---------------------------------------------------------------------- */
    419
    420static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
    421{
    422	struct parport *pp = bc->pdev->port;
    423	unsigned char tmp[128];
    424	int i, j;
    425
    426	if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
    427		bc->hdlctx.state = tx_idle;
    428	if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
    429		if (bc->hdlctx.bufcnt <= 0)
    430			encode_hdlc(bc);
    431		if (bc->hdlctx.bufcnt <= 0)
    432			return 0;
    433		if (!bc->ch_params.fulldup) {
    434			if (!(stat & EPP_DCDBIT)) {
    435				bc->hdlctx.slotcnt = bc->ch_params.slottime;
    436				return 0;
    437			}
    438			if ((--bc->hdlctx.slotcnt) > 0)
    439				return 0;
    440			bc->hdlctx.slotcnt = bc->ch_params.slottime;
    441			if ((prandom_u32() % 256) > bc->ch_params.ppersist)
    442				return 0;
    443		}
    444	}
    445	if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
    446		bc->hdlctx.state = tx_keyup;
    447		bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
    448		bc->ptt_keyed++;
    449	}
    450	while (cnt > 0) {
    451		switch (bc->hdlctx.state) {
    452		case tx_keyup:
    453			i = min_t(int, cnt, bc->hdlctx.flags);
    454			cnt -= i;
    455			bc->hdlctx.flags -= i;
    456			if (bc->hdlctx.flags <= 0)
    457				bc->hdlctx.state = tx_data;
    458			memset(tmp, 0x7e, sizeof(tmp));
    459			while (i > 0) {
    460				j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
    461				if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
    462					return -1;
    463				i -= j;
    464			}
    465			break;
    466
    467		case tx_data:
    468			if (bc->hdlctx.bufcnt <= 0) {
    469				encode_hdlc(bc);
    470				if (bc->hdlctx.bufcnt <= 0) {
    471					bc->hdlctx.state = tx_tail;
    472					bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
    473					break;
    474				}
    475			}
    476			i = min_t(int, cnt, bc->hdlctx.bufcnt);
    477			bc->hdlctx.bufcnt -= i;
    478			cnt -= i;
    479			if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
    480					return -1;
    481			bc->hdlctx.bufptr += i;
    482			break;
    483			
    484		case tx_tail:
    485			encode_hdlc(bc);
    486			if (bc->hdlctx.bufcnt > 0) {
    487				bc->hdlctx.state = tx_data;
    488				break;
    489			}
    490			i = min_t(int, cnt, bc->hdlctx.flags);
    491			if (i) {
    492				cnt -= i;
    493				bc->hdlctx.flags -= i;
    494				memset(tmp, 0x7e, sizeof(tmp));
    495				while (i > 0) {
    496					j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
    497					if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
    498						return -1;
    499					i -= j;
    500				}
    501				break;
    502			}
    503			fallthrough;
    504
    505		default:
    506			if (bc->hdlctx.calibrate <= 0)
    507				return 0;
    508			i = min_t(int, cnt, bc->hdlctx.calibrate);
    509			cnt -= i;
    510			bc->hdlctx.calibrate -= i;
    511			memset(tmp, 0, sizeof(tmp));
    512			while (i > 0) {
    513				j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
    514				if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
    515					return -1;
    516				i -= j;
    517			}
    518			break;
    519		}
    520	}
    521	return 0;
    522}
    523
    524/* ---------------------------------------------------------------------- */
    525
    526static void do_rxpacket(struct net_device *dev)
    527{
    528	struct baycom_state *bc = netdev_priv(dev);
    529	struct sk_buff *skb;
    530	unsigned char *cp;
    531	unsigned pktlen;
    532
    533	if (bc->hdlcrx.bufcnt < 4) 
    534		return;
    535	if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt)) 
    536		return;
    537	pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
    538	if (!(skb = dev_alloc_skb(pktlen))) {
    539		printk("%s: memory squeeze, dropping packet\n", dev->name);
    540		dev->stats.rx_dropped++;
    541		return;
    542	}
    543	cp = skb_put(skb, pktlen);
    544	*cp++ = 0; /* KISS kludge */
    545	memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
    546	skb->protocol = ax25_type_trans(skb, dev);
    547	netif_rx(skb);
    548	dev->stats.rx_packets++;
    549}
    550
    551static int receive(struct net_device *dev, int cnt)
    552{
    553	struct baycom_state *bc = netdev_priv(dev);
    554	struct parport *pp = bc->pdev->port;
    555        unsigned int bitbuf, notbitstream, bitstream, numbits, state;
    556	unsigned char tmp[128];
    557        unsigned char *cp;
    558	int cnt2, ret = 0;
    559	int j;
    560        
    561        numbits = bc->hdlcrx.numbits;
    562	state = bc->hdlcrx.state;
    563	bitstream = bc->hdlcrx.bitstream;
    564	bitbuf = bc->hdlcrx.bitbuf;
    565	while (cnt > 0) {
    566		cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
    567		cnt -= cnt2;
    568		if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
    569			ret = -1;
    570			break;
    571		}
    572		cp = tmp;
    573		for (; cnt2 > 0; cnt2--, cp++) {
    574			bitstream >>= 8;
    575			bitstream |= (*cp) << 8;
    576			bitbuf >>= 8;
    577			bitbuf |= (*cp) << 8;
    578			numbits += 8;
    579			notbitstream = ~bitstream;
    580			for (j = 0; j < 8; j++) {
    581
    582				/* flag or abort */
    583			        if (unlikely(!(notbitstream & (0x0fc << j)))) {
    584
    585					/* abort received */
    586					if (!(notbitstream & (0x1fc << j)))
    587						state = 0;
    588
    589					/* flag received */
    590					else if ((bitstream & (0x1fe << j)) == (0x0fc << j)) {
    591						if (state)
    592							do_rxpacket(dev);
    593						bc->hdlcrx.bufcnt = 0;
    594						bc->hdlcrx.bufptr = bc->hdlcrx.buf;
    595						state = 1;
    596						numbits = 7-j;
    597					}
    598				}
    599
    600				/* stuffed bit */
    601				else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
    602					numbits--;
    603					bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
    604					}
    605				}
    606			while (state && numbits >= 8) {
    607				if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
    608					state = 0;
    609				} else {
    610					*(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
    611					bc->hdlcrx.bufcnt++;
    612					numbits -= 8;
    613				}
    614			}
    615		}
    616	}
    617        bc->hdlcrx.numbits = numbits;
    618	bc->hdlcrx.state = state;
    619	bc->hdlcrx.bitstream = bitstream;
    620	bc->hdlcrx.bitbuf = bitbuf;
    621	return ret;
    622}
    623
    624/* --------------------------------------------------------------------- */
    625
    626#if defined(__i386__) && !defined(CONFIG_UML)
    627#include <asm/msr.h>
    628#define GETTICK(x)						\
    629({								\
    630	if (boot_cpu_has(X86_FEATURE_TSC))			\
    631		x = (unsigned int)rdtsc();			\
    632})
    633#else /* __i386__  && !CONFIG_UML */
    634#define GETTICK(x)
    635#endif /* __i386__  && !CONFIG_UML */
    636
    637static void epp_bh(struct work_struct *work)
    638{
    639	struct net_device *dev;
    640	struct baycom_state *bc;
    641	struct parport *pp;
    642	unsigned char stat;
    643	unsigned char tmp[2];
    644	unsigned int time1 = 0, time2 = 0, time3 = 0;
    645	int cnt, cnt2;
    646
    647	bc = container_of(work, struct baycom_state, run_work.work);
    648	dev = bc->dev;
    649	if (!bc->work_running)
    650		return;
    651	baycom_int_freq(bc);
    652	pp = bc->pdev->port;
    653	/* update status */
    654	if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
    655		goto epptimeout;
    656	bc->stat = stat;
    657	bc->debug_vals.last_pllcorr = stat;
    658	GETTICK(time1);
    659	if (bc->modem == EPP_FPGAEXTSTATUS) {
    660		/* get input count */
    661		tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
    662		if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
    663			goto epptimeout;
    664		if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
    665			goto epptimeout;
    666		cnt = tmp[0] | (tmp[1] << 8);
    667		cnt &= 0x7fff;
    668		/* get output count */
    669		tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
    670		if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
    671			goto epptimeout;
    672		if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
    673			goto epptimeout;
    674		cnt2 = tmp[0] | (tmp[1] << 8);
    675		cnt2 = 16384 - (cnt2 & 0x7fff);
    676		/* return to normal */
    677		tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
    678		if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
    679			goto epptimeout;
    680		if (transmit(bc, cnt2, stat))
    681			goto epptimeout;
    682		GETTICK(time2);
    683		if (receive(dev, cnt))
    684			goto epptimeout;
    685		if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
    686			goto epptimeout;
    687		bc->stat = stat;
    688	} else {
    689		/* try to tx */
    690		switch (stat & (EPP_NTAEF|EPP_NTHF)) {
    691		case EPP_NTHF:
    692			cnt = 2048 - 256;
    693			break;
    694		
    695		case EPP_NTAEF:
    696			cnt = 2048 - 1793;
    697			break;
    698		
    699		case 0:
    700			cnt = 0;
    701			break;
    702		
    703		default:
    704			cnt = 2048 - 1025;
    705			break;
    706		}
    707		if (transmit(bc, cnt, stat))
    708			goto epptimeout;
    709		GETTICK(time2);
    710		/* do receiver */
    711		while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
    712			switch (stat & (EPP_NRAEF|EPP_NRHF)) {
    713			case EPP_NRAEF:
    714				cnt = 1025;
    715				break;
    716
    717			case 0:
    718				cnt = 1793;
    719				break;
    720
    721			default:
    722				cnt = 256;
    723				break;
    724			}
    725			if (receive(dev, cnt))
    726				goto epptimeout;
    727			if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
    728				goto epptimeout;
    729		}
    730		cnt = 0;
    731		if (bc->bitrate < 50000)
    732			cnt = 256;
    733		else if (bc->bitrate < 100000)
    734			cnt = 128;
    735		while (cnt > 0 && stat & EPP_NREF) {
    736			if (receive(dev, 1))
    737				goto epptimeout;
    738			cnt--;
    739			if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
    740				goto epptimeout;
    741		}
    742	}
    743	GETTICK(time3);
    744#ifdef BAYCOM_DEBUG
    745	bc->debug_vals.mod_cycles = time2 - time1;
    746	bc->debug_vals.demod_cycles = time3 - time2;
    747#endif /* BAYCOM_DEBUG */
    748	schedule_delayed_work(&bc->run_work, 1);
    749	if (!bc->skb)
    750		netif_wake_queue(dev);
    751	return;
    752 epptimeout:
    753	printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
    754}
    755
    756/* ---------------------------------------------------------------------- */
    757/*
    758 * ===================== network driver interface =========================
    759 */
    760
    761static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
    762{
    763	struct baycom_state *bc = netdev_priv(dev);
    764
    765	if (skb->protocol == htons(ETH_P_IP))
    766		return ax25_ip_xmit(skb);
    767
    768	if (skb->data[0] != 0) {
    769		do_kiss_params(bc, skb->data, skb->len);
    770		dev_kfree_skb(skb);
    771		return NETDEV_TX_OK;
    772	}
    773	if (bc->skb) {
    774		dev_kfree_skb(skb);
    775		return NETDEV_TX_OK;
    776	}
    777	/* strip KISS byte */
    778	if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
    779		dev_kfree_skb(skb);
    780		return NETDEV_TX_OK;
    781	}
    782	netif_stop_queue(dev);
    783	bc->skb = skb;
    784	return NETDEV_TX_OK;
    785}
    786
    787/* --------------------------------------------------------------------- */
    788
    789static int baycom_set_mac_address(struct net_device *dev, void *addr)
    790{
    791	struct sockaddr *sa = (struct sockaddr *)addr;
    792
    793	/* addr is an AX.25 shifted ASCII mac address */
    794	dev_addr_set(dev, sa->sa_data);
    795	return 0;                                         
    796}
    797
    798/* --------------------------------------------------------------------- */
    799
    800static void epp_wakeup(void *handle)
    801{
    802        struct net_device *dev = (struct net_device *)handle;
    803        struct baycom_state *bc = netdev_priv(dev);
    804
    805        printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
    806        if (!parport_claim(bc->pdev))
    807                printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
    808}
    809
    810/* --------------------------------------------------------------------- */
    811
    812/*
    813 * Open/initialize the board. This is called (in the current kernel)
    814 * sometime after booting when the 'ifconfig' program is run.
    815 *
    816 * This routine should set everything up anew at each open, even
    817 * registers that "should" only need to be set once at boot, so that
    818 * there is non-reboot way to recover if something goes wrong.
    819 */
    820
    821static int epp_open(struct net_device *dev)
    822{
    823	struct baycom_state *bc = netdev_priv(dev);
    824        struct parport *pp = parport_find_base(dev->base_addr);
    825	unsigned int i, j;
    826	unsigned char tmp[128];
    827	unsigned char stat;
    828	unsigned long tstart;
    829	struct pardev_cb par_cb;
    830	
    831        if (!pp) {
    832                printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
    833                return -ENXIO;
    834        }
    835#if 0
    836        if (pp->irq < 0) {
    837                printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
    838		parport_put_port(pp);
    839                return -ENXIO;
    840        }
    841#endif
    842	if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
    843                printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
    844		       bc_drvname, pp->base);
    845		parport_put_port(pp);
    846                return -EIO;
    847	}
    848	memset(&bc->modem, 0, sizeof(bc->modem));
    849	memset(&par_cb, 0, sizeof(par_cb));
    850	par_cb.wakeup = epp_wakeup;
    851	par_cb.private = (void *)dev;
    852	par_cb.flags = PARPORT_DEV_EXCL;
    853	for (i = 0; i < NR_PORTS; i++)
    854		if (baycom_device[i] == dev)
    855			break;
    856
    857	if (i == NR_PORTS) {
    858		pr_err("%s: no device found\n", bc_drvname);
    859		parport_put_port(pp);
    860		return -ENODEV;
    861	}
    862
    863	bc->pdev = parport_register_dev_model(pp, dev->name, &par_cb, i);
    864	parport_put_port(pp);
    865        if (!bc->pdev) {
    866                printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
    867                return -ENXIO;
    868        }
    869        if (parport_claim(bc->pdev)) {
    870                printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
    871                parport_unregister_device(bc->pdev);
    872                return -EBUSY;
    873        }
    874        dev->irq = /*pp->irq*/ 0;
    875	INIT_DELAYED_WORK(&bc->run_work, epp_bh);
    876	bc->work_running = 1;
    877	bc->modem = EPP_CONVENTIONAL;
    878	if (eppconfig(bc))
    879		printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
    880	else
    881		bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
    882	parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
    883	/* reset the modem */
    884	tmp[0] = 0;
    885	tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
    886	if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
    887		goto epptimeout;
    888	/* autoprobe baud rate */
    889	tstart = jiffies;
    890	i = 0;
    891	while (time_before(jiffies, tstart + HZ/3)) {
    892		if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
    893			goto epptimeout;
    894		if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
    895			schedule();
    896			continue;
    897		}
    898		if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
    899			goto epptimeout;
    900		if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
    901			goto epptimeout;
    902		i += 256;
    903	}
    904	for (j = 0; j < 256; j++) {
    905		if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
    906			goto epptimeout;
    907		if (!(stat & EPP_NREF))
    908			break;
    909		if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
    910			goto epptimeout;
    911		i++;
    912	}
    913	tstart = jiffies - tstart;
    914	bc->bitrate = i * (8 * HZ) / tstart;
    915	j = 1;
    916	i = bc->bitrate >> 3;
    917	while (j < 7 && i > 150) {
    918		j++;
    919		i >>= 1;
    920	}
    921	printk(KERN_INFO "%s: autoprobed bitrate: %d  int divider: %d  int rate: %d\n", 
    922	       bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
    923	tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
    924	if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
    925		goto epptimeout;
    926	/*
    927	 * initialise hdlc variables
    928	 */
    929	bc->hdlcrx.state = 0;
    930	bc->hdlcrx.numbits = 0;
    931	bc->hdlctx.state = tx_idle;
    932	bc->hdlctx.bufcnt = 0;
    933	bc->hdlctx.slotcnt = bc->ch_params.slottime;
    934	bc->hdlctx.calibrate = 0;
    935	/* start the bottom half stuff */
    936	schedule_delayed_work(&bc->run_work, 1);
    937	netif_start_queue(dev);
    938	return 0;
    939
    940 epptimeout:
    941	printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
    942	parport_write_control(pp, 0); /* reset the adapter */
    943        parport_release(bc->pdev);
    944        parport_unregister_device(bc->pdev);
    945	return -EIO;
    946}
    947
    948/* --------------------------------------------------------------------- */
    949
    950static int epp_close(struct net_device *dev)
    951{
    952	struct baycom_state *bc = netdev_priv(dev);
    953	struct parport *pp = bc->pdev->port;
    954	unsigned char tmp[1];
    955
    956	bc->work_running = 0;
    957	cancel_delayed_work_sync(&bc->run_work);
    958	bc->stat = EPP_DCDBIT;
    959	tmp[0] = 0;
    960	pp->ops->epp_write_addr(pp, tmp, 1, 0);
    961	parport_write_control(pp, 0); /* reset the adapter */
    962        parport_release(bc->pdev);
    963        parport_unregister_device(bc->pdev);
    964	dev_kfree_skb(bc->skb);
    965	bc->skb = NULL;
    966	printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
    967	       bc_drvname, dev->base_addr, dev->irq);
    968	return 0;
    969}
    970
    971/* --------------------------------------------------------------------- */
    972
    973static int baycom_setmode(struct baycom_state *bc, const char *modestr)
    974{
    975	const char *cp;
    976
    977	if (strstr(modestr,"intclk"))
    978		bc->cfg.intclk = 1;
    979	if (strstr(modestr,"extclk"))
    980		bc->cfg.intclk = 0;
    981	if (strstr(modestr,"intmodem"))
    982		bc->cfg.extmodem = 0;
    983	if (strstr(modestr,"extmodem"))
    984		bc->cfg.extmodem = 1;
    985	if (strstr(modestr,"loopback"))
    986		bc->cfg.loopback = 1;
    987	if (strstr(modestr, "noloopback"))
    988		bc->cfg.loopback = 0;
    989	if ((cp = strstr(modestr,"fclk="))) {
    990		bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
    991		if (bc->cfg.fclk < 1000000)
    992			bc->cfg.fclk = 1000000;
    993		if (bc->cfg.fclk > 25000000)
    994			bc->cfg.fclk = 25000000;
    995	}
    996	if ((cp = strstr(modestr,"bps="))) {
    997		bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
    998		if (bc->cfg.bps < 1000)
    999			bc->cfg.bps = 1000;
   1000		if (bc->cfg.bps > 1500000)
   1001			bc->cfg.bps = 1500000;
   1002	}
   1003	return 0;
   1004}
   1005
   1006/* --------------------------------------------------------------------- */
   1007
   1008static int baycom_siocdevprivate(struct net_device *dev, struct ifreq *ifr,
   1009				 void __user *data, int cmd)
   1010{
   1011	struct baycom_state *bc = netdev_priv(dev);
   1012	struct hdlcdrv_ioctl hi;
   1013
   1014	if (cmd != SIOCDEVPRIVATE)
   1015		return -ENOIOCTLCMD;
   1016
   1017	if (copy_from_user(&hi, data, sizeof(hi)))
   1018		return -EFAULT;
   1019	switch (hi.cmd) {
   1020	default:
   1021		return -ENOIOCTLCMD;
   1022
   1023	case HDLCDRVCTL_GETCHANNELPAR:
   1024		hi.data.cp.tx_delay = bc->ch_params.tx_delay;
   1025		hi.data.cp.tx_tail = bc->ch_params.tx_tail;
   1026		hi.data.cp.slottime = bc->ch_params.slottime;
   1027		hi.data.cp.ppersist = bc->ch_params.ppersist;
   1028		hi.data.cp.fulldup = bc->ch_params.fulldup;
   1029		break;
   1030
   1031	case HDLCDRVCTL_SETCHANNELPAR:
   1032		if (!capable(CAP_NET_ADMIN))
   1033			return -EACCES;
   1034		bc->ch_params.tx_delay = hi.data.cp.tx_delay;
   1035		bc->ch_params.tx_tail = hi.data.cp.tx_tail;
   1036		bc->ch_params.slottime = hi.data.cp.slottime;
   1037		bc->ch_params.ppersist = hi.data.cp.ppersist;
   1038		bc->ch_params.fulldup = hi.data.cp.fulldup;
   1039		bc->hdlctx.slotcnt = 1;
   1040		return 0;
   1041		
   1042	case HDLCDRVCTL_GETMODEMPAR:
   1043		hi.data.mp.iobase = dev->base_addr;
   1044		hi.data.mp.irq = dev->irq;
   1045		hi.data.mp.dma = dev->dma;
   1046		hi.data.mp.dma2 = 0;
   1047		hi.data.mp.seriobase = 0;
   1048		hi.data.mp.pariobase = 0;
   1049		hi.data.mp.midiiobase = 0;
   1050		break;
   1051
   1052	case HDLCDRVCTL_SETMODEMPAR:
   1053		if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
   1054			return -EACCES;
   1055		dev->base_addr = hi.data.mp.iobase;
   1056		dev->irq = /*hi.data.mp.irq*/0;
   1057		dev->dma = /*hi.data.mp.dma*/0;
   1058		return 0;	
   1059		
   1060	case HDLCDRVCTL_GETSTAT:
   1061		hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
   1062		hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
   1063		hi.data.cs.ptt_keyed = bc->ptt_keyed;
   1064		hi.data.cs.tx_packets = dev->stats.tx_packets;
   1065		hi.data.cs.tx_errors = dev->stats.tx_errors;
   1066		hi.data.cs.rx_packets = dev->stats.rx_packets;
   1067		hi.data.cs.rx_errors = dev->stats.rx_errors;
   1068		break;		
   1069
   1070	case HDLCDRVCTL_OLDGETSTAT:
   1071		hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
   1072		hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
   1073		hi.data.ocs.ptt_keyed = bc->ptt_keyed;
   1074		break;		
   1075
   1076	case HDLCDRVCTL_CALIBRATE:
   1077		if (!capable(CAP_SYS_RAWIO))
   1078			return -EACCES;
   1079		bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
   1080		return 0;
   1081
   1082	case HDLCDRVCTL_DRIVERNAME:
   1083		strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
   1084		break;
   1085		
   1086	case HDLCDRVCTL_GETMODE:
   1087		sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s", 
   1088			bc->cfg.intclk ? "int" : "ext",
   1089			bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
   1090			bc->cfg.loopback ? ",loopback" : "");
   1091		break;
   1092
   1093	case HDLCDRVCTL_SETMODE:
   1094		if (!capable(CAP_NET_ADMIN) || netif_running(dev))
   1095			return -EACCES;
   1096		hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
   1097		return baycom_setmode(bc, hi.data.modename);
   1098
   1099	case HDLCDRVCTL_MODELIST:
   1100		strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
   1101			sizeof(hi.data.modename));
   1102		break;
   1103
   1104	case HDLCDRVCTL_MODEMPARMASK:
   1105		return HDLCDRV_PARMASK_IOBASE;
   1106
   1107	}
   1108	if (copy_to_user(data, &hi, sizeof(hi)))
   1109		return -EFAULT;
   1110	return 0;
   1111}
   1112
   1113/* --------------------------------------------------------------------- */
   1114
   1115static const struct net_device_ops baycom_netdev_ops = {
   1116	.ndo_open	     = epp_open,
   1117	.ndo_stop	     = epp_close,
   1118	.ndo_siocdevprivate  = baycom_siocdevprivate,
   1119	.ndo_start_xmit      = baycom_send_packet,
   1120	.ndo_set_mac_address = baycom_set_mac_address,
   1121};
   1122
   1123/*
   1124 * Check for a network adaptor of this type, and return '0' if one exists.
   1125 * If dev->base_addr == 0, probe all likely locations.
   1126 * If dev->base_addr == 1, always return failure.
   1127 * If dev->base_addr == 2, allocate space for the device and return success
   1128 * (detachable devices only).
   1129 */
   1130static void baycom_probe(struct net_device *dev)
   1131{
   1132	const struct hdlcdrv_channel_params dflt_ch_params = { 
   1133		20, 2, 10, 40, 0 
   1134	};
   1135	struct baycom_state *bc;
   1136
   1137	/*
   1138	 * not a real probe! only initialize data structures
   1139	 */
   1140	bc = netdev_priv(dev);
   1141	/*
   1142	 * initialize the baycom_state struct
   1143	 */
   1144	bc->ch_params = dflt_ch_params;
   1145	bc->ptt_keyed = 0;
   1146
   1147	/*
   1148	 * initialize the device struct
   1149	 */
   1150
   1151	/* Fill in the fields of the device structure */
   1152	bc->skb = NULL;
   1153	
   1154	dev->netdev_ops = &baycom_netdev_ops;
   1155	dev->header_ops = &ax25_header_ops;
   1156	
   1157	dev->type = ARPHRD_AX25;           /* AF_AX25 device */
   1158	dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
   1159	dev->mtu = AX25_DEF_PACLEN;        /* eth_mtu is the default */
   1160	dev->addr_len = AX25_ADDR_LEN;     /* sizeof an ax.25 address */
   1161	memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
   1162	dev_addr_set(dev, (u8 *)&null_ax25_address);
   1163	dev->tx_queue_len = 16;
   1164
   1165	/* New style flags */
   1166	dev->flags = 0;
   1167}
   1168
   1169/* --------------------------------------------------------------------- */
   1170
   1171/*
   1172 * command line settable parameters
   1173 */
   1174static char *mode[NR_PORTS] = { "", };
   1175static int iobase[NR_PORTS] = { 0x378, };
   1176
   1177module_param_array(mode, charp, NULL, 0);
   1178MODULE_PARM_DESC(mode, "baycom operating mode");
   1179module_param_hw_array(iobase, int, ioport, NULL, 0);
   1180MODULE_PARM_DESC(iobase, "baycom io base address");
   1181
   1182MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
   1183MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
   1184MODULE_LICENSE("GPL");
   1185
   1186/* --------------------------------------------------------------------- */
   1187
   1188static int baycom_epp_par_probe(struct pardevice *par_dev)
   1189{
   1190	struct device_driver *drv = par_dev->dev.driver;
   1191	int len = strlen(drv->name);
   1192
   1193	if (strncmp(par_dev->name, drv->name, len))
   1194		return -ENODEV;
   1195
   1196	return 0;
   1197}
   1198
   1199static struct parport_driver baycom_epp_par_driver = {
   1200	.name = "bce",
   1201	.probe = baycom_epp_par_probe,
   1202	.devmodel = true,
   1203};
   1204
   1205static void __init baycom_epp_dev_setup(struct net_device *dev)
   1206{
   1207	struct baycom_state *bc = netdev_priv(dev);
   1208
   1209	/*
   1210	 * initialize part of the baycom_state struct
   1211	 */
   1212	bc->dev = dev;
   1213	bc->magic = BAYCOM_MAGIC;
   1214	bc->cfg.fclk = 19666600;
   1215	bc->cfg.bps = 9600;
   1216	/*
   1217	 * initialize part of the device struct
   1218	 */
   1219	baycom_probe(dev);
   1220}
   1221
   1222static int __init init_baycomepp(void)
   1223{
   1224	int i, found = 0, ret;
   1225	char set_hw = 1;
   1226
   1227	printk(bc_drvinfo);
   1228
   1229	ret = parport_register_driver(&baycom_epp_par_driver);
   1230	if (ret)
   1231		return ret;
   1232
   1233	/*
   1234	 * register net devices
   1235	 */
   1236	for (i = 0; i < NR_PORTS; i++) {
   1237		struct net_device *dev;
   1238		
   1239		dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
   1240				   NET_NAME_UNKNOWN, baycom_epp_dev_setup);
   1241
   1242		if (!dev) {
   1243			printk(KERN_WARNING "bce%d : out of memory\n", i);
   1244			return found ? 0 : -ENOMEM;
   1245		}
   1246			
   1247		sprintf(dev->name, "bce%d", i);
   1248		dev->base_addr = iobase[i];
   1249
   1250		if (!mode[i])
   1251			set_hw = 0;
   1252		if (!set_hw)
   1253			iobase[i] = 0;
   1254
   1255		if (register_netdev(dev)) {
   1256			printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
   1257			free_netdev(dev);
   1258			break;
   1259		}
   1260		if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
   1261			set_hw = 0;
   1262		baycom_device[i] = dev;
   1263		found++;
   1264	}
   1265
   1266	if (found == 0) {
   1267		parport_unregister_driver(&baycom_epp_par_driver);
   1268		return -ENXIO;
   1269	}
   1270
   1271	return 0;
   1272}
   1273
   1274static void __exit cleanup_baycomepp(void)
   1275{
   1276	int i;
   1277
   1278	for(i = 0; i < NR_PORTS; i++) {
   1279		struct net_device *dev = baycom_device[i];
   1280
   1281		if (dev) {
   1282			struct baycom_state *bc = netdev_priv(dev);
   1283			if (bc->magic == BAYCOM_MAGIC) {
   1284				unregister_netdev(dev);
   1285				free_netdev(dev);
   1286			} else
   1287				printk(paranoia_str, "cleanup_module");
   1288		}
   1289	}
   1290	parport_unregister_driver(&baycom_epp_par_driver);
   1291}
   1292
   1293module_init(init_baycomepp);
   1294module_exit(cleanup_baycomepp);
   1295
   1296/* --------------------------------------------------------------------- */
   1297
   1298#ifndef MODULE
   1299
   1300/*
   1301 * format: baycom_epp=io,mode
   1302 * mode: fpga config options
   1303 */
   1304
   1305static int __init baycom_epp_setup(char *str)
   1306{
   1307        static unsigned __initdata nr_dev = 0;
   1308	int ints[2];
   1309
   1310        if (nr_dev >= NR_PORTS)
   1311                return 0;
   1312	str = get_options(str, 2, ints);
   1313	if (ints[0] < 1)
   1314		return 0;
   1315	mode[nr_dev] = str;
   1316	iobase[nr_dev] = ints[1];
   1317	nr_dev++;
   1318	return 1;
   1319}
   1320
   1321__setup("baycom_epp=", baycom_epp_setup);
   1322
   1323#endif /* MODULE */
   1324/* --------------------------------------------------------------------- */