cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ipa_cmd.h (5514B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2
      3/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
      4 * Copyright (C) 2019-2020 Linaro Ltd.
      5 */
      6#ifndef _IPA_CMD_H_
      7#define _IPA_CMD_H_
      8
      9#include <linux/types.h>
     10#include <linux/dma-direction.h>
     11
     12struct sk_buff;
     13struct scatterlist;
     14
     15struct ipa;
     16struct ipa_mem;
     17struct gsi_trans;
     18struct gsi_channel;
     19
     20/**
     21 * enum ipa_cmd_opcode:	IPA immediate commands
     22 *
     23 * @IPA_CMD_IP_V4_FILTER_INIT:	Initialize IPv4 filter table
     24 * @IPA_CMD_IP_V6_FILTER_INIT:	Initialize IPv6 filter table
     25 * @IPA_CMD_IP_V4_ROUTING_INIT:	Initialize IPv4 routing table
     26 * @IPA_CMD_IP_V6_ROUTING_INIT:	Initialize IPv6 routing table
     27 * @IPA_CMD_HDR_INIT_LOCAL:	Initialize IPA-local header memory
     28 * @IPA_CMD_REGISTER_WRITE:	Register write performed by IPA
     29 * @IPA_CMD_IP_PACKET_INIT:	Set up next packet's destination endpoint
     30 * @IPA_CMD_DMA_SHARED_MEM:	DMA command performed by IPA
     31 * @IPA_CMD_IP_PACKET_TAG_STATUS: Have next packet generate tag * status
     32 * @IPA_CMD_NONE:		Special (invalid) "not a command" value
     33 *
     34 * All immediate commands are issued using the AP command TX endpoint.
     35 */
     36enum ipa_cmd_opcode {
     37	IPA_CMD_NONE			= 0x0,
     38	IPA_CMD_IP_V4_FILTER_INIT	= 0x3,
     39	IPA_CMD_IP_V6_FILTER_INIT	= 0x4,
     40	IPA_CMD_IP_V4_ROUTING_INIT	= 0x7,
     41	IPA_CMD_IP_V6_ROUTING_INIT	= 0x8,
     42	IPA_CMD_HDR_INIT_LOCAL		= 0x9,
     43	IPA_CMD_REGISTER_WRITE		= 0xc,
     44	IPA_CMD_IP_PACKET_INIT		= 0x10,
     45	IPA_CMD_DMA_SHARED_MEM		= 0x13,
     46	IPA_CMD_IP_PACKET_TAG_STATUS	= 0x14,
     47};
     48
     49/**
     50 * ipa_cmd_table_valid() - Validate a memory region holding a table
     51 * @ipa:	- IPA pointer
     52 * @mem:	- IPA memory region descriptor
     53 * @route:	- Whether the region holds a route or filter table
     54 *
     55 * Return:	true if region is valid, false otherwise
     56 */
     57bool ipa_cmd_table_valid(struct ipa *ipa, const struct ipa_mem *mem,
     58			    bool route);
     59
     60/**
     61 * ipa_cmd_data_valid() - Validate command-realted configuration is valid
     62 * @ipa:	- IPA pointer
     63 *
     64 * Return:	true if assumptions required for command are valid
     65 */
     66bool ipa_cmd_data_valid(struct ipa *ipa);
     67
     68/**
     69 * ipa_cmd_pool_init() - initialize command channel pools
     70 * @channel:	AP->IPA command TX GSI channel pointer
     71 * @tre_count:	Number of pool elements to allocate
     72 *
     73 * Return:	0 if successful, or a negative error code
     74 */
     75int ipa_cmd_pool_init(struct gsi_channel *channel, u32 tre_count);
     76
     77/**
     78 * ipa_cmd_pool_exit() - Inverse of ipa_cmd_pool_init()
     79 * @channel:	AP->IPA command TX GSI channel pointer
     80 */
     81void ipa_cmd_pool_exit(struct gsi_channel *channel);
     82
     83/**
     84 * ipa_cmd_table_init_add() - Add table init command to a transaction
     85 * @trans:	GSI transaction
     86 * @opcode:	IPA immediate command opcode
     87 * @size:	Size of non-hashed routing table memory
     88 * @offset:	Offset in IPA shared memory of non-hashed routing table memory
     89 * @addr:	DMA address of non-hashed table data to write
     90 * @hash_size:	Size of hashed routing table memory
     91 * @hash_offset: Offset in IPA shared memory of hashed routing table memory
     92 * @hash_addr:	DMA address of hashed table data to write
     93 *
     94 * If hash_size is 0, hash_offset and hash_addr are ignored.
     95 */
     96void ipa_cmd_table_init_add(struct gsi_trans *trans, enum ipa_cmd_opcode opcode,
     97			    u16 size, u32 offset, dma_addr_t addr,
     98			    u16 hash_size, u32 hash_offset,
     99			    dma_addr_t hash_addr);
    100
    101/**
    102 * ipa_cmd_hdr_init_local_add() - Add a header init command to a transaction
    103 * @trans:	GSI transaction
    104 * @offset:	Offset of header memory in IPA local space
    105 * @size:	Size of header memory
    106 * @addr:	DMA address of buffer to be written from
    107 *
    108 * Defines and fills the location in IPA memory to use for headers.
    109 */
    110void ipa_cmd_hdr_init_local_add(struct gsi_trans *trans, u32 offset, u16 size,
    111				dma_addr_t addr);
    112
    113/**
    114 * ipa_cmd_register_write_add() - Add a register write command to a transaction
    115 * @trans:	GSI transaction
    116 * @offset:	Offset of register to be written
    117 * @value:	Value to be written
    118 * @mask:	Mask of bits in register to update with bits from value
    119 * @clear_full: Pipeline clear option; true means full pipeline clear
    120 */
    121void ipa_cmd_register_write_add(struct gsi_trans *trans, u32 offset, u32 value,
    122				u32 mask, bool clear_full);
    123
    124/**
    125 * ipa_cmd_dma_shared_mem_add() - Add a DMA memory command to a transaction
    126 * @trans:	GSI transaction
    127 * @offset:	Offset of IPA memory to be read or written
    128 * @size:	Number of bytes of memory to be transferred
    129 * @addr:	DMA address of buffer to be read into or written from
    130 * @toward_ipa:	true means write to IPA memory; false means read
    131 */
    132void ipa_cmd_dma_shared_mem_add(struct gsi_trans *trans, u32 offset,
    133				u16 size, dma_addr_t addr, bool toward_ipa);
    134
    135/**
    136 * ipa_cmd_pipeline_clear_add() - Add pipeline clear commands to a transaction
    137 * @trans:	GSI transaction
    138 */
    139void ipa_cmd_pipeline_clear_add(struct gsi_trans *trans);
    140
    141/**
    142 * ipa_cmd_pipeline_clear_count() - # commands required to clear pipeline
    143 *
    144 * Return:	The number of elements to allocate in a transaction
    145 *		to hold commands to clear the pipeline
    146 */
    147u32 ipa_cmd_pipeline_clear_count(void);
    148
    149/**
    150 * ipa_cmd_pipeline_clear_wait() - Wait pipeline clear to complete
    151 * @ipa:	- IPA pointer
    152 */
    153void ipa_cmd_pipeline_clear_wait(struct ipa *ipa);
    154
    155/**
    156 * ipa_cmd_trans_alloc() - Allocate a transaction for the command TX endpoint
    157 * @ipa:	IPA pointer
    158 * @tre_count:	Number of elements in the transaction
    159 *
    160 * Return:	A GSI transaction structure, or a null pointer if all
    161 *		available transactions are in use
    162 */
    163struct gsi_trans *ipa_cmd_trans_alloc(struct ipa *ipa, u32 tre_count);
    164
    165#endif /* _IPA_CMD_H_ */