cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dp83848.c (4476B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Driver for the Texas Instruments DP83848 PHY
      4 *
      5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
      6 */
      7
      8#include <linux/module.h>
      9#include <linux/phy.h>
     10
     11#define TI_DP83848C_PHY_ID		0x20005ca0
     12#define TI_DP83620_PHY_ID		0x20005ce0
     13#define NS_DP83848C_PHY_ID		0x20005c90
     14#define TLK10X_PHY_ID			0x2000a210
     15
     16/* Registers */
     17#define DP83848_MICR			0x11 /* MII Interrupt Control Register */
     18#define DP83848_MISR			0x12 /* MII Interrupt Status Register */
     19
     20/* MICR Register Fields */
     21#define DP83848_MICR_INT_OE		BIT(0) /* Interrupt Output Enable */
     22#define DP83848_MICR_INTEN		BIT(1) /* Interrupt Enable */
     23
     24/* MISR Register Fields */
     25#define DP83848_MISR_RHF_INT_EN		BIT(0) /* Receive Error Counter */
     26#define DP83848_MISR_FHF_INT_EN		BIT(1) /* False Carrier Counter */
     27#define DP83848_MISR_ANC_INT_EN		BIT(2) /* Auto-negotiation complete */
     28#define DP83848_MISR_DUP_INT_EN		BIT(3) /* Duplex Status */
     29#define DP83848_MISR_SPD_INT_EN		BIT(4) /* Speed status */
     30#define DP83848_MISR_LINK_INT_EN	BIT(5) /* Link status */
     31#define DP83848_MISR_ED_INT_EN		BIT(6) /* Energy detect */
     32#define DP83848_MISR_LQM_INT_EN		BIT(7) /* Link Quality Monitor */
     33
     34#define DP83848_INT_EN_MASK		\
     35	(DP83848_MISR_ANC_INT_EN |	\
     36	 DP83848_MISR_DUP_INT_EN |	\
     37	 DP83848_MISR_SPD_INT_EN |	\
     38	 DP83848_MISR_LINK_INT_EN)
     39
     40#define DP83848_MISR_RHF_INT		BIT(8)
     41#define DP83848_MISR_FHF_INT		BIT(9)
     42#define DP83848_MISR_ANC_INT		BIT(10)
     43#define DP83848_MISR_DUP_INT		BIT(11)
     44#define DP83848_MISR_SPD_INT		BIT(12)
     45#define DP83848_MISR_LINK_INT		BIT(13)
     46#define DP83848_MISR_ED_INT		BIT(14)
     47
     48#define DP83848_INT_MASK		\
     49	(DP83848_MISR_ANC_INT |	\
     50	 DP83848_MISR_DUP_INT |	\
     51	 DP83848_MISR_SPD_INT |	\
     52	 DP83848_MISR_LINK_INT)
     53
     54static int dp83848_ack_interrupt(struct phy_device *phydev)
     55{
     56	int err = phy_read(phydev, DP83848_MISR);
     57
     58	return err < 0 ? err : 0;
     59}
     60
     61static int dp83848_config_intr(struct phy_device *phydev)
     62{
     63	int control, ret;
     64
     65	control = phy_read(phydev, DP83848_MICR);
     66	if (control < 0)
     67		return control;
     68
     69	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
     70		ret = dp83848_ack_interrupt(phydev);
     71		if (ret)
     72			return ret;
     73
     74		control |= DP83848_MICR_INT_OE;
     75		control |= DP83848_MICR_INTEN;
     76
     77		ret = phy_write(phydev, DP83848_MISR, DP83848_INT_EN_MASK);
     78		if (ret < 0)
     79			return ret;
     80
     81		ret = phy_write(phydev, DP83848_MICR, control);
     82	} else {
     83		control &= ~DP83848_MICR_INTEN;
     84		ret = phy_write(phydev, DP83848_MICR, control);
     85		if (ret)
     86			return ret;
     87
     88		ret = dp83848_ack_interrupt(phydev);
     89	}
     90
     91	return ret;
     92}
     93
     94static irqreturn_t dp83848_handle_interrupt(struct phy_device *phydev)
     95{
     96	int irq_status;
     97
     98	irq_status = phy_read(phydev, DP83848_MISR);
     99	if (irq_status < 0) {
    100		phy_error(phydev);
    101		return IRQ_NONE;
    102	}
    103
    104	if (!(irq_status & DP83848_INT_MASK))
    105		return IRQ_NONE;
    106
    107	phy_trigger_machine(phydev);
    108
    109	return IRQ_HANDLED;
    110}
    111
    112static int dp83848_config_init(struct phy_device *phydev)
    113{
    114	int val;
    115
    116	/* DP83620 always reports Auto Negotiation Ability on BMSR. Instead,
    117	 * we check initial value of BMCR Auto negotiation enable bit
    118	 */
    119	val = phy_read(phydev, MII_BMCR);
    120	if (!(val & BMCR_ANENABLE))
    121		phydev->autoneg = AUTONEG_DISABLE;
    122
    123	return 0;
    124}
    125
    126static struct mdio_device_id __maybe_unused dp83848_tbl[] = {
    127	{ TI_DP83848C_PHY_ID, 0xfffffff0 },
    128	{ NS_DP83848C_PHY_ID, 0xfffffff0 },
    129	{ TI_DP83620_PHY_ID, 0xfffffff0 },
    130	{ TLK10X_PHY_ID, 0xfffffff0 },
    131	{ }
    132};
    133MODULE_DEVICE_TABLE(mdio, dp83848_tbl);
    134
    135#define DP83848_PHY_DRIVER(_id, _name, _config_init)		\
    136	{							\
    137		.phy_id		= _id,				\
    138		.phy_id_mask	= 0xfffffff0,			\
    139		.name		= _name,			\
    140		/* PHY_BASIC_FEATURES */			\
    141								\
    142		.soft_reset	= genphy_soft_reset,		\
    143		.config_init	= _config_init,			\
    144		.suspend	= genphy_suspend,		\
    145		.resume		= genphy_resume,		\
    146								\
    147		/* IRQ related */				\
    148		.config_intr	= dp83848_config_intr,		\
    149		.handle_interrupt = dp83848_handle_interrupt,	\
    150	}
    151
    152static struct phy_driver dp83848_driver[] = {
    153	DP83848_PHY_DRIVER(TI_DP83848C_PHY_ID, "TI DP83848C 10/100 Mbps PHY",
    154			   NULL),
    155	DP83848_PHY_DRIVER(NS_DP83848C_PHY_ID, "NS DP83848C 10/100 Mbps PHY",
    156			   NULL),
    157	DP83848_PHY_DRIVER(TI_DP83620_PHY_ID, "TI DP83620 10/100 Mbps PHY",
    158			   dp83848_config_init),
    159	DP83848_PHY_DRIVER(TLK10X_PHY_ID, "TI TLK10X 10/100 Mbps PHY",
    160			   NULL),
    161};
    162module_phy_driver(dp83848_driver);
    163
    164MODULE_DESCRIPTION("Texas Instruments DP83848 PHY driver");
    165MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
    166MODULE_LICENSE("GPL v2");