mscc_serdes.h (874B)
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2/* 3 * Driver for Microsemi VSC85xx PHYs 4 * 5 * Copyright (c) 2021 Microsemi Corporation 6 */ 7 8#ifndef _MSCC_SERDES_PHY_H_ 9#define _MSCC_SERDES_PHY_H_ 10 11#define PHY_S6G_PLL5G_CFG2_GAIN_MASK GENMASK(9, 5) 12#define PHY_S6G_PLL5G_CFG2_ENA_GAIN 1 13 14#define PHY_S6G_DES_PHY_CTRL_POS 13 15#define PHY_S6G_DES_MBTR_CTRL_POS 10 16#define PHY_S6G_DES_CPMD_SEL_POS 8 17#define PHY_S6G_DES_BW_HYST_POS 5 18#define PHY_S6G_DES_BW_ANA_POS 1 19#define PHY_S6G_DES_CFG 0x21 20#define PHY_S6G_IB_CFG0 0x22 21#define PHY_S6G_IB_CFG1 0x23 22#define PHY_S6G_IB_CFG2 0x24 23#define PHY_S6G_IB_CFG3 0x25 24#define PHY_S6G_IB_CFG4 0x26 25#define PHY_S6G_GP_CFG 0x2E 26#define PHY_S6G_DFT_CFG0 0x35 27#define PHY_S6G_IB_DFT_CFG2 0x37 28 29int vsc85xx_sd6g_config_v2(struct phy_device *phydev); 30 31#endif /* _MSCC_PHY_SERDES_H_ */