phylink.c (88338B)
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8#include <linux/acpi.h> 9#include <linux/ethtool.h> 10#include <linux/export.h> 11#include <linux/gpio/consumer.h> 12#include <linux/netdevice.h> 13#include <linux/of.h> 14#include <linux/of_mdio.h> 15#include <linux/phy.h> 16#include <linux/phy_fixed.h> 17#include <linux/phylink.h> 18#include <linux/rtnetlink.h> 19#include <linux/spinlock.h> 20#include <linux/timer.h> 21#include <linux/workqueue.h> 22 23#include "sfp.h" 24#include "swphy.h" 25 26#define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29#define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37}; 38 39/** 40 * struct phylink - internal data type for phylink 41 */ 42struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 const struct phylink_pcs_ops *pcs_ops; 47 struct phylink_config *config; 48 struct phylink_pcs *pcs; 49 struct device *dev; 50 unsigned int old_link_state:1; 51 52 unsigned long phylink_disable_state; /* bitmask of disables */ 53 struct phy_device *phydev; 54 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 55 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 56 u8 cur_link_an_mode; 57 u8 link_port; /* The current non-phy ethtool port */ 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 void (*get_fixed_state)(struct net_device *dev, 70 struct phylink_link_state *s); 71 72 struct mutex state_mutex; 73 struct phylink_link_state phy_state; 74 struct work_struct resolve; 75 76 bool mac_link_dropped; 77 bool using_mac_select_pcs; 78 79 struct sfp_bus *sfp_bus; 80 bool sfp_may_have_phy; 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83}; 84 85#define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93#define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95#define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97#define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99#if defined(CONFIG_DYNAMIC_DEBUG) 100#define phylink_dbg(pl, fmt, ...) \ 101do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106} while (0) 107#elif defined(DEBUG) 108#define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110#else 111#define phylink_dbg(pl, fmt, ...) \ 112({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115}) 116#endif 117 118/** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125void phylink_set_port_modes(unsigned long *mask) 126{ 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133} 134EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137{ 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146} 147 148static const char *phylink_an_mode_str(unsigned int mode) 149{ 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157} 158 159static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 160 unsigned long caps) 161{ 162 if (caps & MAC_SYM_PAUSE) 163 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 164 165 if (caps & MAC_ASYM_PAUSE) 166 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 167 168 if (caps & MAC_10HD) 169 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 170 171 if (caps & MAC_10FD) { 172 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 173 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 174 } 175 176 if (caps & MAC_100HD) { 177 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 178 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 179 } 180 181 if (caps & MAC_100FD) { 182 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 183 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 184 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 185 } 186 187 if (caps & MAC_1000HD) 188 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 189 190 if (caps & MAC_1000FD) { 191 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 192 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 193 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 194 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 195 } 196 197 if (caps & MAC_2500FD) { 198 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 199 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 200 } 201 202 if (caps & MAC_5000FD) 203 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 204 205 if (caps & MAC_10000FD) { 206 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 207 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 208 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 209 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 210 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 211 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 212 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 213 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 214 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 215 } 216 217 if (caps & MAC_25000FD) { 218 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 219 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 220 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 221 } 222 223 if (caps & MAC_40000FD) { 224 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 225 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 226 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 227 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 228 } 229 230 if (caps & MAC_50000FD) { 231 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 232 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 233 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 234 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 235 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 236 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 237 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 238 linkmodes); 239 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 240 } 241 242 if (caps & MAC_56000FD) { 243 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 244 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 245 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 246 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 247 } 248 249 if (caps & MAC_100000FD) { 250 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 251 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 252 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 253 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 254 linkmodes); 255 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 256 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 257 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 258 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 259 linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 261 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 262 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 263 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 264 linkmodes); 265 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 266 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 267 } 268 269 if (caps & MAC_200000FD) { 270 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 271 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 272 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 273 linkmodes); 274 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 276 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 277 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 278 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 279 linkmodes); 280 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 281 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 282 } 283 284 if (caps & MAC_400000FD) { 285 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 288 linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 292 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 293 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 294 linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 297 } 298} 299 300/** 301 * phylink_get_linkmodes() - get acceptable link modes 302 * @linkmodes: ethtool linkmode mask (must be already initialised) 303 * @interface: phy interface mode defined by &typedef phy_interface_t 304 * @mac_capabilities: bitmask of MAC capabilities 305 * 306 * Set all possible pause, speed and duplex linkmodes in @linkmodes that 307 * are supported by the @interface mode and @mac_capabilities. @linkmodes 308 * must have been initialised previously. 309 */ 310void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, 311 unsigned long mac_capabilities) 312{ 313 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 314 315 switch (interface) { 316 case PHY_INTERFACE_MODE_USXGMII: 317 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 318 fallthrough; 319 320 case PHY_INTERFACE_MODE_RGMII_TXID: 321 case PHY_INTERFACE_MODE_RGMII_RXID: 322 case PHY_INTERFACE_MODE_RGMII_ID: 323 case PHY_INTERFACE_MODE_RGMII: 324 case PHY_INTERFACE_MODE_QSGMII: 325 case PHY_INTERFACE_MODE_SGMII: 326 case PHY_INTERFACE_MODE_GMII: 327 caps |= MAC_1000HD | MAC_1000FD; 328 fallthrough; 329 330 case PHY_INTERFACE_MODE_REVRMII: 331 case PHY_INTERFACE_MODE_RMII: 332 case PHY_INTERFACE_MODE_SMII: 333 case PHY_INTERFACE_MODE_REVMII: 334 case PHY_INTERFACE_MODE_MII: 335 caps |= MAC_10HD | MAC_10FD; 336 fallthrough; 337 338 case PHY_INTERFACE_MODE_100BASEX: 339 caps |= MAC_100HD | MAC_100FD; 340 break; 341 342 case PHY_INTERFACE_MODE_TBI: 343 case PHY_INTERFACE_MODE_MOCA: 344 case PHY_INTERFACE_MODE_RTBI: 345 case PHY_INTERFACE_MODE_1000BASEX: 346 caps |= MAC_1000HD; 347 fallthrough; 348 case PHY_INTERFACE_MODE_TRGMII: 349 caps |= MAC_1000FD; 350 break; 351 352 case PHY_INTERFACE_MODE_2500BASEX: 353 caps |= MAC_2500FD; 354 break; 355 356 case PHY_INTERFACE_MODE_5GBASER: 357 caps |= MAC_5000FD; 358 break; 359 360 case PHY_INTERFACE_MODE_XGMII: 361 case PHY_INTERFACE_MODE_RXAUI: 362 case PHY_INTERFACE_MODE_XAUI: 363 case PHY_INTERFACE_MODE_10GBASER: 364 case PHY_INTERFACE_MODE_10GKR: 365 caps |= MAC_10000FD; 366 break; 367 368 case PHY_INTERFACE_MODE_25GBASER: 369 caps |= MAC_25000FD; 370 break; 371 372 case PHY_INTERFACE_MODE_XLGMII: 373 caps |= MAC_40000FD; 374 break; 375 376 case PHY_INTERFACE_MODE_INTERNAL: 377 caps |= ~0; 378 break; 379 380 case PHY_INTERFACE_MODE_NA: 381 case PHY_INTERFACE_MODE_MAX: 382 break; 383 } 384 385 phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities); 386} 387EXPORT_SYMBOL_GPL(phylink_get_linkmodes); 388 389/** 390 * phylink_generic_validate() - generic validate() callback implementation 391 * @config: a pointer to a &struct phylink_config. 392 * @supported: ethtool bitmask for supported link modes. 393 * @state: a pointer to a &struct phylink_link_state. 394 * 395 * Generic implementation of the validate() callback that MAC drivers can 396 * use when they pass the range of supported interfaces and MAC capabilities. 397 * This makes use of phylink_get_linkmodes(). 398 */ 399void phylink_generic_validate(struct phylink_config *config, 400 unsigned long *supported, 401 struct phylink_link_state *state) 402{ 403 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 404 405 phylink_set_port_modes(mask); 406 phylink_set(mask, Autoneg); 407 phylink_get_linkmodes(mask, state->interface, config->mac_capabilities); 408 409 linkmode_and(supported, supported, mask); 410 linkmode_and(state->advertising, state->advertising, mask); 411} 412EXPORT_SYMBOL_GPL(phylink_generic_validate); 413 414static int phylink_validate_mac_and_pcs(struct phylink *pl, 415 unsigned long *supported, 416 struct phylink_link_state *state) 417{ 418 struct phylink_pcs *pcs; 419 int ret; 420 421 /* Get the PCS for this interface mode */ 422 if (pl->using_mac_select_pcs) { 423 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 424 if (IS_ERR(pcs)) 425 return PTR_ERR(pcs); 426 } else { 427 pcs = pl->pcs; 428 } 429 430 if (pcs) { 431 /* The PCS, if present, must be setup before phylink_create() 432 * has been called. If the ops is not initialised, print an 433 * error and backtrace rather than oopsing the kernel. 434 */ 435 if (!pcs->ops) { 436 phylink_err(pl, "interface %s: uninitialised PCS\n", 437 phy_modes(state->interface)); 438 dump_stack(); 439 return -EINVAL; 440 } 441 442 /* Validate the link parameters with the PCS */ 443 if (pcs->ops->pcs_validate) { 444 ret = pcs->ops->pcs_validate(pcs, supported, state); 445 if (ret < 0 || phylink_is_empty_linkmode(supported)) 446 return -EINVAL; 447 448 /* Ensure the advertising mask is a subset of the 449 * supported mask. 450 */ 451 linkmode_and(state->advertising, state->advertising, 452 supported); 453 } 454 } 455 456 /* Then validate the link parameters with the MAC */ 457 pl->mac_ops->validate(pl->config, supported, state); 458 459 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 460} 461 462static int phylink_validate_any(struct phylink *pl, unsigned long *supported, 463 struct phylink_link_state *state) 464{ 465 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 466 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 467 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 468 struct phylink_link_state t; 469 int intf; 470 471 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 472 if (test_bit(intf, pl->config->supported_interfaces)) { 473 linkmode_copy(s, supported); 474 475 t = *state; 476 t.interface = intf; 477 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 478 linkmode_or(all_s, all_s, s); 479 linkmode_or(all_adv, all_adv, t.advertising); 480 } 481 } 482 } 483 484 linkmode_copy(supported, all_s); 485 linkmode_copy(state->advertising, all_adv); 486 487 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 488} 489 490static int phylink_validate(struct phylink *pl, unsigned long *supported, 491 struct phylink_link_state *state) 492{ 493 if (!phy_interface_empty(pl->config->supported_interfaces)) { 494 if (state->interface == PHY_INTERFACE_MODE_NA) 495 return phylink_validate_any(pl, supported, state); 496 497 if (!test_bit(state->interface, 498 pl->config->supported_interfaces)) 499 return -EINVAL; 500 } 501 502 return phylink_validate_mac_and_pcs(pl, supported, state); 503} 504 505static int phylink_parse_fixedlink(struct phylink *pl, 506 struct fwnode_handle *fwnode) 507{ 508 struct fwnode_handle *fixed_node; 509 const struct phy_setting *s; 510 struct gpio_desc *desc; 511 u32 speed; 512 int ret; 513 514 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 515 if (fixed_node) { 516 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 517 518 pl->link_config.speed = speed; 519 pl->link_config.duplex = DUPLEX_HALF; 520 521 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 522 pl->link_config.duplex = DUPLEX_FULL; 523 524 /* We treat the "pause" and "asym-pause" terminology as 525 * defining the link partner's ability. 526 */ 527 if (fwnode_property_read_bool(fixed_node, "pause")) 528 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 529 pl->link_config.lp_advertising); 530 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 531 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 532 pl->link_config.lp_advertising); 533 534 if (ret == 0) { 535 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 536 GPIOD_IN, "?"); 537 538 if (!IS_ERR(desc)) 539 pl->link_gpio = desc; 540 else if (desc == ERR_PTR(-EPROBE_DEFER)) 541 ret = -EPROBE_DEFER; 542 } 543 fwnode_handle_put(fixed_node); 544 545 if (ret) 546 return ret; 547 } else { 548 u32 prop[5]; 549 550 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 551 NULL, 0); 552 if (ret != ARRAY_SIZE(prop)) { 553 phylink_err(pl, "broken fixed-link?\n"); 554 return -EINVAL; 555 } 556 557 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 558 prop, ARRAY_SIZE(prop)); 559 if (!ret) { 560 pl->link_config.duplex = prop[1] ? 561 DUPLEX_FULL : DUPLEX_HALF; 562 pl->link_config.speed = prop[2]; 563 if (prop[3]) 564 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 565 pl->link_config.lp_advertising); 566 if (prop[4]) 567 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 568 pl->link_config.lp_advertising); 569 } 570 } 571 572 if (pl->link_config.speed > SPEED_1000 && 573 pl->link_config.duplex != DUPLEX_FULL) 574 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 575 pl->link_config.speed); 576 577 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 578 linkmode_copy(pl->link_config.advertising, pl->supported); 579 phylink_validate(pl, pl->supported, &pl->link_config); 580 581 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 582 pl->supported, true); 583 linkmode_zero(pl->supported); 584 phylink_set(pl->supported, MII); 585 phylink_set(pl->supported, Pause); 586 phylink_set(pl->supported, Asym_Pause); 587 phylink_set(pl->supported, Autoneg); 588 if (s) { 589 __set_bit(s->bit, pl->supported); 590 __set_bit(s->bit, pl->link_config.lp_advertising); 591 } else { 592 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 593 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 594 pl->link_config.speed); 595 } 596 597 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 598 pl->supported); 599 600 pl->link_config.link = 1; 601 pl->link_config.an_complete = 1; 602 603 return 0; 604} 605 606static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 607{ 608 struct fwnode_handle *dn; 609 const char *managed; 610 611 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 612 if (dn || fwnode_property_present(fwnode, "fixed-link")) 613 pl->cfg_link_an_mode = MLO_AN_FIXED; 614 fwnode_handle_put(dn); 615 616 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 617 strcmp(managed, "in-band-status") == 0) || 618 pl->config->ovr_an_inband) { 619 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 620 phylink_err(pl, 621 "can't use both fixed-link and in-band-status\n"); 622 return -EINVAL; 623 } 624 625 linkmode_zero(pl->supported); 626 phylink_set(pl->supported, MII); 627 phylink_set(pl->supported, Autoneg); 628 phylink_set(pl->supported, Asym_Pause); 629 phylink_set(pl->supported, Pause); 630 pl->link_config.an_enabled = true; 631 pl->cfg_link_an_mode = MLO_AN_INBAND; 632 633 switch (pl->link_config.interface) { 634 case PHY_INTERFACE_MODE_SGMII: 635 case PHY_INTERFACE_MODE_QSGMII: 636 phylink_set(pl->supported, 10baseT_Half); 637 phylink_set(pl->supported, 10baseT_Full); 638 phylink_set(pl->supported, 100baseT_Half); 639 phylink_set(pl->supported, 100baseT_Full); 640 phylink_set(pl->supported, 1000baseT_Half); 641 phylink_set(pl->supported, 1000baseT_Full); 642 break; 643 644 case PHY_INTERFACE_MODE_1000BASEX: 645 phylink_set(pl->supported, 1000baseX_Full); 646 break; 647 648 case PHY_INTERFACE_MODE_2500BASEX: 649 phylink_set(pl->supported, 2500baseX_Full); 650 break; 651 652 case PHY_INTERFACE_MODE_5GBASER: 653 phylink_set(pl->supported, 5000baseT_Full); 654 break; 655 656 case PHY_INTERFACE_MODE_25GBASER: 657 phylink_set(pl->supported, 25000baseCR_Full); 658 phylink_set(pl->supported, 25000baseKR_Full); 659 phylink_set(pl->supported, 25000baseSR_Full); 660 fallthrough; 661 case PHY_INTERFACE_MODE_USXGMII: 662 case PHY_INTERFACE_MODE_10GKR: 663 case PHY_INTERFACE_MODE_10GBASER: 664 phylink_set(pl->supported, 10baseT_Half); 665 phylink_set(pl->supported, 10baseT_Full); 666 phylink_set(pl->supported, 100baseT_Half); 667 phylink_set(pl->supported, 100baseT_Full); 668 phylink_set(pl->supported, 1000baseT_Half); 669 phylink_set(pl->supported, 1000baseT_Full); 670 phylink_set(pl->supported, 1000baseX_Full); 671 phylink_set(pl->supported, 1000baseKX_Full); 672 phylink_set(pl->supported, 2500baseT_Full); 673 phylink_set(pl->supported, 2500baseX_Full); 674 phylink_set(pl->supported, 5000baseT_Full); 675 phylink_set(pl->supported, 10000baseT_Full); 676 phylink_set(pl->supported, 10000baseKR_Full); 677 phylink_set(pl->supported, 10000baseKX4_Full); 678 phylink_set(pl->supported, 10000baseCR_Full); 679 phylink_set(pl->supported, 10000baseSR_Full); 680 phylink_set(pl->supported, 10000baseLR_Full); 681 phylink_set(pl->supported, 10000baseLRM_Full); 682 phylink_set(pl->supported, 10000baseER_Full); 683 break; 684 685 case PHY_INTERFACE_MODE_XLGMII: 686 phylink_set(pl->supported, 25000baseCR_Full); 687 phylink_set(pl->supported, 25000baseKR_Full); 688 phylink_set(pl->supported, 25000baseSR_Full); 689 phylink_set(pl->supported, 40000baseKR4_Full); 690 phylink_set(pl->supported, 40000baseCR4_Full); 691 phylink_set(pl->supported, 40000baseSR4_Full); 692 phylink_set(pl->supported, 40000baseLR4_Full); 693 phylink_set(pl->supported, 50000baseCR2_Full); 694 phylink_set(pl->supported, 50000baseKR2_Full); 695 phylink_set(pl->supported, 50000baseSR2_Full); 696 phylink_set(pl->supported, 50000baseKR_Full); 697 phylink_set(pl->supported, 50000baseSR_Full); 698 phylink_set(pl->supported, 50000baseCR_Full); 699 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 700 phylink_set(pl->supported, 50000baseDR_Full); 701 phylink_set(pl->supported, 100000baseKR4_Full); 702 phylink_set(pl->supported, 100000baseSR4_Full); 703 phylink_set(pl->supported, 100000baseCR4_Full); 704 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 705 phylink_set(pl->supported, 100000baseKR2_Full); 706 phylink_set(pl->supported, 100000baseSR2_Full); 707 phylink_set(pl->supported, 100000baseCR2_Full); 708 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 709 phylink_set(pl->supported, 100000baseDR2_Full); 710 break; 711 712 default: 713 phylink_err(pl, 714 "incorrect link mode %s for in-band status\n", 715 phy_modes(pl->link_config.interface)); 716 return -EINVAL; 717 } 718 719 linkmode_copy(pl->link_config.advertising, pl->supported); 720 721 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 722 phylink_err(pl, 723 "failed to validate link configuration for in-band status\n"); 724 return -EINVAL; 725 } 726 727 /* Check if MAC/PCS also supports Autoneg. */ 728 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 729 } 730 731 return 0; 732} 733 734static void phylink_apply_manual_flow(struct phylink *pl, 735 struct phylink_link_state *state) 736{ 737 /* If autoneg is disabled, pause AN is also disabled */ 738 if (!state->an_enabled) 739 state->pause &= ~MLO_PAUSE_AN; 740 741 /* Manual configuration of pause modes */ 742 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 743 state->pause = pl->link_config.pause; 744} 745 746static void phylink_resolve_flow(struct phylink_link_state *state) 747{ 748 bool tx_pause, rx_pause; 749 750 state->pause = MLO_PAUSE_NONE; 751 if (state->duplex == DUPLEX_FULL) { 752 linkmode_resolve_pause(state->advertising, 753 state->lp_advertising, 754 &tx_pause, &rx_pause); 755 if (tx_pause) 756 state->pause |= MLO_PAUSE_TX; 757 if (rx_pause) 758 state->pause |= MLO_PAUSE_RX; 759 } 760} 761 762static void phylink_mac_config(struct phylink *pl, 763 const struct phylink_link_state *state) 764{ 765 phylink_dbg(pl, 766 "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 767 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 768 phy_modes(state->interface), 769 phy_speed_to_str(state->speed), 770 phy_duplex_to_str(state->duplex), 771 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 772 state->pause, state->link, state->an_enabled); 773 774 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 775} 776 777static void phylink_mac_pcs_an_restart(struct phylink *pl) 778{ 779 if (pl->link_config.an_enabled && 780 phy_interface_mode_is_8023z(pl->link_config.interface) && 781 phylink_autoneg_inband(pl->cur_link_an_mode)) { 782 if (pl->pcs_ops) 783 pl->pcs_ops->pcs_an_restart(pl->pcs); 784 else if (pl->config->legacy_pre_march2020) 785 pl->mac_ops->mac_an_restart(pl->config); 786 } 787} 788 789static void phylink_major_config(struct phylink *pl, bool restart, 790 const struct phylink_link_state *state) 791{ 792 struct phylink_pcs *pcs = NULL; 793 int err; 794 795 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 796 797 if (pl->using_mac_select_pcs) { 798 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 799 if (IS_ERR(pcs)) { 800 phylink_err(pl, 801 "mac_select_pcs unexpectedly failed: %pe\n", 802 pcs); 803 return; 804 } 805 } 806 807 if (pl->mac_ops->mac_prepare) { 808 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 809 state->interface); 810 if (err < 0) { 811 phylink_err(pl, "mac_prepare failed: %pe\n", 812 ERR_PTR(err)); 813 return; 814 } 815 } 816 817 /* If we have a new PCS, switch to the new PCS after preparing the MAC 818 * for the change. 819 */ 820 if (pcs) { 821 pl->pcs = pcs; 822 pl->pcs_ops = pcs->ops; 823 824 if (!pl->phylink_disable_state && 825 pl->cfg_link_an_mode == MLO_AN_INBAND) { 826 if (pcs->poll) 827 mod_timer(&pl->link_poll, jiffies + HZ); 828 else 829 del_timer(&pl->link_poll); 830 } 831 } 832 833 phylink_mac_config(pl, state); 834 835 if (pl->pcs_ops) { 836 err = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 837 state->interface, 838 state->advertising, 839 !!(pl->link_config.pause & 840 MLO_PAUSE_AN)); 841 if (err < 0) 842 phylink_err(pl, "pcs_config failed: %pe\n", 843 ERR_PTR(err)); 844 if (err > 0) 845 restart = true; 846 } 847 if (restart) 848 phylink_mac_pcs_an_restart(pl); 849 850 if (pl->mac_ops->mac_finish) { 851 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 852 state->interface); 853 if (err < 0) 854 phylink_err(pl, "mac_finish failed: %pe\n", 855 ERR_PTR(err)); 856 } 857} 858 859/* 860 * Reconfigure for a change of inband advertisement. 861 * If we have a separate PCS, we only need to call its pcs_config() method, 862 * and then restart AN if it indicates something changed. Otherwise, we do 863 * the full MAC reconfiguration. 864 */ 865static int phylink_change_inband_advert(struct phylink *pl) 866{ 867 int ret; 868 869 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 870 return 0; 871 872 if (!pl->pcs_ops && pl->config->legacy_pre_march2020) { 873 /* Legacy method */ 874 phylink_mac_config(pl, &pl->link_config); 875 phylink_mac_pcs_an_restart(pl); 876 return 0; 877 } 878 879 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 880 phylink_an_mode_str(pl->cur_link_an_mode), 881 phy_modes(pl->link_config.interface), 882 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 883 pl->link_config.pause); 884 885 /* Modern PCS-based method; update the advert at the PCS, and 886 * restart negotiation if the pcs_config() helper indicates that 887 * the programmed advertisement has changed. 888 */ 889 ret = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 890 pl->link_config.interface, 891 pl->link_config.advertising, 892 !!(pl->link_config.pause & MLO_PAUSE_AN)); 893 if (ret < 0) 894 return ret; 895 896 if (ret > 0) 897 phylink_mac_pcs_an_restart(pl); 898 899 return 0; 900} 901 902static void phylink_mac_pcs_get_state(struct phylink *pl, 903 struct phylink_link_state *state) 904{ 905 linkmode_copy(state->advertising, pl->link_config.advertising); 906 linkmode_zero(state->lp_advertising); 907 state->interface = pl->link_config.interface; 908 state->an_enabled = pl->link_config.an_enabled; 909 if (state->an_enabled) { 910 state->speed = SPEED_UNKNOWN; 911 state->duplex = DUPLEX_UNKNOWN; 912 state->pause = MLO_PAUSE_NONE; 913 } else { 914 state->speed = pl->link_config.speed; 915 state->duplex = pl->link_config.duplex; 916 state->pause = pl->link_config.pause; 917 } 918 state->an_complete = 0; 919 state->link = 1; 920 921 if (pl->pcs_ops) 922 pl->pcs_ops->pcs_get_state(pl->pcs, state); 923 else if (pl->mac_ops->mac_pcs_get_state && 924 pl->config->legacy_pre_march2020) 925 pl->mac_ops->mac_pcs_get_state(pl->config, state); 926 else 927 state->link = 0; 928} 929 930/* The fixed state is... fixed except for the link state, 931 * which may be determined by a GPIO or a callback. 932 */ 933static void phylink_get_fixed_state(struct phylink *pl, 934 struct phylink_link_state *state) 935{ 936 *state = pl->link_config; 937 if (pl->config->get_fixed_state) 938 pl->config->get_fixed_state(pl->config, state); 939 else if (pl->link_gpio) 940 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 941 942 phylink_resolve_flow(state); 943} 944 945static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 946{ 947 struct phylink_link_state link_state; 948 949 switch (pl->cur_link_an_mode) { 950 case MLO_AN_PHY: 951 link_state = pl->phy_state; 952 break; 953 954 case MLO_AN_FIXED: 955 phylink_get_fixed_state(pl, &link_state); 956 break; 957 958 case MLO_AN_INBAND: 959 link_state = pl->link_config; 960 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 961 link_state.pause = MLO_PAUSE_NONE; 962 break; 963 964 default: /* can't happen */ 965 return; 966 } 967 968 link_state.link = false; 969 970 phylink_apply_manual_flow(pl, &link_state); 971 phylink_major_config(pl, force_restart, &link_state); 972} 973 974static const char *phylink_pause_to_str(int pause) 975{ 976 switch (pause & MLO_PAUSE_TXRX_MASK) { 977 case MLO_PAUSE_TX | MLO_PAUSE_RX: 978 return "rx/tx"; 979 case MLO_PAUSE_TX: 980 return "tx"; 981 case MLO_PAUSE_RX: 982 return "rx"; 983 default: 984 return "off"; 985 } 986} 987 988static void phylink_link_up(struct phylink *pl, 989 struct phylink_link_state link_state) 990{ 991 struct net_device *ndev = pl->netdev; 992 993 pl->cur_interface = link_state.interface; 994 995 if (pl->pcs_ops && pl->pcs_ops->pcs_link_up) 996 pl->pcs_ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 997 pl->cur_interface, 998 link_state.speed, link_state.duplex); 999 1000 pl->mac_ops->mac_link_up(pl->config, pl->phydev, 1001 pl->cur_link_an_mode, pl->cur_interface, 1002 link_state.speed, link_state.duplex, 1003 !!(link_state.pause & MLO_PAUSE_TX), 1004 !!(link_state.pause & MLO_PAUSE_RX)); 1005 1006 if (ndev) 1007 netif_carrier_on(ndev); 1008 1009 phylink_info(pl, 1010 "Link is Up - %s/%s - flow control %s\n", 1011 phy_speed_to_str(link_state.speed), 1012 phy_duplex_to_str(link_state.duplex), 1013 phylink_pause_to_str(link_state.pause)); 1014} 1015 1016static void phylink_link_down(struct phylink *pl) 1017{ 1018 struct net_device *ndev = pl->netdev; 1019 1020 if (ndev) 1021 netif_carrier_off(ndev); 1022 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1023 pl->cur_interface); 1024 phylink_info(pl, "Link is Down\n"); 1025} 1026 1027static void phylink_resolve(struct work_struct *w) 1028{ 1029 struct phylink *pl = container_of(w, struct phylink, resolve); 1030 struct phylink_link_state link_state; 1031 struct net_device *ndev = pl->netdev; 1032 bool mac_config = false; 1033 bool retrigger = false; 1034 bool cur_link_state; 1035 1036 mutex_lock(&pl->state_mutex); 1037 if (pl->netdev) 1038 cur_link_state = netif_carrier_ok(ndev); 1039 else 1040 cur_link_state = pl->old_link_state; 1041 1042 if (pl->phylink_disable_state) { 1043 pl->mac_link_dropped = false; 1044 link_state.link = false; 1045 } else if (pl->mac_link_dropped) { 1046 link_state.link = false; 1047 retrigger = true; 1048 } else { 1049 switch (pl->cur_link_an_mode) { 1050 case MLO_AN_PHY: 1051 link_state = pl->phy_state; 1052 phylink_apply_manual_flow(pl, &link_state); 1053 mac_config = link_state.link; 1054 break; 1055 1056 case MLO_AN_FIXED: 1057 phylink_get_fixed_state(pl, &link_state); 1058 mac_config = link_state.link; 1059 break; 1060 1061 case MLO_AN_INBAND: 1062 phylink_mac_pcs_get_state(pl, &link_state); 1063 1064 /* The PCS may have a latching link-fail indicator. 1065 * If the link was up, bring the link down and 1066 * re-trigger the resolve. Otherwise, re-read the 1067 * PCS state to get the current status of the link. 1068 */ 1069 if (!link_state.link) { 1070 if (cur_link_state) 1071 retrigger = true; 1072 else 1073 phylink_mac_pcs_get_state(pl, 1074 &link_state); 1075 } 1076 1077 /* If we have a phy, the "up" state is the union of 1078 * both the PHY and the MAC 1079 */ 1080 if (pl->phydev) 1081 link_state.link &= pl->phy_state.link; 1082 1083 /* Only update if the PHY link is up */ 1084 if (pl->phydev && pl->phy_state.link) { 1085 /* If the interface has changed, force a 1086 * link down event if the link isn't already 1087 * down, and re-resolve. 1088 */ 1089 if (link_state.interface != 1090 pl->phy_state.interface) { 1091 retrigger = true; 1092 link_state.link = false; 1093 } 1094 link_state.interface = pl->phy_state.interface; 1095 1096 /* If we have a PHY, we need to update with 1097 * the PHY flow control bits. 1098 */ 1099 link_state.pause = pl->phy_state.pause; 1100 mac_config = true; 1101 } 1102 phylink_apply_manual_flow(pl, &link_state); 1103 break; 1104 } 1105 } 1106 1107 if (mac_config) { 1108 if (link_state.interface != pl->link_config.interface) { 1109 /* The interface has changed, force the link down and 1110 * then reconfigure. 1111 */ 1112 if (cur_link_state) { 1113 phylink_link_down(pl); 1114 cur_link_state = false; 1115 } 1116 phylink_major_config(pl, false, &link_state); 1117 pl->link_config.interface = link_state.interface; 1118 } else if (!pl->pcs_ops && pl->config->legacy_pre_march2020) { 1119 /* The interface remains unchanged, only the speed, 1120 * duplex or pause settings have changed. Call the 1121 * old mac_config() method to configure the MAC/PCS 1122 * only if we do not have a legacy MAC driver. 1123 */ 1124 phylink_mac_config(pl, &link_state); 1125 } 1126 } 1127 1128 if (link_state.link != cur_link_state) { 1129 pl->old_link_state = link_state.link; 1130 if (!link_state.link) 1131 phylink_link_down(pl); 1132 else 1133 phylink_link_up(pl, link_state); 1134 } 1135 if (!link_state.link && retrigger) { 1136 pl->mac_link_dropped = false; 1137 queue_work(system_power_efficient_wq, &pl->resolve); 1138 } 1139 mutex_unlock(&pl->state_mutex); 1140} 1141 1142static void phylink_run_resolve(struct phylink *pl) 1143{ 1144 if (!pl->phylink_disable_state) 1145 queue_work(system_power_efficient_wq, &pl->resolve); 1146} 1147 1148static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1149{ 1150 unsigned long state = pl->phylink_disable_state; 1151 1152 set_bit(bit, &pl->phylink_disable_state); 1153 if (state == 0) { 1154 queue_work(system_power_efficient_wq, &pl->resolve); 1155 flush_work(&pl->resolve); 1156 } 1157} 1158 1159static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1160{ 1161 clear_bit(bit, &pl->phylink_disable_state); 1162 phylink_run_resolve(pl); 1163} 1164 1165static void phylink_fixed_poll(struct timer_list *t) 1166{ 1167 struct phylink *pl = container_of(t, struct phylink, link_poll); 1168 1169 mod_timer(t, jiffies + HZ); 1170 1171 phylink_run_resolve(pl); 1172} 1173 1174static const struct sfp_upstream_ops sfp_phylink_ops; 1175 1176static int phylink_register_sfp(struct phylink *pl, 1177 struct fwnode_handle *fwnode) 1178{ 1179 struct sfp_bus *bus; 1180 int ret; 1181 1182 if (!fwnode) 1183 return 0; 1184 1185 bus = sfp_bus_find_fwnode(fwnode); 1186 if (IS_ERR(bus)) { 1187 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1188 return PTR_ERR(bus); 1189 } 1190 1191 pl->sfp_bus = bus; 1192 1193 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1194 sfp_bus_put(bus); 1195 1196 return ret; 1197} 1198 1199/** 1200 * phylink_create() - create a phylink instance 1201 * @config: a pointer to the target &struct phylink_config 1202 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1203 * interface 1204 * @iface: the desired link mode defined by &typedef phy_interface_t 1205 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1206 * 1207 * Create a new phylink instance, and parse the link parameters found in @np. 1208 * This will parse in-band modes, fixed-link or SFP configuration. 1209 * 1210 * Note: the rtnl lock must not be held when calling this function. 1211 * 1212 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1213 * must use IS_ERR() to check for errors from this function. 1214 */ 1215struct phylink *phylink_create(struct phylink_config *config, 1216 struct fwnode_handle *fwnode, 1217 phy_interface_t iface, 1218 const struct phylink_mac_ops *mac_ops) 1219{ 1220 bool using_mac_select_pcs = false; 1221 struct phylink *pl; 1222 int ret; 1223 1224 if (mac_ops->mac_select_pcs && 1225 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1226 ERR_PTR(-EOPNOTSUPP)) 1227 using_mac_select_pcs = true; 1228 1229 /* Validate the supplied configuration */ 1230 if (using_mac_select_pcs && 1231 phy_interface_empty(config->supported_interfaces)) { 1232 dev_err(config->dev, 1233 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1234 return ERR_PTR(-EINVAL); 1235 } 1236 1237 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1238 if (!pl) 1239 return ERR_PTR(-ENOMEM); 1240 1241 mutex_init(&pl->state_mutex); 1242 INIT_WORK(&pl->resolve, phylink_resolve); 1243 1244 pl->config = config; 1245 if (config->type == PHYLINK_NETDEV) { 1246 pl->netdev = to_net_dev(config->dev); 1247 } else if (config->type == PHYLINK_DEV) { 1248 pl->dev = config->dev; 1249 } else { 1250 kfree(pl); 1251 return ERR_PTR(-EINVAL); 1252 } 1253 1254 pl->using_mac_select_pcs = using_mac_select_pcs; 1255 pl->phy_state.interface = iface; 1256 pl->link_interface = iface; 1257 if (iface == PHY_INTERFACE_MODE_MOCA) 1258 pl->link_port = PORT_BNC; 1259 else 1260 pl->link_port = PORT_MII; 1261 pl->link_config.interface = iface; 1262 pl->link_config.pause = MLO_PAUSE_AN; 1263 pl->link_config.speed = SPEED_UNKNOWN; 1264 pl->link_config.duplex = DUPLEX_UNKNOWN; 1265 pl->link_config.an_enabled = true; 1266 pl->mac_ops = mac_ops; 1267 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1268 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1269 1270 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1271 linkmode_copy(pl->link_config.advertising, pl->supported); 1272 phylink_validate(pl, pl->supported, &pl->link_config); 1273 1274 ret = phylink_parse_mode(pl, fwnode); 1275 if (ret < 0) { 1276 kfree(pl); 1277 return ERR_PTR(ret); 1278 } 1279 1280 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1281 ret = phylink_parse_fixedlink(pl, fwnode); 1282 if (ret < 0) { 1283 kfree(pl); 1284 return ERR_PTR(ret); 1285 } 1286 } 1287 1288 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1289 1290 ret = phylink_register_sfp(pl, fwnode); 1291 if (ret < 0) { 1292 kfree(pl); 1293 return ERR_PTR(ret); 1294 } 1295 1296 return pl; 1297} 1298EXPORT_SYMBOL_GPL(phylink_create); 1299 1300/** 1301 * phylink_destroy() - cleanup and destroy the phylink instance 1302 * @pl: a pointer to a &struct phylink returned from phylink_create() 1303 * 1304 * Destroy a phylink instance. Any PHY that has been attached must have been 1305 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1306 * 1307 * Note: the rtnl lock must not be held when calling this function. 1308 */ 1309void phylink_destroy(struct phylink *pl) 1310{ 1311 sfp_bus_del_upstream(pl->sfp_bus); 1312 if (pl->link_gpio) 1313 gpiod_put(pl->link_gpio); 1314 1315 cancel_work_sync(&pl->resolve); 1316 kfree(pl); 1317} 1318EXPORT_SYMBOL_GPL(phylink_destroy); 1319 1320static void phylink_phy_change(struct phy_device *phydev, bool up) 1321{ 1322 struct phylink *pl = phydev->phylink; 1323 bool tx_pause, rx_pause; 1324 1325 phy_get_pause(phydev, &tx_pause, &rx_pause); 1326 1327 mutex_lock(&pl->state_mutex); 1328 pl->phy_state.speed = phydev->speed; 1329 pl->phy_state.duplex = phydev->duplex; 1330 pl->phy_state.pause = MLO_PAUSE_NONE; 1331 if (tx_pause) 1332 pl->phy_state.pause |= MLO_PAUSE_TX; 1333 if (rx_pause) 1334 pl->phy_state.pause |= MLO_PAUSE_RX; 1335 pl->phy_state.interface = phydev->interface; 1336 pl->phy_state.link = up; 1337 mutex_unlock(&pl->state_mutex); 1338 1339 phylink_run_resolve(pl); 1340 1341 phylink_dbg(pl, "phy link %s %s/%s/%s/%s\n", up ? "up" : "down", 1342 phy_modes(phydev->interface), 1343 phy_speed_to_str(phydev->speed), 1344 phy_duplex_to_str(phydev->duplex), 1345 phylink_pause_to_str(pl->phy_state.pause)); 1346} 1347 1348static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1349 phy_interface_t interface) 1350{ 1351 struct phylink_link_state config; 1352 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1353 char *irq_str; 1354 int ret; 1355 1356 /* 1357 * This is the new way of dealing with flow control for PHYs, 1358 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1359 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1360 * using our validate call to the MAC, we rely upon the MAC 1361 * clearing the bits from both supported and advertising fields. 1362 */ 1363 phy_support_asym_pause(phy); 1364 1365 memset(&config, 0, sizeof(config)); 1366 linkmode_copy(supported, phy->supported); 1367 linkmode_copy(config.advertising, phy->advertising); 1368 1369 /* Clause 45 PHYs switch their Serdes lane between several different 1370 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G 1371 * speeds. We really need to know which interface modes the PHY and 1372 * MAC supports to properly work out which linkmodes can be supported. 1373 */ 1374 if (phy->is_c45 && 1375 interface != PHY_INTERFACE_MODE_RXAUI && 1376 interface != PHY_INTERFACE_MODE_XAUI && 1377 interface != PHY_INTERFACE_MODE_USXGMII) 1378 config.interface = PHY_INTERFACE_MODE_NA; 1379 else 1380 config.interface = interface; 1381 1382 ret = phylink_validate(pl, supported, &config); 1383 if (ret) { 1384 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1385 phy_modes(config.interface), 1386 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1387 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1388 ERR_PTR(ret)); 1389 return ret; 1390 } 1391 1392 phy->phylink = pl; 1393 phy->phy_link_change = phylink_phy_change; 1394 1395 irq_str = phy_attached_info_irq(phy); 1396 phylink_info(pl, 1397 "PHY [%s] driver [%s] (irq=%s)\n", 1398 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1399 kfree(irq_str); 1400 1401 mutex_lock(&phy->lock); 1402 mutex_lock(&pl->state_mutex); 1403 pl->phydev = phy; 1404 pl->phy_state.interface = interface; 1405 pl->phy_state.pause = MLO_PAUSE_NONE; 1406 pl->phy_state.speed = SPEED_UNKNOWN; 1407 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1408 linkmode_copy(pl->supported, supported); 1409 linkmode_copy(pl->link_config.advertising, config.advertising); 1410 1411 /* Restrict the phy advertisement according to the MAC support. */ 1412 linkmode_copy(phy->advertising, config.advertising); 1413 mutex_unlock(&pl->state_mutex); 1414 mutex_unlock(&phy->lock); 1415 1416 phylink_dbg(pl, 1417 "phy: %s setting supported %*pb advertising %*pb\n", 1418 phy_modes(interface), 1419 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1420 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1421 1422 if (phy_interrupt_is_valid(phy)) 1423 phy_request_interrupt(phy); 1424 1425 return 0; 1426} 1427 1428static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1429 phy_interface_t interface) 1430{ 1431 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1432 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1433 phy_interface_mode_is_8023z(interface)))) 1434 return -EINVAL; 1435 1436 if (pl->phydev) 1437 return -EBUSY; 1438 1439 return phy_attach_direct(pl->netdev, phy, 0, interface); 1440} 1441 1442/** 1443 * phylink_connect_phy() - connect a PHY to the phylink instance 1444 * @pl: a pointer to a &struct phylink returned from phylink_create() 1445 * @phy: a pointer to a &struct phy_device. 1446 * 1447 * Connect @phy to the phylink instance specified by @pl by calling 1448 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1449 * capabilities, start the PHYLIB state machine and enable any interrupts 1450 * that the PHY supports. 1451 * 1452 * This updates the phylink's ethtool supported and advertising link mode 1453 * masks. 1454 * 1455 * Returns 0 on success or a negative errno. 1456 */ 1457int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1458{ 1459 int ret; 1460 1461 /* Use PHY device/driver interface */ 1462 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1463 pl->link_interface = phy->interface; 1464 pl->link_config.interface = pl->link_interface; 1465 } 1466 1467 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1468 if (ret < 0) 1469 return ret; 1470 1471 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1472 if (ret) 1473 phy_detach(phy); 1474 1475 return ret; 1476} 1477EXPORT_SYMBOL_GPL(phylink_connect_phy); 1478 1479/** 1480 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1481 * @pl: a pointer to a &struct phylink returned from phylink_create() 1482 * @dn: a pointer to a &struct device_node. 1483 * @flags: PHY-specific flags to communicate to the PHY device driver 1484 * 1485 * Connect the phy specified in the device node @dn to the phylink instance 1486 * specified by @pl. Actions specified in phylink_connect_phy() will be 1487 * performed. 1488 * 1489 * Returns 0 on success or a negative errno. 1490 */ 1491int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1492 u32 flags) 1493{ 1494 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1495} 1496EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1497 1498/** 1499 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1500 * @pl: a pointer to a &struct phylink returned from phylink_create() 1501 * @fwnode: a pointer to a &struct fwnode_handle. 1502 * @flags: PHY-specific flags to communicate to the PHY device driver 1503 * 1504 * Connect the phy specified @fwnode to the phylink instance specified 1505 * by @pl. 1506 * 1507 * Returns 0 on success or a negative errno. 1508 */ 1509int phylink_fwnode_phy_connect(struct phylink *pl, 1510 struct fwnode_handle *fwnode, 1511 u32 flags) 1512{ 1513 struct fwnode_handle *phy_fwnode; 1514 struct phy_device *phy_dev; 1515 int ret; 1516 1517 /* Fixed links and 802.3z are handled without needing a PHY */ 1518 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1519 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1520 phy_interface_mode_is_8023z(pl->link_interface))) 1521 return 0; 1522 1523 phy_fwnode = fwnode_get_phy_node(fwnode); 1524 if (IS_ERR(phy_fwnode)) { 1525 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1526 return -ENODEV; 1527 return 0; 1528 } 1529 1530 phy_dev = fwnode_phy_find_device(phy_fwnode); 1531 /* We're done with the phy_node handle */ 1532 fwnode_handle_put(phy_fwnode); 1533 if (!phy_dev) 1534 return -ENODEV; 1535 1536 /* Use PHY device/driver interface */ 1537 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1538 pl->link_interface = phy_dev->interface; 1539 pl->link_config.interface = pl->link_interface; 1540 } 1541 1542 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1543 pl->link_interface); 1544 if (ret) { 1545 phy_device_free(phy_dev); 1546 return ret; 1547 } 1548 1549 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1550 if (ret) 1551 phy_detach(phy_dev); 1552 1553 return ret; 1554} 1555EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1556 1557/** 1558 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1559 * instance. 1560 * @pl: a pointer to a &struct phylink returned from phylink_create() 1561 * 1562 * Disconnect any current PHY from the phylink instance described by @pl. 1563 */ 1564void phylink_disconnect_phy(struct phylink *pl) 1565{ 1566 struct phy_device *phy; 1567 1568 ASSERT_RTNL(); 1569 1570 phy = pl->phydev; 1571 if (phy) { 1572 mutex_lock(&phy->lock); 1573 mutex_lock(&pl->state_mutex); 1574 pl->phydev = NULL; 1575 mutex_unlock(&pl->state_mutex); 1576 mutex_unlock(&phy->lock); 1577 flush_work(&pl->resolve); 1578 1579 phy_disconnect(phy); 1580 } 1581} 1582EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1583 1584/** 1585 * phylink_mac_change() - notify phylink of a change in MAC state 1586 * @pl: a pointer to a &struct phylink returned from phylink_create() 1587 * @up: indicates whether the link is currently up. 1588 * 1589 * The MAC driver should call this driver when the state of its link 1590 * changes (eg, link failure, new negotiation results, etc.) 1591 */ 1592void phylink_mac_change(struct phylink *pl, bool up) 1593{ 1594 if (!up) 1595 pl->mac_link_dropped = true; 1596 phylink_run_resolve(pl); 1597 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1598} 1599EXPORT_SYMBOL_GPL(phylink_mac_change); 1600 1601static irqreturn_t phylink_link_handler(int irq, void *data) 1602{ 1603 struct phylink *pl = data; 1604 1605 phylink_run_resolve(pl); 1606 1607 return IRQ_HANDLED; 1608} 1609 1610/** 1611 * phylink_start() - start a phylink instance 1612 * @pl: a pointer to a &struct phylink returned from phylink_create() 1613 * 1614 * Start the phylink instance specified by @pl, configuring the MAC for the 1615 * desired link mode(s) and negotiation style. This should be called from the 1616 * network device driver's &struct net_device_ops ndo_open() method. 1617 */ 1618void phylink_start(struct phylink *pl) 1619{ 1620 bool poll = false; 1621 1622 ASSERT_RTNL(); 1623 1624 phylink_info(pl, "configuring for %s/%s link mode\n", 1625 phylink_an_mode_str(pl->cur_link_an_mode), 1626 phy_modes(pl->link_config.interface)); 1627 1628 /* Always set the carrier off */ 1629 if (pl->netdev) 1630 netif_carrier_off(pl->netdev); 1631 1632 /* Apply the link configuration to the MAC when starting. This allows 1633 * a fixed-link to start with the correct parameters, and also 1634 * ensures that we set the appropriate advertisement for Serdes links. 1635 * 1636 * Restart autonegotiation if using 802.3z to ensure that the link 1637 * parameters are properly negotiated. This is necessary for DSA 1638 * switches using 802.3z negotiation to ensure they see our modes. 1639 */ 1640 phylink_mac_initial_config(pl, true); 1641 1642 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1643 1644 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1645 int irq = gpiod_to_irq(pl->link_gpio); 1646 1647 if (irq > 0) { 1648 if (!request_irq(irq, phylink_link_handler, 1649 IRQF_TRIGGER_RISING | 1650 IRQF_TRIGGER_FALLING, 1651 "netdev link", pl)) 1652 pl->link_irq = irq; 1653 else 1654 irq = 0; 1655 } 1656 if (irq <= 0) 1657 poll = true; 1658 } 1659 1660 switch (pl->cfg_link_an_mode) { 1661 case MLO_AN_FIXED: 1662 poll |= pl->config->poll_fixed_state; 1663 break; 1664 case MLO_AN_INBAND: 1665 if (pl->pcs) 1666 poll |= pl->pcs->poll; 1667 break; 1668 } 1669 if (poll) 1670 mod_timer(&pl->link_poll, jiffies + HZ); 1671 if (pl->phydev) 1672 phy_start(pl->phydev); 1673 if (pl->sfp_bus) 1674 sfp_upstream_start(pl->sfp_bus); 1675} 1676EXPORT_SYMBOL_GPL(phylink_start); 1677 1678/** 1679 * phylink_stop() - stop a phylink instance 1680 * @pl: a pointer to a &struct phylink returned from phylink_create() 1681 * 1682 * Stop the phylink instance specified by @pl. This should be called from the 1683 * network device driver's &struct net_device_ops ndo_stop() method. The 1684 * network device's carrier state should not be changed prior to calling this 1685 * function. 1686 * 1687 * This will synchronously bring down the link if the link is not already 1688 * down (in other words, it will trigger a mac_link_down() method call.) 1689 */ 1690void phylink_stop(struct phylink *pl) 1691{ 1692 ASSERT_RTNL(); 1693 1694 if (pl->sfp_bus) 1695 sfp_upstream_stop(pl->sfp_bus); 1696 if (pl->phydev) 1697 phy_stop(pl->phydev); 1698 del_timer_sync(&pl->link_poll); 1699 if (pl->link_irq) { 1700 free_irq(pl->link_irq, pl); 1701 pl->link_irq = 0; 1702 } 1703 1704 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1705} 1706EXPORT_SYMBOL_GPL(phylink_stop); 1707 1708/** 1709 * phylink_suspend() - handle a network device suspend event 1710 * @pl: a pointer to a &struct phylink returned from phylink_create() 1711 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1712 * 1713 * Handle a network device suspend event. There are several cases: 1714 * 1715 * - If Wake-on-Lan is not active, we can bring down the link between 1716 * the MAC and PHY by calling phylink_stop(). 1717 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1718 * can also bring down the link between the MAC and PHY. 1719 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1720 * still needs to receive packets, so we can not bring the link down. 1721 */ 1722void phylink_suspend(struct phylink *pl, bool mac_wol) 1723{ 1724 ASSERT_RTNL(); 1725 1726 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1727 /* Wake-on-Lan enabled, MAC handling */ 1728 mutex_lock(&pl->state_mutex); 1729 1730 /* Stop the resolver bringing the link up */ 1731 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 1732 1733 /* Disable the carrier, to prevent transmit timeouts, 1734 * but one would hope all packets have been sent. This 1735 * also means phylink_resolve() will do nothing. 1736 */ 1737 if (pl->netdev) 1738 netif_carrier_off(pl->netdev); 1739 else 1740 pl->old_link_state = false; 1741 1742 /* We do not call mac_link_down() here as we want the 1743 * link to remain up to receive the WoL packets. 1744 */ 1745 mutex_unlock(&pl->state_mutex); 1746 } else { 1747 phylink_stop(pl); 1748 } 1749} 1750EXPORT_SYMBOL_GPL(phylink_suspend); 1751 1752/** 1753 * phylink_resume() - handle a network device resume event 1754 * @pl: a pointer to a &struct phylink returned from phylink_create() 1755 * 1756 * Undo the effects of phylink_suspend(), returning the link to an 1757 * operational state. 1758 */ 1759void phylink_resume(struct phylink *pl) 1760{ 1761 ASSERT_RTNL(); 1762 1763 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 1764 /* Wake-on-Lan enabled, MAC handling */ 1765 1766 /* Call mac_link_down() so we keep the overall state balanced. 1767 * Do this under the state_mutex lock for consistency. This 1768 * will cause a "Link Down" message to be printed during 1769 * resume, which is harmless - the true link state will be 1770 * printed when we run a resolve. 1771 */ 1772 mutex_lock(&pl->state_mutex); 1773 phylink_link_down(pl); 1774 mutex_unlock(&pl->state_mutex); 1775 1776 /* Re-apply the link parameters so that all the settings get 1777 * restored to the MAC. 1778 */ 1779 phylink_mac_initial_config(pl, true); 1780 1781 /* Re-enable and re-resolve the link parameters */ 1782 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 1783 } else { 1784 phylink_start(pl); 1785 } 1786} 1787EXPORT_SYMBOL_GPL(phylink_resume); 1788 1789/** 1790 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 1791 * @pl: a pointer to a &struct phylink returned from phylink_create() 1792 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 1793 * 1794 * Read the wake on lan parameters from the PHY attached to the phylink 1795 * instance specified by @pl. If no PHY is currently attached, report no 1796 * support for wake on lan. 1797 */ 1798void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1799{ 1800 ASSERT_RTNL(); 1801 1802 wol->supported = 0; 1803 wol->wolopts = 0; 1804 1805 if (pl->phydev) 1806 phy_ethtool_get_wol(pl->phydev, wol); 1807} 1808EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 1809 1810/** 1811 * phylink_ethtool_set_wol() - set wake on lan parameters 1812 * @pl: a pointer to a &struct phylink returned from phylink_create() 1813 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 1814 * 1815 * Set the wake on lan parameters for the PHY attached to the phylink 1816 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 1817 * error. 1818 * 1819 * Returns zero on success or negative errno code. 1820 */ 1821int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1822{ 1823 int ret = -EOPNOTSUPP; 1824 1825 ASSERT_RTNL(); 1826 1827 if (pl->phydev) 1828 ret = phy_ethtool_set_wol(pl->phydev, wol); 1829 1830 return ret; 1831} 1832EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 1833 1834static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 1835{ 1836 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 1837 1838 linkmode_zero(mask); 1839 phylink_set_port_modes(mask); 1840 1841 linkmode_and(dst, dst, mask); 1842 linkmode_or(dst, dst, b); 1843} 1844 1845static void phylink_get_ksettings(const struct phylink_link_state *state, 1846 struct ethtool_link_ksettings *kset) 1847{ 1848 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 1849 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 1850 kset->base.speed = state->speed; 1851 kset->base.duplex = state->duplex; 1852 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 1853 AUTONEG_DISABLE; 1854} 1855 1856/** 1857 * phylink_ethtool_ksettings_get() - get the current link settings 1858 * @pl: a pointer to a &struct phylink returned from phylink_create() 1859 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 1860 * 1861 * Read the current link settings for the phylink instance specified by @pl. 1862 * This will be the link settings read from the MAC, PHY or fixed link 1863 * settings depending on the current negotiation mode. 1864 */ 1865int phylink_ethtool_ksettings_get(struct phylink *pl, 1866 struct ethtool_link_ksettings *kset) 1867{ 1868 struct phylink_link_state link_state; 1869 1870 ASSERT_RTNL(); 1871 1872 if (pl->phydev) 1873 phy_ethtool_ksettings_get(pl->phydev, kset); 1874 else 1875 kset->base.port = pl->link_port; 1876 1877 linkmode_copy(kset->link_modes.supported, pl->supported); 1878 1879 switch (pl->cur_link_an_mode) { 1880 case MLO_AN_FIXED: 1881 /* We are using fixed settings. Report these as the 1882 * current link settings - and note that these also 1883 * represent the supported speeds/duplex/pause modes. 1884 */ 1885 phylink_get_fixed_state(pl, &link_state); 1886 phylink_get_ksettings(&link_state, kset); 1887 break; 1888 1889 case MLO_AN_INBAND: 1890 /* If there is a phy attached, then use the reported 1891 * settings from the phy with no modification. 1892 */ 1893 if (pl->phydev) 1894 break; 1895 1896 phylink_mac_pcs_get_state(pl, &link_state); 1897 1898 /* The MAC is reporting the link results from its own PCS 1899 * layer via in-band status. Report these as the current 1900 * link settings. 1901 */ 1902 phylink_get_ksettings(&link_state, kset); 1903 break; 1904 } 1905 1906 return 0; 1907} 1908EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 1909 1910/** 1911 * phylink_ethtool_ksettings_set() - set the link settings 1912 * @pl: a pointer to a &struct phylink returned from phylink_create() 1913 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 1914 */ 1915int phylink_ethtool_ksettings_set(struct phylink *pl, 1916 const struct ethtool_link_ksettings *kset) 1917{ 1918 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 1919 struct phylink_link_state config; 1920 const struct phy_setting *s; 1921 1922 ASSERT_RTNL(); 1923 1924 if (pl->phydev) { 1925 /* We can rely on phylib for this update; we also do not need 1926 * to update the pl->link_config settings: 1927 * - the configuration returned via ksettings_get() will come 1928 * from phylib whenever a PHY is present. 1929 * - link_config.interface will be updated by the PHY calling 1930 * back via phylink_phy_change() and a subsequent resolve. 1931 * - initial link configuration for PHY mode comes from the 1932 * last phy state updated via phylink_phy_change(). 1933 * - other configuration changes (e.g. pause modes) are 1934 * performed directly via phylib. 1935 * - if in in-band mode with a PHY, the link configuration 1936 * is passed on the link from the PHY, and all of 1937 * link_config.{speed,duplex,an_enabled,pause} are not used. 1938 * - the only possible use would be link_config.advertising 1939 * pause modes when in 1000base-X mode with a PHY, but in 1940 * the presence of a PHY, this should not be changed as that 1941 * should be determined from the media side advertisement. 1942 */ 1943 return phy_ethtool_ksettings_set(pl->phydev, kset); 1944 } 1945 1946 config = pl->link_config; 1947 1948 /* Mask out unsupported advertisements */ 1949 linkmode_and(config.advertising, kset->link_modes.advertising, 1950 pl->supported); 1951 1952 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 1953 switch (kset->base.autoneg) { 1954 case AUTONEG_DISABLE: 1955 /* Autonegotiation disabled, select a suitable speed and 1956 * duplex. 1957 */ 1958 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 1959 pl->supported, false); 1960 if (!s) 1961 return -EINVAL; 1962 1963 /* If we have a fixed link, refuse to change link parameters. 1964 * If the link parameters match, accept them but do nothing. 1965 */ 1966 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 1967 if (s->speed != pl->link_config.speed || 1968 s->duplex != pl->link_config.duplex) 1969 return -EINVAL; 1970 return 0; 1971 } 1972 1973 config.speed = s->speed; 1974 config.duplex = s->duplex; 1975 break; 1976 1977 case AUTONEG_ENABLE: 1978 /* If we have a fixed link, allow autonegotiation (since that 1979 * is our default case) but do not allow the advertisement to 1980 * be changed. If the advertisement matches, simply return. 1981 */ 1982 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 1983 if (!linkmode_equal(config.advertising, 1984 pl->link_config.advertising)) 1985 return -EINVAL; 1986 return 0; 1987 } 1988 1989 config.speed = SPEED_UNKNOWN; 1990 config.duplex = DUPLEX_UNKNOWN; 1991 break; 1992 1993 default: 1994 return -EINVAL; 1995 } 1996 1997 /* We have ruled out the case with a PHY attached, and the 1998 * fixed-link cases. All that is left are in-band links. 1999 */ 2000 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 2001 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2002 config.an_enabled); 2003 2004 /* If this link is with an SFP, ensure that changes to advertised modes 2005 * also cause the associated interface to be selected such that the 2006 * link can be configured correctly. 2007 */ 2008 if (pl->sfp_bus) { 2009 config.interface = sfp_select_interface(pl->sfp_bus, 2010 config.advertising); 2011 if (config.interface == PHY_INTERFACE_MODE_NA) { 2012 phylink_err(pl, 2013 "selection of interface failed, advertisement %*pb\n", 2014 __ETHTOOL_LINK_MODE_MASK_NBITS, 2015 config.advertising); 2016 return -EINVAL; 2017 } 2018 2019 /* Revalidate with the selected interface */ 2020 linkmode_copy(support, pl->supported); 2021 if (phylink_validate(pl, support, &config)) { 2022 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2023 phylink_an_mode_str(pl->cur_link_an_mode), 2024 phy_modes(config.interface), 2025 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2026 return -EINVAL; 2027 } 2028 } else { 2029 /* Validate without changing the current supported mask. */ 2030 linkmode_copy(support, pl->supported); 2031 if (phylink_validate(pl, support, &config)) 2032 return -EINVAL; 2033 } 2034 2035 /* If autonegotiation is enabled, we must have an advertisement */ 2036 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2037 return -EINVAL; 2038 2039 mutex_lock(&pl->state_mutex); 2040 pl->link_config.speed = config.speed; 2041 pl->link_config.duplex = config.duplex; 2042 pl->link_config.an_enabled = config.an_enabled; 2043 2044 if (pl->link_config.interface != config.interface) { 2045 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2046 /* We need to force the link down, then change the interface */ 2047 if (pl->old_link_state) { 2048 phylink_link_down(pl); 2049 pl->old_link_state = false; 2050 } 2051 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2052 &pl->phylink_disable_state)) 2053 phylink_major_config(pl, false, &config); 2054 pl->link_config.interface = config.interface; 2055 linkmode_copy(pl->link_config.advertising, config.advertising); 2056 } else if (!linkmode_equal(pl->link_config.advertising, 2057 config.advertising)) { 2058 linkmode_copy(pl->link_config.advertising, config.advertising); 2059 phylink_change_inband_advert(pl); 2060 } 2061 mutex_unlock(&pl->state_mutex); 2062 2063 return 0; 2064} 2065EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2066 2067/** 2068 * phylink_ethtool_nway_reset() - restart negotiation 2069 * @pl: a pointer to a &struct phylink returned from phylink_create() 2070 * 2071 * Restart negotiation for the phylink instance specified by @pl. This will 2072 * cause any attached phy to restart negotiation with the link partner, and 2073 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2074 * negotiation. 2075 * 2076 * Returns zero on success, or negative error code. 2077 */ 2078int phylink_ethtool_nway_reset(struct phylink *pl) 2079{ 2080 int ret = 0; 2081 2082 ASSERT_RTNL(); 2083 2084 if (pl->phydev) 2085 ret = phy_restart_aneg(pl->phydev); 2086 phylink_mac_pcs_an_restart(pl); 2087 2088 return ret; 2089} 2090EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2091 2092/** 2093 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2094 * @pl: a pointer to a &struct phylink returned from phylink_create() 2095 * @pause: a pointer to a &struct ethtool_pauseparam 2096 */ 2097void phylink_ethtool_get_pauseparam(struct phylink *pl, 2098 struct ethtool_pauseparam *pause) 2099{ 2100 ASSERT_RTNL(); 2101 2102 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2103 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2104 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2105} 2106EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2107 2108/** 2109 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2110 * @pl: a pointer to a &struct phylink returned from phylink_create() 2111 * @pause: a pointer to a &struct ethtool_pauseparam 2112 */ 2113int phylink_ethtool_set_pauseparam(struct phylink *pl, 2114 struct ethtool_pauseparam *pause) 2115{ 2116 struct phylink_link_state *config = &pl->link_config; 2117 bool manual_changed; 2118 int pause_state; 2119 2120 ASSERT_RTNL(); 2121 2122 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2123 return -EOPNOTSUPP; 2124 2125 if (!phylink_test(pl->supported, Pause) && 2126 !phylink_test(pl->supported, Asym_Pause)) 2127 return -EOPNOTSUPP; 2128 2129 if (!phylink_test(pl->supported, Asym_Pause) && 2130 pause->rx_pause != pause->tx_pause) 2131 return -EINVAL; 2132 2133 pause_state = 0; 2134 if (pause->autoneg) 2135 pause_state |= MLO_PAUSE_AN; 2136 if (pause->rx_pause) 2137 pause_state |= MLO_PAUSE_RX; 2138 if (pause->tx_pause) 2139 pause_state |= MLO_PAUSE_TX; 2140 2141 mutex_lock(&pl->state_mutex); 2142 /* 2143 * See the comments for linkmode_set_pause(), wrt the deficiencies 2144 * with the current implementation. A solution to this issue would 2145 * be: 2146 * ethtool Local device 2147 * rx tx Pause AsymDir 2148 * 0 0 0 0 2149 * 1 0 1 1 2150 * 0 1 0 1 2151 * 1 1 1 1 2152 * and then use the ethtool rx/tx enablement status to mask the 2153 * rx/tx pause resolution. 2154 */ 2155 linkmode_set_pause(config->advertising, pause->tx_pause, 2156 pause->rx_pause); 2157 2158 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2159 (!(pause_state & MLO_PAUSE_AN) && 2160 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2161 2162 config->pause = pause_state; 2163 2164 /* Update our in-band advertisement, triggering a renegotiation if 2165 * the advertisement changed. 2166 */ 2167 if (!pl->phydev) 2168 phylink_change_inband_advert(pl); 2169 2170 mutex_unlock(&pl->state_mutex); 2171 2172 /* If we have a PHY, a change of the pause frame advertisement will 2173 * cause phylib to renegotiate (if AN is enabled) which will in turn 2174 * call our phylink_phy_change() and trigger a resolve. Note that 2175 * we can't hold our state mutex while calling phy_set_asym_pause(). 2176 */ 2177 if (pl->phydev) 2178 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2179 pause->tx_pause); 2180 2181 /* If the manual pause settings changed, make sure we trigger a 2182 * resolve to update their state; we can not guarantee that the 2183 * link will cycle. 2184 */ 2185 if (manual_changed) { 2186 pl->mac_link_dropped = true; 2187 phylink_run_resolve(pl); 2188 } 2189 2190 return 0; 2191} 2192EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2193 2194/** 2195 * phylink_get_eee_err() - read the energy efficient ethernet error 2196 * counter 2197 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2198 * 2199 * Read the Energy Efficient Ethernet error counter from the PHY associated 2200 * with the phylink instance specified by @pl. 2201 * 2202 * Returns positive error counter value, or negative error code. 2203 */ 2204int phylink_get_eee_err(struct phylink *pl) 2205{ 2206 int ret = 0; 2207 2208 ASSERT_RTNL(); 2209 2210 if (pl->phydev) 2211 ret = phy_get_eee_err(pl->phydev); 2212 2213 return ret; 2214} 2215EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2216 2217/** 2218 * phylink_init_eee() - init and check the EEE features 2219 * @pl: a pointer to a &struct phylink returned from phylink_create() 2220 * @clk_stop_enable: allow PHY to stop receive clock 2221 * 2222 * Must be called either with RTNL held or within mac_link_up() 2223 */ 2224int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2225{ 2226 int ret = -EOPNOTSUPP; 2227 2228 if (pl->phydev) 2229 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2230 2231 return ret; 2232} 2233EXPORT_SYMBOL_GPL(phylink_init_eee); 2234 2235/** 2236 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2237 * @pl: a pointer to a &struct phylink returned from phylink_create() 2238 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2239 */ 2240int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2241{ 2242 int ret = -EOPNOTSUPP; 2243 2244 ASSERT_RTNL(); 2245 2246 if (pl->phydev) 2247 ret = phy_ethtool_get_eee(pl->phydev, eee); 2248 2249 return ret; 2250} 2251EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2252 2253/** 2254 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2255 * @pl: a pointer to a &struct phylink returned from phylink_create() 2256 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2257 */ 2258int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2259{ 2260 int ret = -EOPNOTSUPP; 2261 2262 ASSERT_RTNL(); 2263 2264 if (pl->phydev) 2265 ret = phy_ethtool_set_eee(pl->phydev, eee); 2266 2267 return ret; 2268} 2269EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2270 2271/* This emulates MII registers for a fixed-mode phy operating as per the 2272 * passed in state. "aneg" defines if we report negotiation is possible. 2273 * 2274 * FIXME: should deal with negotiation state too. 2275 */ 2276static int phylink_mii_emul_read(unsigned int reg, 2277 struct phylink_link_state *state) 2278{ 2279 struct fixed_phy_status fs; 2280 unsigned long *lpa = state->lp_advertising; 2281 int val; 2282 2283 fs.link = state->link; 2284 fs.speed = state->speed; 2285 fs.duplex = state->duplex; 2286 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2287 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2288 2289 val = swphy_read_reg(reg, &fs); 2290 if (reg == MII_BMSR) { 2291 if (!state->an_complete) 2292 val &= ~BMSR_ANEGCOMPLETE; 2293 } 2294 return val; 2295} 2296 2297static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2298 unsigned int reg) 2299{ 2300 struct phy_device *phydev = pl->phydev; 2301 int prtad, devad; 2302 2303 if (mdio_phy_id_is_c45(phy_id)) { 2304 prtad = mdio_phy_id_prtad(phy_id); 2305 devad = mdio_phy_id_devad(phy_id); 2306 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2307 reg); 2308 } 2309 2310 if (phydev->is_c45) { 2311 switch (reg) { 2312 case MII_BMCR: 2313 case MII_BMSR: 2314 case MII_PHYSID1: 2315 case MII_PHYSID2: 2316 devad = __ffs(phydev->c45_ids.mmds_present); 2317 break; 2318 case MII_ADVERTISE: 2319 case MII_LPA: 2320 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2321 return -EINVAL; 2322 devad = MDIO_MMD_AN; 2323 if (reg == MII_ADVERTISE) 2324 reg = MDIO_AN_ADVERTISE; 2325 else 2326 reg = MDIO_AN_LPA; 2327 break; 2328 default: 2329 return -EINVAL; 2330 } 2331 prtad = phy_id; 2332 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2333 reg); 2334 } 2335 2336 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2337} 2338 2339static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2340 unsigned int reg, unsigned int val) 2341{ 2342 struct phy_device *phydev = pl->phydev; 2343 int prtad, devad; 2344 2345 if (mdio_phy_id_is_c45(phy_id)) { 2346 prtad = mdio_phy_id_prtad(phy_id); 2347 devad = mdio_phy_id_devad(phy_id); 2348 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2349 reg, val); 2350 } 2351 2352 if (phydev->is_c45) { 2353 switch (reg) { 2354 case MII_BMCR: 2355 case MII_BMSR: 2356 case MII_PHYSID1: 2357 case MII_PHYSID2: 2358 devad = __ffs(phydev->c45_ids.mmds_present); 2359 break; 2360 case MII_ADVERTISE: 2361 case MII_LPA: 2362 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2363 return -EINVAL; 2364 devad = MDIO_MMD_AN; 2365 if (reg == MII_ADVERTISE) 2366 reg = MDIO_AN_ADVERTISE; 2367 else 2368 reg = MDIO_AN_LPA; 2369 break; 2370 default: 2371 return -EINVAL; 2372 } 2373 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2374 reg, val); 2375 } 2376 2377 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2378} 2379 2380static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2381 unsigned int reg) 2382{ 2383 struct phylink_link_state state; 2384 int val = 0xffff; 2385 2386 switch (pl->cur_link_an_mode) { 2387 case MLO_AN_FIXED: 2388 if (phy_id == 0) { 2389 phylink_get_fixed_state(pl, &state); 2390 val = phylink_mii_emul_read(reg, &state); 2391 } 2392 break; 2393 2394 case MLO_AN_PHY: 2395 return -EOPNOTSUPP; 2396 2397 case MLO_AN_INBAND: 2398 if (phy_id == 0) { 2399 phylink_mac_pcs_get_state(pl, &state); 2400 val = phylink_mii_emul_read(reg, &state); 2401 } 2402 break; 2403 } 2404 2405 return val & 0xffff; 2406} 2407 2408static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2409 unsigned int reg, unsigned int val) 2410{ 2411 switch (pl->cur_link_an_mode) { 2412 case MLO_AN_FIXED: 2413 break; 2414 2415 case MLO_AN_PHY: 2416 return -EOPNOTSUPP; 2417 2418 case MLO_AN_INBAND: 2419 break; 2420 } 2421 2422 return 0; 2423} 2424 2425/** 2426 * phylink_mii_ioctl() - generic mii ioctl interface 2427 * @pl: a pointer to a &struct phylink returned from phylink_create() 2428 * @ifr: a pointer to a &struct ifreq for socket ioctls 2429 * @cmd: ioctl cmd to execute 2430 * 2431 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2432 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2433 * 2434 * Returns: zero on success or negative error code. 2435 * 2436 * %SIOCGMIIPHY: 2437 * read register from the current PHY. 2438 * %SIOCGMIIREG: 2439 * read register from the specified PHY. 2440 * %SIOCSMIIREG: 2441 * set a register on the specified PHY. 2442 */ 2443int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2444{ 2445 struct mii_ioctl_data *mii = if_mii(ifr); 2446 int ret; 2447 2448 ASSERT_RTNL(); 2449 2450 if (pl->phydev) { 2451 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2452 switch (cmd) { 2453 case SIOCGMIIPHY: 2454 mii->phy_id = pl->phydev->mdio.addr; 2455 fallthrough; 2456 2457 case SIOCGMIIREG: 2458 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2459 if (ret >= 0) { 2460 mii->val_out = ret; 2461 ret = 0; 2462 } 2463 break; 2464 2465 case SIOCSMIIREG: 2466 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2467 mii->val_in); 2468 break; 2469 2470 default: 2471 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2472 break; 2473 } 2474 } else { 2475 switch (cmd) { 2476 case SIOCGMIIPHY: 2477 mii->phy_id = 0; 2478 fallthrough; 2479 2480 case SIOCGMIIREG: 2481 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2482 if (ret >= 0) { 2483 mii->val_out = ret; 2484 ret = 0; 2485 } 2486 break; 2487 2488 case SIOCSMIIREG: 2489 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2490 mii->val_in); 2491 break; 2492 2493 default: 2494 ret = -EOPNOTSUPP; 2495 break; 2496 } 2497 } 2498 2499 return ret; 2500} 2501EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2502 2503/** 2504 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2505 * link partners 2506 * @pl: a pointer to a &struct phylink returned from phylink_create() 2507 * @sync: perform action synchronously 2508 * 2509 * If we have a PHY that is not part of a SFP module, then set the speed 2510 * as described in the phy_speed_down() function. Please see this function 2511 * for a description of the @sync parameter. 2512 * 2513 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2514 */ 2515int phylink_speed_down(struct phylink *pl, bool sync) 2516{ 2517 int ret = 0; 2518 2519 ASSERT_RTNL(); 2520 2521 if (!pl->sfp_bus && pl->phydev) 2522 ret = phy_speed_down(pl->phydev, sync); 2523 2524 return ret; 2525} 2526EXPORT_SYMBOL_GPL(phylink_speed_down); 2527 2528/** 2529 * phylink_speed_up() - restore the advertised speeds prior to the call to 2530 * phylink_speed_down() 2531 * @pl: a pointer to a &struct phylink returned from phylink_create() 2532 * 2533 * If we have a PHY that is not part of a SFP module, then restore the 2534 * PHY speeds as per phy_speed_up(). 2535 * 2536 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2537 */ 2538int phylink_speed_up(struct phylink *pl) 2539{ 2540 int ret = 0; 2541 2542 ASSERT_RTNL(); 2543 2544 if (!pl->sfp_bus && pl->phydev) 2545 ret = phy_speed_up(pl->phydev); 2546 2547 return ret; 2548} 2549EXPORT_SYMBOL_GPL(phylink_speed_up); 2550 2551static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2552{ 2553 struct phylink *pl = upstream; 2554 2555 pl->netdev->sfp_bus = bus; 2556} 2557 2558static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2559{ 2560 struct phylink *pl = upstream; 2561 2562 pl->netdev->sfp_bus = NULL; 2563} 2564 2565static int phylink_sfp_config(struct phylink *pl, u8 mode, 2566 const unsigned long *supported, 2567 const unsigned long *advertising) 2568{ 2569 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2570 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2571 struct phylink_link_state config; 2572 phy_interface_t iface; 2573 bool changed; 2574 int ret; 2575 2576 linkmode_copy(support, supported); 2577 2578 memset(&config, 0, sizeof(config)); 2579 linkmode_copy(config.advertising, advertising); 2580 config.interface = PHY_INTERFACE_MODE_NA; 2581 config.speed = SPEED_UNKNOWN; 2582 config.duplex = DUPLEX_UNKNOWN; 2583 config.pause = MLO_PAUSE_AN; 2584 config.an_enabled = pl->link_config.an_enabled; 2585 2586 /* Ignore errors if we're expecting a PHY to attach later */ 2587 ret = phylink_validate(pl, support, &config); 2588 if (ret) { 2589 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2590 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2591 ERR_PTR(ret)); 2592 return ret; 2593 } 2594 2595 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2596 if (iface == PHY_INTERFACE_MODE_NA) { 2597 phylink_err(pl, 2598 "selection of interface failed, advertisement %*pb\n", 2599 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2600 return -EINVAL; 2601 } 2602 2603 config.interface = iface; 2604 linkmode_copy(support1, support); 2605 ret = phylink_validate(pl, support1, &config); 2606 if (ret) { 2607 phylink_err(pl, 2608 "validation of %s/%s with support %*pb failed: %pe\n", 2609 phylink_an_mode_str(mode), 2610 phy_modes(config.interface), 2611 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2612 ERR_PTR(ret)); 2613 return ret; 2614 } 2615 2616 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2617 phylink_an_mode_str(mode), phy_modes(config.interface), 2618 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2619 2620 if (phy_interface_mode_is_8023z(iface) && pl->phydev) 2621 return -EINVAL; 2622 2623 changed = !linkmode_equal(pl->supported, support) || 2624 !linkmode_equal(pl->link_config.advertising, 2625 config.advertising); 2626 if (changed) { 2627 linkmode_copy(pl->supported, support); 2628 linkmode_copy(pl->link_config.advertising, config.advertising); 2629 } 2630 2631 if (pl->cur_link_an_mode != mode || 2632 pl->link_config.interface != config.interface) { 2633 pl->link_config.interface = config.interface; 2634 pl->cur_link_an_mode = mode; 2635 2636 changed = true; 2637 2638 phylink_info(pl, "switched to %s/%s link mode\n", 2639 phylink_an_mode_str(mode), 2640 phy_modes(config.interface)); 2641 } 2642 2643 pl->link_port = pl->sfp_port; 2644 2645 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2646 &pl->phylink_disable_state)) 2647 phylink_mac_initial_config(pl, false); 2648 2649 return ret; 2650} 2651 2652static int phylink_sfp_module_insert(void *upstream, 2653 const struct sfp_eeprom_id *id) 2654{ 2655 struct phylink *pl = upstream; 2656 unsigned long *support = pl->sfp_support; 2657 2658 ASSERT_RTNL(); 2659 2660 linkmode_zero(support); 2661 sfp_parse_support(pl->sfp_bus, id, support); 2662 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support); 2663 2664 /* If this module may have a PHY connecting later, defer until later */ 2665 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 2666 if (pl->sfp_may_have_phy) 2667 return 0; 2668 2669 return phylink_sfp_config(pl, MLO_AN_INBAND, support, support); 2670} 2671 2672static int phylink_sfp_module_start(void *upstream) 2673{ 2674 struct phylink *pl = upstream; 2675 2676 /* If this SFP module has a PHY, start the PHY now. */ 2677 if (pl->phydev) { 2678 phy_start(pl->phydev); 2679 return 0; 2680 } 2681 2682 /* If the module may have a PHY but we didn't detect one we 2683 * need to configure the MAC here. 2684 */ 2685 if (!pl->sfp_may_have_phy) 2686 return 0; 2687 2688 return phylink_sfp_config(pl, MLO_AN_INBAND, 2689 pl->sfp_support, pl->sfp_support); 2690} 2691 2692static void phylink_sfp_module_stop(void *upstream) 2693{ 2694 struct phylink *pl = upstream; 2695 2696 /* If this SFP module has a PHY, stop it. */ 2697 if (pl->phydev) 2698 phy_stop(pl->phydev); 2699} 2700 2701static void phylink_sfp_link_down(void *upstream) 2702{ 2703 struct phylink *pl = upstream; 2704 2705 ASSERT_RTNL(); 2706 2707 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 2708} 2709 2710static void phylink_sfp_link_up(void *upstream) 2711{ 2712 struct phylink *pl = upstream; 2713 2714 ASSERT_RTNL(); 2715 2716 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 2717} 2718 2719/* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 2720 * or 802.3z control word, so inband will not work. 2721 */ 2722static bool phylink_phy_no_inband(struct phy_device *phy) 2723{ 2724 return phy->is_c45 && 2725 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 2726} 2727 2728static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 2729{ 2730 struct phylink *pl = upstream; 2731 phy_interface_t interface; 2732 u8 mode; 2733 int ret; 2734 2735 /* 2736 * This is the new way of dealing with flow control for PHYs, 2737 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2738 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2739 * using our validate call to the MAC, we rely upon the MAC 2740 * clearing the bits from both supported and advertising fields. 2741 */ 2742 phy_support_asym_pause(phy); 2743 2744 if (phylink_phy_no_inband(phy)) 2745 mode = MLO_AN_PHY; 2746 else 2747 mode = MLO_AN_INBAND; 2748 2749 /* Do the initial configuration */ 2750 ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising); 2751 if (ret < 0) 2752 return ret; 2753 2754 interface = pl->link_config.interface; 2755 ret = phylink_attach_phy(pl, phy, interface); 2756 if (ret < 0) 2757 return ret; 2758 2759 ret = phylink_bringup_phy(pl, phy, interface); 2760 if (ret) 2761 phy_detach(phy); 2762 2763 return ret; 2764} 2765 2766static void phylink_sfp_disconnect_phy(void *upstream) 2767{ 2768 phylink_disconnect_phy(upstream); 2769} 2770 2771static const struct sfp_upstream_ops sfp_phylink_ops = { 2772 .attach = phylink_sfp_attach, 2773 .detach = phylink_sfp_detach, 2774 .module_insert = phylink_sfp_module_insert, 2775 .module_start = phylink_sfp_module_start, 2776 .module_stop = phylink_sfp_module_stop, 2777 .link_up = phylink_sfp_link_up, 2778 .link_down = phylink_sfp_link_down, 2779 .connect_phy = phylink_sfp_connect_phy, 2780 .disconnect_phy = phylink_sfp_disconnect_phy, 2781}; 2782 2783/* Helpers for MAC drivers */ 2784 2785static void phylink_decode_c37_word(struct phylink_link_state *state, 2786 uint16_t config_reg, int speed) 2787{ 2788 bool tx_pause, rx_pause; 2789 int fd_bit; 2790 2791 if (speed == SPEED_2500) 2792 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 2793 else 2794 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 2795 2796 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 2797 2798 if (linkmode_test_bit(fd_bit, state->advertising) && 2799 linkmode_test_bit(fd_bit, state->lp_advertising)) { 2800 state->speed = speed; 2801 state->duplex = DUPLEX_FULL; 2802 } else { 2803 /* negotiation failure */ 2804 state->link = false; 2805 } 2806 2807 linkmode_resolve_pause(state->advertising, state->lp_advertising, 2808 &tx_pause, &rx_pause); 2809 2810 if (tx_pause) 2811 state->pause |= MLO_PAUSE_TX; 2812 if (rx_pause) 2813 state->pause |= MLO_PAUSE_RX; 2814} 2815 2816static void phylink_decode_sgmii_word(struct phylink_link_state *state, 2817 uint16_t config_reg) 2818{ 2819 if (!(config_reg & LPA_SGMII_LINK)) { 2820 state->link = false; 2821 return; 2822 } 2823 2824 switch (config_reg & LPA_SGMII_SPD_MASK) { 2825 case LPA_SGMII_10: 2826 state->speed = SPEED_10; 2827 break; 2828 case LPA_SGMII_100: 2829 state->speed = SPEED_100; 2830 break; 2831 case LPA_SGMII_1000: 2832 state->speed = SPEED_1000; 2833 break; 2834 default: 2835 state->link = false; 2836 return; 2837 } 2838 if (config_reg & LPA_SGMII_FULL_DUPLEX) 2839 state->duplex = DUPLEX_FULL; 2840 else 2841 state->duplex = DUPLEX_HALF; 2842} 2843 2844/** 2845 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 2846 * @state: a pointer to a struct phylink_link_state. 2847 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 2848 * 2849 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 2850 * code word. Decode the USXGMII code word and populate the corresponding fields 2851 * (speed, duplex) into the phylink_link_state structure. 2852 */ 2853void phylink_decode_usxgmii_word(struct phylink_link_state *state, 2854 uint16_t lpa) 2855{ 2856 switch (lpa & MDIO_USXGMII_SPD_MASK) { 2857 case MDIO_USXGMII_10: 2858 state->speed = SPEED_10; 2859 break; 2860 case MDIO_USXGMII_100: 2861 state->speed = SPEED_100; 2862 break; 2863 case MDIO_USXGMII_1000: 2864 state->speed = SPEED_1000; 2865 break; 2866 case MDIO_USXGMII_2500: 2867 state->speed = SPEED_2500; 2868 break; 2869 case MDIO_USXGMII_5000: 2870 state->speed = SPEED_5000; 2871 break; 2872 case MDIO_USXGMII_10G: 2873 state->speed = SPEED_10000; 2874 break; 2875 default: 2876 state->link = false; 2877 return; 2878 } 2879 2880 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 2881 state->duplex = DUPLEX_FULL; 2882 else 2883 state->duplex = DUPLEX_HALF; 2884} 2885EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 2886 2887/** 2888 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 2889 * @state: a pointer to a &struct phylink_link_state. 2890 * @bmsr: The value of the %MII_BMSR register 2891 * @lpa: The value of the %MII_LPA register 2892 * 2893 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2894 * clause 37 negotiation and/or SGMII control. 2895 * 2896 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 2897 * the phylink @state structure. This is suitable to be used for implementing 2898 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 2899 * accessing @bmsr and @lpa cannot be done with MDIO directly. 2900 */ 2901void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 2902 u16 bmsr, u16 lpa) 2903{ 2904 state->link = !!(bmsr & BMSR_LSTATUS); 2905 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 2906 /* If there is no link or autonegotiation is disabled, the LP advertisement 2907 * data is not meaningful, so don't go any further. 2908 */ 2909 if (!state->link || !state->an_enabled) 2910 return; 2911 2912 switch (state->interface) { 2913 case PHY_INTERFACE_MODE_1000BASEX: 2914 phylink_decode_c37_word(state, lpa, SPEED_1000); 2915 break; 2916 2917 case PHY_INTERFACE_MODE_2500BASEX: 2918 phylink_decode_c37_word(state, lpa, SPEED_2500); 2919 break; 2920 2921 case PHY_INTERFACE_MODE_SGMII: 2922 case PHY_INTERFACE_MODE_QSGMII: 2923 phylink_decode_sgmii_word(state, lpa); 2924 break; 2925 2926 default: 2927 state->link = false; 2928 break; 2929 } 2930} 2931EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 2932 2933/** 2934 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 2935 * @pcs: a pointer to a &struct mdio_device. 2936 * @state: a pointer to a &struct phylink_link_state. 2937 * 2938 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2939 * clause 37 negotiation and/or SGMII control. 2940 * 2941 * Read the MAC PCS state from the MII device configured in @config and 2942 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 2943 * the phylink @state structure. This is suitable to be directly plugged 2944 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 2945 * structure. 2946 */ 2947void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 2948 struct phylink_link_state *state) 2949{ 2950 int bmsr, lpa; 2951 2952 bmsr = mdiodev_read(pcs, MII_BMSR); 2953 lpa = mdiodev_read(pcs, MII_LPA); 2954 if (bmsr < 0 || lpa < 0) { 2955 state->link = false; 2956 return; 2957 } 2958 2959 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 2960} 2961EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 2962 2963/** 2964 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 2965 * advertisement 2966 * @interface: the PHY interface mode being configured 2967 * @advertising: the ethtool advertisement mask 2968 * 2969 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2970 * clause 37 negotiation and/or SGMII control. 2971 * 2972 * Encode the clause 37 PCS advertisement as specified by @interface and 2973 * @advertising. 2974 * 2975 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 2976 */ 2977int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 2978 const unsigned long *advertising) 2979{ 2980 u16 adv; 2981 2982 switch (interface) { 2983 case PHY_INTERFACE_MODE_1000BASEX: 2984 case PHY_INTERFACE_MODE_2500BASEX: 2985 adv = ADVERTISE_1000XFULL; 2986 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 2987 advertising)) 2988 adv |= ADVERTISE_1000XPAUSE; 2989 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 2990 advertising)) 2991 adv |= ADVERTISE_1000XPSE_ASYM; 2992 return adv; 2993 case PHY_INTERFACE_MODE_SGMII: 2994 return 0x0001; 2995 default: 2996 /* Nothing to do for other modes */ 2997 return -EINVAL; 2998 } 2999} 3000EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3001 3002/** 3003 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3004 * @pcs: a pointer to a &struct mdio_device. 3005 * @mode: link autonegotiation mode 3006 * @interface: the PHY interface mode being configured 3007 * @advertising: the ethtool advertisement mask 3008 * 3009 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3010 * parameters for the @mode, @interface and @advertising parameters. 3011 * Returns negative error number on failure, zero if the advertisement 3012 * has not changed, or positive if there is a change. 3013 */ 3014int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3015 phy_interface_t interface, 3016 const unsigned long *advertising) 3017{ 3018 bool changed = 0; 3019 u16 bmcr; 3020 int ret, adv; 3021 3022 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3023 if (adv >= 0) { 3024 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3025 MII_ADVERTISE, 0xffff, adv); 3026 if (ret < 0) 3027 return ret; 3028 changed = ret; 3029 } 3030 3031 /* Ensure ISOLATE bit is disabled */ 3032 if (mode == MLO_AN_INBAND && 3033 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)) 3034 bmcr = BMCR_ANENABLE; 3035 else 3036 bmcr = 0; 3037 3038 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3039 if (ret < 0) 3040 return ret; 3041 3042 return changed; 3043} 3044EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3045 3046/** 3047 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3048 * @pcs: a pointer to a &struct mdio_device. 3049 * 3050 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3051 * clause 37 negotiation. 3052 * 3053 * Restart the clause 37 negotiation with the link partner. This is 3054 * suitable to be directly plugged into the mac_pcs_get_state() member 3055 * of the struct phylink_mac_ops structure. 3056 */ 3057void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3058{ 3059 int val = mdiodev_read(pcs, MII_BMCR); 3060 3061 if (val >= 0) { 3062 val |= BMCR_ANRESTART; 3063 3064 mdiodev_write(pcs, MII_BMCR, val); 3065 } 3066} 3067EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3068 3069void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3070 struct phylink_link_state *state) 3071{ 3072 struct mii_bus *bus = pcs->bus; 3073 int addr = pcs->addr; 3074 int stat; 3075 3076 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3077 if (stat < 0) { 3078 state->link = false; 3079 return; 3080 } 3081 3082 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3083 if (!state->link) 3084 return; 3085 3086 switch (state->interface) { 3087 case PHY_INTERFACE_MODE_10GBASER: 3088 state->speed = SPEED_10000; 3089 state->duplex = DUPLEX_FULL; 3090 break; 3091 3092 default: 3093 break; 3094 } 3095} 3096EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3097 3098MODULE_LICENSE("GPL v2");