slic_ds26522.h (3284B)
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * drivers/tdm/line_ctrl/slic_ds26522.h 4 * 5 * Copyright 2016 Freescale Semiconductor, Inc. 6 * 7 * Author: Zhao Qiang <B45475@freescale.com> 8 */ 9 10#define DS26522_RF_ADDR_START 0x00 11#define DS26522_RF_ADDR_END 0xef 12#define DS26522_GLB_ADDR_START 0xf0 13#define DS26522_GLB_ADDR_END 0xff 14#define DS26522_TF_ADDR_START 0x100 15#define DS26522_TF_ADDR_END 0x1ef 16#define DS26522_LIU_ADDR_START 0x1000 17#define DS26522_LIU_ADDR_END 0x101f 18#define DS26522_TEST_ADDR_START 0x1008 19#define DS26522_TEST_ADDR_END 0x101f 20#define DS26522_BERT_ADDR_START 0x1100 21#define DS26522_BERT_ADDR_END 0x110f 22 23#define DS26522_RMMR_ADDR 0x80 24#define DS26522_RCR1_ADDR 0x81 25#define DS26522_RCR3_ADDR 0x83 26#define DS26522_RIOCR_ADDR 0x84 27 28#define DS26522_GTCR1_ADDR 0xf0 29#define DS26522_GFCR_ADDR 0xf1 30#define DS26522_GTCR2_ADDR 0xf2 31#define DS26522_GTCCR_ADDR 0xf3 32#define DS26522_GLSRR_ADDR 0xf5 33#define DS26522_GFSRR_ADDR 0xf6 34#define DS26522_IDR_ADDR 0xf8 35 36#define DS26522_E1TAF_ADDR 0x164 37#define DS26522_E1TNAF_ADDR 0x165 38#define DS26522_TMMR_ADDR 0x180 39#define DS26522_TCR1_ADDR 0x181 40#define DS26522_TIOCR_ADDR 0x184 41 42#define DS26522_LTRCR_ADDR 0x1000 43#define DS26522_LTITSR_ADDR 0x1001 44#define DS26522_LMCR_ADDR 0x1002 45#define DS26522_LRISMR_ADDR 0x1007 46 47#define MAX_NUM_OF_CHANNELS 8 48#define PQ_MDS_8E1T1_BRD_REV 0x00 49#define PQ_MDS_8E1T1_PLD_REV 0x00 50 51#define DS26522_GTCCR_BPREFSEL_REFCLKIN 0xa0 52#define DS26522_GTCCR_BFREQSEL_1544KHZ 0x08 53#define DS26522_GTCCR_FREQSEL_1544KHZ 0x04 54#define DS26522_GTCCR_BFREQSEL_2048KHZ 0x00 55#define DS26522_GTCCR_FREQSEL_2048KHZ 0x00 56 57#define DS26522_GFCR_BPCLK_2048KHZ 0x00 58 59#define DS26522_GTCR2_TSSYNCOUT 0x02 60#define DS26522_GTCR1 0x00 61 62#define DS26522_GFSRR_RESET 0x01 63#define DS26522_GFSRR_NORMAL 0x00 64 65#define DS26522_GLSRR_RESET 0x01 66#define DS26522_GLSRR_NORMAL 0x00 67 68#define DS26522_RMMR_SFTRST 0x02 69#define DS26522_RMMR_FRM_EN 0x80 70#define DS26522_RMMR_INIT_DONE 0x40 71#define DS26522_RMMR_T1 0x00 72#define DS26522_RMMR_E1 0x01 73 74#define DS26522_E1TAF_DEFAULT 0x1b 75#define DS26522_E1TNAF_DEFAULT 0x40 76 77#define DS26522_TMMR_SFTRST 0x02 78#define DS26522_TMMR_FRM_EN 0x80 79#define DS26522_TMMR_INIT_DONE 0x40 80#define DS26522_TMMR_T1 0x00 81#define DS26522_TMMR_E1 0x01 82 83#define DS26522_RCR1_T1_SYNCT 0x80 84#define DS26522_RCR1_T1_RB8ZS 0x40 85#define DS26522_RCR1_T1_SYNCC 0x08 86 87#define DS26522_RCR1_E1_HDB3 0x40 88#define DS26522_RCR1_E1_CCS 0x20 89 90#define DS26522_RIOCR_1544KHZ 0x00 91#define DS26522_RIOCR_2048KHZ 0x10 92#define DS26522_RIOCR_RSIO_OUT 0x00 93 94#define DS26522_RCR3_FLB 0x01 95 96#define DS26522_TIOCR_1544KHZ 0x00 97#define DS26522_TIOCR_2048KHZ 0x10 98#define DS26522_TIOCR_TSIO_OUT 0x04 99 100#define DS26522_TCR1_TB8ZS 0x04 101 102#define DS26522_LTRCR_T1 0x02 103#define DS26522_LTRCR_E1 0x00 104 105#define DS26522_LTITSR_TLIS_75OHM 0x00 106#define DS26522_LTITSR_LBOS_75OHM 0x00 107#define DS26522_LTITSR_TLIS_100OHM 0x10 108#define DS26522_LTITSR_TLIS_0DB_CSU 0x00 109 110#define DS26522_LRISMR_75OHM 0x00 111#define DS26522_LRISMR_100OHM 0x10 112#define DS26522_LRISMR_MAX 0x03 113 114#define DS26522_LMCR_TE 0x01 115 116enum line_rate { 117 LINE_RATE_T1, /* T1 line rate (1.544 Mbps) */ 118 LINE_RATE_E1 /* E1 line rate (2.048 Mbps) */ 119}; 120 121enum tdm_trans_mode { 122 NORMAL = 0, 123 FRAMER_LB 124}; 125 126enum card_support_type { 127 LM_CARD = 0, 128 DS26522_CARD, 129 NO_CARD 130};