cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mac.h (6790B)


      1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
      2/*
      3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
      4 */
      5
      6#ifndef ATH11K_MAC_H
      7#define ATH11K_MAC_H
      8
      9#include <net/mac80211.h>
     10#include <net/cfg80211.h>
     11#include "wmi.h"
     12
     13struct ath11k;
     14struct ath11k_base;
     15
     16struct ath11k_generic_iter {
     17	struct ath11k *ar;
     18	int ret;
     19};
     20
     21/* number of failed packets (20 packets with 16 sw reties each) */
     22#define ATH11K_KICKOUT_THRESHOLD		(20 * 16)
     23
     24/* Use insanely high numbers to make sure that the firmware implementation
     25 * won't start, we have the same functionality already in hostapd. Unit
     26 * is seconds.
     27 */
     28#define ATH11K_KEEPALIVE_MIN_IDLE		3747
     29#define ATH11K_KEEPALIVE_MAX_IDLE		3895
     30#define ATH11K_KEEPALIVE_MAX_UNRESPONSIVE	3900
     31
     32#define WMI_HOST_RC_DS_FLAG			0x01
     33#define WMI_HOST_RC_CW40_FLAG			0x02
     34#define WMI_HOST_RC_SGI_FLAG			0x04
     35#define WMI_HOST_RC_HT_FLAG			0x08
     36#define WMI_HOST_RC_RTSCTS_FLAG			0x10
     37#define WMI_HOST_RC_TX_STBC_FLAG		0x20
     38#define WMI_HOST_RC_RX_STBC_FLAG		0xC0
     39#define WMI_HOST_RC_RX_STBC_FLAG_S		6
     40#define WMI_HOST_RC_WEP_TKIP_FLAG		0x100
     41#define WMI_HOST_RC_TS_FLAG			0x200
     42#define WMI_HOST_RC_UAPSD_FLAG			0x400
     43
     44#define WMI_HT_CAP_ENABLED			0x0001
     45#define WMI_HT_CAP_HT20_SGI			0x0002
     46#define WMI_HT_CAP_DYNAMIC_SMPS			0x0004
     47#define WMI_HT_CAP_TX_STBC			0x0008
     48#define WMI_HT_CAP_TX_STBC_MASK_SHIFT		3
     49#define WMI_HT_CAP_RX_STBC			0x0030
     50#define WMI_HT_CAP_RX_STBC_MASK_SHIFT		4
     51#define WMI_HT_CAP_LDPC				0x0040
     52#define WMI_HT_CAP_L_SIG_TXOP_PROT		0x0080
     53#define WMI_HT_CAP_MPDU_DENSITY			0x0700
     54#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT	8
     55#define WMI_HT_CAP_HT40_SGI			0x0800
     56#define WMI_HT_CAP_RX_LDPC			0x1000
     57#define WMI_HT_CAP_TX_LDPC			0x2000
     58#define WMI_HT_CAP_IBF_BFER			0x4000
     59
     60/* These macros should be used when we wish to advertise STBC support for
     61 * only 1SS or 2SS or 3SS.
     62 */
     63#define WMI_HT_CAP_RX_STBC_1SS			0x0010
     64#define WMI_HT_CAP_RX_STBC_2SS			0x0020
     65#define WMI_HT_CAP_RX_STBC_3SS			0x0030
     66
     67#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED    | \
     68				WMI_HT_CAP_HT20_SGI   | \
     69				WMI_HT_CAP_HT40_SGI   | \
     70				WMI_HT_CAP_TX_STBC    | \
     71				WMI_HT_CAP_RX_STBC    | \
     72				WMI_HT_CAP_LDPC)
     73
     74#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK		0x00000003
     75#define WMI_VHT_CAP_RX_LDPC			0x00000010
     76#define WMI_VHT_CAP_SGI_80MHZ			0x00000020
     77#define WMI_VHT_CAP_SGI_160MHZ			0x00000040
     78#define WMI_VHT_CAP_TX_STBC			0x00000080
     79#define WMI_VHT_CAP_RX_STBC_MASK		0x00000300
     80#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT		8
     81#define WMI_VHT_CAP_SU_BFER			0x00000800
     82#define WMI_VHT_CAP_SU_BFEE			0x00001000
     83#define WMI_VHT_CAP_MAX_CS_ANT_MASK		0x0000E000
     84#define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT	13
     85#define WMI_VHT_CAP_MAX_SND_DIM_MASK		0x00070000
     86#define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT	16
     87#define WMI_VHT_CAP_MU_BFER			0x00080000
     88#define WMI_VHT_CAP_MU_BFEE			0x00100000
     89#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP		0x03800000
     90#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT	23
     91#define WMI_VHT_CAP_RX_FIXED_ANT		0x10000000
     92#define WMI_VHT_CAP_TX_FIXED_ANT		0x20000000
     93
     94#define WMI_VHT_CAP_MAX_MPDU_LEN_11454		0x00000002
     95
     96/* These macros should be used when we wish to advertise STBC support for
     97 * only 1SS or 2SS or 3SS.
     98 */
     99#define WMI_VHT_CAP_RX_STBC_1SS			0x00000100
    100#define WMI_VHT_CAP_RX_STBC_2SS			0x00000200
    101#define WMI_VHT_CAP_RX_STBC_3SS			0x00000300
    102
    103#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454  | \
    104				 WMI_VHT_CAP_SGI_80MHZ      |       \
    105				 WMI_VHT_CAP_TX_STBC        |       \
    106				 WMI_VHT_CAP_RX_STBC_MASK   |       \
    107				 WMI_VHT_CAP_RX_LDPC        |       \
    108				 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP   |  \
    109				 WMI_VHT_CAP_RX_FIXED_ANT   |       \
    110				 WMI_VHT_CAP_TX_FIXED_ANT)
    111
    112/* FIXME: should these be in ieee80211.h? */
    113#define IEEE80211_VHT_MCS_SUPPORT_0_11_MASK	GENMASK(23, 16)
    114#define IEEE80211_DISABLE_VHT_MCS_SUPPORT_0_11	BIT(24)
    115
    116#define WMI_MAX_SPATIAL_STREAM			3
    117
    118#define ATH11K_CHAN_WIDTH_NUM			8
    119#define ATH11K_BW_NSS_MAP_ENABLE		BIT(31)
    120#define ATH11K_PEER_RX_NSS_160MHZ		GENMASK(2, 0)
    121#define ATH11K_PEER_RX_NSS_80_80MHZ		GENMASK(5, 3)
    122
    123#define ATH11K_OBSS_PD_MAX_THRESHOLD			-82
    124#define ATH11K_OBSS_PD_NON_SRG_MAX_THRESHOLD		-62
    125#define ATH11K_OBSS_PD_THRESHOLD_IN_DBM			BIT(29)
    126#define ATH11K_OBSS_PD_SRG_EN				BIT(30)
    127#define ATH11K_OBSS_PD_NON_SRG_EN			BIT(31)
    128
    129extern const struct htt_rx_ring_tlv_filter ath11k_mac_mon_status_filter_default;
    130
    131#define ATH11K_SCAN_11D_INTERVAL		600000
    132#define ATH11K_11D_INVALID_VDEV_ID		0xFFFF
    133
    134void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id);
    135void ath11k_mac_11d_scan_stop(struct ath11k *ar);
    136void ath11k_mac_11d_scan_stop_all(struct ath11k_base *ab);
    137
    138void ath11k_mac_destroy(struct ath11k_base *ab);
    139void ath11k_mac_unregister(struct ath11k_base *ab);
    140int ath11k_mac_register(struct ath11k_base *ab);
    141int ath11k_mac_allocate(struct ath11k_base *ab);
    142int ath11k_mac_hw_ratecode_to_legacy_rate(u8 hw_rc, u8 preamble, u8 *rateidx,
    143					  u16 *rate);
    144u8 ath11k_mac_bitrate_to_idx(const struct ieee80211_supported_band *sband,
    145			     u32 bitrate);
    146u8 ath11k_mac_hw_rate_to_idx(const struct ieee80211_supported_band *sband,
    147			     u8 hw_rate, bool cck);
    148
    149void __ath11k_mac_scan_finish(struct ath11k *ar);
    150void ath11k_mac_scan_finish(struct ath11k *ar);
    151int ath11k_mac_rfkill_enable_radio(struct ath11k *ar, bool enable);
    152int ath11k_mac_rfkill_config(struct ath11k *ar);
    153
    154struct ath11k_vif *ath11k_mac_get_arvif(struct ath11k *ar, u32 vdev_id);
    155struct ath11k_vif *ath11k_mac_get_arvif_by_vdev_id(struct ath11k_base *ab,
    156						   u32 vdev_id);
    157u8 ath11k_mac_get_target_pdev_id(struct ath11k *ar);
    158u8 ath11k_mac_get_target_pdev_id_from_vif(struct ath11k_vif *arvif);
    159struct ath11k_vif *ath11k_mac_get_vif_up(struct ath11k_base *ab);
    160
    161struct ath11k *ath11k_mac_get_ar_by_vdev_id(struct ath11k_base *ab, u32 vdev_id);
    162struct ath11k *ath11k_mac_get_ar_by_pdev_id(struct ath11k_base *ab, u32 pdev_id);
    163
    164void ath11k_mac_drain_tx(struct ath11k *ar);
    165void ath11k_mac_peer_cleanup_all(struct ath11k *ar);
    166int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx);
    167u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);
    168u32 ath11k_mac_he_gi_to_nl80211_he_gi(u8 sgi);
    169enum nl80211_he_ru_alloc ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc(u16 ru_phy);
    170enum nl80211_he_ru_alloc ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones);
    171enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw);
    172enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher);
    173void ath11k_mac_handle_beacon(struct ath11k *ar, struct sk_buff *skb);
    174void ath11k_mac_handle_beacon_miss(struct ath11k *ar, u32 vdev_id);
    175void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif);
    176int ath11k_mac_wait_tx_complete(struct ath11k *ar);
    177int ath11k_mac_vif_set_keepalive(struct ath11k_vif *arvif,
    178				 enum wmi_sta_keepalive_method method,
    179				 u32 interval);
    180#endif