cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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wmi.h (169198B)


      1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
      2/*
      3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
      4 */
      5
      6#ifndef ATH11K_WMI_H
      7#define ATH11K_WMI_H
      8
      9#include <net/mac80211.h>
     10#include "htc.h"
     11
     12struct ath11k_base;
     13struct ath11k;
     14struct ath11k_fw_stats;
     15struct ath11k_fw_dbglog;
     16struct ath11k_vif;
     17
     18#define PSOC_HOST_MAX_NUM_SS (8)
     19
     20/* defines to set Packet extension values whic can be 0 us, 8 usec or 16 usec */
     21#define MAX_HE_NSS               8
     22#define MAX_HE_MODULATION        8
     23#define MAX_HE_RU                4
     24#define HE_MODULATION_NONE       7
     25#define HE_PET_0_USEC            0
     26#define HE_PET_8_USEC            1
     27#define HE_PET_16_USEC           2
     28
     29#define WMI_MAX_CHAINS		 8
     30
     31#define WMI_MAX_NUM_SS                    MAX_HE_NSS
     32#define WMI_MAX_NUM_RU                    MAX_HE_RU
     33
     34#define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1)
     35#define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1)
     36#define WMI_TLV_CMD_UNSUPPORTED 0
     37#define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0
     38#define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0
     39
     40struct wmi_cmd_hdr {
     41	u32 cmd_id;
     42} __packed;
     43
     44struct wmi_tlv {
     45	u32 header;
     46	u8 value[];
     47} __packed;
     48
     49#define WMI_TLV_LEN	GENMASK(15, 0)
     50#define WMI_TLV_TAG	GENMASK(31, 16)
     51#define TLV_HDR_SIZE	sizeof_field(struct wmi_tlv, header)
     52
     53#define WMI_CMD_HDR_CMD_ID      GENMASK(23, 0)
     54#define WMI_MAX_MEM_REQS        32
     55#define ATH11K_MAX_HW_LISTEN_INTERVAL 5
     56
     57#define WLAN_SCAN_MAX_HINT_S_SSID        10
     58#define WLAN_SCAN_MAX_HINT_BSSID         10
     59#define MAX_RNR_BSS                    5
     60
     61#define WLAN_SCAN_MAX_HINT_S_SSID        10
     62#define WLAN_SCAN_MAX_HINT_BSSID         10
     63#define MAX_RNR_BSS                    5
     64
     65#define WLAN_SCAN_PARAMS_MAX_SSID    16
     66#define WLAN_SCAN_PARAMS_MAX_BSSID   4
     67#define WLAN_SCAN_PARAMS_MAX_IE_LEN  256
     68
     69#define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1
     70
     71#define WMI_BA_MODE_BUFFER_SIZE_256  3
     72/*
     73 * HW mode config type replicated from FW header
     74 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active.
     75 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands,
     76 *                        one in 2G and another in 5G.
     77 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in
     78 *                        same band; no tx allowed.
     79 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band.
     80 *                        Support for both PHYs within one band is planned
     81 *                        for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES),
     82 *                        but could be extended to other bands in the future.
     83 *                        The separation of the band between the two PHYs needs
     84 *                        to be communicated separately.
     85 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS
     86 *                           as in WMI_HW_MODE_SBS, and 3rd on the other band
     87 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and
     88 *                        5G. It can support SBS (5G + 5G) OR DBS (5G + 2G).
     89 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode.
     90 */
     91enum wmi_host_hw_mode_config_type {
     92	WMI_HOST_HW_MODE_SINGLE       = 0,
     93	WMI_HOST_HW_MODE_DBS          = 1,
     94	WMI_HOST_HW_MODE_SBS_PASSIVE  = 2,
     95	WMI_HOST_HW_MODE_SBS          = 3,
     96	WMI_HOST_HW_MODE_DBS_SBS      = 4,
     97	WMI_HOST_HW_MODE_DBS_OR_SBS   = 5,
     98
     99	/* keep last */
    100	WMI_HOST_HW_MODE_MAX
    101};
    102
    103/* HW mode priority values used to detect the preferred HW mode
    104 * on the available modes.
    105 */
    106enum wmi_host_hw_mode_priority {
    107	WMI_HOST_HW_MODE_DBS_SBS_PRI,
    108	WMI_HOST_HW_MODE_DBS_PRI,
    109	WMI_HOST_HW_MODE_DBS_OR_SBS_PRI,
    110	WMI_HOST_HW_MODE_SBS_PRI,
    111	WMI_HOST_HW_MODE_SBS_PASSIVE_PRI,
    112	WMI_HOST_HW_MODE_SINGLE_PRI,
    113
    114	/* keep last the lowest priority */
    115	WMI_HOST_HW_MODE_MAX_PRI
    116};
    117
    118enum WMI_HOST_WLAN_BAND {
    119	WMI_HOST_WLAN_2G_CAP	= 0x1,
    120	WMI_HOST_WLAN_5G_CAP	= 0x2,
    121	WMI_HOST_WLAN_2G_5G_CAP	= WMI_HOST_WLAN_2G_CAP | WMI_HOST_WLAN_5G_CAP,
    122};
    123
    124/* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command.
    125 * Used only for HE auto rate mode.
    126 */
    127enum {
    128	/* HE LTF related configuration */
    129	WMI_HE_AUTORATE_LTF_1X = BIT(0),
    130	WMI_HE_AUTORATE_LTF_2X = BIT(1),
    131	WMI_HE_AUTORATE_LTF_4X = BIT(2),
    132
    133	/* HE GI related configuration */
    134	WMI_AUTORATE_400NS_GI = BIT(8),
    135	WMI_AUTORATE_800NS_GI = BIT(9),
    136	WMI_AUTORATE_1600NS_GI = BIT(10),
    137	WMI_AUTORATE_3200NS_GI = BIT(11),
    138};
    139
    140/*
    141 * wmi command groups.
    142 */
    143enum wmi_cmd_group {
    144	/* 0 to 2 are reserved */
    145	WMI_GRP_START = 0x3,
    146	WMI_GRP_SCAN = WMI_GRP_START,
    147	WMI_GRP_PDEV		= 0x4,
    148	WMI_GRP_VDEV           = 0x5,
    149	WMI_GRP_PEER           = 0x6,
    150	WMI_GRP_MGMT           = 0x7,
    151	WMI_GRP_BA_NEG         = 0x8,
    152	WMI_GRP_STA_PS         = 0x9,
    153	WMI_GRP_DFS            = 0xa,
    154	WMI_GRP_ROAM           = 0xb,
    155	WMI_GRP_OFL_SCAN       = 0xc,
    156	WMI_GRP_P2P            = 0xd,
    157	WMI_GRP_AP_PS          = 0xe,
    158	WMI_GRP_RATE_CTRL      = 0xf,
    159	WMI_GRP_PROFILE        = 0x10,
    160	WMI_GRP_SUSPEND        = 0x11,
    161	WMI_GRP_BCN_FILTER     = 0x12,
    162	WMI_GRP_WOW            = 0x13,
    163	WMI_GRP_RTT            = 0x14,
    164	WMI_GRP_SPECTRAL       = 0x15,
    165	WMI_GRP_STATS          = 0x16,
    166	WMI_GRP_ARP_NS_OFL     = 0x17,
    167	WMI_GRP_NLO_OFL        = 0x18,
    168	WMI_GRP_GTK_OFL        = 0x19,
    169	WMI_GRP_CSA_OFL        = 0x1a,
    170	WMI_GRP_CHATTER        = 0x1b,
    171	WMI_GRP_TID_ADDBA      = 0x1c,
    172	WMI_GRP_MISC           = 0x1d,
    173	WMI_GRP_GPIO           = 0x1e,
    174	WMI_GRP_FWTEST         = 0x1f,
    175	WMI_GRP_TDLS           = 0x20,
    176	WMI_GRP_RESMGR         = 0x21,
    177	WMI_GRP_STA_SMPS       = 0x22,
    178	WMI_GRP_WLAN_HB        = 0x23,
    179	WMI_GRP_RMC            = 0x24,
    180	WMI_GRP_MHF_OFL        = 0x25,
    181	WMI_GRP_LOCATION_SCAN  = 0x26,
    182	WMI_GRP_OEM            = 0x27,
    183	WMI_GRP_NAN            = 0x28,
    184	WMI_GRP_COEX           = 0x29,
    185	WMI_GRP_OBSS_OFL       = 0x2a,
    186	WMI_GRP_LPI            = 0x2b,
    187	WMI_GRP_EXTSCAN        = 0x2c,
    188	WMI_GRP_DHCP_OFL       = 0x2d,
    189	WMI_GRP_IPA            = 0x2e,
    190	WMI_GRP_MDNS_OFL       = 0x2f,
    191	WMI_GRP_SAP_OFL        = 0x30,
    192	WMI_GRP_OCB            = 0x31,
    193	WMI_GRP_SOC            = 0x32,
    194	WMI_GRP_PKT_FILTER     = 0x33,
    195	WMI_GRP_MAWC           = 0x34,
    196	WMI_GRP_PMF_OFFLOAD    = 0x35,
    197	WMI_GRP_BPF_OFFLOAD    = 0x36,
    198	WMI_GRP_NAN_DATA       = 0x37,
    199	WMI_GRP_PROTOTYPE      = 0x38,
    200	WMI_GRP_MONITOR        = 0x39,
    201	WMI_GRP_REGULATORY     = 0x3a,
    202	WMI_GRP_HW_DATA_FILTER = 0x3b,
    203	WMI_GRP_WLM            = 0x3c,
    204	WMI_GRP_11K_OFFLOAD    = 0x3d,
    205	WMI_GRP_TWT            = 0x3e,
    206	WMI_GRP_MOTION_DET     = 0x3f,
    207	WMI_GRP_SPATIAL_REUSE  = 0x40,
    208};
    209
    210#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
    211#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
    212
    213#define WMI_CMD_UNSUPPORTED 0
    214
    215enum wmi_tlv_cmd_id {
    216	WMI_INIT_CMDID = 0x1,
    217	WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN),
    218	WMI_STOP_SCAN_CMDID,
    219	WMI_SCAN_CHAN_LIST_CMDID,
    220	WMI_SCAN_SCH_PRIO_TBL_CMDID,
    221	WMI_SCAN_UPDATE_REQUEST_CMDID,
    222	WMI_SCAN_PROB_REQ_OUI_CMDID,
    223	WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID,
    224	WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV),
    225	WMI_PDEV_SET_CHANNEL_CMDID,
    226	WMI_PDEV_SET_PARAM_CMDID,
    227	WMI_PDEV_PKTLOG_ENABLE_CMDID,
    228	WMI_PDEV_PKTLOG_DISABLE_CMDID,
    229	WMI_PDEV_SET_WMM_PARAMS_CMDID,
    230	WMI_PDEV_SET_HT_CAP_IE_CMDID,
    231	WMI_PDEV_SET_VHT_CAP_IE_CMDID,
    232	WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
    233	WMI_PDEV_SET_QUIET_MODE_CMDID,
    234	WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
    235	WMI_PDEV_GET_TPC_CONFIG_CMDID,
    236	WMI_PDEV_SET_BASE_MACADDR_CMDID,
    237	WMI_PDEV_DUMP_CMDID,
    238	WMI_PDEV_SET_LED_CONFIG_CMDID,
    239	WMI_PDEV_GET_TEMPERATURE_CMDID,
    240	WMI_PDEV_SET_LED_FLASHING_CMDID,
    241	WMI_PDEV_SMART_ANT_ENABLE_CMDID,
    242	WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
    243	WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
    244	WMI_PDEV_SET_CTL_TABLE_CMDID,
    245	WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID,
    246	WMI_PDEV_FIPS_CMDID,
    247	WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID,
    248	WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
    249	WMI_PDEV_GET_NFCAL_POWER_CMDID,
    250	WMI_PDEV_GET_TPC_CMDID,
    251	WMI_MIB_STATS_ENABLE_CMDID,
    252	WMI_PDEV_SET_PCL_CMDID,
    253	WMI_PDEV_SET_HW_MODE_CMDID,
    254	WMI_PDEV_SET_MAC_CONFIG_CMDID,
    255	WMI_PDEV_SET_ANTENNA_MODE_CMDID,
    256	WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID,
    257	WMI_PDEV_WAL_POWER_DEBUG_CMDID,
    258	WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID,
    259	WMI_PDEV_SET_WAKEUP_CONFIG_CMDID,
    260	WMI_PDEV_GET_ANTDIV_STATUS_CMDID,
    261	WMI_PDEV_GET_CHIP_POWER_STATS_CMDID,
    262	WMI_PDEV_SET_STATS_THRESHOLD_CMDID,
    263	WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID,
    264	WMI_PDEV_UPDATE_PKT_ROUTING_CMDID,
    265	WMI_PDEV_CHECK_CAL_VERSION_CMDID,
    266	WMI_PDEV_SET_DIVERSITY_GAIN_CMDID,
    267	WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID,
    268	WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
    269	WMI_PDEV_UPDATE_PMK_CACHE_CMDID,
    270	WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID,
    271	WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID,
    272	WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID,
    273	WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID,
    274	WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID,
    275	WMI_PDEV_DMA_RING_CFG_REQ_CMDID,
    276	WMI_PDEV_HE_TB_ACTION_FRM_CMDID,
    277	WMI_PDEV_PKTLOG_FILTER_CMDID,
    278	WMI_PDEV_SET_RAP_CONFIG_CMDID,
    279	WMI_PDEV_DSM_FILTER_CMDID,
    280	WMI_PDEV_FRAME_INJECT_CMDID,
    281	WMI_PDEV_TBTT_OFFSET_SYNC_CMDID,
    282	WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID,
    283	WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID,
    284	WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
    285	WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
    286	WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
    287	WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
    288	WMI_PDEV_GET_TPC_STATS_CMDID,
    289	WMI_PDEV_ENABLE_DURATION_BASED_TX_MODE_SELECTION_CMDID,
    290	WMI_PDEV_GET_DPD_STATUS_CMDID,
    291	WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID,
    292	WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID,
    293	WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV),
    294	WMI_VDEV_DELETE_CMDID,
    295	WMI_VDEV_START_REQUEST_CMDID,
    296	WMI_VDEV_RESTART_REQUEST_CMDID,
    297	WMI_VDEV_UP_CMDID,
    298	WMI_VDEV_STOP_CMDID,
    299	WMI_VDEV_DOWN_CMDID,
    300	WMI_VDEV_SET_PARAM_CMDID,
    301	WMI_VDEV_INSTALL_KEY_CMDID,
    302	WMI_VDEV_WNM_SLEEPMODE_CMDID,
    303	WMI_VDEV_WMM_ADDTS_CMDID,
    304	WMI_VDEV_WMM_DELTS_CMDID,
    305	WMI_VDEV_SET_WMM_PARAMS_CMDID,
    306	WMI_VDEV_SET_GTX_PARAMS_CMDID,
    307	WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID,
    308	WMI_VDEV_PLMREQ_START_CMDID,
    309	WMI_VDEV_PLMREQ_STOP_CMDID,
    310	WMI_VDEV_TSF_TSTAMP_ACTION_CMDID,
    311	WMI_VDEV_SET_IE_CMDID,
    312	WMI_VDEV_RATEMASK_CMDID,
    313	WMI_VDEV_ATF_REQUEST_CMDID,
    314	WMI_VDEV_SET_DSCP_TID_MAP_CMDID,
    315	WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
    316	WMI_VDEV_SET_QUIET_MODE_CMDID,
    317	WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID,
    318	WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID,
    319	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID,
    320	WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER),
    321	WMI_PEER_DELETE_CMDID,
    322	WMI_PEER_FLUSH_TIDS_CMDID,
    323	WMI_PEER_SET_PARAM_CMDID,
    324	WMI_PEER_ASSOC_CMDID,
    325	WMI_PEER_ADD_WDS_ENTRY_CMDID,
    326	WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
    327	WMI_PEER_MCAST_GROUP_CMDID,
    328	WMI_PEER_INFO_REQ_CMDID,
    329	WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID,
    330	WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID,
    331	WMI_PEER_UPDATE_WDS_ENTRY_CMDID,
    332	WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID,
    333	WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
    334	WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
    335	WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
    336	WMI_PEER_ATF_REQUEST_CMDID,
    337	WMI_PEER_BWF_REQUEST_CMDID,
    338	WMI_PEER_REORDER_QUEUE_SETUP_CMDID,
    339	WMI_PEER_REORDER_QUEUE_REMOVE_CMDID,
    340	WMI_PEER_SET_RX_BLOCKSIZE_CMDID,
    341	WMI_PEER_ANTDIV_INFO_REQ_CMDID,
    342	WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT),
    343	WMI_PDEV_SEND_BCN_CMDID,
    344	WMI_BCN_TMPL_CMDID,
    345	WMI_BCN_FILTER_RX_CMDID,
    346	WMI_PRB_REQ_FILTER_RX_CMDID,
    347	WMI_MGMT_TX_CMDID,
    348	WMI_PRB_TMPL_CMDID,
    349	WMI_MGMT_TX_SEND_CMDID,
    350	WMI_OFFCHAN_DATA_TX_SEND_CMDID,
    351	WMI_PDEV_SEND_FD_CMDID,
    352	WMI_BCN_OFFLOAD_CTRL_CMDID,
    353	WMI_BSS_COLOR_CHANGE_ENABLE_CMDID,
    354	WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID,
    355	WMI_FILS_DISCOVERY_TMPL_CMDID,
    356	WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
    357	WMI_ADDBA_SEND_CMDID,
    358	WMI_ADDBA_STATUS_CMDID,
    359	WMI_DELBA_SEND_CMDID,
    360	WMI_ADDBA_SET_RESP_CMDID,
    361	WMI_SEND_SINGLEAMSDU_CMDID,
    362	WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS),
    363	WMI_STA_POWERSAVE_PARAM_CMDID,
    364	WMI_STA_MIMO_PS_MODE_CMDID,
    365	WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS),
    366	WMI_PDEV_DFS_DISABLE_CMDID,
    367	WMI_DFS_PHYERR_FILTER_ENA_CMDID,
    368	WMI_DFS_PHYERR_FILTER_DIS_CMDID,
    369	WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID,
    370	WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID,
    371	WMI_VDEV_ADFS_CH_CFG_CMDID,
    372	WMI_VDEV_ADFS_OCAC_ABORT_CMDID,
    373	WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM),
    374	WMI_ROAM_SCAN_RSSI_THRESHOLD,
    375	WMI_ROAM_SCAN_PERIOD,
    376	WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
    377	WMI_ROAM_AP_PROFILE,
    378	WMI_ROAM_CHAN_LIST,
    379	WMI_ROAM_SCAN_CMD,
    380	WMI_ROAM_SYNCH_COMPLETE,
    381	WMI_ROAM_SET_RIC_REQUEST_CMDID,
    382	WMI_ROAM_INVOKE_CMDID,
    383	WMI_ROAM_FILTER_CMDID,
    384	WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID,
    385	WMI_ROAM_CONFIGURE_MAWC_CMDID,
    386	WMI_ROAM_SET_MBO_PARAM_CMDID,
    387	WMI_ROAM_PER_CONFIG_CMDID,
    388	WMI_ROAM_BTM_CONFIG_CMDID,
    389	WMI_ENABLE_FILS_CMDID,
    390	WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN),
    391	WMI_OFL_SCAN_REMOVE_AP_PROFILE,
    392	WMI_OFL_SCAN_PERIOD,
    393	WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P),
    394	WMI_P2P_DEV_SET_DISCOVERABILITY,
    395	WMI_P2P_GO_SET_BEACON_IE,
    396	WMI_P2P_GO_SET_PROBE_RESP_IE,
    397	WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
    398	WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID,
    399	WMI_P2P_DISC_OFFLOAD_APPIE_CMDID,
    400	WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID,
    401	WMI_P2P_SET_OPPPS_PARAM_CMDID,
    402	WMI_P2P_LISTEN_OFFLOAD_START_CMDID,
    403	WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID,
    404	WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS),
    405	WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
    406	WMI_AP_PS_EGAP_PARAM_CMDID,
    407	WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL),
    408	WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE),
    409	WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
    410	WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
    411	WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
    412	WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
    413	WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
    414	WMI_PDEV_RESUME_CMDID,
    415	WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER),
    416	WMI_RMV_BCN_FILTER_CMDID,
    417	WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW),
    418	WMI_WOW_DEL_WAKE_PATTERN_CMDID,
    419	WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
    420	WMI_WOW_ENABLE_CMDID,
    421	WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
    422	WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID,
    423	WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID,
    424	WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID,
    425	WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID,
    426	WMI_D0_WOW_ENABLE_DISABLE_CMDID,
    427	WMI_EXTWOW_ENABLE_CMDID,
    428	WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID,
    429	WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID,
    430	WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID,
    431	WMI_WOW_UDP_SVC_OFLD_CMDID,
    432	WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID,
    433	WMI_WOW_SET_ACTION_WAKE_UP_CMDID,
    434	WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT),
    435	WMI_RTT_TSF_CMDID,
    436	WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL),
    437	WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
    438	WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS),
    439	WMI_MCC_SCHED_TRAFFIC_STATS_CMDID,
    440	WMI_REQUEST_STATS_EXT_CMDID,
    441	WMI_REQUEST_LINK_STATS_CMDID,
    442	WMI_START_LINK_STATS_CMDID,
    443	WMI_CLEAR_LINK_STATS_CMDID,
    444	WMI_GET_FW_MEM_DUMP_CMDID,
    445	WMI_DEBUG_MESG_FLUSH_CMDID,
    446	WMI_DIAG_EVENT_LOG_CONFIG_CMDID,
    447	WMI_REQUEST_WLAN_STATS_CMDID,
    448	WMI_REQUEST_RCPI_CMDID,
    449	WMI_REQUEST_PEER_STATS_INFO_CMDID,
    450	WMI_REQUEST_RADIO_CHAN_STATS_CMDID,
    451	WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL),
    452	WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID,
    453	WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID,
    454	WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
    455	WMI_APFIND_CMDID,
    456	WMI_PASSPOINT_LIST_CONFIG_CMDID,
    457	WMI_NLO_CONFIGURE_MAWC_CMDID,
    458	WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
    459	WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
    460	WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
    461	WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER),
    462	WMI_CHATTER_ADD_COALESCING_FILTER_CMDID,
    463	WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID,
    464	WMI_CHATTER_COALESCING_QUERY_CMDID,
    465	WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA),
    466	WMI_PEER_TID_DELBA_CMDID,
    467	WMI_STA_DTIM_PS_METHOD_CMDID,
    468	WMI_STA_UAPSD_AUTO_TRIG_CMDID,
    469	WMI_STA_KEEPALIVE_CMDID,
    470	WMI_BA_REQ_SSN_CMDID,
    471	WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC),
    472	WMI_PDEV_UTF_CMDID,
    473	WMI_DBGLOG_CFG_CMDID,
    474	WMI_PDEV_QVIT_CMDID,
    475	WMI_PDEV_FTM_INTG_CMDID,
    476	WMI_VDEV_SET_KEEPALIVE_CMDID,
    477	WMI_VDEV_GET_KEEPALIVE_CMDID,
    478	WMI_FORCE_FW_HANG_CMDID,
    479	WMI_SET_MCASTBCAST_FILTER_CMDID,
    480	WMI_THERMAL_MGMT_CMDID,
    481	WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID,
    482	WMI_TPC_CHAINMASK_CONFIG_CMDID,
    483	WMI_SET_ANTENNA_DIVERSITY_CMDID,
    484	WMI_OCB_SET_SCHED_CMDID,
    485	WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID,
    486	WMI_LRO_CONFIG_CMDID,
    487	WMI_TRANSFER_DATA_TO_FLASH_CMDID,
    488	WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID,
    489	WMI_VDEV_WISA_CMDID,
    490	WMI_DBGLOG_TIME_STAMP_SYNC_CMDID,
    491	WMI_SET_MULTIPLE_MCAST_FILTER_CMDID,
    492	WMI_READ_DATA_FROM_FLASH_CMDID,
    493	WMI_THERM_THROT_SET_CONF_CMDID,
    494	WMI_RUNTIME_DPD_RECAL_CMDID,
    495	WMI_GET_TPC_POWER_CMDID,
    496	WMI_IDLE_TRIGGER_MONITOR_CMDID,
    497	WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO),
    498	WMI_GPIO_OUTPUT_CMDID,
    499	WMI_TXBF_CMDID,
    500	WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST),
    501	WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID,
    502	WMI_UNIT_TEST_CMDID,
    503	WMI_FWTEST_CMDID,
    504	WMI_QBOOST_CFG_CMDID,
    505	WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS),
    506	WMI_TDLS_PEER_UPDATE_CMDID,
    507	WMI_TDLS_SET_OFFCHAN_MODE_CMDID,
    508	WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR),
    509	WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID,
    510	WMI_RESMGR_SET_CHAN_LATENCY_CMDID,
    511	WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
    512	WMI_STA_SMPS_PARAM_CMDID,
    513	WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB),
    514	WMI_HB_SET_TCP_PARAMS_CMDID,
    515	WMI_HB_SET_TCP_PKT_FILTER_CMDID,
    516	WMI_HB_SET_UDP_PARAMS_CMDID,
    517	WMI_HB_SET_UDP_PKT_FILTER_CMDID,
    518	WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC),
    519	WMI_RMC_SET_ACTION_PERIOD_CMDID,
    520	WMI_RMC_CONFIG_CMDID,
    521	WMI_RMC_SET_MANUAL_LEADER_CMDID,
    522	WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL),
    523	WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID,
    524	WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
    525	WMI_BATCH_SCAN_DISABLE_CMDID,
    526	WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID,
    527	WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM),
    528	WMI_OEM_REQUEST_CMDID,
    529	WMI_LPI_OEM_REQ_CMDID,
    530	WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN),
    531	WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX),
    532	WMI_CHAN_AVOID_UPDATE_CMDID,
    533	WMI_COEX_CONFIG_CMDID,
    534	WMI_CHAN_AVOID_RPT_ALLOW_CMDID,
    535	WMI_COEX_GET_ANTENNA_ISOLATION_CMDID,
    536	WMI_SAR_LIMITS_CMDID,
    537	WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL),
    538	WMI_OBSS_SCAN_DISABLE_CMDID,
    539	WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID,
    540	WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI),
    541	WMI_LPI_START_SCAN_CMDID,
    542	WMI_LPI_STOP_SCAN_CMDID,
    543	WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
    544	WMI_EXTSCAN_STOP_CMDID,
    545	WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID,
    546	WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID,
    547	WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID,
    548	WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID,
    549	WMI_EXTSCAN_SET_CAPABILITIES_CMDID,
    550	WMI_EXTSCAN_GET_CAPABILITIES_CMDID,
    551	WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID,
    552	WMI_EXTSCAN_CONFIGURE_MAWC_CMDID,
    553	WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL),
    554	WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA),
    555	WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
    556	WMI_MDNS_SET_FQDN_CMDID,
    557	WMI_MDNS_SET_RESPONSE_CMDID,
    558	WMI_MDNS_GET_STATS_CMDID,
    559	WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
    560	WMI_SAP_SET_BLACKLIST_PARAM_CMDID,
    561	WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB),
    562	WMI_OCB_SET_UTC_TIME_CMDID,
    563	WMI_OCB_START_TIMING_ADVERT_CMDID,
    564	WMI_OCB_STOP_TIMING_ADVERT_CMDID,
    565	WMI_OCB_GET_TSF_TIMER_CMDID,
    566	WMI_DCC_GET_STATS_CMDID,
    567	WMI_DCC_CLEAR_STATS_CMDID,
    568	WMI_DCC_UPDATE_NDL_CMDID,
    569	WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC),
    570	WMI_SOC_SET_HW_MODE_CMDID,
    571	WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID,
    572	WMI_SOC_SET_ANTENNA_MODE_CMDID,
    573	WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER),
    574	WMI_PACKET_FILTER_ENABLE_CMDID,
    575	WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC),
    576	WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD),
    577	WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
    578	WMI_BPF_GET_VDEV_STATS_CMDID,
    579	WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID,
    580	WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID,
    581	WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID,
    582	WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR),
    583	WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
    584	WMI_11D_SCAN_START_CMDID,
    585	WMI_11D_SCAN_STOP_CMDID,
    586	WMI_SET_INIT_COUNTRY_CMDID,
    587	WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
    588	WMI_NDP_INITIATOR_REQ_CMDID,
    589	WMI_NDP_RESPONDER_REQ_CMDID,
    590	WMI_NDP_END_REQ_CMDID,
    591	WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER),
    592	WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT),
    593	WMI_TWT_DISABLE_CMDID,
    594	WMI_TWT_ADD_DIALOG_CMDID,
    595	WMI_TWT_DEL_DIALOG_CMDID,
    596	WMI_TWT_PAUSE_DIALOG_CMDID,
    597	WMI_TWT_RESUME_DIALOG_CMDID,
    598	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID =
    599				WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE),
    600	WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID,
    601};
    602
    603enum wmi_tlv_event_id {
    604	WMI_SERVICE_READY_EVENTID = 0x1,
    605	WMI_READY_EVENTID,
    606	WMI_SERVICE_AVAILABLE_EVENTID,
    607	WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
    608	WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV),
    609	WMI_CHAN_INFO_EVENTID,
    610	WMI_PHYERR_EVENTID,
    611	WMI_PDEV_DUMP_EVENTID,
    612	WMI_TX_PAUSE_EVENTID,
    613	WMI_DFS_RADAR_EVENTID,
    614	WMI_PDEV_L1SS_TRACK_EVENTID,
    615	WMI_PDEV_TEMPERATURE_EVENTID,
    616	WMI_SERVICE_READY_EXT_EVENTID,
    617	WMI_PDEV_FIPS_EVENTID,
    618	WMI_PDEV_CHANNEL_HOPPING_EVENTID,
    619	WMI_PDEV_ANI_CCK_LEVEL_EVENTID,
    620	WMI_PDEV_ANI_OFDM_LEVEL_EVENTID,
    621	WMI_PDEV_TPC_EVENTID,
    622	WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
    623	WMI_PDEV_SET_HW_MODE_RESP_EVENTID,
    624	WMI_PDEV_HW_MODE_TRANSITION_EVENTID,
    625	WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID,
    626	WMI_PDEV_ANTDIV_STATUS_EVENTID,
    627	WMI_PDEV_CHIP_POWER_STATS_EVENTID,
    628	WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID,
    629	WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID,
    630	WMI_PDEV_CHECK_CAL_VERSION_EVENTID,
    631	WMI_PDEV_DIV_RSSI_ANTID_EVENTID,
    632	WMI_PDEV_BSS_CHAN_INFO_EVENTID,
    633	WMI_PDEV_UPDATE_CTLTABLE_EVENTID,
    634	WMI_PDEV_DMA_RING_CFG_RSP_EVENTID,
    635	WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID,
    636	WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID,
    637	WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID,
    638	WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID,
    639	WMI_PDEV_RAP_INFO_EVENTID,
    640	WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID,
    641	WMI_SERVICE_READY_EXT2_EVENTID,
    642	WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
    643	WMI_VDEV_STOPPED_EVENTID,
    644	WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
    645	WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID,
    646	WMI_VDEV_TSF_REPORT_EVENTID,
    647	WMI_VDEV_DELETE_RESP_EVENTID,
    648	WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID,
    649	WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID,
    650	WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER),
    651	WMI_PEER_INFO_EVENTID,
    652	WMI_PEER_TX_FAIL_CNT_THR_EVENTID,
    653	WMI_PEER_ESTIMATED_LINKSPEED_EVENTID,
    654	WMI_PEER_STATE_EVENTID,
    655	WMI_PEER_ASSOC_CONF_EVENTID,
    656	WMI_PEER_DELETE_RESP_EVENTID,
    657	WMI_PEER_RATECODE_LIST_EVENTID,
    658	WMI_WDS_PEER_EVENTID,
    659	WMI_PEER_STA_PS_STATECHG_EVENTID,
    660	WMI_PEER_ANTDIV_INFO_EVENTID,
    661	WMI_PEER_RESERVED0_EVENTID,
    662	WMI_PEER_RESERVED1_EVENTID,
    663	WMI_PEER_RESERVED2_EVENTID,
    664	WMI_PEER_RESERVED3_EVENTID,
    665	WMI_PEER_RESERVED4_EVENTID,
    666	WMI_PEER_RESERVED5_EVENTID,
    667	WMI_PEER_RESERVED6_EVENTID,
    668	WMI_PEER_RESERVED7_EVENTID,
    669	WMI_PEER_RESERVED8_EVENTID,
    670	WMI_PEER_RESERVED9_EVENTID,
    671	WMI_PEER_RESERVED10_EVENTID,
    672	WMI_PEER_OPER_MODE_CHANGE_EVENTID,
    673	WMI_PEER_TX_PN_RESPONSE_EVENTID,
    674	WMI_PEER_CFR_CAPTURE_EVENTID,
    675	WMI_PEER_CREATE_CONF_EVENTID,
    676	WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT),
    677	WMI_HOST_SWBA_EVENTID,
    678	WMI_TBTTOFFSET_UPDATE_EVENTID,
    679	WMI_OFFLOAD_BCN_TX_STATUS_EVENTID,
    680	WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID,
    681	WMI_MGMT_TX_COMPLETION_EVENTID,
    682	WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID,
    683	WMI_TBTTOFFSET_EXT_UPDATE_EVENTID,
    684	WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID,
    685	WMI_HOST_FILS_DISCOVERY_EVENTID,
    686	WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG),
    687	WMI_TX_ADDBA_COMPLETE_EVENTID,
    688	WMI_BA_RSP_SSN_EVENTID,
    689	WMI_AGGR_STATE_TRIG_EVENTID,
    690	WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM),
    691	WMI_PROFILE_MATCH,
    692	WMI_ROAM_SYNCH_EVENTID,
    693	WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P),
    694	WMI_P2P_NOA_EVENTID,
    695	WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID,
    696	WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS),
    697	WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND),
    698	WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW),
    699	WMI_D0_WOW_DISABLE_ACK_EVENTID,
    700	WMI_WOW_INITIAL_WAKEUP_EVENTID,
    701	WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT),
    702	WMI_TSF_MEASUREMENT_REPORT_EVENTID,
    703	WMI_RTT_ERROR_REPORT_EVENTID,
    704	WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS),
    705	WMI_IFACE_LINK_STATS_EVENTID,
    706	WMI_PEER_LINK_STATS_EVENTID,
    707	WMI_RADIO_LINK_STATS_EVENTID,
    708	WMI_UPDATE_FW_MEM_DUMP_EVENTID,
    709	WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID,
    710	WMI_INST_RSSI_STATS_EVENTID,
    711	WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID,
    712	WMI_REPORT_STATS_EVENTID,
    713	WMI_UPDATE_RCPI_EVENTID,
    714	WMI_PEER_STATS_INFO_EVENTID,
    715	WMI_RADIO_CHAN_STATS_EVENTID,
    716	WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL),
    717	WMI_NLO_SCAN_COMPLETE_EVENTID,
    718	WMI_APFIND_EVENTID,
    719	WMI_PASSPOINT_MATCH_EVENTID,
    720	WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL),
    721	WMI_GTK_REKEY_FAIL_EVENTID,
    722	WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL),
    723	WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER),
    724	WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS),
    725	WMI_VDEV_DFS_CAC_COMPLETE_EVENTID,
    726	WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID,
    727	WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC),
    728	WMI_PDEV_UTF_EVENTID,
    729	WMI_DEBUG_MESG_EVENTID,
    730	WMI_UPDATE_STATS_EVENTID,
    731	WMI_DEBUG_PRINT_EVENTID,
    732	WMI_DCS_INTERFERENCE_EVENTID,
    733	WMI_PDEV_QVIT_EVENTID,
    734	WMI_WLAN_PROFILE_DATA_EVENTID,
    735	WMI_PDEV_FTM_INTG_EVENTID,
    736	WMI_WLAN_FREQ_AVOID_EVENTID,
    737	WMI_VDEV_GET_KEEPALIVE_EVENTID,
    738	WMI_THERMAL_MGMT_EVENTID,
    739	WMI_DIAG_DATA_CONTAINER_EVENTID,
    740	WMI_HOST_AUTO_SHUTDOWN_EVENTID,
    741	WMI_UPDATE_WHAL_MIB_STATS_EVENTID,
    742	WMI_UPDATE_VDEV_RATE_STATS_EVENTID,
    743	WMI_DIAG_EVENTID,
    744	WMI_OCB_SET_SCHED_EVENTID,
    745	WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID,
    746	WMI_RSSI_BREACH_EVENTID,
    747	WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID,
    748	WMI_PDEV_UTF_SCPC_EVENTID,
    749	WMI_READ_DATA_FROM_FLASH_EVENTID,
    750	WMI_REPORT_RX_AGGR_FAILURE_EVENTID,
    751	WMI_PKGID_EVENTID,
    752	WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO),
    753	WMI_UPLOADH_EVENTID,
    754	WMI_CAPTUREH_EVENTID,
    755	WMI_RFKILL_STATE_CHANGE_EVENTID,
    756	WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS),
    757	WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS),
    758	WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN),
    759	WMI_BATCH_SCAN_RESULT_EVENTID,
    760	WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM),
    761	WMI_OEM_MEASUREMENT_REPORT_EVENTID,
    762	WMI_OEM_ERROR_REPORT_EVENTID,
    763	WMI_OEM_RESPONSE_EVENTID,
    764	WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN),
    765	WMI_NAN_DISC_IFACE_CREATED_EVENTID,
    766	WMI_NAN_DISC_IFACE_DELETED_EVENTID,
    767	WMI_NAN_STARTED_CLUSTER_EVENTID,
    768	WMI_NAN_JOINED_CLUSTER_EVENTID,
    769	WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX),
    770	WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI),
    771	WMI_LPI_STATUS_EVENTID,
    772	WMI_LPI_HANDOFF_EVENTID,
    773	WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN),
    774	WMI_EXTSCAN_OPERATION_EVENTID,
    775	WMI_EXTSCAN_TABLE_USAGE_EVENTID,
    776	WMI_EXTSCAN_CACHED_RESULTS_EVENTID,
    777	WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID,
    778	WMI_EXTSCAN_HOTLIST_MATCH_EVENTID,
    779	WMI_EXTSCAN_CAPABILITIES_EVENTID,
    780	WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID,
    781	WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL),
    782	WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL),
    783	WMI_SAP_OFL_DEL_STA_EVENTID,
    784	WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID =
    785		WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL),
    786	WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB),
    787	WMI_OCB_GET_TSF_TIMER_RESP_EVENTID,
    788	WMI_DCC_GET_STATS_RESP_EVENTID,
    789	WMI_DCC_UPDATE_NDL_RESP_EVENTID,
    790	WMI_DCC_STATS_EVENTID,
    791	WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC),
    792	WMI_SOC_HW_MODE_TRANSITION_EVENTID,
    793	WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID,
    794	WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC),
    795	WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD),
    796	WMI_BPF_VDEV_STATS_INFO_EVENTID,
    797	WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC),
    798	WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY),
    799	WMI_11D_NEW_COUNTRY_EVENTID,
    800	WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE),
    801	WMI_NDP_INITIATOR_RSP_EVENTID,
    802	WMI_NDP_RESPONDER_RSP_EVENTID,
    803	WMI_NDP_END_RSP_EVENTID,
    804	WMI_NDP_INDICATION_EVENTID,
    805	WMI_NDP_CONFIRM_EVENTID,
    806	WMI_NDP_END_INDICATION_EVENTID,
    807
    808	WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT),
    809	WMI_TWT_DISABLE_EVENTID,
    810	WMI_TWT_ADD_DIALOG_EVENTID,
    811	WMI_TWT_DEL_DIALOG_EVENTID,
    812	WMI_TWT_PAUSE_DIALOG_EVENTID,
    813	WMI_TWT_RESUME_DIALOG_EVENTID,
    814};
    815
    816enum wmi_tlv_pdev_param {
    817	WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
    818	WMI_PDEV_PARAM_RX_CHAIN_MASK,
    819	WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
    820	WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
    821	WMI_PDEV_PARAM_TXPOWER_SCALE,
    822	WMI_PDEV_PARAM_BEACON_GEN_MODE,
    823	WMI_PDEV_PARAM_BEACON_TX_MODE,
    824	WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
    825	WMI_PDEV_PARAM_PROTECTION_MODE,
    826	WMI_PDEV_PARAM_DYNAMIC_BW,
    827	WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
    828	WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
    829	WMI_PDEV_PARAM_STA_KICKOUT_TH,
    830	WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
    831	WMI_PDEV_PARAM_LTR_ENABLE,
    832	WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
    833	WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
    834	WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
    835	WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
    836	WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
    837	WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
    838	WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
    839	WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
    840	WMI_PDEV_PARAM_L1SS_ENABLE,
    841	WMI_PDEV_PARAM_DSLEEP_ENABLE,
    842	WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
    843	WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
    844	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
    845	WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
    846	WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
    847	WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
    848	WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
    849	WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
    850	WMI_PDEV_PARAM_PMF_QOS,
    851	WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
    852	WMI_PDEV_PARAM_DCS,
    853	WMI_PDEV_PARAM_ANI_ENABLE,
    854	WMI_PDEV_PARAM_ANI_POLL_PERIOD,
    855	WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
    856	WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
    857	WMI_PDEV_PARAM_ANI_CCK_LEVEL,
    858	WMI_PDEV_PARAM_DYNTXCHAIN,
    859	WMI_PDEV_PARAM_PROXY_STA,
    860	WMI_PDEV_PARAM_IDLE_PS_CONFIG,
    861	WMI_PDEV_PARAM_POWER_GATING_SLEEP,
    862	WMI_PDEV_PARAM_RFKILL_ENABLE,
    863	WMI_PDEV_PARAM_BURST_DUR,
    864	WMI_PDEV_PARAM_BURST_ENABLE,
    865	WMI_PDEV_PARAM_HW_RFKILL_CONFIG,
    866	WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE,
    867	WMI_PDEV_PARAM_L1SS_TRACK,
    868	WMI_PDEV_PARAM_HYST_EN,
    869	WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE,
    870	WMI_PDEV_PARAM_LED_SYS_STATE,
    871	WMI_PDEV_PARAM_LED_ENABLE,
    872	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY,
    873	WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE,
    874	WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE,
    875	WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD,
    876	WMI_PDEV_PARAM_CTS_CBW,
    877	WMI_PDEV_PARAM_WNTS_CONFIG,
    878	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE,
    879	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP,
    880	WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP,
    881	WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP,
    882	WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE,
    883	WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT,
    884	WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP,
    885	WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT,
    886	WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE,
    887	WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE,
    888	WMI_PDEV_PARAM_TX_CHAIN_MASK_2G,
    889	WMI_PDEV_PARAM_RX_CHAIN_MASK_2G,
    890	WMI_PDEV_PARAM_TX_CHAIN_MASK_5G,
    891	WMI_PDEV_PARAM_RX_CHAIN_MASK_5G,
    892	WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK,
    893	WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS,
    894	WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG,
    895	WMI_PDEV_PARAM_TXPOWER_DECR_DB,
    896	WMI_PDEV_PARAM_AGGR_BURST,
    897	WMI_PDEV_PARAM_RX_DECAP_MODE,
    898	WMI_PDEV_PARAM_FAST_CHANNEL_RESET,
    899	WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
    900	WMI_PDEV_PARAM_ANTENNA_GAIN,
    901	WMI_PDEV_PARAM_RX_FILTER,
    902	WMI_PDEV_SET_MCAST_TO_UCAST_TID,
    903	WMI_PDEV_PARAM_PROXY_STA_MODE,
    904	WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE,
    905	WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
    906	WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
    907	WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE,
    908	WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
    909	WMI_PDEV_PARAM_BLOCK_INTERBSS,
    910	WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
    911	WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID,
    912	WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
    913	WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
    914	WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
    915	WMI_PDEV_PARAM_SET_BURST_MODE_CMDID,
    916	WMI_PDEV_PARAM_EN_STATS,
    917	WMI_PDEV_PARAM_MU_GROUP_POLICY,
    918	WMI_PDEV_PARAM_NOISE_DETECTION,
    919	WMI_PDEV_PARAM_NOISE_THRESHOLD,
    920	WMI_PDEV_PARAM_DPD_ENABLE,
    921	WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
    922	WMI_PDEV_PARAM_ATF_STRICT_SCH,
    923	WMI_PDEV_PARAM_ATF_SCHED_DURATION,
    924	WMI_PDEV_PARAM_ANT_PLZN,
    925	WMI_PDEV_PARAM_MGMT_RETRY_LIMIT,
    926	WMI_PDEV_PARAM_SENSITIVITY_LEVEL,
    927	WMI_PDEV_PARAM_SIGNED_TXPOWER_2G,
    928	WMI_PDEV_PARAM_SIGNED_TXPOWER_5G,
    929	WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
    930	WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
    931	WMI_PDEV_PARAM_CCA_THRESHOLD,
    932	WMI_PDEV_PARAM_RTS_FIXED_RATE,
    933	WMI_PDEV_PARAM_PDEV_RESET,
    934	WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET,
    935	WMI_PDEV_PARAM_ARP_DBG_SRCADDR,
    936	WMI_PDEV_PARAM_ARP_DBG_DSTADDR,
    937	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
    938	WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
    939	WMI_PDEV_PARAM_CUST_TXPOWER_SCALE,
    940	WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
    941	WMI_PDEV_PARAM_CTRL_RETRY_LIMIT,
    942	WMI_PDEV_PARAM_PROPAGATION_DELAY,
    943	WMI_PDEV_PARAM_ENA_ANT_DIV,
    944	WMI_PDEV_PARAM_FORCE_CHAIN_ANT,
    945	WMI_PDEV_PARAM_ANT_DIV_SELFTEST,
    946	WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL,
    947	WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD,
    948	WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS,
    949	WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN,
    950	WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN,
    951	WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN,
    952	WMI_PDEV_PARAM_TX_SCH_DELAY,
    953	WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
    954	WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
    955	WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE,
    956	WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
    957	WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE,
    958	WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE,
    959	WMI_PDEV_PARAM_MESH_MCAST_ENABLE,
    960	WMI_PDEV_PARAM_SET_CMD_OBSS_PD_THRESHOLD = 0xbc,
    961	WMI_PDEV_PARAM_SET_CMD_OBSS_PD_PER_AC = 0xbe,
    962	WMI_PDEV_PARAM_ENABLE_SR_PROHIBIT = 0xc6,
    963};
    964
    965enum wmi_tlv_vdev_param {
    966	WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
    967	WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
    968	WMI_VDEV_PARAM_BEACON_INTERVAL,
    969	WMI_VDEV_PARAM_LISTEN_INTERVAL,
    970	WMI_VDEV_PARAM_MULTICAST_RATE,
    971	WMI_VDEV_PARAM_MGMT_TX_RATE,
    972	WMI_VDEV_PARAM_SLOT_TIME,
    973	WMI_VDEV_PARAM_PREAMBLE,
    974	WMI_VDEV_PARAM_SWBA_TIME,
    975	WMI_VDEV_STATS_UPDATE_PERIOD,
    976	WMI_VDEV_PWRSAVE_AGEOUT_TIME,
    977	WMI_VDEV_HOST_SWBA_INTERVAL,
    978	WMI_VDEV_PARAM_DTIM_PERIOD,
    979	WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
    980	WMI_VDEV_PARAM_WDS,
    981	WMI_VDEV_PARAM_ATIM_WINDOW,
    982	WMI_VDEV_PARAM_BMISS_COUNT_MAX,
    983	WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
    984	WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
    985	WMI_VDEV_PARAM_FEATURE_WMM,
    986	WMI_VDEV_PARAM_CHWIDTH,
    987	WMI_VDEV_PARAM_CHEXTOFFSET,
    988	WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
    989	WMI_VDEV_PARAM_STA_QUICKKICKOUT,
    990	WMI_VDEV_PARAM_MGMT_RATE,
    991	WMI_VDEV_PARAM_PROTECTION_MODE,
    992	WMI_VDEV_PARAM_FIXED_RATE,
    993	WMI_VDEV_PARAM_SGI,
    994	WMI_VDEV_PARAM_LDPC,
    995	WMI_VDEV_PARAM_TX_STBC,
    996	WMI_VDEV_PARAM_RX_STBC,
    997	WMI_VDEV_PARAM_INTRA_BSS_FWD,
    998	WMI_VDEV_PARAM_DEF_KEYID,
    999	WMI_VDEV_PARAM_NSS,
   1000	WMI_VDEV_PARAM_BCAST_DATA_RATE,
   1001	WMI_VDEV_PARAM_MCAST_DATA_RATE,
   1002	WMI_VDEV_PARAM_MCAST_INDICATE,
   1003	WMI_VDEV_PARAM_DHCP_INDICATE,
   1004	WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
   1005	WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
   1006	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
   1007	WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
   1008	WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
   1009	WMI_VDEV_PARAM_ENABLE_RTSCTS,
   1010	WMI_VDEV_PARAM_TXBF,
   1011	WMI_VDEV_PARAM_PACKET_POWERSAVE,
   1012	WMI_VDEV_PARAM_DROP_UNENCRY,
   1013	WMI_VDEV_PARAM_TX_ENCAP_TYPE,
   1014	WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
   1015	WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
   1016	WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
   1017	WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
   1018	WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP,
   1019	WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP,
   1020	WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
   1021	WMI_VDEV_PARAM_TX_PWRLIMIT,
   1022	WMI_VDEV_PARAM_SNR_NUM_FOR_CAL,
   1023	WMI_VDEV_PARAM_ROAM_FW_OFFLOAD,
   1024	WMI_VDEV_PARAM_ENABLE_RMC,
   1025	WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS,
   1026	WMI_VDEV_PARAM_MAX_RATE,
   1027	WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE,
   1028	WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR,
   1029	WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT,
   1030	WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE,
   1031	WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED,
   1032	WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED,
   1033	WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED,
   1034	WMI_VDEV_PARAM_INACTIVITY_CNT,
   1035	WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS,
   1036	WMI_VDEV_PARAM_DTIM_POLICY,
   1037	WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS,
   1038	WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE,
   1039	WMI_VDEV_PARAM_RX_LEAK_WINDOW,
   1040	WMI_VDEV_PARAM_STATS_AVG_FACTOR,
   1041	WMI_VDEV_PARAM_DISCONNECT_TH,
   1042	WMI_VDEV_PARAM_RTSCTS_RATE,
   1043	WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE,
   1044	WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE,
   1045	WMI_VDEV_PARAM_TXPOWER_SCALE,
   1046	WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB,
   1047	WMI_VDEV_PARAM_MCAST2UCAST_SET,
   1048	WMI_VDEV_PARAM_RC_NUM_RETRIES,
   1049	WMI_VDEV_PARAM_CABQ_MAXDUR,
   1050	WMI_VDEV_PARAM_MFPTEST_SET,
   1051	WMI_VDEV_PARAM_RTS_FIXED_RATE,
   1052	WMI_VDEV_PARAM_VHT_SGIMASK,
   1053	WMI_VDEV_PARAM_VHT80_RATEMASK,
   1054	WMI_VDEV_PARAM_PROXY_STA,
   1055	WMI_VDEV_PARAM_VIRTUAL_CELL_MODE,
   1056	WMI_VDEV_PARAM_RX_DECAP_TYPE,
   1057	WMI_VDEV_PARAM_BW_NSS_RATEMASK,
   1058	WMI_VDEV_PARAM_SENSOR_AP,
   1059	WMI_VDEV_PARAM_BEACON_RATE,
   1060	WMI_VDEV_PARAM_DTIM_ENABLE_CTS,
   1061	WMI_VDEV_PARAM_STA_KICKOUT,
   1062	WMI_VDEV_PARAM_CAPABILITIES,
   1063	WMI_VDEV_PARAM_TSF_INCREMENT,
   1064	WMI_VDEV_PARAM_AMPDU_PER_AC,
   1065	WMI_VDEV_PARAM_RX_FILTER,
   1066	WMI_VDEV_PARAM_MGMT_TX_POWER,
   1067	WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH,
   1068	WMI_VDEV_PARAM_AGG_SW_RETRY_TH,
   1069	WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS,
   1070	WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY,
   1071	WMI_VDEV_PARAM_HE_DCM,
   1072	WMI_VDEV_PARAM_HE_RANGE_EXT,
   1073	WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
   1074	WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
   1075	WMI_VDEV_PARAM_HE_LTF = 0x74,
   1076	WMI_VDEV_PARAM_BA_MODE = 0x7e,
   1077	WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
   1078	WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
   1079	WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
   1080	WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
   1081	WMI_VDEV_PARAM_BSS_COLOR,
   1082	WMI_VDEV_PARAM_SET_HEMU_MODE,
   1083	WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
   1084};
   1085
   1086enum wmi_tlv_peer_flags {
   1087	WMI_TLV_PEER_AUTH = 0x00000001,
   1088	WMI_TLV_PEER_QOS = 0x00000002,
   1089	WMI_TLV_PEER_NEED_PTK_4_WAY = 0x00000004,
   1090	WMI_TLV_PEER_NEED_GTK_2_WAY = 0x00000010,
   1091	WMI_TLV_PEER_APSD = 0x00000800,
   1092	WMI_TLV_PEER_HT = 0x00001000,
   1093	WMI_TLV_PEER_40MHZ = 0x00002000,
   1094	WMI_TLV_PEER_STBC = 0x00008000,
   1095	WMI_TLV_PEER_LDPC = 0x00010000,
   1096	WMI_TLV_PEER_DYN_MIMOPS = 0x00020000,
   1097	WMI_TLV_PEER_STATIC_MIMOPS = 0x00040000,
   1098	WMI_TLV_PEER_SPATIAL_MUX = 0x00200000,
   1099	WMI_TLV_PEER_VHT = 0x02000000,
   1100	WMI_TLV_PEER_80MHZ = 0x04000000,
   1101	WMI_TLV_PEER_PMF = 0x08000000,
   1102	WMI_PEER_IS_P2P_CAPABLE = 0x20000000,
   1103	WMI_PEER_160MHZ         = 0x40000000,
   1104	WMI_PEER_SAFEMODE_EN    = 0x80000000,
   1105
   1106};
   1107
   1108/** Enum list of TLV Tags for each parameter structure type. */
   1109enum wmi_tlv_tag {
   1110	WMI_TAG_LAST_RESERVED = 15,
   1111	WMI_TAG_FIRST_ARRAY_ENUM,
   1112	WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM,
   1113	WMI_TAG_ARRAY_BYTE,
   1114	WMI_TAG_ARRAY_STRUCT,
   1115	WMI_TAG_ARRAY_FIXED_STRUCT,
   1116	WMI_TAG_LAST_ARRAY_ENUM = 31,
   1117	WMI_TAG_SERVICE_READY_EVENT,
   1118	WMI_TAG_HAL_REG_CAPABILITIES,
   1119	WMI_TAG_WLAN_HOST_MEM_REQ,
   1120	WMI_TAG_READY_EVENT,
   1121	WMI_TAG_SCAN_EVENT,
   1122	WMI_TAG_PDEV_TPC_CONFIG_EVENT,
   1123	WMI_TAG_CHAN_INFO_EVENT,
   1124	WMI_TAG_COMB_PHYERR_RX_HDR,
   1125	WMI_TAG_VDEV_START_RESPONSE_EVENT,
   1126	WMI_TAG_VDEV_STOPPED_EVENT,
   1127	WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT,
   1128	WMI_TAG_PEER_STA_KICKOUT_EVENT,
   1129	WMI_TAG_MGMT_RX_HDR,
   1130	WMI_TAG_TBTT_OFFSET_EVENT,
   1131	WMI_TAG_TX_DELBA_COMPLETE_EVENT,
   1132	WMI_TAG_TX_ADDBA_COMPLETE_EVENT,
   1133	WMI_TAG_ROAM_EVENT,
   1134	WMI_TAG_WOW_EVENT_INFO,
   1135	WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP,
   1136	WMI_TAG_RTT_EVENT_HEADER,
   1137	WMI_TAG_RTT_ERROR_REPORT_EVENT,
   1138	WMI_TAG_RTT_MEAS_EVENT,
   1139	WMI_TAG_ECHO_EVENT,
   1140	WMI_TAG_FTM_INTG_EVENT,
   1141	WMI_TAG_VDEV_GET_KEEPALIVE_EVENT,
   1142	WMI_TAG_GPIO_INPUT_EVENT,
   1143	WMI_TAG_CSA_EVENT,
   1144	WMI_TAG_GTK_OFFLOAD_STATUS_EVENT,
   1145	WMI_TAG_IGTK_INFO,
   1146	WMI_TAG_DCS_INTERFERENCE_EVENT,
   1147	WMI_TAG_ATH_DCS_CW_INT,
   1148	WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */
   1149		WMI_TAG_ATH_DCS_CW_INT,
   1150	WMI_TAG_ATH_DCS_WLAN_INT_STAT,
   1151	WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */
   1152		WMI_TAG_ATH_DCS_WLAN_INT_STAT,
   1153	WMI_TAG_WLAN_PROFILE_CTX_T,
   1154	WMI_TAG_WLAN_PROFILE_T,
   1155	WMI_TAG_PDEV_QVIT_EVENT,
   1156	WMI_TAG_HOST_SWBA_EVENT,
   1157	WMI_TAG_TIM_INFO,
   1158	WMI_TAG_P2P_NOA_INFO,
   1159	WMI_TAG_STATS_EVENT,
   1160	WMI_TAG_AVOID_FREQ_RANGES_EVENT,
   1161	WMI_TAG_AVOID_FREQ_RANGE_DESC,
   1162	WMI_TAG_GTK_REKEY_FAIL_EVENT,
   1163	WMI_TAG_INIT_CMD,
   1164	WMI_TAG_RESOURCE_CONFIG,
   1165	WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
   1166	WMI_TAG_START_SCAN_CMD,
   1167	WMI_TAG_STOP_SCAN_CMD,
   1168	WMI_TAG_SCAN_CHAN_LIST_CMD,
   1169	WMI_TAG_CHANNEL,
   1170	WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
   1171	WMI_TAG_PDEV_SET_PARAM_CMD,
   1172	WMI_TAG_PDEV_SET_WMM_PARAMS_CMD,
   1173	WMI_TAG_WMM_PARAMS,
   1174	WMI_TAG_PDEV_SET_QUIET_CMD,
   1175	WMI_TAG_VDEV_CREATE_CMD,
   1176	WMI_TAG_VDEV_DELETE_CMD,
   1177	WMI_TAG_VDEV_START_REQUEST_CMD,
   1178	WMI_TAG_P2P_NOA_DESCRIPTOR,
   1179	WMI_TAG_P2P_GO_SET_BEACON_IE,
   1180	WMI_TAG_GTK_OFFLOAD_CMD,
   1181	WMI_TAG_VDEV_UP_CMD,
   1182	WMI_TAG_VDEV_STOP_CMD,
   1183	WMI_TAG_VDEV_DOWN_CMD,
   1184	WMI_TAG_VDEV_SET_PARAM_CMD,
   1185	WMI_TAG_VDEV_INSTALL_KEY_CMD,
   1186	WMI_TAG_PEER_CREATE_CMD,
   1187	WMI_TAG_PEER_DELETE_CMD,
   1188	WMI_TAG_PEER_FLUSH_TIDS_CMD,
   1189	WMI_TAG_PEER_SET_PARAM_CMD,
   1190	WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
   1191	WMI_TAG_VHT_RATE_SET,
   1192	WMI_TAG_BCN_TMPL_CMD,
   1193	WMI_TAG_PRB_TMPL_CMD,
   1194	WMI_TAG_BCN_PRB_INFO,
   1195	WMI_TAG_PEER_TID_ADDBA_CMD,
   1196	WMI_TAG_PEER_TID_DELBA_CMD,
   1197	WMI_TAG_STA_POWERSAVE_MODE_CMD,
   1198	WMI_TAG_STA_POWERSAVE_PARAM_CMD,
   1199	WMI_TAG_STA_DTIM_PS_METHOD_CMD,
   1200	WMI_TAG_ROAM_SCAN_MODE,
   1201	WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD,
   1202	WMI_TAG_ROAM_SCAN_PERIOD,
   1203	WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
   1204	WMI_TAG_PDEV_SUSPEND_CMD,
   1205	WMI_TAG_PDEV_RESUME_CMD,
   1206	WMI_TAG_ADD_BCN_FILTER_CMD,
   1207	WMI_TAG_RMV_BCN_FILTER_CMD,
   1208	WMI_TAG_WOW_ENABLE_CMD,
   1209	WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
   1210	WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD,
   1211	WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM,
   1212	WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
   1213	WMI_TAG_ARP_OFFLOAD_TUPLE,
   1214	WMI_TAG_NS_OFFLOAD_TUPLE,
   1215	WMI_TAG_FTM_INTG_CMD,
   1216	WMI_TAG_STA_KEEPALIVE_CMD,
   1217	WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
   1218	WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD,
   1219	WMI_TAG_AP_PS_PEER_CMD,
   1220	WMI_TAG_PEER_RATE_RETRY_SCHED_CMD,
   1221	WMI_TAG_WLAN_PROFILE_TRIGGER_CMD,
   1222	WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD,
   1223	WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD,
   1224	WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD,
   1225	WMI_TAG_WOW_DEL_PATTERN_CMD,
   1226	WMI_TAG_WOW_ADD_DEL_EVT_CMD,
   1227	WMI_TAG_RTT_MEASREQ_HEAD,
   1228	WMI_TAG_RTT_MEASREQ_BODY,
   1229	WMI_TAG_RTT_TSF_CMD,
   1230	WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
   1231	WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
   1232	WMI_TAG_REQUEST_STATS_CMD,
   1233	WMI_TAG_NLO_CONFIG_CMD,
   1234	WMI_TAG_NLO_CONFIGURED_PARAMETERS,
   1235	WMI_TAG_CSA_OFFLOAD_ENABLE_CMD,
   1236	WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD,
   1237	WMI_TAG_CHATTER_SET_MODE_CMD,
   1238	WMI_TAG_ECHO_CMD,
   1239	WMI_TAG_VDEV_SET_KEEPALIVE_CMD,
   1240	WMI_TAG_VDEV_GET_KEEPALIVE_CMD,
   1241	WMI_TAG_FORCE_FW_HANG_CMD,
   1242	WMI_TAG_GPIO_CONFIG_CMD,
   1243	WMI_TAG_GPIO_OUTPUT_CMD,
   1244	WMI_TAG_PEER_ADD_WDS_ENTRY_CMD,
   1245	WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD,
   1246	WMI_TAG_BCN_TX_HDR,
   1247	WMI_TAG_BCN_SEND_FROM_HOST_CMD,
   1248	WMI_TAG_MGMT_TX_HDR,
   1249	WMI_TAG_ADDBA_CLEAR_RESP_CMD,
   1250	WMI_TAG_ADDBA_SEND_CMD,
   1251	WMI_TAG_DELBA_SEND_CMD,
   1252	WMI_TAG_ADDBA_SETRESPONSE_CMD,
   1253	WMI_TAG_SEND_SINGLEAMSDU_CMD,
   1254	WMI_TAG_PDEV_PKTLOG_ENABLE_CMD,
   1255	WMI_TAG_PDEV_PKTLOG_DISABLE_CMD,
   1256	WMI_TAG_PDEV_SET_HT_IE_CMD,
   1257	WMI_TAG_PDEV_SET_VHT_IE_CMD,
   1258	WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD,
   1259	WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD,
   1260	WMI_TAG_PDEV_GET_TPC_CONFIG_CMD,
   1261	WMI_TAG_PDEV_SET_BASE_MACADDR_CMD,
   1262	WMI_TAG_PEER_MCAST_GROUP_CMD,
   1263	WMI_TAG_ROAM_AP_PROFILE,
   1264	WMI_TAG_AP_PROFILE,
   1265	WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD,
   1266	WMI_TAG_PDEV_DFS_ENABLE_CMD,
   1267	WMI_TAG_PDEV_DFS_DISABLE_CMD,
   1268	WMI_TAG_WOW_ADD_PATTERN_CMD,
   1269	WMI_TAG_WOW_BITMAP_PATTERN_T,
   1270	WMI_TAG_WOW_IPV4_SYNC_PATTERN_T,
   1271	WMI_TAG_WOW_IPV6_SYNC_PATTERN_T,
   1272	WMI_TAG_WOW_MAGIC_PATTERN_CMD,
   1273	WMI_TAG_SCAN_UPDATE_REQUEST_CMD,
   1274	WMI_TAG_CHATTER_PKT_COALESCING_FILTER,
   1275	WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD,
   1276	WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD,
   1277	WMI_TAG_CHATTER_COALESCING_QUERY_CMD,
   1278	WMI_TAG_TXBF_CMD,
   1279	WMI_TAG_DEBUG_LOG_CONFIG_CMD,
   1280	WMI_TAG_NLO_EVENT,
   1281	WMI_TAG_CHATTER_QUERY_REPLY_EVENT,
   1282	WMI_TAG_UPLOAD_H_HDR,
   1283	WMI_TAG_CAPTURE_H_EVENT_HDR,
   1284	WMI_TAG_VDEV_WNM_SLEEPMODE_CMD,
   1285	WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD,
   1286	WMI_TAG_VDEV_WMM_ADDTS_CMD,
   1287	WMI_TAG_VDEV_WMM_DELTS_CMD,
   1288	WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
   1289	WMI_TAG_TDLS_SET_STATE_CMD,
   1290	WMI_TAG_TDLS_PEER_UPDATE_CMD,
   1291	WMI_TAG_TDLS_PEER_EVENT,
   1292	WMI_TAG_TDLS_PEER_CAPABILITIES,
   1293	WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD,
   1294	WMI_TAG_ROAM_CHAN_LIST,
   1295	WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT,
   1296	WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD,
   1297	WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD,
   1298	WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD,
   1299	WMI_TAG_BA_REQ_SSN_CMD,
   1300	WMI_TAG_BA_RSP_SSN_EVENT,
   1301	WMI_TAG_STA_SMPS_FORCE_MODE_CMD,
   1302	WMI_TAG_SET_MCASTBCAST_FILTER_CMD,
   1303	WMI_TAG_P2P_SET_OPPPS_CMD,
   1304	WMI_TAG_P2P_SET_NOA_CMD,
   1305	WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM,
   1306	WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM,
   1307	WMI_TAG_STA_SMPS_PARAM_CMD,
   1308	WMI_TAG_VDEV_SET_GTX_PARAMS_CMD,
   1309	WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD,
   1310	WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS,
   1311	WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT,
   1312	WMI_TAG_P2P_NOA_EVENT,
   1313	WMI_TAG_HB_SET_ENABLE_CMD,
   1314	WMI_TAG_HB_SET_TCP_PARAMS_CMD,
   1315	WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD,
   1316	WMI_TAG_HB_SET_UDP_PARAMS_CMD,
   1317	WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD,
   1318	WMI_TAG_HB_IND_EVENT,
   1319	WMI_TAG_TX_PAUSE_EVENT,
   1320	WMI_TAG_RFKILL_EVENT,
   1321	WMI_TAG_DFS_RADAR_EVENT,
   1322	WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD,
   1323	WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD,
   1324	WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST,
   1325	WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO,
   1326	WMI_TAG_BATCH_SCAN_ENABLE_CMD,
   1327	WMI_TAG_BATCH_SCAN_DISABLE_CMD,
   1328	WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD,
   1329	WMI_TAG_BATCH_SCAN_ENABLED_EVENT,
   1330	WMI_TAG_BATCH_SCAN_RESULT_EVENT,
   1331	WMI_TAG_VDEV_PLMREQ_START_CMD,
   1332	WMI_TAG_VDEV_PLMREQ_STOP_CMD,
   1333	WMI_TAG_THERMAL_MGMT_CMD,
   1334	WMI_TAG_THERMAL_MGMT_EVENT,
   1335	WMI_TAG_PEER_INFO_REQ_CMD,
   1336	WMI_TAG_PEER_INFO_EVENT,
   1337	WMI_TAG_PEER_INFO,
   1338	WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT,
   1339	WMI_TAG_RMC_SET_MODE_CMD,
   1340	WMI_TAG_RMC_SET_ACTION_PERIOD_CMD,
   1341	WMI_TAG_RMC_CONFIG_CMD,
   1342	WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD,
   1343	WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD,
   1344	WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD,
   1345	WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD,
   1346	WMI_TAG_NAN_CMD_PARAM,
   1347	WMI_TAG_NAN_EVENT_HDR,
   1348	WMI_TAG_PDEV_L1SS_TRACK_EVENT,
   1349	WMI_TAG_DIAG_DATA_CONTAINER_EVENT,
   1350	WMI_TAG_MODEM_POWER_STATE_CMD_PARAM,
   1351	WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD,
   1352	WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT,
   1353	WMI_TAG_AGGR_STATE_TRIG_EVENT,
   1354	WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY,
   1355	WMI_TAG_ROAM_SCAN_CMD,
   1356	WMI_TAG_REQ_STATS_EXT_CMD,
   1357	WMI_TAG_STATS_EXT_EVENT,
   1358	WMI_TAG_OBSS_SCAN_ENABLE_CMD,
   1359	WMI_TAG_OBSS_SCAN_DISABLE_CMD,
   1360	WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT,
   1361	WMI_TAG_PDEV_SET_LED_CONFIG_CMD,
   1362	WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD,
   1363	WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT,
   1364	WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT,
   1365	WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM,
   1366	WMI_TAG_WOW_IOAC_PKT_PATTERN_T,
   1367	WMI_TAG_WOW_IOAC_TMR_PATTERN_T,
   1368	WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD,
   1369	WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD,
   1370	WMI_TAG_WOW_IOAC_KEEPALIVE_T,
   1371	WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD,
   1372	WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD,
   1373	WMI_TAG_START_LINK_STATS_CMD,
   1374	WMI_TAG_CLEAR_LINK_STATS_CMD,
   1375	WMI_TAG_REQUEST_LINK_STATS_CMD,
   1376	WMI_TAG_IFACE_LINK_STATS_EVENT,
   1377	WMI_TAG_RADIO_LINK_STATS_EVENT,
   1378	WMI_TAG_PEER_STATS_EVENT,
   1379	WMI_TAG_CHANNEL_STATS,
   1380	WMI_TAG_RADIO_LINK_STATS,
   1381	WMI_TAG_RATE_STATS,
   1382	WMI_TAG_PEER_LINK_STATS,
   1383	WMI_TAG_WMM_AC_STATS,
   1384	WMI_TAG_IFACE_LINK_STATS,
   1385	WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD,
   1386	WMI_TAG_LPI_START_SCAN_CMD,
   1387	WMI_TAG_LPI_STOP_SCAN_CMD,
   1388	WMI_TAG_LPI_RESULT_EVENT,
   1389	WMI_TAG_PEER_STATE_EVENT,
   1390	WMI_TAG_EXTSCAN_BUCKET_CMD,
   1391	WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT,
   1392	WMI_TAG_EXTSCAN_START_CMD,
   1393	WMI_TAG_EXTSCAN_STOP_CMD,
   1394	WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD,
   1395	WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD,
   1396	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD,
   1397	WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD,
   1398	WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD,
   1399	WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD,
   1400	WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD,
   1401	WMI_TAG_EXTSCAN_OPERATION_EVENT,
   1402	WMI_TAG_EXTSCAN_START_STOP_EVENT,
   1403	WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT,
   1404	WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT,
   1405	WMI_TAG_EXTSCAN_RSSI_INFO_EVENT,
   1406	WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT,
   1407	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT,
   1408	WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT,
   1409	WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT,
   1410	WMI_TAG_EXTSCAN_CAPABILITIES_EVENT,
   1411	WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT,
   1412	WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT,
   1413	WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT,
   1414	WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD,
   1415	WMI_TAG_D0_WOW_DISABLE_ACK_EVENT,
   1416	WMI_TAG_UNIT_TEST_CMD,
   1417	WMI_TAG_ROAM_OFFLOAD_TLV_PARAM,
   1418	WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM,
   1419	WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM,
   1420	WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM,
   1421	WMI_TAG_ROAM_SYNCH_EVENT,
   1422	WMI_TAG_ROAM_SYNCH_COMPLETE,
   1423	WMI_TAG_EXTWOW_ENABLE_CMD,
   1424	WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD,
   1425	WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD,
   1426	WMI_TAG_LPI_STATUS_EVENT,
   1427	WMI_TAG_LPI_HANDOFF_EVENT,
   1428	WMI_TAG_VDEV_RATE_STATS_EVENT,
   1429	WMI_TAG_VDEV_RATE_HT_INFO,
   1430	WMI_TAG_RIC_REQUEST,
   1431	WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
   1432	WMI_TAG_PDEV_TEMPERATURE_EVENT,
   1433	WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD,
   1434	WMI_TAG_TPC_CHAINMASK_CONFIG_CMD,
   1435	WMI_TAG_RIC_TSPEC,
   1436	WMI_TAG_TPC_CHAINMASK_CONFIG,
   1437	WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD,
   1438	WMI_TAG_SCAN_PROB_REQ_OUI_CMD,
   1439	WMI_TAG_KEY_MATERIAL,
   1440	WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD,
   1441	WMI_TAG_SET_LED_FLASHING_CMD,
   1442	WMI_TAG_MDNS_OFFLOAD_CMD,
   1443	WMI_TAG_MDNS_SET_FQDN_CMD,
   1444	WMI_TAG_MDNS_SET_RESP_CMD,
   1445	WMI_TAG_MDNS_GET_STATS_CMD,
   1446	WMI_TAG_MDNS_STATS_EVENT,
   1447	WMI_TAG_ROAM_INVOKE_CMD,
   1448	WMI_TAG_PDEV_RESUME_EVENT,
   1449	WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD,
   1450	WMI_TAG_SAP_OFL_ENABLE_CMD,
   1451	WMI_TAG_SAP_OFL_ADD_STA_EVENT,
   1452	WMI_TAG_SAP_OFL_DEL_STA_EVENT,
   1453	WMI_TAG_APFIND_CMD_PARAM,
   1454	WMI_TAG_APFIND_EVENT_HDR,
   1455	WMI_TAG_OCB_SET_SCHED_CMD,
   1456	WMI_TAG_OCB_SET_SCHED_EVENT,
   1457	WMI_TAG_OCB_SET_CONFIG_CMD,
   1458	WMI_TAG_OCB_SET_CONFIG_RESP_EVENT,
   1459	WMI_TAG_OCB_SET_UTC_TIME_CMD,
   1460	WMI_TAG_OCB_START_TIMING_ADVERT_CMD,
   1461	WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD,
   1462	WMI_TAG_OCB_GET_TSF_TIMER_CMD,
   1463	WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT,
   1464	WMI_TAG_DCC_GET_STATS_CMD,
   1465	WMI_TAG_DCC_CHANNEL_STATS_REQUEST,
   1466	WMI_TAG_DCC_GET_STATS_RESP_EVENT,
   1467	WMI_TAG_DCC_CLEAR_STATS_CMD,
   1468	WMI_TAG_DCC_UPDATE_NDL_CMD,
   1469	WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT,
   1470	WMI_TAG_DCC_STATS_EVENT,
   1471	WMI_TAG_OCB_CHANNEL,
   1472	WMI_TAG_OCB_SCHEDULE_ELEMENT,
   1473	WMI_TAG_DCC_NDL_STATS_PER_CHANNEL,
   1474	WMI_TAG_DCC_NDL_CHAN,
   1475	WMI_TAG_QOS_PARAMETER,
   1476	WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG,
   1477	WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM,
   1478	WMI_TAG_ROAM_FILTER,
   1479	WMI_TAG_PASSPOINT_CONFIG_CMD,
   1480	WMI_TAG_PASSPOINT_EVENT_HDR,
   1481	WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD,
   1482	WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT,
   1483	WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD,
   1484	WMI_TAG_VDEV_TSF_REPORT_EVENT,
   1485	WMI_TAG_GET_FW_MEM_DUMP,
   1486	WMI_TAG_UPDATE_FW_MEM_DUMP,
   1487	WMI_TAG_FW_MEM_DUMP_PARAMS,
   1488	WMI_TAG_DEBUG_MESG_FLUSH,
   1489	WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE,
   1490	WMI_TAG_PEER_SET_RATE_REPORT_CONDITION,
   1491	WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG,
   1492	WMI_TAG_VDEV_SET_IE_CMD,
   1493	WMI_TAG_RSSI_BREACH_MONITOR_CONFIG,
   1494	WMI_TAG_RSSI_BREACH_EVENT,
   1495	WMI_TAG_WOW_EVENT_INITIAL_WAKEUP,
   1496	WMI_TAG_SOC_SET_PCL_CMD,
   1497	WMI_TAG_SOC_SET_HW_MODE_CMD,
   1498	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT,
   1499	WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT,
   1500	WMI_TAG_VDEV_TXRX_STREAMS,
   1501	WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
   1502	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD,
   1503	WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT,
   1504	WMI_TAG_WOW_IOAC_SOCK_PATTERN_T,
   1505	WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD,
   1506	WMI_TAG_DIAG_EVENT_LOG_CONFIG,
   1507	WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS,
   1508	WMI_TAG_PACKET_FILTER_CONFIG,
   1509	WMI_TAG_PACKET_FILTER_ENABLE,
   1510	WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD,
   1511	WMI_TAG_MGMT_TX_SEND_CMD,
   1512	WMI_TAG_MGMT_TX_COMPL_EVENT,
   1513	WMI_TAG_SOC_SET_ANTENNA_MODE_CMD,
   1514	WMI_TAG_WOW_UDP_SVC_OFLD_CMD,
   1515	WMI_TAG_LRO_INFO_CMD,
   1516	WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM,
   1517	WMI_TAG_SERVICE_READY_EXT_EVENT,
   1518	WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD,
   1519	WMI_TAG_MAWC_ENABLE_SENSOR_EVENT,
   1520	WMI_TAG_ROAM_CONFIGURE_MAWC_CMD,
   1521	WMI_TAG_NLO_CONFIGURE_MAWC_CMD,
   1522	WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD,
   1523	WMI_TAG_PEER_ASSOC_CONF_EVENT,
   1524	WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD,
   1525	WMI_TAG_AP_PS_EGAP_PARAM_CMD,
   1526	WMI_TAG_AP_PS_EGAP_INFO_EVENT,
   1527	WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD,
   1528	WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD,
   1529	WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT,
   1530	WMI_TAG_SCPC_EVENT,
   1531	WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST,
   1532	WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT,
   1533	WMI_TAG_BPF_GET_CAPABILITY_CMD,
   1534	WMI_TAG_BPF_CAPABILITY_INFO_EVT,
   1535	WMI_TAG_BPF_GET_VDEV_STATS_CMD,
   1536	WMI_TAG_BPF_VDEV_STATS_INFO_EVT,
   1537	WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD,
   1538	WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD,
   1539	WMI_TAG_VDEV_DELETE_RESP_EVENT,
   1540	WMI_TAG_PEER_DELETE_RESP_EVENT,
   1541	WMI_TAG_ROAM_DENSE_THRES_PARAM,
   1542	WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM,
   1543	WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD,
   1544	WMI_TAG_VDEV_CONFIG_RATEMASK,
   1545	WMI_TAG_PDEV_FIPS_CMD,
   1546	WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD,
   1547	WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD,
   1548	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD,
   1549	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD,
   1550	WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD,
   1551	WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD,
   1552	WMI_TAG_PDEV_SET_CTL_TABLE_CMD,
   1553	WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD,
   1554	WMI_TAG_FWTEST_SET_PARAM_CMD,
   1555	WMI_TAG_PEER_ATF_REQUEST,
   1556	WMI_TAG_VDEV_ATF_REQUEST,
   1557	WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD,
   1558	WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD,
   1559	WMI_TAG_INST_RSSI_STATS_RESP,
   1560	WMI_TAG_MED_UTIL_REPORT_EVENT,
   1561	WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT,
   1562	WMI_TAG_WDS_ADDR_EVENT,
   1563	WMI_TAG_PEER_RATECODE_LIST_EVENT,
   1564	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT,
   1565	WMI_TAG_PDEV_TPC_EVENT,
   1566	WMI_TAG_ANI_OFDM_EVENT,
   1567	WMI_TAG_ANI_CCK_EVENT,
   1568	WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT,
   1569	WMI_TAG_PDEV_FIPS_EVENT,
   1570	WMI_TAG_ATF_PEER_INFO,
   1571	WMI_TAG_PDEV_GET_TPC_CMD,
   1572	WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD,
   1573	WMI_TAG_QBOOST_CFG_CMD,
   1574	WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE,
   1575	WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES,
   1576	WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM,
   1577	WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN,
   1578	WMI_TAG_PEER_CCK_OFDM_RATE_INFO,
   1579	WMI_TAG_PEER_MCS_RATE_INFO,
   1580	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR,
   1581	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM,
   1582	WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM,
   1583	WMI_TAG_MU_REPORT_TOTAL_MU,
   1584	WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD,
   1585	WMI_TAG_ROAM_SET_MBO,
   1586	WMI_TAG_MIB_STATS_ENABLE_CMD,
   1587	WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT,
   1588	WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT,
   1589	WMI_TAG_NAN_STARTED_CLUSTER_EVENT,
   1590	WMI_TAG_NAN_JOINED_CLUSTER_EVENT,
   1591	WMI_TAG_NDI_GET_CAP_REQ,
   1592	WMI_TAG_NDP_INITIATOR_REQ,
   1593	WMI_TAG_NDP_RESPONDER_REQ,
   1594	WMI_TAG_NDP_END_REQ,
   1595	WMI_TAG_NDI_CAP_RSP_EVENT,
   1596	WMI_TAG_NDP_INITIATOR_RSP_EVENT,
   1597	WMI_TAG_NDP_RESPONDER_RSP_EVENT,
   1598	WMI_TAG_NDP_END_RSP_EVENT,
   1599	WMI_TAG_NDP_INDICATION_EVENT,
   1600	WMI_TAG_NDP_CONFIRM_EVENT,
   1601	WMI_TAG_NDP_END_INDICATION_EVENT,
   1602	WMI_TAG_VDEV_SET_QUIET_CMD,
   1603	WMI_TAG_PDEV_SET_PCL_CMD,
   1604	WMI_TAG_PDEV_SET_HW_MODE_CMD,
   1605	WMI_TAG_PDEV_SET_MAC_CONFIG_CMD,
   1606	WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD,
   1607	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT,
   1608	WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT,
   1609	WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY,
   1610	WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT,
   1611	WMI_TAG_COEX_CONFIG_CMD,
   1612	WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER,
   1613	WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD,
   1614	WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG,
   1615	WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD,
   1616	WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD,
   1617	WMI_TAG_MAC_PHY_CAPABILITIES,
   1618	WMI_TAG_HW_MODE_CAPABILITIES,
   1619	WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS,
   1620	WMI_TAG_HAL_REG_CAPABILITIES_EXT,
   1621	WMI_TAG_SOC_HAL_REG_CAPABILITIES,
   1622	WMI_TAG_VDEV_WISA_CMD,
   1623	WMI_TAG_TX_POWER_LEVEL_STATS_EVT,
   1624	WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV,
   1625	WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG,
   1626	WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD,
   1627	WMI_TAG_NDP_END_RSP_PER_NDI,
   1628	WMI_TAG_PEER_BWF_REQUEST,
   1629	WMI_TAG_BWF_PEER_INFO,
   1630	WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD,
   1631	WMI_TAG_RMC_SET_LEADER_CMD,
   1632	WMI_TAG_RMC_MANUAL_LEADER_EVENT,
   1633	WMI_TAG_PER_CHAIN_RSSI_STATS,
   1634	WMI_TAG_RSSI_STATS,
   1635	WMI_TAG_P2P_LO_START_CMD,
   1636	WMI_TAG_P2P_LO_STOP_CMD,
   1637	WMI_TAG_P2P_LO_STOPPED_EVENT,
   1638	WMI_TAG_REORDER_QUEUE_SETUP_CMD,
   1639	WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
   1640	WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD,
   1641	WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT,
   1642	WMI_TAG_READ_DATA_FROM_FLASH_CMD,
   1643	WMI_TAG_READ_DATA_FROM_FLASH_EVENT,
   1644	WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD,
   1645	WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD,
   1646	WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID,
   1647	WMI_TAG_TLV_BUF_LEN_PARAM,
   1648	WMI_TAG_SERVICE_AVAILABLE_EVENT,
   1649	WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD,
   1650	WMI_TAG_PEER_ANTDIV_INFO_EVENT,
   1651	WMI_TAG_PEER_ANTDIV_INFO,
   1652	WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD,
   1653	WMI_TAG_PDEV_ANTDIV_STATUS_EVENT,
   1654	WMI_TAG_MNT_FILTER_CMD,
   1655	WMI_TAG_GET_CHIP_POWER_STATS_CMD,
   1656	WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT,
   1657	WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD,
   1658	WMI_TAG_COEX_REPORT_ISOLATION_EVENT,
   1659	WMI_TAG_CHAN_CCA_STATS,
   1660	WMI_TAG_PEER_SIGNAL_STATS,
   1661	WMI_TAG_TX_STATS,
   1662	WMI_TAG_PEER_AC_TX_STATS,
   1663	WMI_TAG_RX_STATS,
   1664	WMI_TAG_PEER_AC_RX_STATS,
   1665	WMI_TAG_REPORT_STATS_EVENT,
   1666	WMI_TAG_CHAN_CCA_STATS_THRESH,
   1667	WMI_TAG_PEER_SIGNAL_STATS_THRESH,
   1668	WMI_TAG_TX_STATS_THRESH,
   1669	WMI_TAG_RX_STATS_THRESH,
   1670	WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD,
   1671	WMI_TAG_REQUEST_WLAN_STATS_CMD,
   1672	WMI_TAG_RX_AGGR_FAILURE_EVENT,
   1673	WMI_TAG_RX_AGGR_FAILURE_INFO,
   1674	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD,
   1675	WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT,
   1676	WMI_TAG_PDEV_BAND_TO_MAC,
   1677	WMI_TAG_TBTT_OFFSET_INFO,
   1678	WMI_TAG_TBTT_OFFSET_EXT_EVENT,
   1679	WMI_TAG_SAR_LIMITS_CMD,
   1680	WMI_TAG_SAR_LIMIT_CMD_ROW,
   1681	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
   1682	WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD,
   1683	WMI_TAG_VDEV_ADFS_CH_CFG_CMD,
   1684	WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD,
   1685	WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT,
   1686	WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT,
   1687	WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT,
   1688	WMI_TAG_VENDOR_OUI,
   1689	WMI_TAG_REQUEST_RCPI_CMD,
   1690	WMI_TAG_UPDATE_RCPI_EVENT,
   1691	WMI_TAG_REQUEST_PEER_STATS_INFO_CMD,
   1692	WMI_TAG_PEER_STATS_INFO,
   1693	WMI_TAG_PEER_STATS_INFO_EVENT,
   1694	WMI_TAG_PKGID_EVENT,
   1695	WMI_TAG_CONNECTED_NLO_RSSI_PARAMS,
   1696	WMI_TAG_SET_CURRENT_COUNTRY_CMD,
   1697	WMI_TAG_REGULATORY_RULE_STRUCT,
   1698	WMI_TAG_REG_CHAN_LIST_CC_EVENT,
   1699	WMI_TAG_11D_SCAN_START_CMD,
   1700	WMI_TAG_11D_SCAN_STOP_CMD,
   1701	WMI_TAG_11D_NEW_COUNTRY_EVENT,
   1702	WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD,
   1703	WMI_TAG_RADIO_CHAN_STATS,
   1704	WMI_TAG_RADIO_CHAN_STATS_EVENT,
   1705	WMI_TAG_ROAM_PER_CONFIG,
   1706	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD,
   1707	WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT,
   1708	WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD,
   1709	WMI_TAG_HW_DATA_FILTER_CMD,
   1710	WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF,
   1711	WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT,
   1712	WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED,
   1713	WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD,
   1714	WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT,
   1715	WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD,
   1716	WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD,
   1717	WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT,
   1718	WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD,
   1719	WMI_TAG_MAC_PHY_CHAINMASK_COMBO,
   1720	WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY,
   1721	WMI_TAG_VDEV_SET_ARP_STATS_CMD,
   1722	WMI_TAG_VDEV_GET_ARP_STATS_CMD,
   1723	WMI_TAG_VDEV_GET_ARP_STATS_EVENT,
   1724	WMI_TAG_IFACE_OFFLOAD_STATS,
   1725	WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM,
   1726	WMI_TAG_RSSI_CTL_EXT,
   1727	WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR,
   1728	WMI_TAG_COEX_BT_ACTIVITY_EVENT,
   1729	WMI_TAG_VDEV_GET_TX_POWER_CMD,
   1730	WMI_TAG_VDEV_TX_POWER_EVENT,
   1731	WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT,
   1732	WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD,
   1733	WMI_TAG_TX_SEND_PARAMS,
   1734	WMI_TAG_HE_RATE_SET,
   1735	WMI_TAG_CONGESTION_STATS,
   1736	WMI_TAG_SET_INIT_COUNTRY_CMD,
   1737	WMI_TAG_SCAN_DBS_DUTY_CYCLE,
   1738	WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV,
   1739	WMI_TAG_PDEV_DIV_GET_RSSI_ANTID,
   1740	WMI_TAG_THERM_THROT_CONFIG_REQUEST,
   1741	WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
   1742	WMI_TAG_THERM_THROT_STATS_EVENT,
   1743	WMI_TAG_THERM_THROT_LEVEL_STATS_INFO,
   1744	WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT,
   1745	WMI_TAG_OEM_DMA_RING_CAPABILITIES,
   1746	WMI_TAG_OEM_DMA_RING_CFG_REQ,
   1747	WMI_TAG_OEM_DMA_RING_CFG_RSP,
   1748	WMI_TAG_OEM_INDIRECT_DATA,
   1749	WMI_TAG_OEM_DMA_BUF_RELEASE,
   1750	WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY,
   1751	WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
   1752	WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT,
   1753	WMI_TAG_ROAM_LCA_DISALLOW_CONFIG,
   1754	WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD,
   1755	WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG,
   1756	WMI_TAG_UNIT_TEST_EVENT,
   1757	WMI_TAG_ROAM_FILS_OFFLOAD,
   1758	WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD,
   1759	WMI_TAG_PMK_CACHE,
   1760	WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD,
   1761	WMI_TAG_ROAM_FILS_SYNCH,
   1762	WMI_TAG_GTK_OFFLOAD_EXTENDED,
   1763	WMI_TAG_ROAM_BG_SCAN_ROAMING,
   1764	WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD,
   1765	WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD,
   1766	WMI_TAG_OIC_PING_HANDOFF_EVENT,
   1767	WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD,
   1768	WMI_TAG_DHCP_LEASE_RENEW_EVENT,
   1769	WMI_TAG_BTM_CONFIG,
   1770	WMI_TAG_DEBUG_MESG_FW_DATA_STALL,
   1771	WMI_TAG_WLM_CONFIG_CMD,
   1772	WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST,
   1773	WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT,
   1774	WMI_TAG_ROAM_CND_SCORING_PARAM,
   1775	WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION,
   1776	WMI_TAG_VENDOR_OUI_EXT,
   1777	WMI_TAG_ROAM_SYNCH_FRAME_EVENT,
   1778	WMI_TAG_FD_SEND_FROM_HOST_CMD,
   1779	WMI_TAG_ENABLE_FILS_CMD,
   1780	WMI_TAG_HOST_SWFDA_EVENT,
   1781	WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
   1782	WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD,
   1783	WMI_TAG_STATS_PERIOD,
   1784	WMI_TAG_NDL_SCHEDULE_UPDATE,
   1785	WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD,
   1786	WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE,
   1787	WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD,
   1788	WMI_TAG_SAR2_RESULT_EVENT,
   1789	WMI_TAG_SAR_CAPABILITIES,
   1790	WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD,
   1791	WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT,
   1792	WMI_TAG_DMA_RING_CAPABILITIES,
   1793	WMI_TAG_DMA_RING_CFG_REQ,
   1794	WMI_TAG_DMA_RING_CFG_RSP,
   1795	WMI_TAG_DMA_BUF_RELEASE,
   1796	WMI_TAG_DMA_BUF_RELEASE_ENTRY,
   1797	WMI_TAG_SAR_GET_LIMITS_CMD,
   1798	WMI_TAG_SAR_GET_LIMITS_EVENT,
   1799	WMI_TAG_SAR_GET_LIMITS_EVENT_ROW,
   1800	WMI_TAG_OFFLOAD_11K_REPORT,
   1801	WMI_TAG_INVOKE_NEIGHBOR_REPORT,
   1802	WMI_TAG_NEIGHBOR_REPORT_OFFLOAD,
   1803	WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS,
   1804	WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS,
   1805	WMI_TAG_BPF_SET_VDEV_ENABLE_CMD,
   1806	WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD,
   1807	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD,
   1808	WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT,
   1809	WMI_TAG_PDEV_GET_NFCAL_POWER,
   1810	WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
   1811	WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
   1812	WMI_TAG_OBSS_COLOR_COLLISION_EVT,
   1813	WMI_TAG_RUNTIME_DPD_RECAL_CMD,
   1814	WMI_TAG_TWT_ENABLE_CMD,
   1815	WMI_TAG_TWT_DISABLE_CMD,
   1816	WMI_TAG_TWT_ADD_DIALOG_CMD,
   1817	WMI_TAG_TWT_DEL_DIALOG_CMD,
   1818	WMI_TAG_TWT_PAUSE_DIALOG_CMD,
   1819	WMI_TAG_TWT_RESUME_DIALOG_CMD,
   1820	WMI_TAG_TWT_ENABLE_COMPLETE_EVENT,
   1821	WMI_TAG_TWT_DISABLE_COMPLETE_EVENT,
   1822	WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT,
   1823	WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT,
   1824	WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT,
   1825	WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT,
   1826	WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD,
   1827	WMI_TAG_ROAM_SCAN_STATS_EVENT,
   1828	WMI_TAG_PEER_TID_CONFIGURATIONS_CMD,
   1829	WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD,
   1830	WMI_TAG_GET_TPC_POWER_CMD,
   1831	WMI_TAG_GET_TPC_POWER_EVENT,
   1832	WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA,
   1833	WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD,
   1834	WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD,
   1835	WMI_TAG_MOTION_DET_START_STOP_CMD,
   1836	WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD,
   1837	WMI_TAG_MOTION_DET_EVENT,
   1838	WMI_TAG_MOTION_DET_BASE_LINE_EVENT,
   1839	WMI_TAG_NDP_TRANSPORT_IP,
   1840	WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
   1841	WMI_TAG_ESP_ESTIMATE_EVENT,
   1842	WMI_TAG_NAN_HOST_CONFIG,
   1843	WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS,
   1844	WMI_TAG_PEER_CFR_CAPTURE_CMD,
   1845	WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD,
   1846	WMI_TAG_CHAN_WIDTH_PEER_LIST,
   1847	WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD,
   1848	WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD,
   1849	WMI_TAG_PEER_EXTD2_STATS,
   1850	WMI_TAG_HPCS_PULSE_START_CMD,
   1851	WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT,
   1852	WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD,
   1853	WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD,
   1854	WMI_TAG_NAN_EVENT_INFO,
   1855	WMI_TAG_NDP_CHANNEL_INFO,
   1856	WMI_TAG_NDP_CMD,
   1857	WMI_TAG_NDP_EVENT,
   1858	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301,
   1859	WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO,
   1860	WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344,
   1861	WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD = 0x37b,
   1862	WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD,
   1863	WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD = 0x381,
   1864	WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
   1865	WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
   1866	WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
   1867	WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
   1868	WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
   1869	WMI_TAG_MAX
   1870};
   1871
   1872enum wmi_tlv_service {
   1873	WMI_TLV_SERVICE_BEACON_OFFLOAD = 0,
   1874	WMI_TLV_SERVICE_SCAN_OFFLOAD = 1,
   1875	WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2,
   1876	WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3,
   1877	WMI_TLV_SERVICE_STA_PWRSAVE = 4,
   1878	WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5,
   1879	WMI_TLV_SERVICE_AP_UAPSD = 6,
   1880	WMI_TLV_SERVICE_AP_DFS = 7,
   1881	WMI_TLV_SERVICE_11AC = 8,
   1882	WMI_TLV_SERVICE_BLOCKACK = 9,
   1883	WMI_TLV_SERVICE_PHYERR = 10,
   1884	WMI_TLV_SERVICE_BCN_FILTER = 11,
   1885	WMI_TLV_SERVICE_RTT = 12,
   1886	WMI_TLV_SERVICE_WOW = 13,
   1887	WMI_TLV_SERVICE_RATECTRL_CACHE = 14,
   1888	WMI_TLV_SERVICE_IRAM_TIDS = 15,
   1889	WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16,
   1890	WMI_TLV_SERVICE_NLO = 17,
   1891	WMI_TLV_SERVICE_GTK_OFFLOAD = 18,
   1892	WMI_TLV_SERVICE_SCAN_SCH = 19,
   1893	WMI_TLV_SERVICE_CSA_OFFLOAD = 20,
   1894	WMI_TLV_SERVICE_CHATTER = 21,
   1895	WMI_TLV_SERVICE_COEX_FREQAVOID = 22,
   1896	WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23,
   1897	WMI_TLV_SERVICE_FORCE_FW_HANG = 24,
   1898	WMI_TLV_SERVICE_GPIO = 25,
   1899	WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26,
   1900	WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27,
   1901	WMI_STA_UAPSD_VAR_AUTO_TRIG = 28,
   1902	WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29,
   1903	WMI_TLV_SERVICE_TX_ENCAP = 30,
   1904	WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31,
   1905	WMI_TLV_SERVICE_EARLY_RX = 32,
   1906	WMI_TLV_SERVICE_STA_SMPS = 33,
   1907	WMI_TLV_SERVICE_FWTEST = 34,
   1908	WMI_TLV_SERVICE_STA_WMMAC = 35,
   1909	WMI_TLV_SERVICE_TDLS = 36,
   1910	WMI_TLV_SERVICE_BURST = 37,
   1911	WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38,
   1912	WMI_TLV_SERVICE_ADAPTIVE_OCS = 39,
   1913	WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40,
   1914	WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41,
   1915	WMI_TLV_SERVICE_WLAN_HB = 42,
   1916	WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43,
   1917	WMI_TLV_SERVICE_BATCH_SCAN = 44,
   1918	WMI_TLV_SERVICE_QPOWER = 45,
   1919	WMI_TLV_SERVICE_PLMREQ = 46,
   1920	WMI_TLV_SERVICE_THERMAL_MGMT = 47,
   1921	WMI_TLV_SERVICE_RMC = 48,
   1922	WMI_TLV_SERVICE_MHF_OFFLOAD = 49,
   1923	WMI_TLV_SERVICE_COEX_SAR = 50,
   1924	WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51,
   1925	WMI_TLV_SERVICE_NAN = 52,
   1926	WMI_TLV_SERVICE_L1SS_STAT = 53,
   1927	WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54,
   1928	WMI_TLV_SERVICE_OBSS_SCAN = 55,
   1929	WMI_TLV_SERVICE_TDLS_OFFCHAN = 56,
   1930	WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57,
   1931	WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58,
   1932	WMI_TLV_SERVICE_IBSS_PWRSAVE = 59,
   1933	WMI_TLV_SERVICE_LPASS = 60,
   1934	WMI_TLV_SERVICE_EXTSCAN = 61,
   1935	WMI_TLV_SERVICE_D0WOW = 62,
   1936	WMI_TLV_SERVICE_HSOFFLOAD = 63,
   1937	WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64,
   1938	WMI_TLV_SERVICE_RX_FULL_REORDER = 65,
   1939	WMI_TLV_SERVICE_DHCP_OFFLOAD = 66,
   1940	WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67,
   1941	WMI_TLV_SERVICE_MDNS_OFFLOAD = 68,
   1942	WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69,
   1943	WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70,
   1944	WMI_TLV_SERVICE_OCB = 71,
   1945	WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72,
   1946	WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73,
   1947	WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74,
   1948	WMI_TLV_SERVICE_MGMT_TX_HTT = 75,
   1949	WMI_TLV_SERVICE_MGMT_TX_WMI = 76,
   1950	WMI_TLV_SERVICE_EXT_MSG = 77,
   1951	WMI_TLV_SERVICE_MAWC = 78,
   1952	WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79,
   1953	WMI_TLV_SERVICE_EGAP = 80,
   1954	WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81,
   1955	WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82,
   1956	WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83,
   1957	WMI_TLV_SERVICE_ATF = 84,
   1958	WMI_TLV_SERVICE_COEX_GPIO = 85,
   1959	WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86,
   1960	WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87,
   1961	WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88,
   1962	WMI_TLV_SERVICE_ENTERPRISE_MESH = 89,
   1963	WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90,
   1964	WMI_TLV_SERVICE_BPF_OFFLOAD = 91,
   1965	WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92,
   1966	WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93,
   1967	WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94,
   1968	WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95,
   1969	WMI_TLV_SERVICE_NAN_DATA = 96,
   1970	WMI_TLV_SERVICE_NAN_RTT = 97,
   1971	WMI_TLV_SERVICE_11AX = 98,
   1972	WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99,
   1973	WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100,
   1974	WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101,
   1975	WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102,
   1976	WMI_TLV_SERVICE_MESH_11S = 103,
   1977	WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104,
   1978	WMI_TLV_SERVICE_VDEV_RX_FILTER = 105,
   1979	WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106,
   1980	WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107,
   1981	WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108,
   1982	WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109,
   1983	WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110,
   1984	WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111,
   1985	WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112,
   1986	WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113,
   1987	WMI_TLV_SERVICE_RCPI_SUPPORT = 114,
   1988	WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115,
   1989	WMI_TLV_SERVICE_PEER_STATS_INFO = 116,
   1990	WMI_TLV_SERVICE_REGULATORY_DB = 117,
   1991	WMI_TLV_SERVICE_11D_OFFLOAD = 118,
   1992	WMI_TLV_SERVICE_HW_DATA_FILTERING = 119,
   1993	WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120,
   1994	WMI_TLV_SERVICE_PKT_ROUTING = 121,
   1995	WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122,
   1996	WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123,
   1997	WMI_TLV_SERVICE_8SS_TX_BFEE  =  124,
   1998	WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125,
   1999	WMI_TLV_SERVICE_ACK_TIMEOUT = 126,
   2000	WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127,
   2001
   2002	/* The first 128 bits */
   2003	WMI_MAX_SERVICE = 128,
   2004
   2005	WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128,
   2006	WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129,
   2007	WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130,
   2008	WMI_TLV_SERVICE_FILS_SUPPORT = 131,
   2009	WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132,
   2010	WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133,
   2011	WMI_TLV_SERVICE_MAWC_SUPPORT = 134,
   2012	WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135,
   2013	WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136,
   2014	WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137,
   2015	WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138,
   2016	WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139,
   2017	WMI_TLV_SERVICE_THERM_THROT = 140,
   2018	WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141,
   2019	WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142,
   2020	WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143,
   2021	WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144,
   2022	WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145,
   2023	WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146,
   2024	WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147,
   2025	WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148,
   2026	WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149,
   2027	WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150,
   2028	WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151,
   2029	WMI_TLV_SERVICE_STA_TWT = 152,
   2030	WMI_TLV_SERVICE_AP_TWT = 153,
   2031	WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154,
   2032	WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155,
   2033	WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156,
   2034	WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157,
   2035	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158,
   2036	WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159,
   2037	WMI_TLV_SERVICE_MOTION_DET = 160,
   2038	WMI_TLV_SERVICE_INFRA_MBSSID = 161,
   2039	WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162,
   2040	WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163,
   2041	WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164,
   2042	WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165,
   2043	WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166,
   2044	WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167,
   2045	WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168,
   2046	WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169,
   2047	WMI_TLV_SERVICE_ESP_SUPPORT = 170,
   2048	WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171,
   2049	WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172,
   2050	WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173,
   2051	WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174,
   2052	WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175,
   2053	WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176,
   2054	WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177,
   2055	WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178,
   2056	WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179,
   2057	WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180,
   2058	WMI_TLV_SERVICE_FETCH_TX_PN = 181,
   2059	WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182,
   2060	WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183,
   2061	WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184,
   2062	WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185,
   2063	WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186,
   2064	WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187,
   2065	WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188,
   2066	WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189,
   2067	WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190,
   2068	WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191,
   2069	WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192,
   2070	WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193,
   2071	WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194,
   2072	WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195,
   2073	WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196,
   2074	WMI_TLV_SERVICE_VOW_ENABLE = 197,
   2075	WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198,
   2076	WMI_TLV_SERVICE_BROADCAST_TWT = 199,
   2077	WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200,
   2078	WMI_TLV_SERVICE_PS_TDCC = 201,
   2079	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY   = 202,
   2080	WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203,
   2081	WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204,
   2082	WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205,
   2083	WMI_TLV_SERVICE_WPA3_FT_FILS = 206,
   2084	WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207,
   2085	WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208,
   2086	WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209,
   2087	WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210,
   2088	WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211,
   2089	WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212,
   2090	WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
   2091	WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
   2092	WMI_TLV_SERVICE_EXT2_MSG = 220,
   2093	WMI_TLV_SERVICE_SRG_SRP_SPATIAL_REUSE_SUPPORT = 249,
   2094
   2095	/* The second 128 bits */
   2096	WMI_MAX_EXT_SERVICE = 256,
   2097	WMI_TLV_SERVICE_BIOS_SAR_SUPPORT = 326,
   2098
   2099	/* The third 128 bits */
   2100	WMI_MAX_EXT2_SERVICE = 384
   2101};
   2102
   2103enum {
   2104	WMI_SMPS_FORCED_MODE_NONE = 0,
   2105	WMI_SMPS_FORCED_MODE_DISABLED,
   2106	WMI_SMPS_FORCED_MODE_STATIC,
   2107	WMI_SMPS_FORCED_MODE_DYNAMIC
   2108};
   2109
   2110#define WMI_TPC_CHAINMASK_CONFIG_BAND_2G      0
   2111#define WMI_TPC_CHAINMASK_CONFIG_BAND_5G      1
   2112#define WMI_NUM_SUPPORTED_BAND_MAX 2
   2113
   2114#define WMI_PEER_MIMO_PS_STATE                          0x1
   2115#define WMI_PEER_AMPDU                                  0x2
   2116#define WMI_PEER_AUTHORIZE                              0x3
   2117#define WMI_PEER_CHWIDTH                                0x4
   2118#define WMI_PEER_NSS                                    0x5
   2119#define WMI_PEER_USE_4ADDR                              0x6
   2120#define WMI_PEER_MEMBERSHIP                             0x7
   2121#define WMI_PEER_USERPOS                                0x8
   2122#define WMI_PEER_CRIT_PROTO_HINT_ENABLED                0x9
   2123#define WMI_PEER_TX_FAIL_CNT_THR                        0xA
   2124#define WMI_PEER_SET_HW_RETRY_CTS2S                     0xB
   2125#define WMI_PEER_IBSS_ATIM_WINDOW_LENGTH                0xC
   2126#define WMI_PEER_PHYMODE                                0xD
   2127#define WMI_PEER_USE_FIXED_PWR                          0xE
   2128#define WMI_PEER_PARAM_FIXED_RATE                       0xF
   2129#define WMI_PEER_SET_MU_WHITELIST                       0x10
   2130#define WMI_PEER_SET_MAX_TX_RATE                        0x11
   2131#define WMI_PEER_SET_MIN_TX_RATE                        0x12
   2132#define WMI_PEER_SET_DEFAULT_ROUTING                    0x13
   2133
   2134/* slot time long */
   2135#define WMI_VDEV_SLOT_TIME_LONG         0x1
   2136/* slot time short */
   2137#define WMI_VDEV_SLOT_TIME_SHORT        0x2
   2138/* preablbe long */
   2139#define WMI_VDEV_PREAMBLE_LONG          0x1
   2140/* preablbe short */
   2141#define WMI_VDEV_PREAMBLE_SHORT         0x2
   2142
   2143enum wmi_peer_smps_state {
   2144	WMI_PEER_SMPS_PS_NONE = 0x0,
   2145	WMI_PEER_SMPS_STATIC  = 0x1,
   2146	WMI_PEER_SMPS_DYNAMIC = 0x2
   2147};
   2148
   2149enum wmi_peer_chwidth {
   2150	WMI_PEER_CHWIDTH_20MHZ = 0,
   2151	WMI_PEER_CHWIDTH_40MHZ = 1,
   2152	WMI_PEER_CHWIDTH_80MHZ = 2,
   2153	WMI_PEER_CHWIDTH_160MHZ = 3,
   2154};
   2155
   2156enum wmi_beacon_gen_mode {
   2157	WMI_BEACON_STAGGERED_MODE = 0,
   2158	WMI_BEACON_BURST_MODE = 1
   2159};
   2160
   2161enum wmi_direct_buffer_module {
   2162	WMI_DIRECT_BUF_SPECTRAL = 0,
   2163	WMI_DIRECT_BUF_CFR = 1,
   2164
   2165	/* keep it last */
   2166	WMI_DIRECT_BUF_MAX
   2167};
   2168
   2169/* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext
   2170 *			event
   2171 * WMI_NSS_RATIO_1BY2_NSS -Max nss of 160MHz is equals to half of the max nss
   2172 *			   of 80MHz
   2173 * WMI_NSS_RATIO_3BY4_NSS - Max nss of 160MHz is equals to 3/4 of the max nss
   2174 *			    of 80MHz
   2175 * WMI_NSS_RATIO_1_NSS - Max nss of 160MHz is equals to the max nss of 80MHz
   2176 * WMI_NSS_RATIO_2_NSS - Max nss of 160MHz is equals to two times the max
   2177 *			 nss of 80MHz
   2178 */
   2179
   2180enum wmi_nss_ratio {
   2181	WMI_NSS_RATIO_1BY2_NSS = 0x0,
   2182	WMI_NSS_RATIO_3BY4_NSS = 0x1,
   2183	WMI_NSS_RATIO_1_NSS = 0x2,
   2184	WMI_NSS_RATIO_2_NSS = 0x3,
   2185};
   2186
   2187enum wmi_dtim_policy {
   2188	WMI_DTIM_POLICY_IGNORE = 1,
   2189	WMI_DTIM_POLICY_NORMAL = 2,
   2190	WMI_DTIM_POLICY_STICK  = 3,
   2191	WMI_DTIM_POLICY_AUTO   = 4,
   2192};
   2193
   2194struct wmi_host_pdev_band_to_mac {
   2195	u32 pdev_id;
   2196	u32 start_freq;
   2197	u32 end_freq;
   2198};
   2199
   2200struct ath11k_ppe_threshold {
   2201	u32 numss_m1;
   2202	u32 ru_bit_mask;
   2203	u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
   2204};
   2205
   2206struct ath11k_service_ext_param {
   2207	u32 default_conc_scan_config_bits;
   2208	u32 default_fw_config_bits;
   2209	struct ath11k_ppe_threshold ppet;
   2210	u32 he_cap_info;
   2211	u32 mpdu_density;
   2212	u32 max_bssid_rx_filters;
   2213	u32 num_hw_modes;
   2214	u32 num_phy;
   2215};
   2216
   2217struct ath11k_hw_mode_caps {
   2218	u32 hw_mode_id;
   2219	u32 phy_id_map;
   2220	u32 hw_mode_config_type;
   2221};
   2222
   2223#define PSOC_HOST_MAX_PHY_SIZE (3)
   2224#define ATH11K_11B_SUPPORT                 BIT(0)
   2225#define ATH11K_11G_SUPPORT                 BIT(1)
   2226#define ATH11K_11A_SUPPORT                 BIT(2)
   2227#define ATH11K_11N_SUPPORT                 BIT(3)
   2228#define ATH11K_11AC_SUPPORT                BIT(4)
   2229#define ATH11K_11AX_SUPPORT                BIT(5)
   2230
   2231struct ath11k_hal_reg_capabilities_ext {
   2232	u32 phy_id;
   2233	u32 eeprom_reg_domain;
   2234	u32 eeprom_reg_domain_ext;
   2235	u32 regcap1;
   2236	u32 regcap2;
   2237	u32 wireless_modes;
   2238	u32 low_2ghz_chan;
   2239	u32 high_2ghz_chan;
   2240	u32 low_5ghz_chan;
   2241	u32 high_5ghz_chan;
   2242};
   2243
   2244#define WMI_HOST_MAX_PDEV 3
   2245
   2246struct wlan_host_mem_chunk {
   2247	u32 tlv_header;
   2248	u32 req_id;
   2249	u32 ptr;
   2250	u32 size;
   2251} __packed;
   2252
   2253struct wmi_host_mem_chunk {
   2254	void *vaddr;
   2255	dma_addr_t paddr;
   2256	u32 len;
   2257	u32 req_id;
   2258};
   2259
   2260struct wmi_init_cmd_param {
   2261	u32 tlv_header;
   2262	struct target_resource_config *res_cfg;
   2263	u8 num_mem_chunks;
   2264	struct wmi_host_mem_chunk *mem_chunks;
   2265	u32 hw_mode_id;
   2266	u32 num_band_to_mac;
   2267	struct wmi_host_pdev_band_to_mac band_to_mac[WMI_HOST_MAX_PDEV];
   2268};
   2269
   2270struct wmi_pdev_band_to_mac {
   2271	u32 tlv_header;
   2272	u32 pdev_id;
   2273	u32 start_freq;
   2274	u32 end_freq;
   2275} __packed;
   2276
   2277struct wmi_pdev_set_hw_mode_cmd_param {
   2278	u32 tlv_header;
   2279	u32 pdev_id;
   2280	u32 hw_mode_index;
   2281	u32 num_band_to_mac;
   2282} __packed;
   2283
   2284struct wmi_ppe_threshold {
   2285	u32 numss_m1; /** NSS - 1*/
   2286	union {
   2287		u32 ru_count;
   2288		u32 ru_mask;
   2289	} __packed;
   2290	u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS];
   2291} __packed;
   2292
   2293#define HW_BD_INFO_SIZE       5
   2294
   2295struct wmi_abi_version {
   2296	u32 abi_version_0;
   2297	u32 abi_version_1;
   2298	u32 abi_version_ns_0;
   2299	u32 abi_version_ns_1;
   2300	u32 abi_version_ns_2;
   2301	u32 abi_version_ns_3;
   2302} __packed;
   2303
   2304struct wmi_init_cmd {
   2305	u32 tlv_header;
   2306	struct wmi_abi_version host_abi_vers;
   2307	u32 num_host_mem_chunks;
   2308} __packed;
   2309
   2310#define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
   2311
   2312struct wmi_resource_config {
   2313	u32 tlv_header;
   2314	u32 num_vdevs;
   2315	u32 num_peers;
   2316	u32 num_offload_peers;
   2317	u32 num_offload_reorder_buffs;
   2318	u32 num_peer_keys;
   2319	u32 num_tids;
   2320	u32 ast_skid_limit;
   2321	u32 tx_chain_mask;
   2322	u32 rx_chain_mask;
   2323	u32 rx_timeout_pri[4];
   2324	u32 rx_decap_mode;
   2325	u32 scan_max_pending_req;
   2326	u32 bmiss_offload_max_vdev;
   2327	u32 roam_offload_max_vdev;
   2328	u32 roam_offload_max_ap_profiles;
   2329	u32 num_mcast_groups;
   2330	u32 num_mcast_table_elems;
   2331	u32 mcast2ucast_mode;
   2332	u32 tx_dbg_log_size;
   2333	u32 num_wds_entries;
   2334	u32 dma_burst_size;
   2335	u32 mac_aggr_delim;
   2336	u32 rx_skip_defrag_timeout_dup_detection_check;
   2337	u32 vow_config;
   2338	u32 gtk_offload_max_vdev;
   2339	u32 num_msdu_desc;
   2340	u32 max_frag_entries;
   2341	u32 num_tdls_vdevs;
   2342	u32 num_tdls_conn_table_entries;
   2343	u32 beacon_tx_offload_max_vdev;
   2344	u32 num_multicast_filter_entries;
   2345	u32 num_wow_filters;
   2346	u32 num_keep_alive_pattern;
   2347	u32 keep_alive_pattern_size;
   2348	u32 max_tdls_concurrent_sleep_sta;
   2349	u32 max_tdls_concurrent_buffer_sta;
   2350	u32 wmi_send_separate;
   2351	u32 num_ocb_vdevs;
   2352	u32 num_ocb_channels;
   2353	u32 num_ocb_schedules;
   2354	u32 flag1;
   2355	u32 smart_ant_cap;
   2356	u32 bk_minfree;
   2357	u32 be_minfree;
   2358	u32 vi_minfree;
   2359	u32 vo_minfree;
   2360	u32 alloc_frag_desc_for_data_pkt;
   2361	u32 num_ns_ext_tuples_cfg;
   2362	u32 bpf_instruction_size;
   2363	u32 max_bssid_rx_filters;
   2364	u32 use_pdev_id;
   2365	u32 max_num_dbs_scan_duty_cycle;
   2366	u32 max_num_group_keys;
   2367	u32 peer_map_unmap_v2_support;
   2368	u32 sched_params;
   2369	u32 twt_ap_pdev_count;
   2370	u32 twt_ap_sta_count;
   2371} __packed;
   2372
   2373struct wmi_service_ready_event {
   2374	u32 fw_build_vers;
   2375	struct wmi_abi_version fw_abi_vers;
   2376	u32 phy_capability;
   2377	u32 max_frag_entry;
   2378	u32 num_rf_chains;
   2379	u32 ht_cap_info;
   2380	u32 vht_cap_info;
   2381	u32 vht_supp_mcs;
   2382	u32 hw_min_tx_power;
   2383	u32 hw_max_tx_power;
   2384	u32 sys_cap_info;
   2385	u32 min_pkt_size_enable;
   2386	u32 max_bcn_ie_size;
   2387	u32 num_mem_reqs;
   2388	u32 max_num_scan_channels;
   2389	u32 hw_bd_id;
   2390	u32 hw_bd_info[HW_BD_INFO_SIZE];
   2391	u32 max_supported_macs;
   2392	u32 wmi_fw_sub_feat_caps;
   2393	u32 num_dbs_hw_modes;
   2394	/* txrx_chainmask
   2395	 *    [7:0]   - 2G band tx chain mask
   2396	 *    [15:8]  - 2G band rx chain mask
   2397	 *    [23:16] - 5G band tx chain mask
   2398	 *    [31:24] - 5G band rx chain mask
   2399	 */
   2400	u32 txrx_chainmask;
   2401	u32 default_dbs_hw_mode_index;
   2402	u32 num_msdu_desc;
   2403} __packed;
   2404
   2405#define WMI_SERVICE_BM_SIZE	((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32))
   2406
   2407#define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */
   2408#define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32))
   2409#define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32
   2410#define WMI_SERVICE_BITS_IN_SIZE32 4
   2411
   2412struct wmi_service_ready_ext_event {
   2413	u32 default_conc_scan_config_bits;
   2414	u32 default_fw_config_bits;
   2415	struct wmi_ppe_threshold ppet;
   2416	u32 he_cap_info;
   2417	u32 mpdu_density;
   2418	u32 max_bssid_rx_filters;
   2419	u32 fw_build_vers_ext;
   2420	u32 max_nlo_ssids;
   2421	u32 max_bssid_indicator;
   2422	u32 he_cap_info_ext;
   2423} __packed;
   2424
   2425struct wmi_soc_mac_phy_hw_mode_caps {
   2426	u32 num_hw_modes;
   2427	u32 num_chainmask_tables;
   2428} __packed;
   2429
   2430struct wmi_hw_mode_capabilities {
   2431	u32 tlv_header;
   2432	u32 hw_mode_id;
   2433	u32 phy_id_map;
   2434	u32 hw_mode_config_type;
   2435} __packed;
   2436
   2437#define WMI_MAX_HECAP_PHY_SIZE                 (3)
   2438#define WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS    BIT(0)
   2439#define WMI_NSS_RATIO_ENABLE_DISABLE_GET(_val) \
   2440	FIELD_GET(WMI_NSS_RATIO_ENABLE_DISABLE_BITPOS, _val)
   2441#define WMI_NSS_RATIO_INFO_BITPOS              GENMASK(4, 1)
   2442#define WMI_NSS_RATIO_INFO_GET(_val) \
   2443	FIELD_GET(WMI_NSS_RATIO_INFO_BITPOS, _val)
   2444
   2445struct wmi_mac_phy_capabilities {
   2446	u32 hw_mode_id;
   2447	u32 pdev_id;
   2448	u32 phy_id;
   2449	u32 supported_flags;
   2450	u32 supported_bands;
   2451	u32 ampdu_density;
   2452	u32 max_bw_supported_2g;
   2453	u32 ht_cap_info_2g;
   2454	u32 vht_cap_info_2g;
   2455	u32 vht_supp_mcs_2g;
   2456	u32 he_cap_info_2g;
   2457	u32 he_supp_mcs_2g;
   2458	u32 tx_chain_mask_2g;
   2459	u32 rx_chain_mask_2g;
   2460	u32 max_bw_supported_5g;
   2461	u32 ht_cap_info_5g;
   2462	u32 vht_cap_info_5g;
   2463	u32 vht_supp_mcs_5g;
   2464	u32 he_cap_info_5g;
   2465	u32 he_supp_mcs_5g;
   2466	u32 tx_chain_mask_5g;
   2467	u32 rx_chain_mask_5g;
   2468	u32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE];
   2469	u32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE];
   2470	struct wmi_ppe_threshold he_ppet2g;
   2471	struct wmi_ppe_threshold he_ppet5g;
   2472	u32 chainmask_table_id;
   2473	u32 lmac_id;
   2474	u32 he_cap_info_2g_ext;
   2475	u32 he_cap_info_5g_ext;
   2476	u32 he_cap_info_internal;
   2477	u32 wireless_modes;
   2478	u32 low_2ghz_chan_freq;
   2479	u32 high_2ghz_chan_freq;
   2480	u32 low_5ghz_chan_freq;
   2481	u32 high_5ghz_chan_freq;
   2482	u32 nss_ratio;
   2483} __packed;
   2484
   2485struct wmi_hal_reg_capabilities_ext {
   2486	u32 tlv_header;
   2487	u32 phy_id;
   2488	u32 eeprom_reg_domain;
   2489	u32 eeprom_reg_domain_ext;
   2490	u32 regcap1;
   2491	u32 regcap2;
   2492	u32 wireless_modes;
   2493	u32 low_2ghz_chan;
   2494	u32 high_2ghz_chan;
   2495	u32 low_5ghz_chan;
   2496	u32 high_5ghz_chan;
   2497} __packed;
   2498
   2499struct wmi_soc_hal_reg_capabilities {
   2500	u32 num_phy;
   2501} __packed;
   2502
   2503/* 2 word representation of MAC addr */
   2504struct wmi_mac_addr {
   2505	union {
   2506		u8 addr[6];
   2507		struct {
   2508			u32 word0;
   2509			u32 word1;
   2510		} __packed;
   2511	} __packed;
   2512} __packed;
   2513
   2514struct wmi_dma_ring_capabilities {
   2515	u32 tlv_header;
   2516	u32 pdev_id;
   2517	u32 module_id;
   2518	u32 min_elem;
   2519	u32 min_buf_sz;
   2520	u32 min_buf_align;
   2521} __packed;
   2522
   2523struct wmi_ready_event_min {
   2524	struct wmi_abi_version fw_abi_vers;
   2525	struct wmi_mac_addr mac_addr;
   2526	u32 status;
   2527	u32 num_dscp_table;
   2528	u32 num_extra_mac_addr;
   2529	u32 num_total_peers;
   2530	u32 num_extra_peers;
   2531} __packed;
   2532
   2533struct wmi_ready_event {
   2534	struct wmi_ready_event_min ready_event_min;
   2535	u32 max_ast_index;
   2536	u32 pktlog_defs_checksum;
   2537} __packed;
   2538
   2539struct wmi_service_available_event {
   2540	u32 wmi_service_segment_offset;
   2541	u32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
   2542} __packed;
   2543
   2544struct ath11k_pdev_wmi {
   2545	struct ath11k_wmi_base *wmi_ab;
   2546	enum ath11k_htc_ep_id eid;
   2547	const struct wmi_peer_flags_map *peer_flags;
   2548	u32 rx_decap_mode;
   2549	wait_queue_head_t tx_ce_desc_wq;
   2550};
   2551
   2552struct vdev_create_params {
   2553	u8 if_id;
   2554	u32 type;
   2555	u32 subtype;
   2556	struct {
   2557		u8 tx;
   2558		u8 rx;
   2559	} chains[NUM_NL80211_BANDS];
   2560	u32 pdev_id;
   2561};
   2562
   2563struct wmi_vdev_create_cmd {
   2564	u32 tlv_header;
   2565	u32 vdev_id;
   2566	u32 vdev_type;
   2567	u32 vdev_subtype;
   2568	struct wmi_mac_addr vdev_macaddr;
   2569	u32 num_cfg_txrx_streams;
   2570	u32 pdev_id;
   2571} __packed;
   2572
   2573struct wmi_vdev_txrx_streams {
   2574	u32 tlv_header;
   2575	u32 band;
   2576	u32 supported_tx_streams;
   2577	u32 supported_rx_streams;
   2578} __packed;
   2579
   2580struct wmi_vdev_delete_cmd {
   2581	u32 tlv_header;
   2582	u32 vdev_id;
   2583} __packed;
   2584
   2585struct wmi_vdev_up_cmd {
   2586	u32 tlv_header;
   2587	u32 vdev_id;
   2588	u32 vdev_assoc_id;
   2589	struct wmi_mac_addr vdev_bssid;
   2590	struct wmi_mac_addr trans_bssid;
   2591	u32 profile_idx;
   2592	u32 profile_num;
   2593} __packed;
   2594
   2595struct wmi_vdev_stop_cmd {
   2596	u32 tlv_header;
   2597	u32 vdev_id;
   2598} __packed;
   2599
   2600struct wmi_vdev_down_cmd {
   2601	u32 tlv_header;
   2602	u32 vdev_id;
   2603} __packed;
   2604
   2605#define WMI_VDEV_START_HIDDEN_SSID  BIT(0)
   2606#define WMI_VDEV_START_PMF_ENABLED  BIT(1)
   2607#define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3)
   2608#define WMI_VDEV_START_HW_ENCRYPTION_DISABLED BIT(4)
   2609
   2610struct wmi_ssid {
   2611	u32 ssid_len;
   2612	u32 ssid[8];
   2613} __packed;
   2614
   2615#define ATH11K_VDEV_SETUP_TIMEOUT_HZ (1 * HZ)
   2616
   2617struct wmi_vdev_start_request_cmd {
   2618	u32 tlv_header;
   2619	u32 vdev_id;
   2620	u32 requestor_id;
   2621	u32 beacon_interval;
   2622	u32 dtim_period;
   2623	u32 flags;
   2624	struct wmi_ssid ssid;
   2625	u32 bcn_tx_rate;
   2626	u32 bcn_txpower;
   2627	u32 num_noa_descriptors;
   2628	u32 disable_hw_ack;
   2629	u32 preferred_tx_streams;
   2630	u32 preferred_rx_streams;
   2631	u32 he_ops;
   2632	u32 cac_duration_ms;
   2633	u32 regdomain;
   2634} __packed;
   2635
   2636#define MGMT_TX_DL_FRM_LEN		     64
   2637#define WMI_MAC_MAX_SSID_LENGTH              32
   2638struct mac_ssid {
   2639	u8 length;
   2640	u8 mac_ssid[WMI_MAC_MAX_SSID_LENGTH];
   2641} __packed;
   2642
   2643struct wmi_p2p_noa_descriptor {
   2644	u32 type_count;
   2645	u32 duration;
   2646	u32 interval;
   2647	u32 start_time;
   2648};
   2649
   2650struct channel_param {
   2651	u8 chan_id;
   2652	u8 pwr;
   2653	u32 mhz;
   2654	u32 half_rate:1,
   2655	    quarter_rate:1,
   2656	    dfs_set:1,
   2657	    dfs_set_cfreq2:1,
   2658	    is_chan_passive:1,
   2659	    allow_ht:1,
   2660	    allow_vht:1,
   2661	    allow_he:1,
   2662	    set_agile:1,
   2663	    psc_channel:1;
   2664	u32 phy_mode;
   2665	u32 cfreq1;
   2666	u32 cfreq2;
   2667	char   maxpower;
   2668	char   minpower;
   2669	char   maxregpower;
   2670	u8  antennamax;
   2671	u8  reg_class_id;
   2672} __packed;
   2673
   2674enum wmi_phy_mode {
   2675	MODE_11A        = 0,
   2676	MODE_11G        = 1,   /* 11b/g Mode */
   2677	MODE_11B        = 2,   /* 11b Mode */
   2678	MODE_11GONLY    = 3,   /* 11g only Mode */
   2679	MODE_11NA_HT20   = 4,
   2680	MODE_11NG_HT20   = 5,
   2681	MODE_11NA_HT40   = 6,
   2682	MODE_11NG_HT40   = 7,
   2683	MODE_11AC_VHT20 = 8,
   2684	MODE_11AC_VHT40 = 9,
   2685	MODE_11AC_VHT80 = 10,
   2686	MODE_11AC_VHT20_2G = 11,
   2687	MODE_11AC_VHT40_2G = 12,
   2688	MODE_11AC_VHT80_2G = 13,
   2689	MODE_11AC_VHT80_80 = 14,
   2690	MODE_11AC_VHT160 = 15,
   2691	MODE_11AX_HE20 = 16,
   2692	MODE_11AX_HE40 = 17,
   2693	MODE_11AX_HE80 = 18,
   2694	MODE_11AX_HE80_80 = 19,
   2695	MODE_11AX_HE160 = 20,
   2696	MODE_11AX_HE20_2G = 21,
   2697	MODE_11AX_HE40_2G = 22,
   2698	MODE_11AX_HE80_2G = 23,
   2699	MODE_UNKNOWN = 24,
   2700	MODE_MAX = 24
   2701};
   2702
   2703static inline const char *ath11k_wmi_phymode_str(enum wmi_phy_mode mode)
   2704{
   2705	switch (mode) {
   2706	case MODE_11A:
   2707		return "11a";
   2708	case MODE_11G:
   2709		return "11g";
   2710	case MODE_11B:
   2711		return "11b";
   2712	case MODE_11GONLY:
   2713		return "11gonly";
   2714	case MODE_11NA_HT20:
   2715		return "11na-ht20";
   2716	case MODE_11NG_HT20:
   2717		return "11ng-ht20";
   2718	case MODE_11NA_HT40:
   2719		return "11na-ht40";
   2720	case MODE_11NG_HT40:
   2721		return "11ng-ht40";
   2722	case MODE_11AC_VHT20:
   2723		return "11ac-vht20";
   2724	case MODE_11AC_VHT40:
   2725		return "11ac-vht40";
   2726	case MODE_11AC_VHT80:
   2727		return "11ac-vht80";
   2728	case MODE_11AC_VHT160:
   2729		return "11ac-vht160";
   2730	case MODE_11AC_VHT80_80:
   2731		return "11ac-vht80+80";
   2732	case MODE_11AC_VHT20_2G:
   2733		return "11ac-vht20-2g";
   2734	case MODE_11AC_VHT40_2G:
   2735		return "11ac-vht40-2g";
   2736	case MODE_11AC_VHT80_2G:
   2737		return "11ac-vht80-2g";
   2738	case MODE_11AX_HE20:
   2739		return "11ax-he20";
   2740	case MODE_11AX_HE40:
   2741		return "11ax-he40";
   2742	case MODE_11AX_HE80:
   2743		return "11ax-he80";
   2744	case MODE_11AX_HE80_80:
   2745		return "11ax-he80+80";
   2746	case MODE_11AX_HE160:
   2747		return "11ax-he160";
   2748	case MODE_11AX_HE20_2G:
   2749		return "11ax-he20-2g";
   2750	case MODE_11AX_HE40_2G:
   2751		return "11ax-he40-2g";
   2752	case MODE_11AX_HE80_2G:
   2753		return "11ax-he80-2g";
   2754	case MODE_UNKNOWN:
   2755		/* skip */
   2756		break;
   2757
   2758		/* no default handler to allow compiler to check that the
   2759		 * enum is fully handled
   2760		 */
   2761	}
   2762
   2763	return "<unknown>";
   2764}
   2765
   2766struct wmi_channel_arg {
   2767	u32 freq;
   2768	u32 band_center_freq1;
   2769	u32 band_center_freq2;
   2770	bool passive;
   2771	bool allow_ibss;
   2772	bool allow_ht;
   2773	bool allow_vht;
   2774	bool ht40plus;
   2775	bool chan_radar;
   2776	bool freq2_radar;
   2777	bool allow_he;
   2778	u32 min_power;
   2779	u32 max_power;
   2780	u32 max_reg_power;
   2781	u32 max_antenna_gain;
   2782	enum wmi_phy_mode mode;
   2783};
   2784
   2785struct wmi_vdev_start_req_arg {
   2786	u32 vdev_id;
   2787	struct wmi_channel_arg channel;
   2788	u32 bcn_intval;
   2789	u32 dtim_period;
   2790	u8 *ssid;
   2791	u32 ssid_len;
   2792	u32 bcn_tx_rate;
   2793	u32 bcn_tx_power;
   2794	bool disable_hw_ack;
   2795	bool hidden_ssid;
   2796	bool pmf_enabled;
   2797	u32 he_ops;
   2798	u32 cac_duration_ms;
   2799	u32 regdomain;
   2800	u32 pref_rx_streams;
   2801	u32 pref_tx_streams;
   2802	u32 num_noa_descriptors;
   2803};
   2804
   2805struct peer_create_params {
   2806	const u8 *peer_addr;
   2807	u32 peer_type;
   2808	u32 vdev_id;
   2809};
   2810
   2811struct peer_delete_params {
   2812	u8 vdev_id;
   2813};
   2814
   2815struct peer_flush_params {
   2816	u32 peer_tid_bitmap;
   2817	u8 vdev_id;
   2818};
   2819
   2820struct pdev_set_regdomain_params {
   2821	u16 current_rd_in_use;
   2822	u16 current_rd_2g;
   2823	u16 current_rd_5g;
   2824	u32 ctl_2g;
   2825	u32 ctl_5g;
   2826	u8 dfs_domain;
   2827	u32 pdev_id;
   2828};
   2829
   2830struct rx_reorder_queue_remove_params {
   2831	u8 *peer_macaddr;
   2832	u16 vdev_id;
   2833	u32 peer_tid_bitmap;
   2834};
   2835
   2836#define WMI_HOST_PDEV_ID_SOC 0xFF
   2837#define WMI_HOST_PDEV_ID_0   0
   2838#define WMI_HOST_PDEV_ID_1   1
   2839#define WMI_HOST_PDEV_ID_2   2
   2840
   2841#define WMI_PDEV_ID_SOC         0
   2842#define WMI_PDEV_ID_1ST         1
   2843#define WMI_PDEV_ID_2ND         2
   2844#define WMI_PDEV_ID_3RD         3
   2845
   2846/* Freq units in MHz */
   2847#define REG_RULE_START_FREQ			0x0000ffff
   2848#define REG_RULE_END_FREQ			0xffff0000
   2849#define REG_RULE_FLAGS				0x0000ffff
   2850#define REG_RULE_MAX_BW				0x0000ffff
   2851#define REG_RULE_REG_PWR			0x00ff0000
   2852#define REG_RULE_ANT_GAIN			0xff000000
   2853
   2854#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
   2855#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
   2856#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
   2857#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
   2858
   2859#define HECAP_PHYDWORD_0	0
   2860#define HECAP_PHYDWORD_1	1
   2861#define HECAP_PHYDWORD_2	2
   2862
   2863#define HECAP_PHY_SU_BFER		BIT(31)
   2864#define HECAP_PHY_SU_BFEE		BIT(0)
   2865#define HECAP_PHY_MU_BFER		BIT(1)
   2866#define HECAP_PHY_UL_MUMIMO		BIT(22)
   2867#define HECAP_PHY_UL_MUOFDMA		BIT(23)
   2868
   2869#define HECAP_PHY_SUBFMR_GET(hecap_phy) \
   2870	FIELD_GET(HECAP_PHY_SU_BFER, hecap_phy[HECAP_PHYDWORD_0])
   2871
   2872#define HECAP_PHY_SUBFME_GET(hecap_phy) \
   2873	FIELD_GET(HECAP_PHY_SU_BFEE, hecap_phy[HECAP_PHYDWORD_1])
   2874
   2875#define HECAP_PHY_MUBFMR_GET(hecap_phy) \
   2876	FIELD_GET(HECAP_PHY_MU_BFER, hecap_phy[HECAP_PHYDWORD_1])
   2877
   2878#define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
   2879	FIELD_GET(HECAP_PHY_UL_MUMIMO, hecap_phy[HECAP_PHYDWORD_0])
   2880
   2881#define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
   2882	FIELD_GET(HECAP_PHY_UL_MUOFDMA, hecap_phy[HECAP_PHYDWORD_0])
   2883
   2884#define HE_MODE_SU_TX_BFEE	BIT(0)
   2885#define HE_MODE_SU_TX_BFER	BIT(1)
   2886#define HE_MODE_MU_TX_BFEE	BIT(2)
   2887#define HE_MODE_MU_TX_BFER	BIT(3)
   2888#define HE_MODE_DL_OFDMA	BIT(4)
   2889#define HE_MODE_UL_OFDMA	BIT(5)
   2890#define HE_MODE_UL_MUMIMO	BIT(6)
   2891
   2892#define HE_DL_MUOFDMA_ENABLE	1
   2893#define HE_UL_MUOFDMA_ENABLE	1
   2894#define HE_DL_MUMIMO_ENABLE	1
   2895#define HE_MU_BFEE_ENABLE	1
   2896#define HE_SU_BFEE_ENABLE	1
   2897
   2898#define HE_VHT_SOUNDING_MODE_ENABLE		1
   2899#define HE_SU_MU_SOUNDING_MODE_ENABLE		1
   2900#define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE	1
   2901
   2902/* HE or VHT Sounding */
   2903#define HE_VHT_SOUNDING_MODE		BIT(0)
   2904/* SU or MU Sounding */
   2905#define HE_SU_MU_SOUNDING_MODE		BIT(2)
   2906/* Trig or Non-Trig Sounding */
   2907#define HE_TRIG_NONTRIG_SOUNDING_MODE	BIT(3)
   2908
   2909#define WMI_TXBF_STS_CAP_OFFSET_LSB	4
   2910#define WMI_TXBF_STS_CAP_OFFSET_MASK	0x70
   2911#define WMI_BF_SOUND_DIM_OFFSET_LSB	8
   2912#define WMI_BF_SOUND_DIM_OFFSET_MASK	0x700
   2913
   2914struct pdev_params {
   2915	u32 param_id;
   2916	u32 param_value;
   2917};
   2918
   2919enum wmi_peer_type {
   2920	WMI_PEER_TYPE_DEFAULT = 0,
   2921	WMI_PEER_TYPE_BSS = 1,
   2922	WMI_PEER_TYPE_TDLS = 2,
   2923};
   2924
   2925struct wmi_peer_create_cmd {
   2926	u32 tlv_header;
   2927	u32 vdev_id;
   2928	struct wmi_mac_addr peer_macaddr;
   2929	u32 peer_type;
   2930} __packed;
   2931
   2932struct wmi_peer_delete_cmd {
   2933	u32 tlv_header;
   2934	u32 vdev_id;
   2935	struct wmi_mac_addr peer_macaddr;
   2936} __packed;
   2937
   2938struct wmi_peer_reorder_queue_setup_cmd {
   2939	u32 tlv_header;
   2940	u32 vdev_id;
   2941	struct wmi_mac_addr peer_macaddr;
   2942	u32 tid;
   2943	u32 queue_ptr_lo;
   2944	u32 queue_ptr_hi;
   2945	u32 queue_no;
   2946	u32 ba_window_size_valid;
   2947	u32 ba_window_size;
   2948} __packed;
   2949
   2950struct wmi_peer_reorder_queue_remove_cmd {
   2951	u32 tlv_header;
   2952	u32 vdev_id;
   2953	struct wmi_mac_addr peer_macaddr;
   2954	u32 tid_mask;
   2955} __packed;
   2956
   2957struct gpio_config_params {
   2958	u32 gpio_num;
   2959	u32 input;
   2960	u32 pull_type;
   2961	u32 intr_mode;
   2962};
   2963
   2964enum wmi_gpio_type {
   2965	WMI_GPIO_PULL_NONE,
   2966	WMI_GPIO_PULL_UP,
   2967	WMI_GPIO_PULL_DOWN
   2968};
   2969
   2970enum wmi_gpio_intr_type {
   2971	WMI_GPIO_INTTYPE_DISABLE,
   2972	WMI_GPIO_INTTYPE_RISING_EDGE,
   2973	WMI_GPIO_INTTYPE_FALLING_EDGE,
   2974	WMI_GPIO_INTTYPE_BOTH_EDGE,
   2975	WMI_GPIO_INTTYPE_LEVEL_LOW,
   2976	WMI_GPIO_INTTYPE_LEVEL_HIGH
   2977};
   2978
   2979enum wmi_bss_chan_info_req_type {
   2980	WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
   2981	WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
   2982};
   2983
   2984struct wmi_gpio_config_cmd_param {
   2985	u32 tlv_header;
   2986	u32 gpio_num;
   2987	u32 input;
   2988	u32 pull_type;
   2989	u32 intr_mode;
   2990};
   2991
   2992struct gpio_output_params {
   2993	u32 gpio_num;
   2994	u32 set;
   2995};
   2996
   2997struct wmi_gpio_output_cmd_param {
   2998	u32 tlv_header;
   2999	u32 gpio_num;
   3000	u32 set;
   3001};
   3002
   3003struct set_fwtest_params {
   3004	u32 arg;
   3005	u32 value;
   3006};
   3007
   3008struct wmi_fwtest_set_param_cmd_param {
   3009	u32 tlv_header;
   3010	u32 param_id;
   3011	u32 param_value;
   3012};
   3013
   3014struct wmi_pdev_set_param_cmd {
   3015	u32 tlv_header;
   3016	u32 pdev_id;
   3017	u32 param_id;
   3018	u32 param_value;
   3019} __packed;
   3020
   3021struct wmi_pdev_set_ps_mode_cmd {
   3022	u32 tlv_header;
   3023	u32 vdev_id;
   3024	u32 sta_ps_mode;
   3025} __packed;
   3026
   3027struct wmi_pdev_suspend_cmd {
   3028	u32 tlv_header;
   3029	u32 pdev_id;
   3030	u32 suspend_opt;
   3031} __packed;
   3032
   3033struct wmi_pdev_resume_cmd {
   3034	u32 tlv_header;
   3035	u32 pdev_id;
   3036} __packed;
   3037
   3038struct wmi_pdev_bss_chan_info_req_cmd {
   3039	u32 tlv_header;
   3040	/* ref wmi_bss_chan_info_req_type */
   3041	u32 req_type;
   3042	u32 pdev_id;
   3043} __packed;
   3044
   3045struct wmi_ap_ps_peer_cmd {
   3046	u32 tlv_header;
   3047	u32 vdev_id;
   3048	struct wmi_mac_addr peer_macaddr;
   3049	u32 param;
   3050	u32 value;
   3051} __packed;
   3052
   3053struct wmi_sta_powersave_param_cmd {
   3054	u32 tlv_header;
   3055	u32 vdev_id;
   3056	u32 param;
   3057	u32 value;
   3058} __packed;
   3059
   3060struct wmi_pdev_set_regdomain_cmd {
   3061	u32 tlv_header;
   3062	u32 pdev_id;
   3063	u32 reg_domain;
   3064	u32 reg_domain_2g;
   3065	u32 reg_domain_5g;
   3066	u32 conformance_test_limit_2g;
   3067	u32 conformance_test_limit_5g;
   3068	u32 dfs_domain;
   3069} __packed;
   3070
   3071struct wmi_peer_set_param_cmd {
   3072	u32 tlv_header;
   3073	u32 vdev_id;
   3074	struct wmi_mac_addr peer_macaddr;
   3075	u32 param_id;
   3076	u32 param_value;
   3077} __packed;
   3078
   3079struct wmi_peer_flush_tids_cmd {
   3080	u32 tlv_header;
   3081	u32 vdev_id;
   3082	struct wmi_mac_addr peer_macaddr;
   3083	u32 peer_tid_bitmap;
   3084} __packed;
   3085
   3086struct wmi_dfs_phyerr_offload_cmd {
   3087	u32 tlv_header;
   3088	u32 pdev_id;
   3089} __packed;
   3090
   3091struct wmi_bcn_offload_ctrl_cmd {
   3092	u32 tlv_header;
   3093	u32 vdev_id;
   3094	u32 bcn_ctrl_op;
   3095} __packed;
   3096
   3097enum scan_dwelltime_adaptive_mode {
   3098	SCAN_DWELL_MODE_DEFAULT = 0,
   3099	SCAN_DWELL_MODE_CONSERVATIVE = 1,
   3100	SCAN_DWELL_MODE_MODERATE = 2,
   3101	SCAN_DWELL_MODE_AGGRESSIVE = 3,
   3102	SCAN_DWELL_MODE_STATIC = 4
   3103};
   3104
   3105#define WLAN_SSID_MAX_LEN 32
   3106
   3107struct element_info {
   3108	u32 len;
   3109	u8 *ptr;
   3110};
   3111
   3112struct wlan_ssid {
   3113	u8 length;
   3114	u8 ssid[WLAN_SSID_MAX_LEN];
   3115};
   3116
   3117#define WMI_IE_BITMAP_SIZE             8
   3118
   3119/* prefix used by scan requestor ids on the host */
   3120#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
   3121
   3122/* prefix used by scan request ids generated on the host */
   3123/* host cycles through the lower 12 bits to generate ids */
   3124#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
   3125
   3126/* Values lower than this may be refused by some firmware revisions with a scan
   3127 * completion with a timedout reason.
   3128 */
   3129#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
   3130
   3131/* Scan priority numbers must be sequential, starting with 0 */
   3132enum wmi_scan_priority {
   3133	WMI_SCAN_PRIORITY_VERY_LOW = 0,
   3134	WMI_SCAN_PRIORITY_LOW,
   3135	WMI_SCAN_PRIORITY_MEDIUM,
   3136	WMI_SCAN_PRIORITY_HIGH,
   3137	WMI_SCAN_PRIORITY_VERY_HIGH,
   3138	WMI_SCAN_PRIORITY_COUNT   /* number of priorities supported */
   3139};
   3140
   3141enum wmi_scan_event_type {
   3142	WMI_SCAN_EVENT_STARTED              = BIT(0),
   3143	WMI_SCAN_EVENT_COMPLETED            = BIT(1),
   3144	WMI_SCAN_EVENT_BSS_CHANNEL          = BIT(2),
   3145	WMI_SCAN_EVENT_FOREIGN_CHAN         = BIT(3),
   3146	WMI_SCAN_EVENT_DEQUEUED             = BIT(4),
   3147	/* possibly by high-prio scan */
   3148	WMI_SCAN_EVENT_PREEMPTED            = BIT(5),
   3149	WMI_SCAN_EVENT_START_FAILED         = BIT(6),
   3150	WMI_SCAN_EVENT_RESTARTED            = BIT(7),
   3151	WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT    = BIT(8),
   3152	WMI_SCAN_EVENT_SUSPENDED            = BIT(9),
   3153	WMI_SCAN_EVENT_RESUMED              = BIT(10),
   3154	WMI_SCAN_EVENT_MAX                  = BIT(15),
   3155};
   3156
   3157enum wmi_scan_completion_reason {
   3158	WMI_SCAN_REASON_COMPLETED,
   3159	WMI_SCAN_REASON_CANCELLED,
   3160	WMI_SCAN_REASON_PREEMPTED,
   3161	WMI_SCAN_REASON_TIMEDOUT,
   3162	WMI_SCAN_REASON_INTERNAL_FAILURE,
   3163	WMI_SCAN_REASON_MAX,
   3164};
   3165
   3166struct  wmi_start_scan_cmd {
   3167	u32 tlv_header;
   3168	u32 scan_id;
   3169	u32 scan_req_id;
   3170	u32 vdev_id;
   3171	u32 scan_priority;
   3172	u32 notify_scan_events;
   3173	u32 dwell_time_active;
   3174	u32 dwell_time_passive;
   3175	u32 min_rest_time;
   3176	u32 max_rest_time;
   3177	u32 repeat_probe_time;
   3178	u32 probe_spacing_time;
   3179	u32 idle_time;
   3180	u32 max_scan_time;
   3181	u32 probe_delay;
   3182	u32 scan_ctrl_flags;
   3183	u32 burst_duration;
   3184	u32 num_chan;
   3185	u32 num_bssid;
   3186	u32 num_ssids;
   3187	u32 ie_len;
   3188	u32 n_probes;
   3189	struct wmi_mac_addr mac_addr;
   3190	struct wmi_mac_addr mac_mask;
   3191	u32 ie_bitmap[WMI_IE_BITMAP_SIZE];
   3192	u32 num_vendor_oui;
   3193	u32 scan_ctrl_flags_ext;
   3194	u32 dwell_time_active_2g;
   3195	u32 dwell_time_active_6g;
   3196	u32 dwell_time_passive_6g;
   3197	u32 scan_start_offset;
   3198} __packed;
   3199
   3200#define WMI_SCAN_FLAG_PASSIVE        0x1
   3201#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
   3202#define WMI_SCAN_ADD_CCK_RATES       0x4
   3203#define WMI_SCAN_ADD_OFDM_RATES      0x8
   3204#define WMI_SCAN_CHAN_STAT_EVENT     0x10
   3205#define WMI_SCAN_FILTER_PROBE_REQ    0x20
   3206#define WMI_SCAN_BYPASS_DFS_CHN      0x40
   3207#define WMI_SCAN_CONTINUE_ON_ERROR   0x80
   3208#define WMI_SCAN_FILTER_PROMISCUOS   0x100
   3209#define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200
   3210#define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ  0x400
   3211#define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ   0x800
   3212#define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ   0x1000
   3213#define WMI_SCAN_OFFCHAN_MGMT_TX    0x2000
   3214#define WMI_SCAN_OFFCHAN_DATA_TX    0x4000
   3215#define WMI_SCAN_CAPTURE_PHY_ERROR  0x8000
   3216#define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000
   3217#define WMI_SCAN_FLAG_HALF_RATE_SUPPORT      0x20000
   3218#define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT   0x40000
   3219#define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000
   3220#define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000
   3221
   3222#define WMI_SCAN_DWELL_MODE_MASK 0x00E00000
   3223#define WMI_SCAN_DWELL_MODE_SHIFT        21
   3224
   3225enum {
   3226	WMI_SCAN_DWELL_MODE_DEFAULT      = 0,
   3227	WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1,
   3228	WMI_SCAN_DWELL_MODE_MODERATE     = 2,
   3229	WMI_SCAN_DWELL_MODE_AGGRESSIVE   = 3,
   3230	WMI_SCAN_DWELL_MODE_STATIC       = 4,
   3231};
   3232
   3233#define WMI_SCAN_SET_DWELL_MODE(flag, mode) \
   3234	((flag) |= (((mode) << WMI_SCAN_DWELL_MODE_SHIFT) & \
   3235		    WMI_SCAN_DWELL_MODE_MASK))
   3236
   3237struct hint_short_ssid {
   3238	u32 freq_flags;
   3239	u32 short_ssid;
   3240};
   3241
   3242struct hint_bssid {
   3243	u32 freq_flags;
   3244	struct wmi_mac_addr bssid;
   3245};
   3246
   3247struct scan_req_params {
   3248	u32 scan_id;
   3249	u32 scan_req_id;
   3250	u32 vdev_id;
   3251	u32 pdev_id;
   3252	enum wmi_scan_priority scan_priority;
   3253	union {
   3254		struct {
   3255			u32 scan_ev_started:1,
   3256			    scan_ev_completed:1,
   3257			    scan_ev_bss_chan:1,
   3258			    scan_ev_foreign_chan:1,
   3259			    scan_ev_dequeued:1,
   3260			    scan_ev_preempted:1,
   3261			    scan_ev_start_failed:1,
   3262			    scan_ev_restarted:1,
   3263			    scan_ev_foreign_chn_exit:1,
   3264			    scan_ev_invalid:1,
   3265			    scan_ev_gpio_timeout:1,
   3266			    scan_ev_suspended:1,
   3267			    scan_ev_resumed:1;
   3268		};
   3269		u32 scan_events;
   3270	};
   3271	u32 dwell_time_active;
   3272	u32 dwell_time_active_2g;
   3273	u32 dwell_time_passive;
   3274	u32 dwell_time_active_6g;
   3275	u32 dwell_time_passive_6g;
   3276	u32 min_rest_time;
   3277	u32 max_rest_time;
   3278	u32 repeat_probe_time;
   3279	u32 probe_spacing_time;
   3280	u32 idle_time;
   3281	u32 max_scan_time;
   3282	u32 probe_delay;
   3283	union {
   3284		struct {
   3285			u32 scan_f_passive:1,
   3286			    scan_f_bcast_probe:1,
   3287			    scan_f_cck_rates:1,
   3288			    scan_f_ofdm_rates:1,
   3289			    scan_f_chan_stat_evnt:1,
   3290			    scan_f_filter_prb_req:1,
   3291			    scan_f_bypass_dfs_chn:1,
   3292			    scan_f_continue_on_err:1,
   3293			    scan_f_offchan_mgmt_tx:1,
   3294			    scan_f_offchan_data_tx:1,
   3295			    scan_f_promisc_mode:1,
   3296			    scan_f_capture_phy_err:1,
   3297			    scan_f_strict_passive_pch:1,
   3298			    scan_f_half_rate:1,
   3299			    scan_f_quarter_rate:1,
   3300			    scan_f_force_active_dfs_chn:1,
   3301			    scan_f_add_tpc_ie_in_probe:1,
   3302			    scan_f_add_ds_ie_in_probe:1,
   3303			    scan_f_add_spoofed_mac_in_probe:1,
   3304			    scan_f_add_rand_seq_in_probe:1,
   3305			    scan_f_en_ie_whitelist_in_probe:1,
   3306			    scan_f_forced:1,
   3307			    scan_f_2ghz:1,
   3308			    scan_f_5ghz:1,
   3309			    scan_f_80mhz:1;
   3310		};
   3311		u32 scan_flags;
   3312	};
   3313	enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode;
   3314	u32 burst_duration;
   3315	u32 num_chan;
   3316	u32 num_bssid;
   3317	u32 num_ssids;
   3318	u32 n_probes;
   3319	u32 *chan_list;
   3320	u32 notify_scan_events;
   3321	struct wlan_ssid ssid[WLAN_SCAN_PARAMS_MAX_SSID];
   3322	struct wmi_mac_addr bssid_list[WLAN_SCAN_PARAMS_MAX_BSSID];
   3323	struct element_info extraie;
   3324	struct element_info htcap;
   3325	struct element_info vhtcap;
   3326	u32 num_hint_s_ssid;
   3327	u32 num_hint_bssid;
   3328	struct hint_short_ssid hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID];
   3329	struct hint_bssid hint_bssid[WLAN_SCAN_MAX_HINT_BSSID];
   3330	struct wmi_mac_addr mac_addr;
   3331	struct wmi_mac_addr mac_mask;
   3332};
   3333
   3334struct wmi_ssid_arg {
   3335	int len;
   3336	const u8 *ssid;
   3337};
   3338
   3339struct wmi_bssid_arg {
   3340	const u8 *bssid;
   3341};
   3342
   3343struct wmi_start_scan_arg {
   3344	u32 scan_id;
   3345	u32 scan_req_id;
   3346	u32 vdev_id;
   3347	u32 scan_priority;
   3348	u32 notify_scan_events;
   3349	u32 dwell_time_active;
   3350	u32 dwell_time_passive;
   3351	u32 min_rest_time;
   3352	u32 max_rest_time;
   3353	u32 repeat_probe_time;
   3354	u32 probe_spacing_time;
   3355	u32 idle_time;
   3356	u32 max_scan_time;
   3357	u32 probe_delay;
   3358	u32 scan_ctrl_flags;
   3359
   3360	u32 ie_len;
   3361	u32 n_channels;
   3362	u32 n_ssids;
   3363	u32 n_bssids;
   3364
   3365	u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
   3366	u32 channels[64];
   3367	struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
   3368	struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
   3369};
   3370
   3371#define WMI_SCAN_STOP_ONE       0x00000000
   3372#define WMI_SCN_STOP_VAP_ALL    0x01000000
   3373#define WMI_SCAN_STOP_ALL       0x04000000
   3374
   3375/* Prefix 0xA000 indicates that the scan request
   3376 * is trigger by HOST
   3377 */
   3378#define ATH11K_SCAN_ID          0xA000
   3379
   3380enum scan_cancel_req_type {
   3381	WLAN_SCAN_CANCEL_SINGLE = 1,
   3382	WLAN_SCAN_CANCEL_VDEV_ALL,
   3383	WLAN_SCAN_CANCEL_PDEV_ALL,
   3384};
   3385
   3386struct scan_cancel_param {
   3387	u32 requester;
   3388	u32 scan_id;
   3389	enum scan_cancel_req_type req_type;
   3390	u32 vdev_id;
   3391	u32 pdev_id;
   3392};
   3393
   3394struct  wmi_bcn_send_from_host_cmd {
   3395	u32 tlv_header;
   3396	u32 vdev_id;
   3397	u32 data_len;
   3398	union {
   3399		u32 frag_ptr;
   3400		u32 frag_ptr_lo;
   3401	};
   3402	u32 frame_ctrl;
   3403	u32 dtim_flag;
   3404	u32 bcn_antenna;
   3405	u32 frag_ptr_hi;
   3406};
   3407
   3408#define WMI_CHAN_INFO_MODE		GENMASK(5, 0)
   3409#define WMI_CHAN_INFO_HT40_PLUS		BIT(6)
   3410#define WMI_CHAN_INFO_PASSIVE		BIT(7)
   3411#define WMI_CHAN_INFO_ADHOC_ALLOWED	BIT(8)
   3412#define WMI_CHAN_INFO_AP_DISABLED	BIT(9)
   3413#define WMI_CHAN_INFO_DFS		BIT(10)
   3414#define WMI_CHAN_INFO_ALLOW_HT		BIT(11)
   3415#define WMI_CHAN_INFO_ALLOW_VHT		BIT(12)
   3416#define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA	BIT(13)
   3417#define WMI_CHAN_INFO_HALF_RATE		BIT(14)
   3418#define WMI_CHAN_INFO_QUARTER_RATE	BIT(15)
   3419#define WMI_CHAN_INFO_DFS_FREQ2		BIT(16)
   3420#define WMI_CHAN_INFO_ALLOW_HE		BIT(17)
   3421#define WMI_CHAN_INFO_PSC		BIT(18)
   3422
   3423#define WMI_CHAN_REG_INFO1_MIN_PWR	GENMASK(7, 0)
   3424#define WMI_CHAN_REG_INFO1_MAX_PWR	GENMASK(15, 8)
   3425#define WMI_CHAN_REG_INFO1_MAX_REG_PWR	GENMASK(23, 16)
   3426#define WMI_CHAN_REG_INFO1_REG_CLS	GENMASK(31, 24)
   3427
   3428#define WMI_CHAN_REG_INFO2_ANT_MAX	GENMASK(7, 0)
   3429#define WMI_CHAN_REG_INFO2_MAX_TX_PWR	GENMASK(15, 8)
   3430
   3431struct wmi_channel {
   3432	u32 tlv_header;
   3433	u32 mhz;
   3434	u32 band_center_freq1;
   3435	u32 band_center_freq2;
   3436	u32 info;
   3437	u32 reg_info_1;
   3438	u32 reg_info_2;
   3439} __packed;
   3440
   3441struct wmi_mgmt_params {
   3442	void *tx_frame;
   3443	u16 frm_len;
   3444	u8 vdev_id;
   3445	u16 chanfreq;
   3446	void *pdata;
   3447	u16 desc_id;
   3448	u8 *macaddr;
   3449};
   3450
   3451enum wmi_sta_ps_mode {
   3452	WMI_STA_PS_MODE_DISABLED = 0,
   3453	WMI_STA_PS_MODE_ENABLED = 1,
   3454};
   3455
   3456#define WMI_SMPS_MASK_LOWER_16BITS 0xFF
   3457#define WMI_SMPS_MASK_UPPER_3BITS 0x7
   3458#define WMI_SMPS_PARAM_VALUE_SHIFT 29
   3459
   3460#define ATH11K_WMI_FW_HANG_ASSERT_TYPE 1
   3461#define ATH11K_WMI_FW_HANG_DELAY 0
   3462
   3463/* type, 0:unused 1: ASSERT 2: not respond detect command
   3464 * delay_time_ms, the simulate will delay time
   3465 */
   3466
   3467struct wmi_force_fw_hang_cmd {
   3468	u32 tlv_header;
   3469	u32 type;
   3470	u32 delay_time_ms;
   3471};
   3472
   3473struct wmi_vdev_set_param_cmd {
   3474	u32 tlv_header;
   3475	u32 vdev_id;
   3476	u32 param_id;
   3477	u32 param_value;
   3478} __packed;
   3479
   3480enum wmi_stats_id {
   3481	WMI_REQUEST_PEER_STAT			= BIT(0),
   3482	WMI_REQUEST_AP_STAT			= BIT(1),
   3483	WMI_REQUEST_PDEV_STAT			= BIT(2),
   3484	WMI_REQUEST_VDEV_STAT			= BIT(3),
   3485	WMI_REQUEST_BCNFLT_STAT			= BIT(4),
   3486	WMI_REQUEST_VDEV_RATE_STAT		= BIT(5),
   3487	WMI_REQUEST_INST_STAT			= BIT(6),
   3488	WMI_REQUEST_MIB_STAT			= BIT(7),
   3489	WMI_REQUEST_RSSI_PER_CHAIN_STAT		= BIT(8),
   3490	WMI_REQUEST_CONGESTION_STAT		= BIT(9),
   3491	WMI_REQUEST_PEER_EXTD_STAT		= BIT(10),
   3492	WMI_REQUEST_BCN_STAT			= BIT(11),
   3493	WMI_REQUEST_BCN_STAT_RESET		= BIT(12),
   3494	WMI_REQUEST_PEER_EXTD2_STAT		= BIT(13),
   3495};
   3496
   3497struct wmi_request_stats_cmd {
   3498	u32 tlv_header;
   3499	enum wmi_stats_id stats_id;
   3500	u32 vdev_id;
   3501	struct wmi_mac_addr peer_macaddr;
   3502	u32 pdev_id;
   3503} __packed;
   3504
   3505struct wmi_get_pdev_temperature_cmd {
   3506	u32 tlv_header;
   3507	u32 param;
   3508	u32 pdev_id;
   3509} __packed;
   3510
   3511#define WMI_BEACON_TX_BUFFER_SIZE	512
   3512
   3513struct wmi_bcn_tmpl_cmd {
   3514	u32 tlv_header;
   3515	u32 vdev_id;
   3516	u32 tim_ie_offset;
   3517	u32 buf_len;
   3518	u32 csa_switch_count_offset;
   3519	u32 ext_csa_switch_count_offset;
   3520	u32 csa_event_bitmap;
   3521	u32 mbssid_ie_offset;
   3522	u32 esp_ie_offset;
   3523} __packed;
   3524
   3525struct wmi_key_seq_counter {
   3526	u32 key_seq_counter_l;
   3527	u32 key_seq_counter_h;
   3528} __packed;
   3529
   3530struct wmi_vdev_install_key_cmd {
   3531	u32 tlv_header;
   3532	u32 vdev_id;
   3533	struct wmi_mac_addr peer_macaddr;
   3534	u32 key_idx;
   3535	u32 key_flags;
   3536	u32 key_cipher;
   3537	struct wmi_key_seq_counter key_rsc_counter;
   3538	struct wmi_key_seq_counter key_global_rsc_counter;
   3539	struct wmi_key_seq_counter key_tsc_counter;
   3540	u8 wpi_key_rsc_counter[16];
   3541	u8 wpi_key_tsc_counter[16];
   3542	u32 key_len;
   3543	u32 key_txmic_len;
   3544	u32 key_rxmic_len;
   3545	u32 is_group_key_id_valid;
   3546	u32 group_key_id;
   3547
   3548	/* Followed by key_data containing key followed by
   3549	 * tx mic and then rx mic
   3550	 */
   3551} __packed;
   3552
   3553struct wmi_vdev_install_key_arg {
   3554	u32 vdev_id;
   3555	const u8 *macaddr;
   3556	u32 key_idx;
   3557	u32 key_flags;
   3558	u32 key_cipher;
   3559	u32 key_len;
   3560	u32 key_txmic_len;
   3561	u32 key_rxmic_len;
   3562	u64 key_rsc_counter;
   3563	const void *key_data;
   3564};
   3565
   3566#define WMI_MAX_SUPPORTED_RATES			128
   3567#define WMI_HOST_MAX_HECAP_PHY_SIZE		3
   3568#define WMI_HOST_MAX_HE_RATE_SET		3
   3569#define WMI_HECAP_TXRX_MCS_NSS_IDX_80		0
   3570#define WMI_HECAP_TXRX_MCS_NSS_IDX_160		1
   3571#define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80	2
   3572
   3573struct wmi_rate_set_arg {
   3574	u32 num_rates;
   3575	u8 rates[WMI_MAX_SUPPORTED_RATES];
   3576};
   3577
   3578struct peer_assoc_params {
   3579	struct wmi_mac_addr peer_macaddr;
   3580	u32 vdev_id;
   3581	u32 peer_new_assoc;
   3582	u32 peer_associd;
   3583	u32 peer_flags;
   3584	u32 peer_caps;
   3585	u32 peer_listen_intval;
   3586	u32 peer_ht_caps;
   3587	u32 peer_max_mpdu;
   3588	u32 peer_mpdu_density;
   3589	u32 peer_rate_caps;
   3590	u32 peer_nss;
   3591	u32 peer_vht_caps;
   3592	u32 peer_phymode;
   3593	u32 peer_ht_info[2];
   3594	struct wmi_rate_set_arg peer_legacy_rates;
   3595	struct wmi_rate_set_arg peer_ht_rates;
   3596	u32 rx_max_rate;
   3597	u32 rx_mcs_set;
   3598	u32 tx_max_rate;
   3599	u32 tx_mcs_set;
   3600	u8 vht_capable;
   3601	u8 min_data_rate;
   3602	u32 tx_max_mcs_nss;
   3603	u32 peer_bw_rxnss_override;
   3604	bool is_pmf_enabled;
   3605	bool is_wme_set;
   3606	bool qos_flag;
   3607	bool apsd_flag;
   3608	bool ht_flag;
   3609	bool bw_40;
   3610	bool bw_80;
   3611	bool bw_160;
   3612	bool stbc_flag;
   3613	bool ldpc_flag;
   3614	bool static_mimops_flag;
   3615	bool dynamic_mimops_flag;
   3616	bool spatial_mux_flag;
   3617	bool vht_flag;
   3618	bool vht_ng_flag;
   3619	bool need_ptk_4_way;
   3620	bool need_gtk_2_way;
   3621	bool auth_flag;
   3622	bool safe_mode_enabled;
   3623	bool amsdu_disable;
   3624	/* Use common structure */
   3625	u8 peer_mac[ETH_ALEN];
   3626
   3627	bool he_flag;
   3628	u32 peer_he_cap_macinfo[2];
   3629	u32 peer_he_cap_macinfo_internal;
   3630	u32 peer_he_caps_6ghz;
   3631	u32 peer_he_ops;
   3632	u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE];
   3633	u32 peer_he_mcs_count;
   3634	u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
   3635	u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET];
   3636	bool twt_responder;
   3637	bool twt_requester;
   3638	bool is_assoc;
   3639	struct ath11k_ppe_threshold peer_ppet;
   3640};
   3641
   3642struct  wmi_peer_assoc_complete_cmd {
   3643	u32 tlv_header;
   3644	struct wmi_mac_addr peer_macaddr;
   3645	u32 vdev_id;
   3646	u32 peer_new_assoc;
   3647	u32 peer_associd;
   3648	u32 peer_flags;
   3649	u32 peer_caps;
   3650	u32 peer_listen_intval;
   3651	u32 peer_ht_caps;
   3652	u32 peer_max_mpdu;
   3653	u32 peer_mpdu_density;
   3654	u32 peer_rate_caps;
   3655	u32 peer_nss;
   3656	u32 peer_vht_caps;
   3657	u32 peer_phymode;
   3658	u32 peer_ht_info[2];
   3659	u32 num_peer_legacy_rates;
   3660	u32 num_peer_ht_rates;
   3661	u32 peer_bw_rxnss_override;
   3662	struct  wmi_ppe_threshold peer_ppet;
   3663	u32 peer_he_cap_info;
   3664	u32 peer_he_ops;
   3665	u32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE];
   3666	u32 peer_he_mcs;
   3667	u32 peer_he_cap_info_ext;
   3668	u32 peer_he_cap_info_internal;
   3669	u32 min_data_rate;
   3670	u32 peer_he_caps_6ghz;
   3671} __packed;
   3672
   3673struct wmi_stop_scan_cmd {
   3674	u32 tlv_header;
   3675	u32 requestor;
   3676	u32 scan_id;
   3677	u32 req_type;
   3678	u32 vdev_id;
   3679	u32 pdev_id;
   3680};
   3681
   3682struct scan_chan_list_params {
   3683	u32 pdev_id;
   3684	u16 nallchans;
   3685	struct channel_param ch_param[];
   3686};
   3687
   3688struct wmi_scan_chan_list_cmd {
   3689	u32 tlv_header;
   3690	u32 num_scan_chans;
   3691	u32 flags;
   3692	u32 pdev_id;
   3693} __packed;
   3694
   3695struct wmi_scan_prob_req_oui_cmd {
   3696	u32 tlv_header;
   3697	u32 prob_req_oui;
   3698}  __packed;
   3699
   3700#define WMI_MGMT_SEND_DOWNLD_LEN	64
   3701
   3702#define WMI_TX_PARAMS_DWORD0_POWER		GENMASK(7, 0)
   3703#define WMI_TX_PARAMS_DWORD0_MCS_MASK		GENMASK(19, 8)
   3704#define WMI_TX_PARAMS_DWORD0_NSS_MASK		GENMASK(27, 20)
   3705#define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT	GENMASK(31, 28)
   3706
   3707#define WMI_TX_PARAMS_DWORD1_CHAIN_MASK		GENMASK(7, 0)
   3708#define WMI_TX_PARAMS_DWORD1_BW_MASK		GENMASK(14, 8)
   3709#define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE	GENMASK(19, 15)
   3710#define WMI_TX_PARAMS_DWORD1_FRAME_TYPE		BIT(20)
   3711#define WMI_TX_PARAMS_DWORD1_RSVD		GENMASK(31, 21)
   3712
   3713struct wmi_mgmt_send_params {
   3714	u32 tlv_header;
   3715	u32 tx_params_dword0;
   3716	u32 tx_params_dword1;
   3717};
   3718
   3719struct wmi_mgmt_send_cmd {
   3720	u32 tlv_header;
   3721	u32 vdev_id;
   3722	u32 desc_id;
   3723	u32 chanfreq;
   3724	u32 paddr_lo;
   3725	u32 paddr_hi;
   3726	u32 frame_len;
   3727	u32 buf_len;
   3728	u32 tx_params_valid;
   3729
   3730	/* This TLV is followed by struct wmi_mgmt_frame */
   3731
   3732	/* Followed by struct wmi_mgmt_send_params */
   3733} __packed;
   3734
   3735struct wmi_sta_powersave_mode_cmd {
   3736	u32 tlv_header;
   3737	u32 vdev_id;
   3738	u32 sta_ps_mode;
   3739};
   3740
   3741struct wmi_sta_smps_force_mode_cmd {
   3742	u32 tlv_header;
   3743	u32 vdev_id;
   3744	u32 forced_mode;
   3745};
   3746
   3747struct wmi_sta_smps_param_cmd {
   3748	u32 tlv_header;
   3749	u32 vdev_id;
   3750	u32 param;
   3751	u32 value;
   3752};
   3753
   3754struct wmi_bcn_prb_info {
   3755	u32 tlv_header;
   3756	u32 caps;
   3757	u32 erp;
   3758} __packed;
   3759
   3760enum {
   3761	WMI_PDEV_SUSPEND,
   3762	WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
   3763};
   3764
   3765struct green_ap_ps_params {
   3766	u32 value;
   3767};
   3768
   3769struct wmi_pdev_green_ap_ps_enable_cmd_param {
   3770	u32 tlv_header;
   3771	u32 pdev_id;
   3772	u32 enable;
   3773};
   3774
   3775struct ap_ps_params {
   3776	u32 vdev_id;
   3777	u32 param;
   3778	u32 value;
   3779};
   3780
   3781struct vdev_set_params {
   3782	u32 if_id;
   3783	u32 param_id;
   3784	u32 param_value;
   3785};
   3786
   3787struct stats_request_params {
   3788	u32 stats_id;
   3789	u32 vdev_id;
   3790	u32 pdev_id;
   3791};
   3792
   3793struct wmi_set_current_country_params {
   3794	u8 alpha2[3];
   3795};
   3796
   3797struct wmi_set_current_country_cmd {
   3798	u32 tlv_header;
   3799	u32 pdev_id;
   3800	u32 new_alpha2;
   3801} __packed;
   3802
   3803enum set_init_cc_type {
   3804	WMI_COUNTRY_INFO_TYPE_ALPHA,
   3805	WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE,
   3806	WMI_COUNTRY_INFO_TYPE_REGDOMAIN,
   3807};
   3808
   3809enum set_init_cc_flags {
   3810	INVALID_CC,
   3811	CC_IS_SET,
   3812	REGDMN_IS_SET,
   3813	ALPHA_IS_SET,
   3814};
   3815
   3816struct wmi_init_country_params {
   3817	union {
   3818		u16 country_code;
   3819		u16 regdom_id;
   3820		u8 alpha2[3];
   3821	} cc_info;
   3822	enum set_init_cc_flags flags;
   3823};
   3824
   3825struct wmi_init_country_cmd {
   3826	u32 tlv_header;
   3827	u32 pdev_id;
   3828	u32 init_cc_type;
   3829	union {
   3830		u32 country_code;
   3831		u32 regdom_id;
   3832		u32 alpha2;
   3833	} cc_info;
   3834} __packed;
   3835
   3836struct wmi_11d_scan_start_params {
   3837	u32 vdev_id;
   3838	u32 scan_period_msec;
   3839	u32 start_interval_msec;
   3840};
   3841
   3842struct wmi_11d_scan_start_cmd {
   3843	u32 tlv_header;
   3844	u32 vdev_id;
   3845	u32 scan_period_msec;
   3846	u32 start_interval_msec;
   3847} __packed;
   3848
   3849struct wmi_11d_scan_stop_cmd {
   3850	u32 tlv_header;
   3851	u32 vdev_id;
   3852} __packed;
   3853
   3854struct wmi_11d_new_cc_ev {
   3855	u32 new_alpha2;
   3856} __packed;
   3857
   3858#define THERMAL_LEVELS  1
   3859struct tt_level_config {
   3860	u32 tmplwm;
   3861	u32 tmphwm;
   3862	u32 dcoffpercent;
   3863	u32 priority;
   3864};
   3865
   3866struct thermal_mitigation_params {
   3867	u32 pdev_id;
   3868	u32 enable;
   3869	u32 dc;
   3870	u32 dc_per_event;
   3871	struct tt_level_config levelconf[THERMAL_LEVELS];
   3872};
   3873
   3874struct wmi_therm_throt_config_request_cmd {
   3875	u32 tlv_header;
   3876	u32 pdev_id;
   3877	u32 enable;
   3878	u32 dc;
   3879	u32 dc_per_event;
   3880	u32 therm_throt_levels;
   3881} __packed;
   3882
   3883struct wmi_therm_throt_level_config_info {
   3884	u32 tlv_header;
   3885	u32 temp_lwm;
   3886	u32 temp_hwm;
   3887	u32 dc_off_percent;
   3888	u32 prio;
   3889} __packed;
   3890
   3891struct wmi_delba_send_cmd {
   3892	u32 tlv_header;
   3893	u32 vdev_id;
   3894	struct wmi_mac_addr peer_macaddr;
   3895	u32 tid;
   3896	u32 initiator;
   3897	u32 reasoncode;
   3898} __packed;
   3899
   3900struct wmi_addba_setresponse_cmd {
   3901	u32 tlv_header;
   3902	u32 vdev_id;
   3903	struct wmi_mac_addr peer_macaddr;
   3904	u32 tid;
   3905	u32 statuscode;
   3906} __packed;
   3907
   3908struct wmi_addba_send_cmd {
   3909	u32 tlv_header;
   3910	u32 vdev_id;
   3911	struct wmi_mac_addr peer_macaddr;
   3912	u32 tid;
   3913	u32 buffersize;
   3914} __packed;
   3915
   3916struct wmi_addba_clear_resp_cmd {
   3917	u32 tlv_header;
   3918	u32 vdev_id;
   3919	struct wmi_mac_addr peer_macaddr;
   3920} __packed;
   3921
   3922struct wmi_pdev_pktlog_filter_info {
   3923	u32 tlv_header;
   3924	struct wmi_mac_addr peer_macaddr;
   3925} __packed;
   3926
   3927struct wmi_pdev_pktlog_filter_cmd {
   3928	u32 tlv_header;
   3929	u32 pdev_id;
   3930	u32 enable;
   3931	u32 filter_type;
   3932	u32 num_mac;
   3933} __packed;
   3934
   3935enum ath11k_wmi_pktlog_enable {
   3936	ATH11K_WMI_PKTLOG_ENABLE_AUTO  = 0,
   3937	ATH11K_WMI_PKTLOG_ENABLE_FORCE = 1,
   3938};
   3939
   3940struct wmi_pktlog_enable_cmd {
   3941	u32 tlv_header;
   3942	u32 pdev_id;
   3943	u32 evlist; /* WMI_PKTLOG_EVENT */
   3944	u32 enable;
   3945} __packed;
   3946
   3947struct wmi_pktlog_disable_cmd {
   3948	u32 tlv_header;
   3949	u32 pdev_id;
   3950} __packed;
   3951
   3952#define DFS_PHYERR_UNIT_TEST_CMD 0
   3953#define DFS_UNIT_TEST_MODULE	0x2b
   3954#define DFS_UNIT_TEST_TOKEN	0xAA
   3955
   3956enum dfs_test_args_idx {
   3957	DFS_TEST_CMDID = 0,
   3958	DFS_TEST_PDEV_ID,
   3959	DFS_TEST_RADAR_PARAM,
   3960	DFS_MAX_TEST_ARGS,
   3961};
   3962
   3963struct wmi_dfs_unit_test_arg {
   3964	u32 cmd_id;
   3965	u32 pdev_id;
   3966	u32 radar_param;
   3967};
   3968
   3969struct wmi_unit_test_cmd {
   3970	u32 tlv_header;
   3971	u32 vdev_id;
   3972	u32 module_id;
   3973	u32 num_args;
   3974	u32 diag_token;
   3975	/* Followed by test args*/
   3976} __packed;
   3977
   3978#define MAX_SUPPORTED_RATES 128
   3979
   3980#define WMI_PEER_AUTH		0x00000001
   3981#define WMI_PEER_QOS		0x00000002
   3982#define WMI_PEER_NEED_PTK_4_WAY	0x00000004
   3983#define WMI_PEER_NEED_GTK_2_WAY	0x00000010
   3984#define WMI_PEER_HE		0x00000400
   3985#define WMI_PEER_APSD		0x00000800
   3986#define WMI_PEER_HT		0x00001000
   3987#define WMI_PEER_40MHZ		0x00002000
   3988#define WMI_PEER_STBC		0x00008000
   3989#define WMI_PEER_LDPC		0x00010000
   3990#define WMI_PEER_DYN_MIMOPS	0x00020000
   3991#define WMI_PEER_STATIC_MIMOPS	0x00040000
   3992#define WMI_PEER_SPATIAL_MUX	0x00200000
   3993#define WMI_PEER_TWT_REQ	0x00400000
   3994#define WMI_PEER_TWT_RESP	0x00800000
   3995#define WMI_PEER_VHT		0x02000000
   3996#define WMI_PEER_80MHZ		0x04000000
   3997#define WMI_PEER_PMF		0x08000000
   3998/* TODO: Place holder for WLAN_PEER_F_PS_PRESEND_REQUIRED = 0x10000000.
   3999 * Need to be cleaned up
   4000 */
   4001#define WMI_PEER_IS_P2P_CAPABLE	0x20000000
   4002#define WMI_PEER_160MHZ		0x40000000
   4003#define WMI_PEER_SAFEMODE_EN	0x80000000
   4004
   4005struct beacon_tmpl_params {
   4006	u8 vdev_id;
   4007	u32 tim_ie_offset;
   4008	u32 tmpl_len;
   4009	u32 tmpl_len_aligned;
   4010	u32 csa_switch_count_offset;
   4011	u32 ext_csa_switch_count_offset;
   4012	u8 *frm;
   4013};
   4014
   4015struct wmi_rate_set {
   4016	u32 num_rates;
   4017	u32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
   4018};
   4019
   4020struct wmi_vht_rate_set {
   4021	u32 tlv_header;
   4022	u32 rx_max_rate;
   4023	u32 rx_mcs_set;
   4024	u32 tx_max_rate;
   4025	u32 tx_mcs_set;
   4026	u32 tx_max_mcs_nss;
   4027} __packed;
   4028
   4029struct wmi_he_rate_set {
   4030	u32 tlv_header;
   4031
   4032	/* MCS at which the peer can receive */
   4033	u32 rx_mcs_set;
   4034
   4035	/* MCS at which the peer can transmit */
   4036	u32 tx_mcs_set;
   4037} __packed;
   4038
   4039#define MAX_REG_RULES 10
   4040#define REG_ALPHA2_LEN 2
   4041
   4042enum wmi_start_event_param {
   4043	WMI_VDEV_START_RESP_EVENT = 0,
   4044	WMI_VDEV_RESTART_RESP_EVENT,
   4045};
   4046
   4047struct wmi_vdev_start_resp_event {
   4048	u32 vdev_id;
   4049	u32 requestor_id;
   4050	enum wmi_start_event_param resp_type;
   4051	u32 status;
   4052	u32 chain_mask;
   4053	u32 smps_mode;
   4054	union {
   4055		u32 mac_id;
   4056		u32 pdev_id;
   4057	};
   4058	u32 cfgd_tx_streams;
   4059	u32 cfgd_rx_streams;
   4060} __packed;
   4061
   4062/* VDEV start response status codes */
   4063enum wmi_vdev_start_resp_status_code {
   4064	WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0,
   4065	WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1,
   4066	WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2,
   4067	WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3,
   4068	WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4,
   4069};
   4070
   4071;
   4072enum cc_setting_code {
   4073	REG_SET_CC_STATUS_PASS = 0,
   4074	REG_CURRENT_ALPHA2_NOT_FOUND = 1,
   4075	REG_INIT_ALPHA2_NOT_FOUND = 2,
   4076	REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
   4077	REG_SET_CC_STATUS_NO_MEMORY = 4,
   4078	REG_SET_CC_STATUS_FAIL = 5,
   4079};
   4080
   4081/* Regaulatory Rule Flags Passed by FW */
   4082#define REGULATORY_CHAN_DISABLED     BIT(0)
   4083#define REGULATORY_CHAN_NO_IR        BIT(1)
   4084#define REGULATORY_CHAN_RADAR        BIT(3)
   4085#define REGULATORY_CHAN_NO_OFDM      BIT(6)
   4086#define REGULATORY_CHAN_INDOOR_ONLY  BIT(9)
   4087
   4088#define REGULATORY_CHAN_NO_HT40      BIT(4)
   4089#define REGULATORY_CHAN_NO_80MHZ     BIT(7)
   4090#define REGULATORY_CHAN_NO_160MHZ    BIT(8)
   4091#define REGULATORY_CHAN_NO_20MHZ     BIT(11)
   4092#define REGULATORY_CHAN_NO_10MHZ     BIT(12)
   4093
   4094enum {
   4095	WMI_REG_SET_CC_STATUS_PASS = 0,
   4096	WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1,
   4097	WMI_REG_INIT_ALPHA2_NOT_FOUND = 2,
   4098	WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3,
   4099	WMI_REG_SET_CC_STATUS_NO_MEMORY = 4,
   4100	WMI_REG_SET_CC_STATUS_FAIL = 5,
   4101};
   4102
   4103struct cur_reg_rule {
   4104	u16 start_freq;
   4105	u16 end_freq;
   4106	u16 max_bw;
   4107	u8 reg_power;
   4108	u8 ant_gain;
   4109	u16 flags;
   4110};
   4111
   4112struct cur_regulatory_info {
   4113	enum cc_setting_code status_code;
   4114	u8 num_phy;
   4115	u8 phy_id;
   4116	u16 reg_dmn_pair;
   4117	u16 ctry_code;
   4118	u8 alpha2[REG_ALPHA2_LEN + 1];
   4119	u32 dfs_region;
   4120	u32 phybitmap;
   4121	u32 min_bw_2g;
   4122	u32 max_bw_2g;
   4123	u32 min_bw_5g;
   4124	u32 max_bw_5g;
   4125	u32 num_2g_reg_rules;
   4126	u32 num_5g_reg_rules;
   4127	struct cur_reg_rule *reg_rules_2g_ptr;
   4128	struct cur_reg_rule *reg_rules_5g_ptr;
   4129};
   4130
   4131struct wmi_reg_chan_list_cc_event {
   4132	u32 status_code;
   4133	u32 phy_id;
   4134	u32 alpha2;
   4135	u32 num_phy;
   4136	u32 country_id;
   4137	u32 domain_code;
   4138	u32 dfs_region;
   4139	u32 phybitmap;
   4140	u32 min_bw_2g;
   4141	u32 max_bw_2g;
   4142	u32 min_bw_5g;
   4143	u32 max_bw_5g;
   4144	u32 num_2g_reg_rules;
   4145	u32 num_5g_reg_rules;
   4146} __packed;
   4147
   4148struct wmi_regulatory_rule_struct {
   4149	u32  tlv_header;
   4150	u32  freq_info;
   4151	u32  bw_pwr_info;
   4152	u32  flag_info;
   4153};
   4154
   4155struct wmi_vdev_delete_resp_event {
   4156	u32 vdev_id;
   4157} __packed;
   4158
   4159struct wmi_peer_delete_resp_event {
   4160	u32 vdev_id;
   4161	struct wmi_mac_addr peer_macaddr;
   4162} __packed;
   4163
   4164struct wmi_bcn_tx_status_event {
   4165	u32 vdev_id;
   4166	u32 tx_status;
   4167} __packed;
   4168
   4169struct wmi_vdev_stopped_event {
   4170	u32 vdev_id;
   4171} __packed;
   4172
   4173struct wmi_pdev_bss_chan_info_event {
   4174	u32 freq;	/* Units in MHz */
   4175	u32 noise_floor;	/* units are dBm */
   4176	/* rx clear - how often the channel was unused */
   4177	u32 rx_clear_count_low;
   4178	u32 rx_clear_count_high;
   4179	/* cycle count - elapsed time during measured period, in clock ticks */
   4180	u32 cycle_count_low;
   4181	u32 cycle_count_high;
   4182	/* tx cycle count - elapsed time spent in tx, in clock ticks */
   4183	u32 tx_cycle_count_low;
   4184	u32 tx_cycle_count_high;
   4185	/* rx cycle count - elapsed time spent in rx, in clock ticks */
   4186	u32 rx_cycle_count_low;
   4187	u32 rx_cycle_count_high;
   4188	/*rx_cycle cnt for my bss in 64bits format */
   4189	u32 rx_bss_cycle_count_low;
   4190	u32 rx_bss_cycle_count_high;
   4191	u32 pdev_id;
   4192} __packed;
   4193
   4194#define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0
   4195
   4196struct wmi_vdev_install_key_compl_event {
   4197	u32 vdev_id;
   4198	struct wmi_mac_addr peer_macaddr;
   4199	u32 key_idx;
   4200	u32 key_flags;
   4201	u32 status;
   4202} __packed;
   4203
   4204struct wmi_vdev_install_key_complete_arg {
   4205	u32 vdev_id;
   4206	const u8 *macaddr;
   4207	u32 key_idx;
   4208	u32 key_flags;
   4209	u32 status;
   4210};
   4211
   4212struct wmi_peer_assoc_conf_event {
   4213	u32 vdev_id;
   4214	struct wmi_mac_addr peer_macaddr;
   4215} __packed;
   4216
   4217struct wmi_peer_assoc_conf_arg {
   4218	u32 vdev_id;
   4219	const u8 *macaddr;
   4220};
   4221
   4222struct wmi_fils_discovery_event {
   4223	u32 vdev_id;
   4224	u32 fils_tt;
   4225	u32 tbtt;
   4226} __packed;
   4227
   4228struct wmi_probe_resp_tx_status_event {
   4229	u32 vdev_id;
   4230	u32 tx_status;
   4231} __packed;
   4232
   4233/*
   4234 * PDEV statistics
   4235 */
   4236struct wmi_pdev_stats_base {
   4237	s32 chan_nf;
   4238	u32 tx_frame_count; /* Cycles spent transmitting frames */
   4239	u32 rx_frame_count; /* Cycles spent receiving frames */
   4240	u32 rx_clear_count; /* Total channel busy time, evidently */
   4241	u32 cycle_count; /* Total on-channel time */
   4242	u32 phy_err_count;
   4243	u32 chan_tx_pwr;
   4244} __packed;
   4245
   4246struct wmi_pdev_stats_extra {
   4247	u32 ack_rx_bad;
   4248	u32 rts_bad;
   4249	u32 rts_good;
   4250	u32 fcs_bad;
   4251	u32 no_beacons;
   4252	u32 mib_int_count;
   4253} __packed;
   4254
   4255struct wmi_pdev_stats_tx {
   4256	/* Num HTT cookies queued to dispatch list */
   4257	s32 comp_queued;
   4258
   4259	/* Num HTT cookies dispatched */
   4260	s32 comp_delivered;
   4261
   4262	/* Num MSDU queued to WAL */
   4263	s32 msdu_enqued;
   4264
   4265	/* Num MPDU queue to WAL */
   4266	s32 mpdu_enqued;
   4267
   4268	/* Num MSDUs dropped by WMM limit */
   4269	s32 wmm_drop;
   4270
   4271	/* Num Local frames queued */
   4272	s32 local_enqued;
   4273
   4274	/* Num Local frames done */
   4275	s32 local_freed;
   4276
   4277	/* Num queued to HW */
   4278	s32 hw_queued;
   4279
   4280	/* Num PPDU reaped from HW */
   4281	s32 hw_reaped;
   4282
   4283	/* Num underruns */
   4284	s32 underrun;
   4285
   4286	/* Num hw paused */
   4287	u32 hw_paused;
   4288
   4289	/* Num PPDUs cleaned up in TX abort */
   4290	s32 tx_abort;
   4291
   4292	/* Num MPDUs requeued by SW */
   4293	s32 mpdus_requeued;
   4294
   4295	/* excessive retries */
   4296	u32 tx_ko;
   4297
   4298	u32 tx_xretry;
   4299
   4300	/* data hw rate code */
   4301	u32 data_rc;
   4302
   4303	/* Scheduler self triggers */
   4304	u32 self_triggers;
   4305
   4306	/* frames dropped due to excessive sw retries */
   4307	u32 sw_retry_failure;
   4308
   4309	/* illegal rate phy errors  */
   4310	u32 illgl_rate_phy_err;
   4311
   4312	/* wal pdev continuous xretry */
   4313	u32 pdev_cont_xretry;
   4314
   4315	/* wal pdev tx timeouts */
   4316	u32 pdev_tx_timeout;
   4317
   4318	/* wal pdev resets  */
   4319	u32 pdev_resets;
   4320
   4321	/* frames dropped due to non-availability of stateless TIDs */
   4322	u32 stateless_tid_alloc_failure;
   4323
   4324	/* PhY/BB underrun */
   4325	u32 phy_underrun;
   4326
   4327	/* MPDU is more than txop limit */
   4328	u32 txop_ovf;
   4329
   4330	/* Num sequences posted */
   4331	u32 seq_posted;
   4332
   4333	/* Num sequences failed in queueing */
   4334	u32 seq_failed_queueing;
   4335
   4336	/* Num sequences completed */
   4337	u32 seq_completed;
   4338
   4339	/* Num sequences restarted */
   4340	u32 seq_restarted;
   4341
   4342	/* Num of MU sequences posted */
   4343	u32 mu_seq_posted;
   4344
   4345	/* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
   4346	 * (Reset,channel change)
   4347	 */
   4348	s32 mpdus_sw_flush;
   4349
   4350	/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
   4351	s32 mpdus_hw_filter;
   4352
   4353	/* Num MPDUs truncated by PDG (TXOP, TBTT,
   4354	 * PPDU_duration based on rate, dyn_bw)
   4355	 */
   4356	s32 mpdus_truncated;
   4357
   4358	/* Num MPDUs that was tried but didn't receive ACK or BA */
   4359	s32 mpdus_ack_failed;
   4360
   4361	/* Num MPDUs that was dropped du to expiry. */
   4362	s32 mpdus_expired;
   4363} __packed;
   4364
   4365struct wmi_pdev_stats_rx {
   4366	/* Cnts any change in ring routing mid-ppdu */
   4367	s32 mid_ppdu_route_change;
   4368
   4369	/* Total number of statuses processed */
   4370	s32 status_rcvd;
   4371
   4372	/* Extra frags on rings 0-3 */
   4373	s32 r0_frags;
   4374	s32 r1_frags;
   4375	s32 r2_frags;
   4376	s32 r3_frags;
   4377
   4378	/* MSDUs / MPDUs delivered to HTT */
   4379	s32 htt_msdus;
   4380	s32 htt_mpdus;
   4381
   4382	/* MSDUs / MPDUs delivered to local stack */
   4383	s32 loc_msdus;
   4384	s32 loc_mpdus;
   4385
   4386	/* AMSDUs that have more MSDUs than the status ring size */
   4387	s32 oversize_amsdu;
   4388
   4389	/* Number of PHY errors */
   4390	s32 phy_errs;
   4391
   4392	/* Number of PHY errors drops */
   4393	s32 phy_err_drop;
   4394
   4395	/* Number of mpdu errors - FCS, MIC, ENC etc. */
   4396	s32 mpdu_errs;
   4397
   4398	/* Num overflow errors */
   4399	s32 rx_ovfl_errs;
   4400} __packed;
   4401
   4402struct wmi_pdev_stats {
   4403	struct wmi_pdev_stats_base base;
   4404	struct wmi_pdev_stats_tx tx;
   4405	struct wmi_pdev_stats_rx rx;
   4406} __packed;
   4407
   4408#define WLAN_MAX_AC 4
   4409#define MAX_TX_RATE_VALUES 10
   4410#define MAX_TX_RATE_VALUES 10
   4411
   4412struct wmi_vdev_stats {
   4413	u32 vdev_id;
   4414	u32 beacon_snr;
   4415	u32 data_snr;
   4416	u32 num_tx_frames[WLAN_MAX_AC];
   4417	u32 num_rx_frames;
   4418	u32 num_tx_frames_retries[WLAN_MAX_AC];
   4419	u32 num_tx_frames_failures[WLAN_MAX_AC];
   4420	u32 num_rts_fail;
   4421	u32 num_rts_success;
   4422	u32 num_rx_err;
   4423	u32 num_rx_discard;
   4424	u32 num_tx_not_acked;
   4425	u32 tx_rate_history[MAX_TX_RATE_VALUES];
   4426	u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
   4427} __packed;
   4428
   4429struct wmi_bcn_stats {
   4430	u32 vdev_id;
   4431	u32 tx_bcn_succ_cnt;
   4432	u32 tx_bcn_outage_cnt;
   4433} __packed;
   4434
   4435struct wmi_stats_event {
   4436	u32 stats_id;
   4437	u32 num_pdev_stats;
   4438	u32 num_vdev_stats;
   4439	u32 num_peer_stats;
   4440	u32 num_bcnflt_stats;
   4441	u32 num_chan_stats;
   4442	u32 num_mib_stats;
   4443	u32 pdev_id;
   4444	u32 num_bcn_stats;
   4445	u32 num_peer_extd_stats;
   4446	u32 num_peer_extd2_stats;
   4447} __packed;
   4448
   4449struct wmi_rssi_stats {
   4450	u32 vdev_id;
   4451	u32 rssi_avg_beacon[WMI_MAX_CHAINS];
   4452	u32 rssi_avg_data[WMI_MAX_CHAINS];
   4453	struct wmi_mac_addr peer_macaddr;
   4454} __packed;
   4455
   4456struct wmi_per_chain_rssi_stats {
   4457	u32 num_per_chain_rssi_stats;
   4458} __packed;
   4459
   4460struct wmi_pdev_ctl_failsafe_chk_event {
   4461	u32 pdev_id;
   4462	u32 ctl_failsafe_status;
   4463} __packed;
   4464
   4465struct wmi_pdev_csa_switch_ev {
   4466	u32 pdev_id;
   4467	u32 current_switch_count;
   4468	u32 num_vdevs;
   4469} __packed;
   4470
   4471struct wmi_pdev_radar_ev {
   4472	u32 pdev_id;
   4473	u32 detection_mode;
   4474	u32 chan_freq;
   4475	u32 chan_width;
   4476	u32 detector_id;
   4477	u32 segment_id;
   4478	u32 timestamp;
   4479	u32 is_chirp;
   4480	s32 freq_offset;
   4481	s32 sidx;
   4482} __packed;
   4483
   4484struct wmi_pdev_temperature_event {
   4485	/* temperature value in Celcius degree */
   4486	s32 temp;
   4487	u32 pdev_id;
   4488} __packed;
   4489
   4490#define WMI_RX_STATUS_OK			0x00
   4491#define WMI_RX_STATUS_ERR_CRC			0x01
   4492#define WMI_RX_STATUS_ERR_DECRYPT		0x08
   4493#define WMI_RX_STATUS_ERR_MIC			0x10
   4494#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS	0x20
   4495
   4496#define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4
   4497
   4498struct mgmt_rx_event_params {
   4499	u32 chan_freq;
   4500	u32 channel;
   4501	u32 snr;
   4502	u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA];
   4503	u32 rate;
   4504	enum wmi_phy_mode phy_mode;
   4505	u32 buf_len;
   4506	int status;
   4507	u32 flags;
   4508	int rssi;
   4509	u32 tsf_delta;
   4510	u8 pdev_id;
   4511};
   4512
   4513#define ATH_MAX_ANTENNA 4
   4514
   4515struct wmi_mgmt_rx_hdr {
   4516	u32 channel;
   4517	u32 snr;
   4518	u32 rate;
   4519	u32 phy_mode;
   4520	u32 buf_len;
   4521	u32 status;
   4522	u32 rssi_ctl[ATH_MAX_ANTENNA];
   4523	u32 flags;
   4524	int rssi;
   4525	u32 tsf_delta;
   4526	u32 rx_tsf_l32;
   4527	u32 rx_tsf_u32;
   4528	u32 pdev_id;
   4529	u32 chan_freq;
   4530} __packed;
   4531
   4532#define MAX_ANTENNA_EIGHT 8
   4533
   4534struct wmi_rssi_ctl_ext {
   4535	u32 tlv_header;
   4536	u32 rssi_ctl_ext[MAX_ANTENNA_EIGHT - ATH_MAX_ANTENNA];
   4537};
   4538
   4539struct wmi_mgmt_tx_compl_event {
   4540	u32 desc_id;
   4541	u32 status;
   4542	u32 pdev_id;
   4543} __packed;
   4544
   4545struct wmi_scan_event {
   4546	u32 event_type; /* %WMI_SCAN_EVENT_ */
   4547	u32 reason; /* %WMI_SCAN_REASON_ */
   4548	u32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
   4549	u32 scan_req_id;
   4550	u32 scan_id;
   4551	u32 vdev_id;
   4552	/* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed
   4553	 * In case of AP it is TSF of the AP vdev
   4554	 * In case of STA connected state, this is the TSF of the AP
   4555	 * In case of STA not connected, it will be the free running HW timer
   4556	 */
   4557	u32 tsf_timestamp;
   4558} __packed;
   4559
   4560struct wmi_peer_sta_kickout_arg {
   4561	const u8 *mac_addr;
   4562};
   4563
   4564struct wmi_peer_sta_kickout_event {
   4565	struct wmi_mac_addr peer_macaddr;
   4566} __packed;
   4567
   4568enum wmi_roam_reason {
   4569	WMI_ROAM_REASON_BETTER_AP = 1,
   4570	WMI_ROAM_REASON_BEACON_MISS = 2,
   4571	WMI_ROAM_REASON_LOW_RSSI = 3,
   4572	WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
   4573	WMI_ROAM_REASON_HO_FAILED = 5,
   4574
   4575	/* keep last */
   4576	WMI_ROAM_REASON_MAX,
   4577};
   4578
   4579struct wmi_roam_event {
   4580	u32 vdev_id;
   4581	u32 reason;
   4582	u32 rssi;
   4583} __packed;
   4584
   4585#define WMI_CHAN_INFO_START_RESP 0
   4586#define WMI_CHAN_INFO_END_RESP 1
   4587
   4588struct wmi_chan_info_event {
   4589	u32 err_code;
   4590	u32 freq;
   4591	u32 cmd_flags;
   4592	u32 noise_floor;
   4593	u32 rx_clear_count;
   4594	u32 cycle_count;
   4595	u32 chan_tx_pwr_range;
   4596	u32 chan_tx_pwr_tp;
   4597	u32 rx_frame_count;
   4598	u32 my_bss_rx_cycle_count;
   4599	u32 rx_11b_mode_data_duration;
   4600	u32 tx_frame_cnt;
   4601	u32 mac_clk_mhz;
   4602	u32 vdev_id;
   4603} __packed;
   4604
   4605struct ath11k_targ_cap {
   4606	u32 phy_capability;
   4607	u32 max_frag_entry;
   4608	u32 num_rf_chains;
   4609	u32 ht_cap_info;
   4610	u32 vht_cap_info;
   4611	u32 vht_supp_mcs;
   4612	u32 hw_min_tx_power;
   4613	u32 hw_max_tx_power;
   4614	u32 sys_cap_info;
   4615	u32 min_pkt_size_enable;
   4616	u32 max_bcn_ie_size;
   4617	u32 max_num_scan_channels;
   4618	u32 max_supported_macs;
   4619	u32 wmi_fw_sub_feat_caps;
   4620	u32 txrx_chainmask;
   4621	u32 default_dbs_hw_mode_index;
   4622	u32 num_msdu_desc;
   4623};
   4624
   4625enum wmi_vdev_type {
   4626	WMI_VDEV_TYPE_AP      = 1,
   4627	WMI_VDEV_TYPE_STA     = 2,
   4628	WMI_VDEV_TYPE_IBSS    = 3,
   4629	WMI_VDEV_TYPE_MONITOR = 4,
   4630};
   4631
   4632enum wmi_vdev_subtype {
   4633	WMI_VDEV_SUBTYPE_NONE,
   4634	WMI_VDEV_SUBTYPE_P2P_DEVICE,
   4635	WMI_VDEV_SUBTYPE_P2P_CLIENT,
   4636	WMI_VDEV_SUBTYPE_P2P_GO,
   4637	WMI_VDEV_SUBTYPE_PROXY_STA,
   4638	WMI_VDEV_SUBTYPE_MESH_NON_11S,
   4639	WMI_VDEV_SUBTYPE_MESH_11S,
   4640};
   4641
   4642enum wmi_sta_powersave_param {
   4643	WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
   4644	WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
   4645	WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
   4646	WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
   4647	WMI_STA_PS_PARAM_UAPSD = 4,
   4648};
   4649
   4650#define WMI_UAPSD_AC_TYPE_DELI 0
   4651#define WMI_UAPSD_AC_TYPE_TRIG 1
   4652
   4653#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
   4654	((type ==  WMI_UAPSD_AC_TYPE_DELI) ? \
   4655	 (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
   4656
   4657enum wmi_sta_ps_param_uapsd {
   4658	WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
   4659	WMI_STA_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
   4660	WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
   4661	WMI_STA_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
   4662	WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
   4663	WMI_STA_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
   4664	WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
   4665	WMI_STA_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
   4666};
   4667
   4668#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
   4669
   4670struct wmi_sta_uapsd_auto_trig_param {
   4671	u32 wmm_ac;
   4672	u32 user_priority;
   4673	u32 service_interval;
   4674	u32 suspend_interval;
   4675	u32 delay_interval;
   4676};
   4677
   4678struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
   4679	u32 vdev_id;
   4680	struct wmi_mac_addr peer_macaddr;
   4681	u32 num_ac;
   4682};
   4683
   4684struct wmi_sta_uapsd_auto_trig_arg {
   4685	u32 wmm_ac;
   4686	u32 user_priority;
   4687	u32 service_interval;
   4688	u32 suspend_interval;
   4689	u32 delay_interval;
   4690};
   4691
   4692enum wmi_sta_ps_param_tx_wake_threshold {
   4693	WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
   4694	WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
   4695
   4696	/* Values greater than one indicate that many TX attempts per beacon
   4697	 * interval before the STA will wake up
   4698	 */
   4699};
   4700
   4701/* The maximum number of PS-Poll frames the FW will send in response to
   4702 * traffic advertised in TIM before waking up (by sending a null frame with PS
   4703 * = 0). Value 0 has a special meaning: there is no maximum count and the FW
   4704 * will send as many PS-Poll as are necessary to retrieve buffered BU. This
   4705 * parameter is used when the RX wake policy is
   4706 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
   4707 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
   4708 */
   4709enum wmi_sta_ps_param_pspoll_count {
   4710	WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
   4711	/* Values greater than 0 indicate the maximum numer of PS-Poll frames
   4712	 * FW will send before waking up.
   4713	 */
   4714};
   4715
   4716/* U-APSD configuration of peer station from (re)assoc request and TSPECs */
   4717enum wmi_ap_ps_param_uapsd {
   4718	WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
   4719	WMI_AP_PS_UAPSD_AC0_TRIGGER_EN  = (1 << 1),
   4720	WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
   4721	WMI_AP_PS_UAPSD_AC1_TRIGGER_EN  = (1 << 3),
   4722	WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
   4723	WMI_AP_PS_UAPSD_AC2_TRIGGER_EN  = (1 << 5),
   4724	WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
   4725	WMI_AP_PS_UAPSD_AC3_TRIGGER_EN  = (1 << 7),
   4726};
   4727
   4728/* U-APSD maximum service period of peer station */
   4729enum wmi_ap_ps_peer_param_max_sp {
   4730	WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
   4731	WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
   4732	WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
   4733	WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
   4734	MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
   4735};
   4736
   4737enum wmi_ap_ps_peer_param {
   4738	/** Set uapsd configuration for a given peer.
   4739	 *
   4740	 * This include the delivery and trigger enabled state for each AC.
   4741	 * The host MLME needs to set this based on AP capability and stations
   4742	 * request Set in the association request  received from the station.
   4743	 *
   4744	 * Lower 8 bits of the value specify the UAPSD configuration.
   4745	 *
   4746	 * (see enum wmi_ap_ps_param_uapsd)
   4747	 * The default value is 0.
   4748	 */
   4749	WMI_AP_PS_PEER_PARAM_UAPSD = 0,
   4750
   4751	/**
   4752	 * Set the service period for a UAPSD capable station
   4753	 *
   4754	 * The service period from wme ie in the (re)assoc request frame.
   4755	 *
   4756	 * (see enum wmi_ap_ps_peer_param_max_sp)
   4757	 */
   4758	WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
   4759
   4760	/** Time in seconds for aging out buffered frames
   4761	 * for STA in power save
   4762	 */
   4763	WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
   4764
   4765	/** Specify frame types that are considered SIFS
   4766	 * RESP trigger frame
   4767	 */
   4768	WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3,
   4769
   4770	/** Specifies the trigger state of TID.
   4771	 * Valid only for UAPSD frame type
   4772	 */
   4773	WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4,
   4774
   4775	/* Specifies the WNM sleep state of a STA */
   4776	WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5,
   4777};
   4778
   4779#define DISABLE_SIFS_RESPONSE_TRIGGER 0
   4780
   4781#define WMI_MAX_KEY_INDEX   3
   4782#define WMI_MAX_KEY_LEN     32
   4783
   4784#define WMI_KEY_PAIRWISE 0x00
   4785#define WMI_KEY_GROUP    0x01
   4786
   4787#define WMI_CIPHER_NONE     0x0 /* clear key */
   4788#define WMI_CIPHER_WEP      0x1
   4789#define WMI_CIPHER_TKIP     0x2
   4790#define WMI_CIPHER_AES_OCB  0x3
   4791#define WMI_CIPHER_AES_CCM  0x4
   4792#define WMI_CIPHER_WAPI     0x5
   4793#define WMI_CIPHER_CKIP     0x6
   4794#define WMI_CIPHER_AES_CMAC 0x7
   4795#define WMI_CIPHER_ANY      0x8
   4796#define WMI_CIPHER_AES_GCM  0x9
   4797#define WMI_CIPHER_AES_GMAC 0xa
   4798
   4799/* Value to disable fixed rate setting */
   4800#define WMI_FIXED_RATE_NONE	(0xffff)
   4801
   4802#define ATH11K_RC_VERSION_OFFSET	28
   4803#define ATH11K_RC_PREAMBLE_OFFSET	8
   4804#define ATH11K_RC_NSS_OFFSET		5
   4805
   4806#define ATH11K_HW_RATE_CODE(rate, nss, preamble)	\
   4807	((1 << ATH11K_RC_VERSION_OFFSET) |		\
   4808	 ((nss) << ATH11K_RC_NSS_OFFSET) |		\
   4809	 ((preamble) << ATH11K_RC_PREAMBLE_OFFSET) |	\
   4810	 (rate))
   4811
   4812/* Preamble types to be used with VDEV fixed rate configuration */
   4813enum wmi_rate_preamble {
   4814	WMI_RATE_PREAMBLE_OFDM,
   4815	WMI_RATE_PREAMBLE_CCK,
   4816	WMI_RATE_PREAMBLE_HT,
   4817	WMI_RATE_PREAMBLE_VHT,
   4818	WMI_RATE_PREAMBLE_HE,
   4819};
   4820
   4821/**
   4822 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection.
   4823 * @WMI_RTS_CTS_DISABLED : RTS/CTS protection is disabled.
   4824 * @WMI_USE_RTS_CTS : RTS/CTS Enabled.
   4825 * @WMI_USE_CTS2SELF : CTS to self protection Enabled.
   4826 */
   4827enum wmi_rtscts_prot_mode {
   4828	WMI_RTS_CTS_DISABLED = 0,
   4829	WMI_USE_RTS_CTS = 1,
   4830	WMI_USE_CTS2SELF = 2,
   4831};
   4832
   4833/**
   4834 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling
   4835 *                           protection mode.
   4836 * @WMI_RTSCTS_FOR_NO_RATESERIES - Neither of rate-series should use RTS-CTS
   4837 * @WMI_RTSCTS_FOR_SECOND_RATESERIES - Only second rate-series will use RTS-CTS
   4838 * @WMI_RTSCTS_ACROSS_SW_RETRIES - Only the second rate-series will use RTS-CTS,
   4839 *                                 but if there's a sw retry, both the rate
   4840 *                                 series will use RTS-CTS.
   4841 * @WMI_RTSCTS_ERP - RTS/CTS used for ERP protection for every PPDU.
   4842 * @WMI_RTSCTS_FOR_ALL_RATESERIES - Enable RTS-CTS for all rate series.
   4843 */
   4844enum wmi_rtscts_profile {
   4845	WMI_RTSCTS_FOR_NO_RATESERIES = 0,
   4846	WMI_RTSCTS_FOR_SECOND_RATESERIES = 1,
   4847	WMI_RTSCTS_ACROSS_SW_RETRIES = 2,
   4848	WMI_RTSCTS_ERP = 3,
   4849	WMI_RTSCTS_FOR_ALL_RATESERIES = 4,
   4850};
   4851
   4852struct ath11k_hal_reg_cap {
   4853	u32 eeprom_rd;
   4854	u32 eeprom_rd_ext;
   4855	u32 regcap1;
   4856	u32 regcap2;
   4857	u32 wireless_modes;
   4858	u32 low_2ghz_chan;
   4859	u32 high_2ghz_chan;
   4860	u32 low_5ghz_chan;
   4861	u32 high_5ghz_chan;
   4862};
   4863
   4864struct ath11k_mem_chunk {
   4865	void *vaddr;
   4866	dma_addr_t paddr;
   4867	u32 len;
   4868	u32 req_id;
   4869};
   4870
   4871#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
   4872
   4873enum wmi_sta_ps_param_rx_wake_policy {
   4874	WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
   4875	WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
   4876};
   4877
   4878/* Do not change existing values! Used by ath11k_frame_mode parameter
   4879 * module parameter.
   4880 */
   4881enum ath11k_hw_txrx_mode {
   4882	ATH11K_HW_TXRX_RAW = 0,
   4883	ATH11K_HW_TXRX_NATIVE_WIFI = 1,
   4884	ATH11K_HW_TXRX_ETHERNET = 2,
   4885};
   4886
   4887struct wmi_wmm_params {
   4888	u32 tlv_header;
   4889	u32 cwmin;
   4890	u32 cwmax;
   4891	u32 aifs;
   4892	u32 txoplimit;
   4893	u32 acm;
   4894	u32 no_ack;
   4895} __packed;
   4896
   4897struct wmi_wmm_params_arg {
   4898	u8 acm;
   4899	u8 aifs;
   4900	u16 cwmin;
   4901	u16 cwmax;
   4902	u16 txop;
   4903	u8 no_ack;
   4904};
   4905
   4906struct wmi_vdev_set_wmm_params_cmd {
   4907	u32 tlv_header;
   4908	u32 vdev_id;
   4909	struct wmi_wmm_params wmm_params[4];
   4910	u32 wmm_param_type;
   4911} __packed;
   4912
   4913struct wmi_wmm_params_all_arg {
   4914	struct wmi_wmm_params_arg ac_be;
   4915	struct wmi_wmm_params_arg ac_bk;
   4916	struct wmi_wmm_params_arg ac_vi;
   4917	struct wmi_wmm_params_arg ac_vo;
   4918};
   4919
   4920#define ATH11K_TWT_DEF_STA_CONG_TIMER_MS		5000
   4921#define ATH11K_TWT_DEF_DEFAULT_SLOT_SIZE		10
   4922#define ATH11K_TWT_DEF_CONGESTION_THRESH_SETUP		50
   4923#define ATH11K_TWT_DEF_CONGESTION_THRESH_TEARDOWN	20
   4924#define ATH11K_TWT_DEF_CONGESTION_THRESH_CRITICAL	100
   4925#define ATH11K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN	80
   4926#define ATH11K_TWT_DEF_INTERFERENCE_THRESH_SETUP	50
   4927#define ATH11K_TWT_DEF_MIN_NO_STA_SETUP			10
   4928#define ATH11K_TWT_DEF_MIN_NO_STA_TEARDOWN		2
   4929#define ATH11K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS		2
   4930#define ATH11K_TWT_DEF_MIN_NO_TWT_SLOTS			2
   4931#define ATH11K_TWT_DEF_MAX_NO_STA_TWT			500
   4932#define ATH11K_TWT_DEF_MODE_CHECK_INTERVAL		10000
   4933#define ATH11K_TWT_DEF_ADD_STA_SLOT_INTERVAL		1000
   4934#define ATH11K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL		5000
   4935
   4936struct wmi_twt_enable_params_cmd {
   4937	u32 tlv_header;
   4938	u32 pdev_id;
   4939	u32 sta_cong_timer_ms;
   4940	u32 mbss_support;
   4941	u32 default_slot_size;
   4942	u32 congestion_thresh_setup;
   4943	u32 congestion_thresh_teardown;
   4944	u32 congestion_thresh_critical;
   4945	u32 interference_thresh_teardown;
   4946	u32 interference_thresh_setup;
   4947	u32 min_no_sta_setup;
   4948	u32 min_no_sta_teardown;
   4949	u32 no_of_bcast_mcast_slots;
   4950	u32 min_no_twt_slots;
   4951	u32 max_no_sta_twt;
   4952	u32 mode_check_interval;
   4953	u32 add_sta_slot_interval;
   4954	u32 remove_sta_slot_interval;
   4955} __packed;
   4956
   4957struct wmi_twt_disable_params_cmd {
   4958	u32 tlv_header;
   4959	u32 pdev_id;
   4960} __packed;
   4961
   4962enum WMI_HOST_TWT_COMMAND {
   4963	WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0,
   4964	WMI_HOST_TWT_COMMAND_SUGGEST_TWT,
   4965	WMI_HOST_TWT_COMMAND_DEMAND_TWT,
   4966	WMI_HOST_TWT_COMMAND_TWT_GROUPING,
   4967	WMI_HOST_TWT_COMMAND_ACCEPT_TWT,
   4968	WMI_HOST_TWT_COMMAND_ALTERNATE_TWT,
   4969	WMI_HOST_TWT_COMMAND_DICTATE_TWT,
   4970	WMI_HOST_TWT_COMMAND_REJECT_TWT,
   4971};
   4972
   4973#define WMI_TWT_ADD_DIALOG_FLAG_BCAST           BIT(8)
   4974#define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER         BIT(9)
   4975#define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE       BIT(10)
   4976#define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION      BIT(11)
   4977
   4978struct wmi_twt_add_dialog_params_cmd {
   4979	u32 tlv_header;
   4980	u32 vdev_id;
   4981	struct wmi_mac_addr peer_macaddr;
   4982	u32 dialog_id;
   4983	u32 wake_intvl_us;
   4984	u32 wake_intvl_mantis;
   4985	u32 wake_dura_us;
   4986	u32 sp_offset_us;
   4987	u32 flags;
   4988} __packed;
   4989
   4990struct wmi_twt_add_dialog_params {
   4991	u32 vdev_id;
   4992	u8 peer_macaddr[ETH_ALEN];
   4993	u32 dialog_id;
   4994	u32 wake_intvl_us;
   4995	u32 wake_intvl_mantis;
   4996	u32 wake_dura_us;
   4997	u32 sp_offset_us;
   4998	u8 twt_cmd;
   4999	u8 flag_bcast;
   5000	u8 flag_trigger;
   5001	u8 flag_flow_type;
   5002	u8 flag_protection;
   5003} __packed;
   5004
   5005enum  wmi_twt_add_dialog_status {
   5006	WMI_ADD_TWT_STATUS_OK,
   5007	WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED,
   5008	WMI_ADD_TWT_STATUS_USED_DIALOG_ID,
   5009	WMI_ADD_TWT_STATUS_INVALID_PARAM,
   5010	WMI_ADD_TWT_STATUS_NOT_READY,
   5011	WMI_ADD_TWT_STATUS_NO_RESOURCE,
   5012	WMI_ADD_TWT_STATUS_NO_ACK,
   5013	WMI_ADD_TWT_STATUS_NO_RESPONSE,
   5014	WMI_ADD_TWT_STATUS_DENIED,
   5015	WMI_ADD_TWT_STATUS_UNKNOWN_ERROR,
   5016};
   5017
   5018struct wmi_twt_add_dialog_event {
   5019	u32 vdev_id;
   5020	struct wmi_mac_addr peer_macaddr;
   5021	u32 dialog_id;
   5022	u32 status;
   5023} __packed;
   5024
   5025struct wmi_twt_del_dialog_params {
   5026	u32 vdev_id;
   5027	u8 peer_macaddr[ETH_ALEN];
   5028	u32 dialog_id;
   5029} __packed;
   5030
   5031struct wmi_twt_del_dialog_params_cmd {
   5032	u32 tlv_header;
   5033	u32 vdev_id;
   5034	struct wmi_mac_addr peer_macaddr;
   5035	u32 dialog_id;
   5036} __packed;
   5037
   5038struct wmi_twt_pause_dialog_params {
   5039	u32 vdev_id;
   5040	u8 peer_macaddr[ETH_ALEN];
   5041	u32 dialog_id;
   5042} __packed;
   5043
   5044struct wmi_twt_pause_dialog_params_cmd {
   5045	u32 tlv_header;
   5046	u32 vdev_id;
   5047	struct wmi_mac_addr peer_macaddr;
   5048	u32 dialog_id;
   5049} __packed;
   5050
   5051struct wmi_twt_resume_dialog_params {
   5052	u32 vdev_id;
   5053	u8 peer_macaddr[ETH_ALEN];
   5054	u32 dialog_id;
   5055	u32 sp_offset_us;
   5056	u32 next_twt_size;
   5057} __packed;
   5058
   5059struct wmi_twt_resume_dialog_params_cmd {
   5060	u32 tlv_header;
   5061	u32 vdev_id;
   5062	struct wmi_mac_addr peer_macaddr;
   5063	u32 dialog_id;
   5064	u32 sp_offset_us;
   5065	u32 next_twt_size;
   5066} __packed;
   5067
   5068struct wmi_obss_spatial_reuse_params_cmd {
   5069	u32 tlv_header;
   5070	u32 pdev_id;
   5071	u32 enable;
   5072	s32 obss_min;
   5073	s32 obss_max;
   5074	u32 vdev_id;
   5075} __packed;
   5076
   5077struct wmi_pdev_obss_pd_bitmap_cmd {
   5078	u32 tlv_header;
   5079	u32 pdev_id;
   5080	u32 bitmap[2];
   5081} __packed;
   5082
   5083#define ATH11K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS		200
   5084#define ATH11K_OBSS_COLOR_COLLISION_DETECTION_DISABLE		0
   5085#define ATH11K_OBSS_COLOR_COLLISION_DETECTION			1
   5086
   5087#define ATH11K_BSS_COLOR_COLLISION_DETECTION_STA_PERIOD_MS	10000
   5088#define ATH11K_BSS_COLOR_COLLISION_DETECTION_AP_PERIOD_MS	5000
   5089
   5090enum wmi_bss_color_collision {
   5091	WMI_BSS_COLOR_COLLISION_DISABLE = 0,
   5092	WMI_BSS_COLOR_COLLISION_DETECTION,
   5093	WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY,
   5094	WMI_BSS_COLOR_FREE_SLOT_AVAILABLE,
   5095};
   5096
   5097struct wmi_obss_color_collision_cfg_params_cmd {
   5098	u32 tlv_header;
   5099	u32 vdev_id;
   5100	u32 flags;
   5101	u32 evt_type;
   5102	u32 current_bss_color;
   5103	u32 detection_period_ms;
   5104	u32 scan_period_ms;
   5105	u32 free_slot_expiry_time_ms;
   5106} __packed;
   5107
   5108struct wmi_bss_color_change_enable_params_cmd {
   5109	u32 tlv_header;
   5110	u32 vdev_id;
   5111	u32 enable;
   5112} __packed;
   5113
   5114struct wmi_obss_color_collision_event {
   5115	u32 vdev_id;
   5116	u32 evt_type;
   5117	u64 obss_color_bitmap;
   5118} __packed;
   5119
   5120#define ATH11K_IPV4_TH_SEED_SIZE 5
   5121#define ATH11K_IPV6_TH_SEED_SIZE 11
   5122
   5123struct ath11k_wmi_pdev_lro_config_cmd {
   5124	u32 tlv_header;
   5125	u32 lro_enable;
   5126	u32 res;
   5127	u32 th_4[ATH11K_IPV4_TH_SEED_SIZE];
   5128	u32 th_6[ATH11K_IPV6_TH_SEED_SIZE];
   5129	u32 pdev_id;
   5130} __packed;
   5131
   5132#define ATH11K_WMI_SPECTRAL_COUNT_DEFAULT                 0
   5133#define ATH11K_WMI_SPECTRAL_PERIOD_DEFAULT              224
   5134#define ATH11K_WMI_SPECTRAL_PRIORITY_DEFAULT              1
   5135#define ATH11K_WMI_SPECTRAL_FFT_SIZE_DEFAULT              7
   5136#define ATH11K_WMI_SPECTRAL_GC_ENA_DEFAULT                1
   5137#define ATH11K_WMI_SPECTRAL_RESTART_ENA_DEFAULT           0
   5138#define ATH11K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT     -96
   5139#define ATH11K_WMI_SPECTRAL_INIT_DELAY_DEFAULT           80
   5140#define ATH11K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT          12
   5141#define ATH11K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT           8
   5142#define ATH11K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT           0
   5143#define ATH11K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT         0
   5144#define ATH11K_WMI_SPECTRAL_RSSI_THR_DEFAULT           0xf0
   5145#define ATH11K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT            0
   5146#define ATH11K_WMI_SPECTRAL_RPT_MODE_DEFAULT              2
   5147#define ATH11K_WMI_SPECTRAL_BIN_SCALE_DEFAULT             1
   5148#define ATH11K_WMI_SPECTRAL_DBM_ADJ_DEFAULT               1
   5149#define ATH11K_WMI_SPECTRAL_CHN_MASK_DEFAULT              1
   5150
   5151struct ath11k_wmi_vdev_spectral_conf_param {
   5152	u32 vdev_id;
   5153	u32 scan_count;
   5154	u32 scan_period;
   5155	u32 scan_priority;
   5156	u32 scan_fft_size;
   5157	u32 scan_gc_ena;
   5158	u32 scan_restart_ena;
   5159	u32 scan_noise_floor_ref;
   5160	u32 scan_init_delay;
   5161	u32 scan_nb_tone_thr;
   5162	u32 scan_str_bin_thr;
   5163	u32 scan_wb_rpt_mode;
   5164	u32 scan_rssi_rpt_mode;
   5165	u32 scan_rssi_thr;
   5166	u32 scan_pwr_format;
   5167	u32 scan_rpt_mode;
   5168	u32 scan_bin_scale;
   5169	u32 scan_dbm_adj;
   5170	u32 scan_chn_mask;
   5171} __packed;
   5172
   5173struct ath11k_wmi_vdev_spectral_conf_cmd {
   5174	u32 tlv_header;
   5175	struct ath11k_wmi_vdev_spectral_conf_param param;
   5176} __packed;
   5177
   5178#define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER  1
   5179#define ATH11K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR    2
   5180#define ATH11K_WMI_SPECTRAL_ENABLE_CMD_ENABLE    1
   5181#define ATH11K_WMI_SPECTRAL_ENABLE_CMD_DISABLE   2
   5182
   5183struct ath11k_wmi_vdev_spectral_enable_cmd {
   5184	u32 tlv_header;
   5185	u32 vdev_id;
   5186	u32 trigger_cmd;
   5187	u32 enable_cmd;
   5188} __packed;
   5189
   5190struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd {
   5191	u32 tlv_header;
   5192	u32 pdev_id;
   5193	u32 module_id;		/* see enum wmi_direct_buffer_module */
   5194	u32 base_paddr_lo;
   5195	u32 base_paddr_hi;
   5196	u32 head_idx_paddr_lo;
   5197	u32 head_idx_paddr_hi;
   5198	u32 tail_idx_paddr_lo;
   5199	u32 tail_idx_paddr_hi;
   5200	u32 num_elems;		/* Number of elems in the ring */
   5201	u32 buf_size;		/* size of allocated buffer in bytes */
   5202
   5203	/* Number of wmi_dma_buf_release_entry packed together */
   5204	u32 num_resp_per_event;
   5205
   5206	/* Target should timeout and send whatever resp
   5207	 * it has if this time expires, units in milliseconds
   5208	 */
   5209	u32 event_timeout_ms;
   5210} __packed;
   5211
   5212struct ath11k_wmi_dma_buf_release_fixed_param {
   5213	u32 pdev_id;
   5214	u32 module_id;
   5215	u32 num_buf_release_entry;
   5216	u32 num_meta_data_entry;
   5217} __packed;
   5218
   5219struct wmi_dma_buf_release_entry {
   5220	u32 tlv_header;
   5221	u32 paddr_lo;
   5222
   5223	/* Bits 11:0:   address of data
   5224	 * Bits 31:12:  host context data
   5225	 */
   5226	u32 paddr_hi;
   5227} __packed;
   5228
   5229#define WMI_SPECTRAL_META_INFO1_FREQ1		GENMASK(15, 0)
   5230#define WMI_SPECTRAL_META_INFO1_FREQ2		GENMASK(31, 16)
   5231
   5232#define WMI_SPECTRAL_META_INFO2_CHN_WIDTH	GENMASK(7, 0)
   5233
   5234struct wmi_dma_buf_release_meta_data {
   5235	u32 tlv_header;
   5236	s32 noise_floor[WMI_MAX_CHAINS];
   5237	u32 reset_delay;
   5238	u32 freq1;
   5239	u32 freq2;
   5240	u32 ch_width;
   5241} __packed;
   5242
   5243enum wmi_fils_discovery_cmd_type {
   5244	WMI_FILS_DISCOVERY_CMD,
   5245	WMI_UNSOL_BCAST_PROBE_RESP,
   5246};
   5247
   5248struct wmi_fils_discovery_cmd {
   5249	u32 tlv_header;
   5250	u32 vdev_id;
   5251	u32 interval;
   5252	u32 config; /* enum wmi_fils_discovery_cmd_type */
   5253} __packed;
   5254
   5255struct wmi_fils_discovery_tmpl_cmd {
   5256	u32 tlv_header;
   5257	u32 vdev_id;
   5258	u32 buf_len;
   5259} __packed;
   5260
   5261struct wmi_probe_tmpl_cmd {
   5262	u32 tlv_header;
   5263	u32 vdev_id;
   5264	u32 buf_len;
   5265} __packed;
   5266
   5267struct target_resource_config {
   5268	u32 num_vdevs;
   5269	u32 num_peers;
   5270	u32 num_active_peers;
   5271	u32 num_offload_peers;
   5272	u32 num_offload_reorder_buffs;
   5273	u32 num_peer_keys;
   5274	u32 num_tids;
   5275	u32 ast_skid_limit;
   5276	u32 tx_chain_mask;
   5277	u32 rx_chain_mask;
   5278	u32 rx_timeout_pri[4];
   5279	u32 rx_decap_mode;
   5280	u32 scan_max_pending_req;
   5281	u32 bmiss_offload_max_vdev;
   5282	u32 roam_offload_max_vdev;
   5283	u32 roam_offload_max_ap_profiles;
   5284	u32 num_mcast_groups;
   5285	u32 num_mcast_table_elems;
   5286	u32 mcast2ucast_mode;
   5287	u32 tx_dbg_log_size;
   5288	u32 num_wds_entries;
   5289	u32 dma_burst_size;
   5290	u32 mac_aggr_delim;
   5291	u32 rx_skip_defrag_timeout_dup_detection_check;
   5292	u32 vow_config;
   5293	u32 gtk_offload_max_vdev;
   5294	u32 num_msdu_desc;
   5295	u32 max_frag_entries;
   5296	u32 max_peer_ext_stats;
   5297	u32 smart_ant_cap;
   5298	u32 bk_minfree;
   5299	u32 be_minfree;
   5300	u32 vi_minfree;
   5301	u32 vo_minfree;
   5302	u32 rx_batchmode;
   5303	u32 tt_support;
   5304	u32 flag1;
   5305	u32 iphdr_pad_config;
   5306	u32 qwrap_config:16,
   5307	    alloc_frag_desc_for_data_pkt:16;
   5308	u32 num_tdls_vdevs;
   5309	u32 num_tdls_conn_table_entries;
   5310	u32 beacon_tx_offload_max_vdev;
   5311	u32 num_multicast_filter_entries;
   5312	u32 num_wow_filters;
   5313	u32 num_keep_alive_pattern;
   5314	u32 keep_alive_pattern_size;
   5315	u32 max_tdls_concurrent_sleep_sta;
   5316	u32 max_tdls_concurrent_buffer_sta;
   5317	u32 wmi_send_separate;
   5318	u32 num_ocb_vdevs;
   5319	u32 num_ocb_channels;
   5320	u32 num_ocb_schedules;
   5321	u32 num_ns_ext_tuples_cfg;
   5322	u32 bpf_instruction_size;
   5323	u32 max_bssid_rx_filters;
   5324	u32 use_pdev_id;
   5325	u32 peer_map_unmap_v2_support;
   5326	u32 sched_params;
   5327	u32 twt_ap_pdev_count;
   5328	u32 twt_ap_sta_count;
   5329};
   5330
   5331enum wmi_sys_cap_info_flags {
   5332	WMI_SYS_CAP_INFO_RXTX_LED	= BIT(0),
   5333	WMI_SYS_CAP_INFO_RFKILL	= BIT(1),
   5334};
   5335
   5336#define WMI_RFKILL_CFG_GPIO_PIN_NUM		GENMASK(5, 0)
   5337#define WMI_RFKILL_CFG_RADIO_LEVEL		BIT(6)
   5338#define WMI_RFKILL_CFG_PIN_AS_GPIO		GENMASK(10, 7)
   5339
   5340enum wmi_rfkill_enable_radio {
   5341	WMI_RFKILL_ENABLE_RADIO_ON	= 0,
   5342	WMI_RFKILL_ENABLE_RADIO_OFF	= 1,
   5343};
   5344
   5345enum wmi_rfkill_radio_state {
   5346	WMI_RFKILL_RADIO_STATE_OFF	= 1,
   5347	WMI_RFKILL_RADIO_STATE_ON	= 2,
   5348};
   5349
   5350struct wmi_rfkill_state_change_ev {
   5351	u32 gpio_pin_num;
   5352	u32 int_type;
   5353	u32 radio_state;
   5354} __packed;
   5355
   5356enum wmi_debug_log_param {
   5357	WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1,
   5358	WMI_DEBUG_LOG_PARAM_VDEV_ENABLE,
   5359	WMI_DEBUG_LOG_PARAM_VDEV_DISABLE,
   5360	WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP,
   5361	WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP,
   5362	WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP,
   5363};
   5364
   5365struct wmi_debug_log_config_cmd_fixed_param {
   5366	u32 tlv_header;
   5367	u32 dbg_log_param;
   5368	u32 value;
   5369} __packed;
   5370
   5371#define WMI_MAX_MEM_REQS 32
   5372
   5373#define MAX_RADIOS 3
   5374
   5375#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
   5376#define WMI_SEND_TIMEOUT_HZ (3 * HZ)
   5377
   5378struct ath11k_wmi_base {
   5379	struct ath11k_base *ab;
   5380	struct ath11k_pdev_wmi wmi[MAX_RADIOS];
   5381	enum ath11k_htc_ep_id wmi_endpoint_id[MAX_RADIOS];
   5382	u32 max_msg_len[MAX_RADIOS];
   5383
   5384	struct completion service_ready;
   5385	struct completion unified_ready;
   5386	DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE);
   5387	wait_queue_head_t tx_credits_wq;
   5388	const struct wmi_peer_flags_map *peer_flags;
   5389	u32 num_mem_chunks;
   5390	u32 rx_decap_mode;
   5391	struct wmi_host_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
   5392
   5393	enum wmi_host_hw_mode_config_type preferred_hw_mode;
   5394	struct target_resource_config  wlan_resource_config;
   5395
   5396	struct ath11k_targ_cap *targ_cap;
   5397};
   5398
   5399/* Definition of HW data filtering */
   5400enum hw_data_filter_type {
   5401	WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0),
   5402	WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1),
   5403};
   5404
   5405struct wmi_hw_data_filter_cmd {
   5406	u32 tlv_header;
   5407	u32 vdev_id;
   5408	u32 enable;
   5409	u32 hw_filter_bitmap;
   5410} __packed;
   5411
   5412/* WOW structures */
   5413enum wmi_wow_wakeup_event {
   5414	WOW_BMISS_EVENT = 0,
   5415	WOW_BETTER_AP_EVENT,
   5416	WOW_DEAUTH_RECVD_EVENT,
   5417	WOW_MAGIC_PKT_RECVD_EVENT,
   5418	WOW_GTK_ERR_EVENT,
   5419	WOW_FOURWAY_HSHAKE_EVENT,
   5420	WOW_EAPOL_RECVD_EVENT,
   5421	WOW_NLO_DETECTED_EVENT,
   5422	WOW_DISASSOC_RECVD_EVENT,
   5423	WOW_PATTERN_MATCH_EVENT,
   5424	WOW_CSA_IE_EVENT,
   5425	WOW_PROBE_REQ_WPS_IE_EVENT,
   5426	WOW_AUTH_REQ_EVENT,
   5427	WOW_ASSOC_REQ_EVENT,
   5428	WOW_HTT_EVENT,
   5429	WOW_RA_MATCH_EVENT,
   5430	WOW_HOST_AUTO_SHUTDOWN_EVENT,
   5431	WOW_IOAC_MAGIC_EVENT,
   5432	WOW_IOAC_SHORT_EVENT,
   5433	WOW_IOAC_EXTEND_EVENT,
   5434	WOW_IOAC_TIMER_EVENT,
   5435	WOW_DFS_PHYERR_RADAR_EVENT,
   5436	WOW_BEACON_EVENT,
   5437	WOW_CLIENT_KICKOUT_EVENT,
   5438	WOW_EVENT_MAX,
   5439};
   5440
   5441enum wmi_wow_interface_cfg {
   5442	WOW_IFACE_PAUSE_ENABLED,
   5443	WOW_IFACE_PAUSE_DISABLED
   5444};
   5445
   5446#define C2S(x) case x: return #x
   5447
   5448static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
   5449{
   5450	switch (ev) {
   5451	C2S(WOW_BMISS_EVENT);
   5452	C2S(WOW_BETTER_AP_EVENT);
   5453	C2S(WOW_DEAUTH_RECVD_EVENT);
   5454	C2S(WOW_MAGIC_PKT_RECVD_EVENT);
   5455	C2S(WOW_GTK_ERR_EVENT);
   5456	C2S(WOW_FOURWAY_HSHAKE_EVENT);
   5457	C2S(WOW_EAPOL_RECVD_EVENT);
   5458	C2S(WOW_NLO_DETECTED_EVENT);
   5459	C2S(WOW_DISASSOC_RECVD_EVENT);
   5460	C2S(WOW_PATTERN_MATCH_EVENT);
   5461	C2S(WOW_CSA_IE_EVENT);
   5462	C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
   5463	C2S(WOW_AUTH_REQ_EVENT);
   5464	C2S(WOW_ASSOC_REQ_EVENT);
   5465	C2S(WOW_HTT_EVENT);
   5466	C2S(WOW_RA_MATCH_EVENT);
   5467	C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
   5468	C2S(WOW_IOAC_MAGIC_EVENT);
   5469	C2S(WOW_IOAC_SHORT_EVENT);
   5470	C2S(WOW_IOAC_EXTEND_EVENT);
   5471	C2S(WOW_IOAC_TIMER_EVENT);
   5472	C2S(WOW_DFS_PHYERR_RADAR_EVENT);
   5473	C2S(WOW_BEACON_EVENT);
   5474	C2S(WOW_CLIENT_KICKOUT_EVENT);
   5475	C2S(WOW_EVENT_MAX);
   5476	default:
   5477		return NULL;
   5478	}
   5479}
   5480
   5481enum wmi_wow_wake_reason {
   5482	WOW_REASON_UNSPECIFIED = -1,
   5483	WOW_REASON_NLOD = 0,
   5484	WOW_REASON_AP_ASSOC_LOST,
   5485	WOW_REASON_LOW_RSSI,
   5486	WOW_REASON_DEAUTH_RECVD,
   5487	WOW_REASON_DISASSOC_RECVD,
   5488	WOW_REASON_GTK_HS_ERR,
   5489	WOW_REASON_EAP_REQ,
   5490	WOW_REASON_FOURWAY_HS_RECV,
   5491	WOW_REASON_TIMER_INTR_RECV,
   5492	WOW_REASON_PATTERN_MATCH_FOUND,
   5493	WOW_REASON_RECV_MAGIC_PATTERN,
   5494	WOW_REASON_P2P_DISC,
   5495	WOW_REASON_WLAN_HB,
   5496	WOW_REASON_CSA_EVENT,
   5497	WOW_REASON_PROBE_REQ_WPS_IE_RECV,
   5498	WOW_REASON_AUTH_REQ_RECV,
   5499	WOW_REASON_ASSOC_REQ_RECV,
   5500	WOW_REASON_HTT_EVENT,
   5501	WOW_REASON_RA_MATCH,
   5502	WOW_REASON_HOST_AUTO_SHUTDOWN,
   5503	WOW_REASON_IOAC_MAGIC_EVENT,
   5504	WOW_REASON_IOAC_SHORT_EVENT,
   5505	WOW_REASON_IOAC_EXTEND_EVENT,
   5506	WOW_REASON_IOAC_TIMER_EVENT,
   5507	WOW_REASON_ROAM_HO,
   5508	WOW_REASON_DFS_PHYERR_RADADR_EVENT,
   5509	WOW_REASON_BEACON_RECV,
   5510	WOW_REASON_CLIENT_KICKOUT_EVENT,
   5511	WOW_REASON_PAGE_FAULT = 0x3a,
   5512	WOW_REASON_DEBUG_TEST = 0xFF,
   5513};
   5514
   5515static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
   5516{
   5517	switch (reason) {
   5518	C2S(WOW_REASON_UNSPECIFIED);
   5519	C2S(WOW_REASON_NLOD);
   5520	C2S(WOW_REASON_AP_ASSOC_LOST);
   5521	C2S(WOW_REASON_LOW_RSSI);
   5522	C2S(WOW_REASON_DEAUTH_RECVD);
   5523	C2S(WOW_REASON_DISASSOC_RECVD);
   5524	C2S(WOW_REASON_GTK_HS_ERR);
   5525	C2S(WOW_REASON_EAP_REQ);
   5526	C2S(WOW_REASON_FOURWAY_HS_RECV);
   5527	C2S(WOW_REASON_TIMER_INTR_RECV);
   5528	C2S(WOW_REASON_PATTERN_MATCH_FOUND);
   5529	C2S(WOW_REASON_RECV_MAGIC_PATTERN);
   5530	C2S(WOW_REASON_P2P_DISC);
   5531	C2S(WOW_REASON_WLAN_HB);
   5532	C2S(WOW_REASON_CSA_EVENT);
   5533	C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
   5534	C2S(WOW_REASON_AUTH_REQ_RECV);
   5535	C2S(WOW_REASON_ASSOC_REQ_RECV);
   5536	C2S(WOW_REASON_HTT_EVENT);
   5537	C2S(WOW_REASON_RA_MATCH);
   5538	C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
   5539	C2S(WOW_REASON_IOAC_MAGIC_EVENT);
   5540	C2S(WOW_REASON_IOAC_SHORT_EVENT);
   5541	C2S(WOW_REASON_IOAC_EXTEND_EVENT);
   5542	C2S(WOW_REASON_IOAC_TIMER_EVENT);
   5543	C2S(WOW_REASON_ROAM_HO);
   5544	C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
   5545	C2S(WOW_REASON_BEACON_RECV);
   5546	C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
   5547	C2S(WOW_REASON_PAGE_FAULT);
   5548	C2S(WOW_REASON_DEBUG_TEST);
   5549	default:
   5550		return NULL;
   5551	}
   5552}
   5553
   5554#undef C2S
   5555
   5556struct wmi_wow_ev_arg {
   5557	u32 vdev_id;
   5558	u32 flag;
   5559	enum wmi_wow_wake_reason wake_reason;
   5560	u32 data_len;
   5561};
   5562
   5563enum wmi_tlv_pattern_type {
   5564	WOW_PATTERN_MIN = 0,
   5565	WOW_BITMAP_PATTERN = WOW_PATTERN_MIN,
   5566	WOW_IPV4_SYNC_PATTERN,
   5567	WOW_IPV6_SYNC_PATTERN,
   5568	WOW_WILD_CARD_PATTERN,
   5569	WOW_TIMER_PATTERN,
   5570	WOW_MAGIC_PATTERN,
   5571	WOW_IPV6_RA_PATTERN,
   5572	WOW_IOAC_PKT_PATTERN,
   5573	WOW_IOAC_TMR_PATTERN,
   5574	WOW_PATTERN_MAX
   5575};
   5576
   5577#define WOW_DEFAULT_BITMAP_PATTERN_SIZE		148
   5578#define WOW_DEFAULT_BITMASK_SIZE		148
   5579
   5580#define WOW_MIN_PATTERN_SIZE	1
   5581#define WOW_MAX_PATTERN_SIZE	148
   5582#define WOW_MAX_PKT_OFFSET	128
   5583#define WOW_HDR_LEN	(sizeof(struct ieee80211_hdr_3addr) + \
   5584	sizeof(struct rfc1042_hdr))
   5585#define WOW_MAX_REDUCE	(WOW_HDR_LEN - sizeof(struct ethhdr) - \
   5586	offsetof(struct ieee80211_hdr_3addr, addr1))
   5587
   5588struct wmi_wow_add_del_event_cmd {
   5589	u32 tlv_header;
   5590	u32 vdev_id;
   5591	u32 is_add;
   5592	u32 event_bitmap;
   5593} __packed;
   5594
   5595struct wmi_wow_enable_cmd {
   5596	u32 tlv_header;
   5597	u32 enable;
   5598	u32 pause_iface_config;
   5599	u32 flags;
   5600}  __packed;
   5601
   5602struct wmi_wow_host_wakeup_ind {
   5603	u32 tlv_header;
   5604	u32 reserved;
   5605} __packed;
   5606
   5607struct wmi_tlv_wow_event_info {
   5608	u32 vdev_id;
   5609	u32 flag;
   5610	u32 wake_reason;
   5611	u32 data_len;
   5612} __packed;
   5613
   5614struct wmi_wow_bitmap_pattern {
   5615	u32 tlv_header;
   5616	u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE];
   5617	u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE];
   5618	u32 pattern_offset;
   5619	u32 pattern_len;
   5620	u32 bitmask_len;
   5621	u32 pattern_id;
   5622} __packed;
   5623
   5624struct wmi_wow_add_pattern_cmd {
   5625	u32 tlv_header;
   5626	u32 vdev_id;
   5627	u32 pattern_id;
   5628	u32 pattern_type;
   5629} __packed;
   5630
   5631struct wmi_wow_del_pattern_cmd {
   5632	u32 tlv_header;
   5633	u32 vdev_id;
   5634	u32 pattern_id;
   5635	u32 pattern_type;
   5636} __packed;
   5637
   5638#define WMI_PNO_MAX_SCHED_SCAN_PLANS      2
   5639#define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT   7200
   5640#define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100
   5641#define WMI_PNO_MAX_NETW_CHANNELS         26
   5642#define WMI_PNO_MAX_NETW_CHANNELS_EX      60
   5643#define WMI_PNO_MAX_SUPP_NETWORKS         WLAN_SCAN_PARAMS_MAX_SSID
   5644#define WMI_PNO_MAX_IE_LENGTH             WLAN_SCAN_PARAMS_MAX_IE_LEN
   5645
   5646/* size based of dot11 declaration without extra IEs as we will not carry those for PNO */
   5647#define WMI_PNO_MAX_PB_REQ_SIZE    450
   5648
   5649#define WMI_PNO_24G_DEFAULT_CH     1
   5650#define WMI_PNO_5G_DEFAULT_CH      36
   5651
   5652#define WMI_ACTIVE_MAX_CHANNEL_TIME 40
   5653#define WMI_PASSIVE_MAX_CHANNEL_TIME   110
   5654
   5655/* SSID broadcast type */
   5656enum wmi_ssid_bcast_type {
   5657	BCAST_UNKNOWN      = 0,
   5658	BCAST_NORMAL       = 1,
   5659	BCAST_HIDDEN       = 2,
   5660};
   5661
   5662#define WMI_NLO_MAX_SSIDS    16
   5663#define WMI_NLO_MAX_CHAN     48
   5664
   5665#define WMI_NLO_CONFIG_STOP                             BIT(0)
   5666#define WMI_NLO_CONFIG_START                            BIT(1)
   5667#define WMI_NLO_CONFIG_RESET                            BIT(2)
   5668#define WMI_NLO_CONFIG_SLOW_SCAN                        BIT(4)
   5669#define WMI_NLO_CONFIG_FAST_SCAN                        BIT(5)
   5670#define WMI_NLO_CONFIG_SSID_HIDE_EN                     BIT(6)
   5671
   5672/* This bit is used to indicate if EPNO or supplicant PNO is enabled.
   5673 * Only one of them can be enabled at a given time
   5674 */
   5675#define WMI_NLO_CONFIG_ENLO                             BIT(7)
   5676#define WMI_NLO_CONFIG_SCAN_PASSIVE                     BIT(8)
   5677#define WMI_NLO_CONFIG_ENLO_RESET                       BIT(9)
   5678#define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ         BIT(10)
   5679#define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ       BIT(11)
   5680#define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12)
   5681#define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG          BIT(13)
   5682
   5683struct wmi_nlo_ssid_param {
   5684	u32 valid;
   5685	struct wmi_ssid ssid;
   5686} __packed;
   5687
   5688struct wmi_nlo_enc_param {
   5689	u32 valid;
   5690	u32 enc_type;
   5691} __packed;
   5692
   5693struct wmi_nlo_auth_param {
   5694	u32 valid;
   5695	u32 auth_type;
   5696} __packed;
   5697
   5698struct wmi_nlo_bcast_nw_param {
   5699	u32 valid;
   5700	u32 bcast_nw_type;
   5701} __packed;
   5702
   5703struct wmi_nlo_rssi_param {
   5704	u32 valid;
   5705	s32 rssi;
   5706} __packed;
   5707
   5708struct nlo_configured_parameters {
   5709	/* TLV tag and len;*/
   5710	u32 tlv_header;
   5711	struct wmi_nlo_ssid_param ssid;
   5712	struct wmi_nlo_enc_param enc_type;
   5713	struct wmi_nlo_auth_param auth_type;
   5714	struct wmi_nlo_rssi_param rssi_cond;
   5715
   5716	/* indicates if the SSID is hidden or not */
   5717	struct wmi_nlo_bcast_nw_param bcast_nw_type;
   5718} __packed;
   5719
   5720struct wmi_network_type {
   5721	struct wmi_ssid ssid;
   5722	u32 authentication;
   5723	u32 encryption;
   5724	u32 bcast_nw_type;
   5725	u8 channel_count;
   5726	u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX];
   5727	s32 rssi_threshold;
   5728};
   5729
   5730struct wmi_pno_scan_req {
   5731	u8 enable;
   5732	u8 vdev_id;
   5733	u8 uc_networks_count;
   5734	struct wmi_network_type a_networks[WMI_PNO_MAX_SUPP_NETWORKS];
   5735	u32 fast_scan_period;
   5736	u32 slow_scan_period;
   5737	u8 fast_scan_max_cycles;
   5738
   5739	bool do_passive_scan;
   5740
   5741	u32 delay_start_time;
   5742	u32 active_min_time;
   5743	u32 active_max_time;
   5744	u32 passive_min_time;
   5745	u32 passive_max_time;
   5746
   5747	/* mac address randomization attributes */
   5748	u32 enable_pno_scan_randomization;
   5749	u8 mac_addr[ETH_ALEN];
   5750	u8 mac_addr_mask[ETH_ALEN];
   5751};
   5752
   5753struct wmi_wow_nlo_config_cmd {
   5754	u32 tlv_header;
   5755	u32 flags;
   5756	u32 vdev_id;
   5757	u32 fast_scan_max_cycles;
   5758	u32 active_dwell_time;
   5759	u32 passive_dwell_time;
   5760	u32 probe_bundle_size;
   5761
   5762	/* ART = IRT */
   5763	u32 rest_time;
   5764
   5765	/* Max value that can be reached after SBM */
   5766	u32 max_rest_time;
   5767
   5768	/* SBM */
   5769	u32 scan_backoff_multiplier;
   5770
   5771	/* SCBM */
   5772	u32 fast_scan_period;
   5773
   5774	/* specific to windows */
   5775	u32 slow_scan_period;
   5776
   5777	u32 no_of_ssids;
   5778
   5779	u32 num_of_channels;
   5780
   5781	/* NLO scan start delay time in milliseconds */
   5782	u32 delay_start_time;
   5783
   5784	/* MAC Address to use in Probe Req as SA */
   5785	struct wmi_mac_addr mac_addr;
   5786
   5787	/* Mask on which MAC has to be randomized */
   5788	struct wmi_mac_addr mac_mask;
   5789
   5790	/* IE bitmap to use in Probe Req */
   5791	u32 ie_bitmap[8];
   5792
   5793	/* Number of vendor OUIs. In the TLV vendor_oui[] */
   5794	u32 num_vendor_oui;
   5795
   5796	/* Number of connected NLO band preferences */
   5797	u32 num_cnlo_band_pref;
   5798
   5799	/* The TLVs will follow.
   5800	 * nlo_configured_parameters nlo_list[];
   5801	 * u32 channel_list[num_of_channels];
   5802	 */
   5803} __packed;
   5804
   5805#define WMI_MAX_NS_OFFLOADS           2
   5806#define WMI_MAX_ARP_OFFLOADS          2
   5807
   5808#define WMI_ARPOL_FLAGS_VALID              BIT(0)
   5809#define WMI_ARPOL_FLAGS_MAC_VALID          BIT(1)
   5810#define WMI_ARPOL_FLAGS_REMOTE_IP_VALID    BIT(2)
   5811
   5812struct wmi_arp_offload_tuple {
   5813	u32 tlv_header;
   5814	u32 flags;
   5815	u8 target_ipaddr[4];
   5816	u8 remote_ipaddr[4];
   5817	struct wmi_mac_addr target_mac;
   5818} __packed;
   5819
   5820#define WMI_NSOL_FLAGS_VALID               BIT(0)
   5821#define WMI_NSOL_FLAGS_MAC_VALID           BIT(1)
   5822#define WMI_NSOL_FLAGS_REMOTE_IP_VALID     BIT(2)
   5823#define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST     BIT(3)
   5824
   5825#define WMI_NSOL_MAX_TARGET_IPS    2
   5826
   5827struct wmi_ns_offload_tuple {
   5828	u32 tlv_header;
   5829	u32 flags;
   5830	u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16];
   5831	u8 solicitation_ipaddr[16];
   5832	u8 remote_ipaddr[16];
   5833	struct wmi_mac_addr target_mac;
   5834} __packed;
   5835
   5836struct wmi_set_arp_ns_offload_cmd {
   5837	u32 tlv_header;
   5838	u32 flags;
   5839	u32 vdev_id;
   5840	u32 num_ns_ext_tuples;
   5841	/* The TLVs follow:
   5842	 * wmi_ns_offload_tuple  ns_tuples[WMI_MAX_NS_OFFLOADS];
   5843	 * wmi_arp_offload_tuple arp_tuples[WMI_MAX_ARP_OFFLOADS];
   5844	 * wmi_ns_offload_tuple  ns_ext_tuples[num_ns_ext_tuples];
   5845	 */
   5846} __packed;
   5847
   5848#define GTK_OFFLOAD_OPCODE_MASK             0xFF000000
   5849#define GTK_OFFLOAD_ENABLE_OPCODE           0x01000000
   5850#define GTK_OFFLOAD_DISABLE_OPCODE          0x02000000
   5851#define GTK_OFFLOAD_REQUEST_STATUS_OPCODE   0x04000000
   5852
   5853#define GTK_OFFLOAD_KEK_BYTES       16
   5854#define GTK_OFFLOAD_KCK_BYTES       16
   5855#define GTK_REPLAY_COUNTER_BYTES    8
   5856#define WMI_MAX_KEY_LEN             32
   5857#define IGTK_PN_SIZE                6
   5858
   5859struct wmi_replayc_cnt {
   5860	union {
   5861		u8 counter[GTK_REPLAY_COUNTER_BYTES];
   5862		struct {
   5863			u32 word0;
   5864			u32 word1;
   5865		} __packed;
   5866	} __packed;
   5867} __packed;
   5868
   5869struct wmi_gtk_offload_status_event {
   5870	u32 vdev_id;
   5871	u32 flags;
   5872	u32 refresh_cnt;
   5873	struct wmi_replayc_cnt replay_ctr;
   5874	u8 igtk_key_index;
   5875	u8 igtk_key_length;
   5876	u8 igtk_key_rsc[IGTK_PN_SIZE];
   5877	u8 igtk_key[WMI_MAX_KEY_LEN];
   5878	u8 gtk_key_index;
   5879	u8 gtk_key_length;
   5880	u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES];
   5881	u8 gtk_key[WMI_MAX_KEY_LEN];
   5882} __packed;
   5883
   5884struct wmi_gtk_rekey_offload_cmd {
   5885	u32 tlv_header;
   5886	u32 vdev_id;
   5887	u32 flags;
   5888	u8 kek[GTK_OFFLOAD_KEK_BYTES];
   5889	u8 kck[GTK_OFFLOAD_KCK_BYTES];
   5890	u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES];
   5891} __packed;
   5892
   5893#define BIOS_SAR_TABLE_LEN	(22)
   5894#define BIOS_SAR_RSVD1_LEN	(6)
   5895#define BIOS_SAR_RSVD2_LEN	(18)
   5896
   5897struct wmi_pdev_set_sar_table_cmd {
   5898	u32 tlv_header;
   5899	u32 pdev_id;
   5900	u32 sar_len;
   5901	u32 rsvd_len;
   5902} __packed;
   5903
   5904struct wmi_pdev_set_geo_table_cmd {
   5905	u32 tlv_header;
   5906	u32 pdev_id;
   5907	u32 rsvd_len;
   5908} __packed;
   5909
   5910struct wmi_sta_keepalive_cmd {
   5911	u32 tlv_header;
   5912	u32 vdev_id;
   5913	u32 enabled;
   5914
   5915	/* WMI_STA_KEEPALIVE_METHOD_ */
   5916	u32 method;
   5917
   5918	/* in seconds */
   5919	u32 interval;
   5920
   5921	/* following this structure is the TLV for struct
   5922	 * wmi_sta_keepalive_arp_resp
   5923	 */
   5924} __packed;
   5925
   5926struct wmi_sta_keepalive_arp_resp {
   5927	u32 tlv_header;
   5928	u32 src_ip4_addr;
   5929	u32 dest_ip4_addr;
   5930	struct wmi_mac_addr dest_mac_addr;
   5931} __packed;
   5932
   5933struct wmi_sta_keepalive_arg {
   5934	u32 vdev_id;
   5935	u32 enabled;
   5936	u32 method;
   5937	u32 interval;
   5938	u32 src_ip4_addr;
   5939	u32 dest_ip4_addr;
   5940	const u8 dest_mac_addr[ETH_ALEN];
   5941};
   5942
   5943enum wmi_sta_keepalive_method {
   5944	WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
   5945	WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2,
   5946	WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3,
   5947	WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4,
   5948	WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5,
   5949};
   5950
   5951#define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT	30
   5952#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE	0
   5953
   5954int ath11k_wmi_cmd_send(struct ath11k_pdev_wmi *wmi, struct sk_buff *skb,
   5955			u32 cmd_id);
   5956struct sk_buff *ath11k_wmi_alloc_skb(struct ath11k_wmi_base *wmi_sc, u32 len);
   5957int ath11k_wmi_mgmt_send(struct ath11k *ar, u32 vdev_id, u32 buf_id,
   5958			 struct sk_buff *frame);
   5959int ath11k_wmi_bcn_tmpl(struct ath11k *ar, u32 vdev_id,
   5960			struct ieee80211_mutable_offsets *offs,
   5961			struct sk_buff *bcn);
   5962int ath11k_wmi_vdev_down(struct ath11k *ar, u8 vdev_id);
   5963int ath11k_wmi_vdev_up(struct ath11k *ar, u32 vdev_id, u32 aid,
   5964		       const u8 *bssid);
   5965int ath11k_wmi_vdev_stop(struct ath11k *ar, u8 vdev_id);
   5966int ath11k_wmi_vdev_start(struct ath11k *ar, struct wmi_vdev_start_req_arg *arg,
   5967			  bool restart);
   5968int ath11k_wmi_set_peer_param(struct ath11k *ar, const u8 *peer_addr,
   5969			      u32 vdev_id, u32 param_id, u32 param_val);
   5970int ath11k_wmi_pdev_set_param(struct ath11k *ar, u32 param_id,
   5971			      u32 param_value, u8 pdev_id);
   5972int ath11k_wmi_pdev_set_ps_mode(struct ath11k *ar, int vdev_id,
   5973				enum wmi_sta_ps_mode psmode);
   5974int ath11k_wmi_wait_for_unified_ready(struct ath11k_base *ab);
   5975int ath11k_wmi_cmd_init(struct ath11k_base *ab);
   5976int ath11k_wmi_wait_for_service_ready(struct ath11k_base *ab);
   5977int ath11k_wmi_connect(struct ath11k_base *ab);
   5978int ath11k_wmi_pdev_attach(struct ath11k_base *ab,
   5979			   u8 pdev_id);
   5980int ath11k_wmi_attach(struct ath11k_base *ab);
   5981void ath11k_wmi_detach(struct ath11k_base *ab);
   5982int ath11k_wmi_vdev_create(struct ath11k *ar, u8 *macaddr,
   5983			   struct vdev_create_params *param);
   5984int ath11k_wmi_peer_rx_reorder_queue_setup(struct ath11k *ar, int vdev_id,
   5985					   const u8 *addr, dma_addr_t paddr,
   5986					   u8 tid, u8 ba_window_size_valid,
   5987					   u32 ba_window_size);
   5988int ath11k_wmi_send_peer_create_cmd(struct ath11k *ar,
   5989				    struct peer_create_params *param);
   5990int ath11k_wmi_vdev_set_param_cmd(struct ath11k *ar, u32 vdev_id,
   5991				  u32 param_id, u32 param_value);
   5992
   5993int ath11k_wmi_set_sta_ps_param(struct ath11k *ar, u32 vdev_id,
   5994				u32 param, u32 param_value);
   5995int ath11k_wmi_force_fw_hang_cmd(struct ath11k *ar, u32 type, u32 delay_time_ms);
   5996int ath11k_wmi_send_peer_delete_cmd(struct ath11k *ar,
   5997				    const u8 *peer_addr, u8 vdev_id);
   5998int ath11k_wmi_vdev_delete(struct ath11k *ar, u8 vdev_id);
   5999void ath11k_wmi_start_scan_init(struct ath11k *ar, struct scan_req_params *arg);
   6000int ath11k_wmi_send_scan_start_cmd(struct ath11k *ar,
   6001				   struct scan_req_params *params);
   6002int ath11k_wmi_send_scan_stop_cmd(struct ath11k *ar,
   6003				  struct scan_cancel_param *param);
   6004int ath11k_wmi_send_wmm_update_cmd_tlv(struct ath11k *ar, u32 vdev_id,
   6005				       struct wmi_wmm_params_all_arg *param);
   6006int ath11k_wmi_pdev_suspend(struct ath11k *ar, u32 suspend_opt,
   6007			    u32 pdev_id);
   6008int ath11k_wmi_pdev_resume(struct ath11k *ar, u32 pdev_id);
   6009
   6010int ath11k_wmi_send_peer_assoc_cmd(struct ath11k *ar,
   6011				   struct peer_assoc_params *param);
   6012int ath11k_wmi_vdev_install_key(struct ath11k *ar,
   6013				struct wmi_vdev_install_key_arg *arg);
   6014int ath11k_wmi_pdev_bss_chan_info_request(struct ath11k *ar,
   6015					  enum wmi_bss_chan_info_req_type type);
   6016int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar,
   6017				      struct stats_request_params *param);
   6018int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar);
   6019int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar,
   6020					u8 peer_addr[ETH_ALEN],
   6021					struct peer_flush_params *param);
   6022int ath11k_wmi_send_set_ap_ps_param_cmd(struct ath11k *ar, u8 *peer_addr,
   6023					struct ap_ps_params *param);
   6024int ath11k_wmi_send_scan_chan_list_cmd(struct ath11k *ar,
   6025				       struct scan_chan_list_params *chan_list);
   6026int ath11k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath11k *ar,
   6027						  u32 pdev_id);
   6028int ath11k_wmi_addba_clear_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac);
   6029int ath11k_wmi_addba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
   6030			  u32 tid, u32 buf_size);
   6031int ath11k_wmi_addba_set_resp(struct ath11k *ar, u32 vdev_id, const u8 *mac,
   6032			      u32 tid, u32 status);
   6033int ath11k_wmi_delba_send(struct ath11k *ar, u32 vdev_id, const u8 *mac,
   6034			  u32 tid, u32 initiator, u32 reason);
   6035int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar,
   6036					    u32 vdev_id, u32 bcn_ctrl_op);
   6037int ath11k_wmi_send_set_current_country_cmd(struct ath11k *ar,
   6038					    struct wmi_set_current_country_params *param);
   6039int
   6040ath11k_wmi_send_init_country_cmd(struct ath11k *ar,
   6041				 struct wmi_init_country_params init_cc_param);
   6042
   6043int ath11k_wmi_send_11d_scan_start_cmd(struct ath11k *ar,
   6044				       struct wmi_11d_scan_start_params *param);
   6045int ath11k_wmi_send_11d_scan_stop_cmd(struct ath11k *ar, u32 vdev_id);
   6046
   6047int
   6048ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar,
   6049					     struct thermal_mitigation_params *param);
   6050int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter);
   6051int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar);
   6052int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
   6053int
   6054ath11k_wmi_rx_reord_queue_remove(struct ath11k *ar,
   6055				 struct rx_reorder_queue_remove_params *param);
   6056int ath11k_wmi_send_pdev_set_regdomain(struct ath11k *ar,
   6057				       struct pdev_set_regdomain_params *param);
   6058int ath11k_wmi_pull_fw_stats(struct ath11k_base *ab, struct sk_buff *skb,
   6059			     struct ath11k_fw_stats *stats);
   6060size_t ath11k_wmi_fw_stats_num_peers(struct list_head *head);
   6061size_t ath11k_wmi_fw_stats_num_peers_extd(struct list_head *head);
   6062size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head);
   6063void ath11k_wmi_fw_stats_fill(struct ath11k *ar,
   6064			      struct ath11k_fw_stats *fw_stats, u32 stats_id,
   6065			      char *buf);
   6066int ath11k_wmi_simulate_radar(struct ath11k *ar);
   6067int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id);
   6068int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id);
   6069int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar,
   6070				       struct wmi_twt_add_dialog_params *params);
   6071int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar,
   6072				       struct wmi_twt_del_dialog_params *params);
   6073int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar,
   6074					 struct wmi_twt_pause_dialog_params *params);
   6075int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar,
   6076					  struct wmi_twt_resume_dialog_params *params);
   6077int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id,
   6078				 struct ieee80211_he_obss_pd *he_obss_pd);
   6079int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap);
   6080int ath11k_wmi_pdev_set_srg_patial_bssid_bitmap(struct ath11k *ar, u32 *bitmap);
   6081int ath11k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath11k *ar,
   6082						 u32 *bitmap);
   6083int ath11k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
   6084						 u32 *bitmap);
   6085int ath11k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath11k *ar,
   6086						     u32 *bitmap);
   6087int ath11k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath11k *ar,
   6088						     u32 *bitmap);
   6089int ath11k_wmi_send_obss_color_collision_cfg_cmd(struct ath11k *ar, u32 vdev_id,
   6090						 u8 bss_color, u32 period,
   6091						 bool enable);
   6092int ath11k_wmi_send_bss_color_change_enable_cmd(struct ath11k *ar, u32 vdev_id,
   6093						bool enable);
   6094int ath11k_wmi_pdev_lro_cfg(struct ath11k *ar, int pdev_id);
   6095int ath11k_wmi_pdev_dma_ring_cfg(struct ath11k *ar,
   6096				 struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd *param);
   6097int ath11k_wmi_vdev_spectral_enable(struct ath11k *ar, u32 vdev_id,
   6098				    u32 trigger, u32 enable);
   6099int ath11k_wmi_vdev_spectral_conf(struct ath11k *ar,
   6100				  struct ath11k_wmi_vdev_spectral_conf_param *param);
   6101int ath11k_wmi_fils_discovery_tmpl(struct ath11k *ar, u32 vdev_id,
   6102				   struct sk_buff *tmpl);
   6103int ath11k_wmi_fils_discovery(struct ath11k *ar, u32 vdev_id, u32 interval,
   6104			      bool unsol_bcast_probe_resp_enabled);
   6105int ath11k_wmi_probe_resp_tmpl(struct ath11k *ar, u32 vdev_id,
   6106			       struct sk_buff *tmpl);
   6107int ath11k_wmi_set_hw_mode(struct ath11k_base *ab,
   6108			   enum wmi_host_hw_mode_config_type mode);
   6109int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar);
   6110int ath11k_wmi_wow_enable(struct ath11k *ar);
   6111int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar,
   6112				 const u8 mac_addr[ETH_ALEN]);
   6113int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap,
   6114			     struct ath11k_fw_dbglog *dbglog);
   6115int ath11k_wmi_wow_config_pno(struct ath11k *ar, u32 vdev_id,
   6116			      struct wmi_pno_scan_req  *pno_scan);
   6117int ath11k_wmi_wow_del_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id);
   6118int ath11k_wmi_wow_add_pattern(struct ath11k *ar, u32 vdev_id, u32 pattern_id,
   6119			       const u8 *pattern, const u8 *mask,
   6120			       int pattern_len, int pattern_offset);
   6121int ath11k_wmi_wow_add_wakeup_event(struct ath11k *ar, u32 vdev_id,
   6122				    enum wmi_wow_wakeup_event event,
   6123				    u32 enable);
   6124int ath11k_wmi_hw_data_filter_cmd(struct ath11k *ar, u32 vdev_id,
   6125				  u32 filter_bitmap, bool enable);
   6126int ath11k_wmi_arp_ns_offload(struct ath11k *ar,
   6127			      struct ath11k_vif *arvif, bool enable);
   6128int ath11k_wmi_gtk_rekey_offload(struct ath11k *ar,
   6129				 struct ath11k_vif *arvif, bool enable);
   6130int ath11k_wmi_gtk_rekey_getinfo(struct ath11k *ar,
   6131				 struct ath11k_vif *arvif);
   6132int ath11k_wmi_pdev_set_bios_sar_table_param(struct ath11k *ar, const u8 *sar_val);
   6133int ath11k_wmi_pdev_set_bios_geo_table_param(struct ath11k *ar);
   6134int ath11k_wmi_sta_keepalive(struct ath11k *ar,
   6135			     const struct wmi_sta_keepalive_arg *arg);
   6136
   6137#endif