cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ani.h (4247B)


      1/*
      2 * Copyright (C) 2010 Bruno Randolf <br1@einfach.org>
      3 *
      4 * Permission to use, copy, modify, and/or distribute this software for any
      5 * purpose with or without fee is hereby granted, provided that the above
      6 * copyright notice and this permission notice appear in all copies.
      7 *
      8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
      9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     15 */
     16#ifndef ANI_H
     17#define ANI_H
     18
     19#include "../ath.h"
     20
     21enum ath5k_phy_error_code;
     22
     23/* these thresholds are relative to the ATH5K_ANI_LISTEN_PERIOD */
     24#define ATH5K_ANI_LISTEN_PERIOD		100
     25#define ATH5K_ANI_OFDM_TRIG_HIGH	500
     26#define ATH5K_ANI_OFDM_TRIG_LOW		200
     27#define ATH5K_ANI_CCK_TRIG_HIGH		200
     28#define ATH5K_ANI_CCK_TRIG_LOW		100
     29
     30/* average beacon RSSI thresholds */
     31#define ATH5K_ANI_RSSI_THR_HIGH		40
     32#define ATH5K_ANI_RSSI_THR_LOW		7
     33
     34/* maximum available levels */
     35#define ATH5K_ANI_MAX_FIRSTEP_LVL	2
     36#define ATH5K_ANI_MAX_NOISE_IMM_LVL	1
     37
     38
     39/**
     40 * enum ath5k_ani_mode - mode for ANI / noise sensitivity
     41 *
     42 * @ATH5K_ANI_MODE_OFF: Turn ANI off. This can be useful to just stop the ANI
     43 *			algorithm after it has been on auto mode.
     44 * @ATH5K_ANI_MODE_MANUAL_LOW: Manually set all immunity parameters to low,
     45 *			maximizing sensitivity. ANI will not run.
     46 * @ATH5K_ANI_MODE_MANUAL_HIGH: Manually set all immunity parameters to high,
     47 *			minimizing sensitivity. ANI will not run.
     48 * @ATH5K_ANI_MODE_AUTO: Automatically control immunity parameters based on the
     49 *			amount of OFDM and CCK frame errors (default).
     50 */
     51enum ath5k_ani_mode {
     52	ATH5K_ANI_MODE_OFF		= 0,
     53	ATH5K_ANI_MODE_MANUAL_LOW	= 1,
     54	ATH5K_ANI_MODE_MANUAL_HIGH	= 2,
     55	ATH5K_ANI_MODE_AUTO		= 3
     56};
     57
     58
     59/**
     60 * struct ath5k_ani_state - ANI state and associated counters
     61 * @ani_mode: One of enum ath5k_ani_mode
     62 * @noise_imm_level: Noise immunity level
     63 * @spur_level: Spur immunity level
     64 * @firstep_level: FIRstep level
     65 * @ofdm_weak_sig: OFDM weak signal detection state (on/off)
     66 * @cck_weak_sig: CCK weak signal detection state (on/off)
     67 * @max_spur_level: Max spur immunity level (chip specific)
     68 * @listen_time: Listen time
     69 * @ofdm_errors: OFDM timing error count
     70 * @cck_errors: CCK timing error count
     71 * @last_cc: The &struct ath_cycle_counters (for stats)
     72 * @last_listen: Listen time from previous run (for stats)
     73 * @last_ofdm_errors: OFDM timing error count from previous run (for tats)
     74 * @last_cck_errors: CCK timing error count from previous run (for stats)
     75 * @sum_ofdm_errors: Sum of OFDM timing errors (for stats)
     76 * @sum_cck_errors: Sum of all CCK timing errors (for stats)
     77 */
     78struct ath5k_ani_state {
     79	enum ath5k_ani_mode	ani_mode;
     80
     81	/* state */
     82	int			noise_imm_level;
     83	int			spur_level;
     84	int			firstep_level;
     85	bool			ofdm_weak_sig;
     86	bool			cck_weak_sig;
     87
     88	int			max_spur_level;
     89
     90	/* used by the algorithm */
     91	unsigned int		listen_time;
     92	unsigned int		ofdm_errors;
     93	unsigned int		cck_errors;
     94
     95	/* debug/statistics only: numbers from last ANI calibration */
     96	struct ath_cycle_counters last_cc;
     97	unsigned int		last_listen;
     98	unsigned int		last_ofdm_errors;
     99	unsigned int		last_cck_errors;
    100	unsigned int		sum_ofdm_errors;
    101	unsigned int		sum_cck_errors;
    102};
    103
    104void ath5k_ani_init(struct ath5k_hw *ah, enum ath5k_ani_mode mode);
    105void ath5k_ani_mib_intr(struct ath5k_hw *ah);
    106void ath5k_ani_calibration(struct ath5k_hw *ah);
    107void ath5k_ani_phy_error_report(struct ath5k_hw *ah,
    108				enum ath5k_phy_error_code phyerr);
    109
    110/* for manual control */
    111void ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level);
    112void ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level);
    113void ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level);
    114void ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on);
    115void ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on);
    116
    117void ath5k_ani_print_counters(struct ath5k_hw *ah);
    118
    119#endif /* ANI_H */