cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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caps.c (4390B)


      1/*
      2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
      3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
      4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
      5 *
      6 * Permission to use, copy, modify, and distribute this software for any
      7 * purpose with or without fee is hereby granted, provided that the above
      8 * copyright notice and this permission notice appear in all copies.
      9 *
     10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     17 *
     18 */
     19
     20/**************\
     21* Capabilities *
     22\**************/
     23
     24#include "ath5k.h"
     25#include "reg.h"
     26#include "debug.h"
     27#include "../regd.h"
     28
     29/*
     30 * Fill the capabilities struct
     31 * TODO: Merge this with EEPROM code when we are done with it
     32 */
     33int ath5k_hw_set_capabilities(struct ath5k_hw *ah)
     34{
     35	struct ath5k_capabilities *caps = &ah->ah_capabilities;
     36	u16 ee_header;
     37
     38	/* Capabilities stored in the EEPROM */
     39	ee_header = caps->cap_eeprom.ee_header;
     40
     41	if (ah->ah_version == AR5K_AR5210) {
     42		/*
     43		 * Set radio capabilities
     44		 * (The AR5110 only supports the middle 5GHz band)
     45		 */
     46		caps->cap_range.range_5ghz_min = 5120;
     47		caps->cap_range.range_5ghz_max = 5430;
     48		caps->cap_range.range_2ghz_min = 0;
     49		caps->cap_range.range_2ghz_max = 0;
     50
     51		/* Set supported modes */
     52		__set_bit(AR5K_MODE_11A, caps->cap_mode);
     53	} else {
     54		/*
     55		 * XXX The transceiver supports frequencies from 4920 to 6100MHz
     56		 * XXX and from 2312 to 2732MHz. There are problems with the
     57		 * XXX current ieee80211 implementation because the IEEE
     58		 * XXX channel mapping does not support negative channel
     59		 * XXX numbers (2312MHz is channel -19). Of course, this
     60		 * XXX doesn't matter because these channels are out of the
     61		 * XXX legal range.
     62		 */
     63
     64		/*
     65		 * Set radio capabilities
     66		 */
     67
     68		if (AR5K_EEPROM_HDR_11A(ee_header)) {
     69			if (ath_is_49ghz_allowed(caps->cap_eeprom.ee_regdomain))
     70				caps->cap_range.range_5ghz_min = 4920;
     71			else
     72				caps->cap_range.range_5ghz_min = 5005;
     73			caps->cap_range.range_5ghz_max = 6100;
     74
     75			/* Set supported modes */
     76			__set_bit(AR5K_MODE_11A, caps->cap_mode);
     77		}
     78
     79		/* Enable  802.11b if a 2GHz capable radio (2111/5112) is
     80		 * connected */
     81		if (AR5K_EEPROM_HDR_11B(ee_header) ||
     82		    (AR5K_EEPROM_HDR_11G(ee_header) &&
     83		     ah->ah_version != AR5K_AR5211)) {
     84			/* 2312 */
     85			caps->cap_range.range_2ghz_min = 2412;
     86			caps->cap_range.range_2ghz_max = 2732;
     87
     88			/* Override 2GHz modes on SoCs that need it
     89			 * NOTE: cap_needs_2GHz_ovr gets set from
     90			 * ath_ahb_probe */
     91			if (!caps->cap_needs_2GHz_ovr) {
     92				if (AR5K_EEPROM_HDR_11B(ee_header))
     93					__set_bit(AR5K_MODE_11B,
     94							caps->cap_mode);
     95
     96				if (AR5K_EEPROM_HDR_11G(ee_header) &&
     97				ah->ah_version != AR5K_AR5211)
     98					__set_bit(AR5K_MODE_11G,
     99							caps->cap_mode);
    100			}
    101		}
    102	}
    103
    104	if ((ah->ah_radio_5ghz_revision & 0xf0) == AR5K_SREV_RAD_2112)
    105		__clear_bit(AR5K_MODE_11A, caps->cap_mode);
    106
    107	/* Set number of supported TX queues */
    108	if (ah->ah_version == AR5K_AR5210)
    109		caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES_NOQCU;
    110	else
    111		caps->cap_queues.q_tx_num = AR5K_NUM_TX_QUEUES;
    112
    113	/* Newer hardware has PHY error counters */
    114	if (ah->ah_mac_srev >= AR5K_SREV_AR5213A)
    115		caps->cap_has_phyerr_counters = true;
    116	else
    117		caps->cap_has_phyerr_counters = false;
    118
    119	/* MACs since AR5212 have MRR support */
    120	if (ah->ah_version == AR5K_AR5212)
    121		caps->cap_has_mrr_support = true;
    122	else
    123		caps->cap_has_mrr_support = false;
    124
    125	return 0;
    126}
    127
    128/*
    129 * TODO: Following functions should be part of a new function
    130 * set_capability
    131 */
    132
    133int ath5k_hw_enable_pspoll(struct ath5k_hw *ah, u8 *bssid,
    134		u16 assoc_id)
    135{
    136	if (ah->ah_version == AR5K_AR5210) {
    137		AR5K_REG_DISABLE_BITS(ah, AR5K_STA_ID1,
    138			AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA);
    139		return 0;
    140	}
    141
    142	return -EIO;
    143}
    144
    145int ath5k_hw_disable_pspoll(struct ath5k_hw *ah)
    146{
    147	if (ah->ah_version == AR5K_AR5210) {
    148		AR5K_REG_ENABLE_BITS(ah, AR5K_STA_ID1,
    149			AR5K_STA_ID1_NO_PSPOLL | AR5K_STA_ID1_DEFAULT_ANTENNA);
    150		return 0;
    151	}
    152
    153	return -EIO;
    154}