cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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htc_drv_init.c (26782B)


      1/*
      2 * Copyright (c) 2010-2011 Atheros Communications Inc.
      3 *
      4 * Permission to use, copy, modify, and/or distribute this software for any
      5 * purpose with or without fee is hereby granted, provided that the above
      6 * copyright notice and this permission notice appear in all copies.
      7 *
      8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
      9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     15 */
     16
     17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
     18
     19#include "htc.h"
     20
     21MODULE_AUTHOR("Atheros Communications");
     22MODULE_LICENSE("Dual BSD/GPL");
     23MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
     24
     25static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
     26module_param_named(debug, ath9k_debug, uint, 0);
     27MODULE_PARM_DESC(debug, "Debugging mask");
     28
     29int htc_modparam_nohwcrypt;
     30module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
     31MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
     32
     33static int ath9k_htc_btcoex_enable;
     34module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444);
     35MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
     36
     37static int ath9k_ps_enable;
     38module_param_named(ps_enable, ath9k_ps_enable, int, 0444);
     39MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave");
     40
     41int htc_use_dev_fw = 0;
     42module_param_named(use_dev_fw, htc_use_dev_fw, int, 0444);
     43MODULE_PARM_DESC(use_dev_fw, "Use development FW version");
     44
     45#ifdef CONFIG_MAC80211_LEDS
     46int ath9k_htc_led_blink = 1;
     47module_param_named(blink, ath9k_htc_led_blink, int, 0444);
     48MODULE_PARM_DESC(blink, "Enable LED blink on activity");
     49
     50static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
     51	{ .throughput = 0 * 1024, .blink_time = 334 },
     52	{ .throughput = 1 * 1024, .blink_time = 260 },
     53	{ .throughput = 5 * 1024, .blink_time = 220 },
     54	{ .throughput = 10 * 1024, .blink_time = 190 },
     55	{ .throughput = 20 * 1024, .blink_time = 170 },
     56	{ .throughput = 50 * 1024, .blink_time = 150 },
     57	{ .throughput = 70 * 1024, .blink_time = 130 },
     58	{ .throughput = 100 * 1024, .blink_time = 110 },
     59	{ .throughput = 200 * 1024, .blink_time = 80 },
     60	{ .throughput = 300 * 1024, .blink_time = 50 },
     61};
     62#endif
     63
     64static void ath9k_htc_op_ps_wakeup(struct ath_common *common)
     65{
     66	ath9k_htc_ps_wakeup((struct ath9k_htc_priv *) common->priv);
     67}
     68
     69static void ath9k_htc_op_ps_restore(struct ath_common *common)
     70{
     71	ath9k_htc_ps_restore((struct ath9k_htc_priv *) common->priv);
     72}
     73
     74static const struct ath_ps_ops ath9k_htc_ps_ops = {
     75	.wakeup = ath9k_htc_op_ps_wakeup,
     76	.restore = ath9k_htc_op_ps_restore,
     77};
     78
     79static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
     80{
     81	unsigned long time_left;
     82
     83	if (atomic_read(&priv->htc->tgt_ready) > 0) {
     84		atomic_dec(&priv->htc->tgt_ready);
     85		return 0;
     86	}
     87
     88	/* Firmware can take up to 50ms to get ready, to be safe use 1 second */
     89	time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
     90	if (!time_left) {
     91		dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
     92		return -ETIMEDOUT;
     93	}
     94
     95	atomic_dec(&priv->htc->tgt_ready);
     96
     97	return 0;
     98}
     99
    100static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
    101{
    102	ath9k_hw_deinit(priv->ah);
    103	kfree(priv->ah);
    104	priv->ah = NULL;
    105}
    106
    107static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
    108{
    109	struct ieee80211_hw *hw = priv->hw;
    110
    111	wiphy_rfkill_stop_polling(hw->wiphy);
    112	ath9k_deinit_leds(priv);
    113	ath9k_htc_deinit_debug(priv);
    114	ieee80211_unregister_hw(hw);
    115	ath9k_rx_cleanup(priv);
    116	ath9k_tx_cleanup(priv);
    117	ath9k_deinit_priv(priv);
    118}
    119
    120static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
    121					u16 service_id,
    122					void (*tx) (void *,
    123						    struct sk_buff *,
    124						    enum htc_endpoint_id,
    125						    bool txok),
    126					enum htc_endpoint_id *ep_id)
    127{
    128	struct htc_service_connreq req;
    129
    130	memset(&req, 0, sizeof(struct htc_service_connreq));
    131
    132	req.service_id = service_id;
    133	req.ep_callbacks.priv = priv;
    134	req.ep_callbacks.rx = ath9k_htc_rxep;
    135	req.ep_callbacks.tx = tx;
    136
    137	return htc_connect_service(priv->htc, &req, ep_id);
    138}
    139
    140static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
    141				   u32 drv_info)
    142{
    143	int ret;
    144
    145	/* WMI CMD*/
    146	ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
    147	if (ret)
    148		goto err;
    149
    150	/* Beacon */
    151	ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
    152				    &priv->beacon_ep);
    153	if (ret)
    154		goto err;
    155
    156	/* CAB */
    157	ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
    158				    &priv->cab_ep);
    159	if (ret)
    160		goto err;
    161
    162
    163	/* UAPSD */
    164	ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
    165				    &priv->uapsd_ep);
    166	if (ret)
    167		goto err;
    168
    169	/* MGMT */
    170	ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
    171				    &priv->mgmt_ep);
    172	if (ret)
    173		goto err;
    174
    175	/* DATA BE */
    176	ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
    177				    &priv->data_be_ep);
    178	if (ret)
    179		goto err;
    180
    181	/* DATA BK */
    182	ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
    183				    &priv->data_bk_ep);
    184	if (ret)
    185		goto err;
    186
    187	/* DATA VI */
    188	ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
    189				    &priv->data_vi_ep);
    190	if (ret)
    191		goto err;
    192
    193	/* DATA VO */
    194	ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
    195				    &priv->data_vo_ep);
    196	if (ret)
    197		goto err;
    198
    199	/*
    200	 * Setup required credits before initializing HTC.
    201	 * This is a bit hacky, but, since queuing is done in
    202	 * the HIF layer, shouldn't matter much.
    203	 */
    204
    205	if (IS_AR7010_DEVICE(drv_info))
    206		priv->htc->credits = 45;
    207	else
    208		priv->htc->credits = 33;
    209
    210	ret = htc_init(priv->htc);
    211	if (ret)
    212		goto err;
    213
    214	dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
    215		 priv->htc->credits);
    216
    217	return 0;
    218
    219err:
    220	dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
    221	return ret;
    222}
    223
    224static void ath9k_reg_notifier(struct wiphy *wiphy,
    225			       struct regulatory_request *request)
    226{
    227	struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
    228	struct ath9k_htc_priv *priv = hw->priv;
    229
    230	ath_reg_notifier_apply(wiphy, request,
    231			       ath9k_hw_regulatory(priv->ah));
    232}
    233
    234static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
    235{
    236	struct ath_hw *ah = hw_priv;
    237	struct ath_common *common = ath9k_hw_common(ah);
    238	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    239	__be32 val, reg = cpu_to_be32(reg_offset);
    240	int r;
    241
    242	r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
    243			  (u8 *) &reg, sizeof(reg),
    244			  (u8 *) &val, sizeof(val),
    245			  100);
    246	if (unlikely(r)) {
    247		ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
    248			reg_offset, r);
    249		return -1;
    250	}
    251
    252	return be32_to_cpu(val);
    253}
    254
    255static void ath9k_multi_regread(void *hw_priv, u32 *addr,
    256				u32 *val, u16 count)
    257{
    258	struct ath_hw *ah = hw_priv;
    259	struct ath_common *common = ath9k_hw_common(ah);
    260	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    261	__be32 tmpaddr[8];
    262	__be32 tmpval[8];
    263	int i, ret;
    264
    265	for (i = 0; i < count; i++) {
    266		tmpaddr[i] = cpu_to_be32(addr[i]);
    267	}
    268
    269	ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
    270			   (u8 *)tmpaddr , sizeof(u32) * count,
    271			   (u8 *)tmpval, sizeof(u32) * count,
    272			   100);
    273	if (unlikely(ret)) {
    274		ath_dbg(common, WMI,
    275			"Multiple REGISTER READ FAILED (count: %d)\n", count);
    276	}
    277
    278	for (i = 0; i < count; i++) {
    279		val[i] = be32_to_cpu(tmpval[i]);
    280	}
    281}
    282
    283static void ath9k_regwrite_multi(struct ath_common *common)
    284{
    285	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    286	u32 rsp_status;
    287	int r;
    288
    289	r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
    290			  (u8 *) &priv->wmi->multi_write,
    291			  sizeof(struct register_write) * priv->wmi->multi_write_idx,
    292			  (u8 *) &rsp_status, sizeof(rsp_status),
    293			  100);
    294	if (unlikely(r)) {
    295		ath_dbg(common, WMI,
    296			"REGISTER WRITE FAILED, multi len: %d\n",
    297			priv->wmi->multi_write_idx);
    298	}
    299	priv->wmi->multi_write_idx = 0;
    300}
    301
    302static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
    303{
    304	struct ath_hw *ah = hw_priv;
    305	struct ath_common *common = ath9k_hw_common(ah);
    306	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    307	const __be32 buf[2] = {
    308		cpu_to_be32(reg_offset),
    309		cpu_to_be32(val),
    310	};
    311	int r;
    312
    313	r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
    314			  (u8 *) &buf, sizeof(buf),
    315			  (u8 *) &val, sizeof(val),
    316			  100);
    317	if (unlikely(r)) {
    318		ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
    319			reg_offset, r);
    320	}
    321}
    322
    323static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
    324{
    325	struct ath_hw *ah = hw_priv;
    326	struct ath_common *common = ath9k_hw_common(ah);
    327	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    328
    329	mutex_lock(&priv->wmi->multi_write_mutex);
    330
    331	/* Store the register/value */
    332	priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
    333		cpu_to_be32(reg_offset);
    334	priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
    335		cpu_to_be32(val);
    336
    337	priv->wmi->multi_write_idx++;
    338
    339	/* If the buffer is full, send it out. */
    340	if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER)
    341		ath9k_regwrite_multi(common);
    342
    343	mutex_unlock(&priv->wmi->multi_write_mutex);
    344}
    345
    346static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
    347{
    348	struct ath_hw *ah = hw_priv;
    349	struct ath_common *common = ath9k_hw_common(ah);
    350	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    351
    352	if (atomic_read(&priv->wmi->mwrite_cnt))
    353		ath9k_regwrite_buffer(hw_priv, val, reg_offset);
    354	else
    355		ath9k_regwrite_single(hw_priv, val, reg_offset);
    356}
    357
    358static void ath9k_enable_regwrite_buffer(void *hw_priv)
    359{
    360	struct ath_hw *ah = hw_priv;
    361	struct ath_common *common = ath9k_hw_common(ah);
    362	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    363
    364	atomic_inc(&priv->wmi->mwrite_cnt);
    365}
    366
    367static void ath9k_regwrite_flush(void *hw_priv)
    368{
    369	struct ath_hw *ah = hw_priv;
    370	struct ath_common *common = ath9k_hw_common(ah);
    371	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    372
    373	atomic_dec(&priv->wmi->mwrite_cnt);
    374
    375	mutex_lock(&priv->wmi->multi_write_mutex);
    376
    377	if (priv->wmi->multi_write_idx)
    378		ath9k_regwrite_multi(common);
    379
    380	mutex_unlock(&priv->wmi->multi_write_mutex);
    381}
    382
    383static void ath9k_reg_rmw_buffer(void *hw_priv,
    384				 u32 reg_offset, u32 set, u32 clr)
    385{
    386	struct ath_hw *ah = hw_priv;
    387	struct ath_common *common = ath9k_hw_common(ah);
    388	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    389	u32 rsp_status;
    390	int r;
    391
    392	mutex_lock(&priv->wmi->multi_rmw_mutex);
    393
    394	/* Store the register/value */
    395	priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].reg =
    396		cpu_to_be32(reg_offset);
    397	priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].set =
    398		cpu_to_be32(set);
    399	priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].clr =
    400		cpu_to_be32(clr);
    401
    402	priv->wmi->multi_rmw_idx++;
    403
    404	/* If the buffer is full, send it out. */
    405	if (priv->wmi->multi_rmw_idx == MAX_RMW_CMD_NUMBER) {
    406		r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
    407			  (u8 *) &priv->wmi->multi_rmw,
    408			  sizeof(struct register_write) * priv->wmi->multi_rmw_idx,
    409			  (u8 *) &rsp_status, sizeof(rsp_status),
    410			  100);
    411		if (unlikely(r)) {
    412			ath_dbg(common, WMI,
    413				"REGISTER RMW FAILED, multi len: %d\n",
    414				priv->wmi->multi_rmw_idx);
    415		}
    416		priv->wmi->multi_rmw_idx = 0;
    417	}
    418
    419	mutex_unlock(&priv->wmi->multi_rmw_mutex);
    420}
    421
    422static void ath9k_reg_rmw_flush(void *hw_priv)
    423{
    424	struct ath_hw *ah = hw_priv;
    425	struct ath_common *common = ath9k_hw_common(ah);
    426	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    427	u32 rsp_status;
    428	int r;
    429
    430	if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
    431		return;
    432
    433	atomic_dec(&priv->wmi->m_rmw_cnt);
    434
    435	mutex_lock(&priv->wmi->multi_rmw_mutex);
    436
    437	if (priv->wmi->multi_rmw_idx) {
    438		r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
    439			  (u8 *) &priv->wmi->multi_rmw,
    440			  sizeof(struct register_rmw) * priv->wmi->multi_rmw_idx,
    441			  (u8 *) &rsp_status, sizeof(rsp_status),
    442			  100);
    443		if (unlikely(r)) {
    444			ath_dbg(common, WMI,
    445				"REGISTER RMW FAILED, multi len: %d\n",
    446				priv->wmi->multi_rmw_idx);
    447		}
    448		priv->wmi->multi_rmw_idx = 0;
    449	}
    450
    451	mutex_unlock(&priv->wmi->multi_rmw_mutex);
    452}
    453
    454static void ath9k_enable_rmw_buffer(void *hw_priv)
    455{
    456	struct ath_hw *ah = hw_priv;
    457	struct ath_common *common = ath9k_hw_common(ah);
    458	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    459
    460	if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
    461		return;
    462
    463	atomic_inc(&priv->wmi->m_rmw_cnt);
    464}
    465
    466static void ath9k_reg_rmw_single(void *hw_priv,
    467				 u32 reg_offset, u32 set, u32 clr)
    468{
    469	struct ath_hw *ah = hw_priv;
    470	struct ath_common *common = ath9k_hw_common(ah);
    471	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    472	struct register_rmw buf, buf_ret;
    473	int ret;
    474
    475	buf.reg = cpu_to_be32(reg_offset);
    476	buf.set = cpu_to_be32(set);
    477	buf.clr = cpu_to_be32(clr);
    478
    479	ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
    480			  (u8 *) &buf, sizeof(buf),
    481			  (u8 *) &buf_ret, sizeof(buf_ret),
    482			  100);
    483	if (unlikely(ret)) {
    484		ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n",
    485			reg_offset, ret);
    486	}
    487}
    488
    489static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
    490{
    491	struct ath_hw *ah = hw_priv;
    492	struct ath_common *common = ath9k_hw_common(ah);
    493	struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
    494
    495	if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) {
    496		u32 val;
    497
    498		val = REG_READ(ah, reg_offset);
    499		val &= ~clr;
    500		val |= set;
    501		REG_WRITE(ah, reg_offset, val);
    502
    503		return 0;
    504	}
    505
    506	if (atomic_read(&priv->wmi->m_rmw_cnt))
    507		ath9k_reg_rmw_buffer(hw_priv, reg_offset, set, clr);
    508	else
    509		ath9k_reg_rmw_single(hw_priv, reg_offset, set, clr);
    510
    511	return 0;
    512}
    513
    514static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
    515{
    516	*csz = L1_CACHE_BYTES >> 2;
    517}
    518
    519static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
    520{
    521	struct ath_hw *ah = (struct ath_hw *) common->ah;
    522
    523	(void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
    524
    525	if (!ath9k_hw_wait(ah,
    526			   AR_EEPROM_STATUS_DATA,
    527			   AR_EEPROM_STATUS_DATA_BUSY |
    528			   AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
    529			   AH_WAIT_TIMEOUT))
    530		return false;
    531
    532	*data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
    533		   AR_EEPROM_STATUS_DATA_VAL);
    534
    535	return true;
    536}
    537
    538static const struct ath_bus_ops ath9k_usb_bus_ops = {
    539	.ath_bus_type = ATH_USB,
    540	.read_cachesize = ath_usb_read_cachesize,
    541	.eeprom_read = ath_usb_eeprom_read,
    542};
    543
    544static int ath9k_init_queues(struct ath9k_htc_priv *priv)
    545{
    546	struct ath_common *common = ath9k_hw_common(priv->ah);
    547	int i;
    548
    549	for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
    550		priv->hwq_map[i] = -1;
    551
    552	priv->beacon.beaconq = ath9k_hw_beaconq_setup(priv->ah);
    553	if (priv->beacon.beaconq == -1) {
    554		ath_err(common, "Unable to setup BEACON xmit queue\n");
    555		goto err;
    556	}
    557
    558	priv->cabq = ath9k_htc_cabq_setup(priv);
    559	if (priv->cabq == -1) {
    560		ath_err(common, "Unable to setup CAB xmit queue\n");
    561		goto err;
    562	}
    563
    564	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) {
    565		ath_err(common, "Unable to setup xmit queue for BE traffic\n");
    566		goto err;
    567	}
    568
    569	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) {
    570		ath_err(common, "Unable to setup xmit queue for BK traffic\n");
    571		goto err;
    572	}
    573	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) {
    574		ath_err(common, "Unable to setup xmit queue for VI traffic\n");
    575		goto err;
    576	}
    577	if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) {
    578		ath_err(common, "Unable to setup xmit queue for VO traffic\n");
    579		goto err;
    580	}
    581
    582	return 0;
    583
    584err:
    585	return -EINVAL;
    586}
    587
    588static void ath9k_init_misc(struct ath9k_htc_priv *priv)
    589{
    590	struct ath_common *common = ath9k_hw_common(priv->ah);
    591
    592	eth_broadcast_addr(common->bssidmask);
    593
    594	common->last_rssi = ATH_RSSI_DUMMY_MARKER;
    595	priv->ah->opmode = NL80211_IFTYPE_STATION;
    596
    597	priv->spec_priv.ah = priv->ah;
    598	priv->spec_priv.spec_config.enabled = 0;
    599	priv->spec_priv.spec_config.short_repeat = true;
    600	priv->spec_priv.spec_config.count = 8;
    601	priv->spec_priv.spec_config.endless = false;
    602	priv->spec_priv.spec_config.period = 0x12;
    603	priv->spec_priv.spec_config.fft_period = 0x02;
    604}
    605
    606static int ath9k_init_priv(struct ath9k_htc_priv *priv,
    607			   u16 devid, char *product,
    608			   u32 drv_info)
    609{
    610	struct ath_hw *ah = NULL;
    611	struct ath_common *common;
    612	int i, ret = 0, csz = 0;
    613
    614	ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
    615	if (!ah)
    616		return -ENOMEM;
    617
    618	ah->dev = priv->dev;
    619	ah->hw = priv->hw;
    620	ah->hw_version.devid = devid;
    621	ah->hw_version.usbdev = drv_info;
    622	ah->ah_flags |= AH_USE_EEPROM;
    623	ah->reg_ops.read = ath9k_regread;
    624	ah->reg_ops.multi_read = ath9k_multi_regread;
    625	ah->reg_ops.write = ath9k_regwrite;
    626	ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
    627	ah->reg_ops.write_flush = ath9k_regwrite_flush;
    628	ah->reg_ops.enable_rmw_buffer = ath9k_enable_rmw_buffer;
    629	ah->reg_ops.rmw_flush = ath9k_reg_rmw_flush;
    630	ah->reg_ops.rmw = ath9k_reg_rmw;
    631	priv->ah = ah;
    632
    633	common = ath9k_hw_common(ah);
    634	common->ops = &ah->reg_ops;
    635	common->ps_ops = &ath9k_htc_ps_ops;
    636	common->bus_ops = &ath9k_usb_bus_ops;
    637	common->ah = ah;
    638	common->hw = priv->hw;
    639	common->priv = priv;
    640	common->debug_mask = ath9k_debug;
    641	common->btcoex_enabled = ath9k_htc_btcoex_enable == 1;
    642	set_bit(ATH_OP_INVALID, &common->op_flags);
    643
    644	spin_lock_init(&priv->beacon_lock);
    645	spin_lock_init(&priv->tx.tx_lock);
    646	mutex_init(&priv->mutex);
    647	mutex_init(&priv->htc_pm_lock);
    648	tasklet_setup(&priv->rx_tasklet, ath9k_rx_tasklet);
    649	tasklet_setup(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet);
    650	INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
    651	INIT_WORK(&priv->ps_work, ath9k_ps_work);
    652	INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
    653	timer_setup(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer, 0);
    654
    655	/*
    656	 * Cache line size is used to size and align various
    657	 * structures used to communicate with the hardware.
    658	 */
    659	ath_read_cachesize(common, &csz);
    660	common->cachelsz = csz << 2; /* convert to bytes */
    661
    662	ret = ath9k_hw_init(ah);
    663	if (ret) {
    664		ath_err(common,
    665			"Unable to initialize hardware; initialization status: %d\n",
    666			ret);
    667		goto err_hw;
    668	}
    669
    670	ret = ath9k_init_queues(priv);
    671	if (ret)
    672		goto err_queues;
    673
    674	for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
    675		priv->beacon.bslot[i] = NULL;
    676	priv->beacon.slottime = 9;
    677
    678	ath9k_cmn_init_channels_rates(common);
    679	ath9k_cmn_init_crypto(ah);
    680	ath9k_init_misc(priv);
    681	ath9k_htc_init_btcoex(priv, product);
    682
    683	return 0;
    684
    685err_queues:
    686	ath9k_hw_deinit(ah);
    687err_hw:
    688
    689	kfree(ah);
    690	priv->ah = NULL;
    691
    692	return ret;
    693}
    694
    695static const struct ieee80211_iface_limit if_limits[] = {
    696	{ .max = 2,	.types = BIT(NL80211_IFTYPE_STATION) |
    697				 BIT(NL80211_IFTYPE_P2P_CLIENT) },
    698	{ .max = 2,	.types = BIT(NL80211_IFTYPE_AP) |
    699#ifdef CONFIG_MAC80211_MESH
    700				 BIT(NL80211_IFTYPE_MESH_POINT) |
    701#endif
    702				 BIT(NL80211_IFTYPE_P2P_GO) },
    703};
    704
    705static const struct ieee80211_iface_combination if_comb = {
    706	.limits = if_limits,
    707	.n_limits = ARRAY_SIZE(if_limits),
    708	.max_interfaces = 2,
    709	.num_different_channels = 1,
    710};
    711
    712static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
    713			       struct ieee80211_hw *hw)
    714{
    715	struct ath_hw *ah = priv->ah;
    716	struct ath_common *common = ath9k_hw_common(priv->ah);
    717	struct base_eep_header *pBase;
    718
    719	ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
    720	ieee80211_hw_set(hw, MFP_CAPABLE);
    721	ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
    722	ieee80211_hw_set(hw, PS_NULLFUNC_STACK);
    723	ieee80211_hw_set(hw, RX_INCLUDES_FCS);
    724	ieee80211_hw_set(hw, HAS_RATE_CONTROL);
    725	ieee80211_hw_set(hw, SPECTRUM_MGMT);
    726	ieee80211_hw_set(hw, SIGNAL_DBM);
    727	ieee80211_hw_set(hw, AMPDU_AGGREGATION);
    728	ieee80211_hw_set(hw, DOESNT_SUPPORT_QOS_NDP);
    729
    730	if (ath9k_ps_enable)
    731		ieee80211_hw_set(hw, SUPPORTS_PS);
    732
    733	hw->wiphy->interface_modes =
    734		BIT(NL80211_IFTYPE_STATION) |
    735		BIT(NL80211_IFTYPE_ADHOC) |
    736		BIT(NL80211_IFTYPE_AP) |
    737		BIT(NL80211_IFTYPE_P2P_GO) |
    738		BIT(NL80211_IFTYPE_P2P_CLIENT) |
    739		BIT(NL80211_IFTYPE_MESH_POINT) |
    740		BIT(NL80211_IFTYPE_OCB);
    741
    742	hw->wiphy->iface_combinations = &if_comb;
    743	hw->wiphy->n_iface_combinations = 1;
    744
    745	hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
    746
    747	hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
    748			    WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
    749			    WIPHY_FLAG_HAS_CHANNEL_SWITCH;
    750
    751	hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
    752
    753	hw->queues = 4;
    754	hw->max_listen_interval = 1;
    755
    756	hw->vif_data_size = sizeof(struct ath9k_htc_vif);
    757	hw->sta_data_size = sizeof(struct ath9k_htc_sta);
    758
    759	/* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
    760	hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
    761		sizeof(struct htc_frame_hdr) + 4;
    762
    763	if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
    764		hw->wiphy->bands[NL80211_BAND_2GHZ] =
    765			&common->sbands[NL80211_BAND_2GHZ];
    766	if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
    767		hw->wiphy->bands[NL80211_BAND_5GHZ] =
    768			&common->sbands[NL80211_BAND_5GHZ];
    769
    770	ath9k_cmn_reload_chainmask(ah);
    771
    772	pBase = ath9k_htc_get_eeprom_base(priv);
    773	if (pBase) {
    774		hw->wiphy->available_antennas_rx = pBase->rxMask;
    775		hw->wiphy->available_antennas_tx = pBase->txMask;
    776	}
    777
    778	SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
    779
    780	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
    781	wiphy_ext_feature_set(hw->wiphy,
    782			      NL80211_EXT_FEATURE_MULTICAST_REGISTRATIONS);
    783}
    784
    785static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
    786{
    787	struct ieee80211_hw *hw = priv->hw;
    788	struct wmi_fw_version cmd_rsp;
    789	int ret;
    790
    791	memset(&cmd_rsp, 0, sizeof(cmd_rsp));
    792
    793	WMI_CMD(WMI_GET_FW_VERSION);
    794	if (ret)
    795		return -EINVAL;
    796
    797	priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
    798	priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
    799
    800	snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d",
    801		 priv->fw_version_major,
    802		 priv->fw_version_minor);
    803
    804	dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
    805		 priv->fw_version_major,
    806		 priv->fw_version_minor);
    807
    808	/*
    809	 * Check if the available FW matches the driver's
    810	 * required version.
    811	 */
    812	if (priv->fw_version_major != MAJOR_VERSION_REQ ||
    813	    priv->fw_version_minor < MINOR_VERSION_REQ) {
    814		dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
    815			MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
    816		return -EINVAL;
    817	}
    818
    819	if (priv->fw_version_major == 1 && priv->fw_version_minor < 4)
    820		set_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags);
    821
    822	dev_info(priv->dev, "FW RMW support: %s\n",
    823		test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags) ? "Off" : "On");
    824
    825	return 0;
    826}
    827
    828static int ath9k_init_device(struct ath9k_htc_priv *priv,
    829			     u16 devid, char *product, u32 drv_info)
    830{
    831	struct ieee80211_hw *hw = priv->hw;
    832	struct ath_common *common;
    833	struct ath_hw *ah;
    834	int error = 0;
    835	struct ath_regulatory *reg;
    836	char hw_name[64];
    837
    838	/* Bring up device */
    839	error = ath9k_init_priv(priv, devid, product, drv_info);
    840	if (error != 0)
    841		goto err_init;
    842
    843	ah = priv->ah;
    844	common = ath9k_hw_common(ah);
    845	ath9k_set_hw_capab(priv, hw);
    846
    847	error = ath9k_init_firmware_version(priv);
    848	if (error != 0)
    849		goto err_fw;
    850
    851	/* Initialize regulatory */
    852	error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
    853			      ath9k_reg_notifier);
    854	if (error)
    855		goto err_regd;
    856
    857	reg = &common->regulatory;
    858
    859	/* Setup TX */
    860	error = ath9k_tx_init(priv);
    861	if (error != 0)
    862		goto err_tx;
    863
    864	/* Setup RX */
    865	error = ath9k_rx_init(priv);
    866	if (error != 0)
    867		goto err_rx;
    868
    869	ath9k_hw_disable(priv->ah);
    870#ifdef CONFIG_MAC80211_LEDS
    871	/* must be initialized before ieee80211_register_hw */
    872	priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
    873		IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
    874		ARRAY_SIZE(ath9k_htc_tpt_blink));
    875#endif
    876
    877	/* Register with mac80211 */
    878	error = ieee80211_register_hw(hw);
    879	if (error)
    880		goto err_register;
    881
    882	/* Handle world regulatory */
    883	if (!ath_is_world_regd(reg)) {
    884		error = regulatory_hint(hw->wiphy, reg->alpha2);
    885		if (error)
    886			goto err_world;
    887	}
    888
    889	error = ath9k_htc_init_debug(priv->ah);
    890	if (error) {
    891		ath_err(common, "Unable to create debugfs files\n");
    892		goto err_world;
    893	}
    894
    895	ath_dbg(common, CONFIG,
    896		"WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
    897		priv->wmi_cmd_ep,
    898		priv->beacon_ep,
    899		priv->cab_ep,
    900		priv->uapsd_ep,
    901		priv->mgmt_ep,
    902		priv->data_be_ep,
    903		priv->data_bk_ep,
    904		priv->data_vi_ep,
    905		priv->data_vo_ep);
    906
    907	ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
    908	wiphy_info(hw->wiphy, "%s\n", hw_name);
    909
    910	ath9k_init_leds(priv);
    911	ath9k_start_rfkill_poll(priv);
    912
    913	return 0;
    914
    915err_world:
    916	ieee80211_unregister_hw(hw);
    917err_register:
    918	ath9k_rx_cleanup(priv);
    919err_rx:
    920	ath9k_tx_cleanup(priv);
    921err_tx:
    922	/* Nothing */
    923err_regd:
    924	/* Nothing */
    925err_fw:
    926	ath9k_deinit_priv(priv);
    927err_init:
    928	return error;
    929}
    930
    931int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
    932			   u16 devid, char *product, u32 drv_info)
    933{
    934	struct hif_device_usb *hif_dev;
    935	struct ath9k_htc_priv *priv;
    936	struct ieee80211_hw *hw;
    937	int ret;
    938
    939	hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
    940	if (!hw)
    941		return -ENOMEM;
    942
    943	priv = hw->priv;
    944	priv->hw = hw;
    945	priv->htc = htc_handle;
    946	priv->dev = dev;
    947	htc_handle->drv_priv = priv;
    948	SET_IEEE80211_DEV(hw, priv->dev);
    949
    950	ret = ath9k_htc_wait_for_target(priv);
    951	if (ret)
    952		goto err_free;
    953
    954	priv->wmi = ath9k_init_wmi(priv);
    955	if (!priv->wmi) {
    956		ret = -EINVAL;
    957		goto err_free;
    958	}
    959
    960	ret = ath9k_init_htc_services(priv, devid, drv_info);
    961	if (ret)
    962		goto err_init;
    963
    964	ret = ath9k_init_device(priv, devid, product, drv_info);
    965	if (ret)
    966		goto err_init;
    967
    968	return 0;
    969
    970err_init:
    971	ath9k_stop_wmi(priv);
    972	hif_dev = (struct hif_device_usb *)htc_handle->hif_dev;
    973	ath9k_hif_usb_dealloc_urbs(hif_dev);
    974	ath9k_destroy_wmi(priv);
    975err_free:
    976	ieee80211_free_hw(hw);
    977	return ret;
    978}
    979
    980void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
    981{
    982	if (htc_handle->drv_priv) {
    983
    984		/* Check if the device has been yanked out. */
    985		if (hotunplug)
    986			htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
    987
    988		ath9k_deinit_device(htc_handle->drv_priv);
    989		ath9k_stop_wmi(htc_handle->drv_priv);
    990		ieee80211_free_hw(htc_handle->drv_priv->hw);
    991	}
    992}
    993
    994#ifdef CONFIG_PM
    995
    996void ath9k_htc_suspend(struct htc_target *htc_handle)
    997{
    998	ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
    999}
   1000
   1001int ath9k_htc_resume(struct htc_target *htc_handle)
   1002{
   1003	struct ath9k_htc_priv *priv = htc_handle->drv_priv;
   1004	int ret;
   1005
   1006	ret = ath9k_htc_wait_for_target(priv);
   1007	if (ret)
   1008		return ret;
   1009
   1010	ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
   1011				      priv->ah->hw_version.usbdev);
   1012	ath9k_configure_leds(priv);
   1013
   1014	return ret;
   1015}
   1016#endif
   1017
   1018static int __init ath9k_htc_init(void)
   1019{
   1020	if (ath9k_hif_usb_init() < 0) {
   1021		pr_err("No USB devices found, driver not installed\n");
   1022		return -ENODEV;
   1023	}
   1024
   1025	return 0;
   1026}
   1027module_init(ath9k_htc_init);
   1028
   1029static void __exit ath9k_htc_exit(void)
   1030{
   1031	ath9k_hif_usb_exit();
   1032	pr_info("Driver unloaded\n");
   1033}
   1034module_exit(ath9k_htc_exit);