cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

main.h (21915B)


      1/*
      2 * Copyright (c) 2010 Broadcom Corporation
      3 *
      4 * Permission to use, copy, modify, and/or distribute this software for any
      5 * purpose with or without fee is hereby granted, provided that the above
      6 * copyright notice and this permission notice appear in all copies.
      7 *
      8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
      9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
     11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
     13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
     14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     15 */
     16
     17#ifndef _BRCM_MAIN_H_
     18#define _BRCM_MAIN_H_
     19
     20#include <linux/etherdevice.h>
     21
     22#include <brcmu_utils.h>
     23#include "types.h"
     24#include "d11.h"
     25#include "scb.h"
     26
     27#define	INVCHANNEL		255	/* invalid channel */
     28
     29/* max # brcms_c_module_register() calls */
     30#define BRCMS_MAXMODULES	22
     31
     32#define SEQNUM_SHIFT		4
     33#define SEQNUM_MAX		0x1000
     34
     35#define NTXRATE			64	/* # tx MPDUs rate is reported for */
     36
     37/* Maximum wait time for a MAC suspend */
     38/* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */
     39#define	BRCMS_MAX_MAC_SUSPEND	83000
     40
     41/* responses for probe requests older that this are tossed, zero to disable */
     42#define BRCMS_PRB_RESP_TIMEOUT	0	/* Disable probe response timeout */
     43
     44/* transmit buffer max headroom for protocol headers */
     45#define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN)
     46
     47/* Macros for doing definition and get/set of bitfields
     48 * Usage example, e.g. a three-bit field (bits 4-6):
     49 *    #define <NAME>_M	BITFIELD_MASK(3)
     50 *    #define <NAME>_S	4
     51 * ...
     52 *    regval = R_REG(osh, &regs->regfoo);
     53 *    field = GFIELD(regval, <NAME>);
     54 *    regval = SFIELD(regval, <NAME>, 1);
     55 *    W_REG(osh, &regs->regfoo, regval);
     56 */
     57#define BITFIELD_MASK(width) \
     58		(((unsigned)1 << (width)) - 1)
     59#define GFIELD(val, field) \
     60		(((val) >> field ## _S) & field ## _M)
     61#define SFIELD(val, field, bits) \
     62		(((val) & (~(field ## _M << field ## _S))) | \
     63		 ((unsigned)(bits) << field ## _S))
     64
     65#define	SW_TIMER_MAC_STAT_UPD		30	/* periodic MAC stats update */
     66
     67/* max # supported core revisions (0 .. MAXCOREREV - 1) */
     68#define	MAXCOREREV		28
     69
     70/* Double check that unsupported cores are not enabled */
     71#if CONF_MSK(D11CONF, 0x4f) || CONF_GE(D11CONF, MAXCOREREV)
     72#error "Configuration for D11CONF includes unsupported versions."
     73#endif				/* Bad versions */
     74
     75/* values for shortslot_override */
     76#define BRCMS_SHORTSLOT_AUTO	-1 /* Driver will manage Shortslot setting */
     77#define BRCMS_SHORTSLOT_OFF	0  /* Turn off short slot */
     78#define BRCMS_SHORTSLOT_ON	1  /* Turn on short slot */
     79
     80/* value for short/long and mixmode/greenfield preamble */
     81#define BRCMS_LONG_PREAMBLE	(0)
     82#define BRCMS_SHORT_PREAMBLE	(1 << 0)
     83#define BRCMS_GF_PREAMBLE		(1 << 1)
     84#define BRCMS_MM_PREAMBLE		(1 << 2)
     85#define BRCMS_IS_MIMO_PREAMBLE(_pre) (((_pre) == BRCMS_GF_PREAMBLE) || \
     86				      ((_pre) == BRCMS_MM_PREAMBLE))
     87
     88/* TxFrameID */
     89/* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */
     90/* rate epoch bits: TXFID_RATE_SHIFT, TXFID_RATE_MASK ((wlc_rate.c) */
     91#define TXFID_QUEUE_MASK	0x0007	/* Bits 0-2 */
     92#define TXFID_SEQ_MASK		0x7FE0	/* Bits 5-15 */
     93#define TXFID_SEQ_SHIFT		5	/* Number of bit shifts */
     94#define	TXFID_RATE_PROBE_MASK	0x8000	/* Bit 15 for rate probe */
     95#define TXFID_RATE_MASK		0x0018	/* Mask for bits 3 and 4 */
     96#define TXFID_RATE_SHIFT	3	/* Shift 3 bits for rate mask */
     97
     98/* promote boardrev */
     99#define BOARDREV_PROMOTABLE	0xFF	/* from */
    100#define BOARDREV_PROMOTED	1	/* to */
    101
    102#define DATA_BLOCK_TX_SUPR	(1 << 4)
    103
    104/* Ucode MCTL_WAKE override bits */
    105#define BRCMS_WAKE_OVERRIDE_CLKCTL	0x01
    106#define BRCMS_WAKE_OVERRIDE_PHYREG	0x02
    107#define BRCMS_WAKE_OVERRIDE_MACSUSPEND	0x04
    108#define BRCMS_WAKE_OVERRIDE_TXFIFO	0x08
    109#define BRCMS_WAKE_OVERRIDE_FORCEFAST	0x10
    110
    111/* stuff pulled in from wlc.c */
    112
    113/* Interrupt bit error summary.  Don't include I_RU: we refill DMA at other
    114 * times; and if we run out, constant I_RU interrupts may cause lockup.  We
    115 * will still get error counts from rx0ovfl.
    116 */
    117#define	I_ERRORS	(I_PC | I_PD | I_DE | I_RO | I_XU)
    118/* default software intmasks */
    119#define	DEF_RXINTMASK	(I_RI)	/* enable rx int on rxfifo only */
    120#define	DEF_MACINTMASK	(MI_TXSTOP | MI_TBTT | MI_ATIMWINEND | MI_PMQ | \
    121			 MI_PHYTXERR | MI_DMAINT | MI_TFS | MI_BG_NOISE | \
    122			 MI_CCA | MI_TO | MI_GP0 | MI_RFDISABLE | MI_PWRUP)
    123
    124#define	MAXTXPKTS		6	/* max # pkts pending */
    125
    126/* frameburst */
    127#define	MAXTXFRAMEBURST		8 /* vanilla xpress mode: max frames/burst */
    128#define	MAXFRAMEBURST_TXOP	10000	/* Frameburst TXOP in usec */
    129
    130#define	NFIFO			6	/* # tx/rx fifopairs */
    131
    132/* PLL requests */
    133
    134/* pll is shared on old chips */
    135#define BRCMS_PLLREQ_SHARED	0x1
    136/* hold pll for radio monitor register checking */
    137#define BRCMS_PLLREQ_RADIO_MON	0x2
    138/* hold/release pll for some short operation */
    139#define BRCMS_PLLREQ_FLIP		0x4
    140
    141#define	CHANNEL_BANDUNIT(wlc, ch) \
    142	(((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX)
    143
    144#define	OTHERBANDUNIT(wlc) \
    145	((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX))
    146
    147/*
    148 * 802.11 protection information
    149 *
    150 * _g: use g spec protection, driver internal.
    151 * g_override: override for use of g spec protection.
    152 * gmode_user: user config gmode, operating band->gmode is different.
    153 * overlap: Overlap BSS/IBSS protection for both 11g and 11n.
    154 * nmode_user: user config nmode, operating pub->nmode is different.
    155 * n_cfg: use OFDM protection on MIMO frames.
    156 * n_cfg_override: override for use of N protection.
    157 * nongf: non-GF present protection.
    158 * nongf_override: override for use of GF protection.
    159 * n_pam_override: override for preamble: MM or GF.
    160 * n_obss: indicated OBSS Non-HT STA present.
    161*/
    162struct brcms_protection {
    163	bool _g;
    164	s8 g_override;
    165	u8 gmode_user;
    166	s8 overlap;
    167	s8 nmode_user;
    168	s8 n_cfg;
    169	s8 n_cfg_override;
    170	bool nongf;
    171	s8 nongf_override;
    172	s8 n_pam_override;
    173	bool n_obss;
    174};
    175
    176/*
    177 * anything affecting the single/dual streams/antenna operation
    178 *
    179 * hw_txchain: HW txchain bitmap cfg.
    180 * txchain: txchain bitmap being used.
    181 * txstreams: number of txchains being used.
    182 * hw_rxchain: HW rxchain bitmap cfg.
    183 * rxchain: rxchain bitmap being used.
    184 * rxstreams: number of rxchains being used.
    185 * ant_rx_ovr: rx antenna override.
    186 * txant: userTx antenna setting.
    187 * phytxant: phyTx antenna setting in txheader.
    188 * ss_opmode: singlestream Operational mode, 0:siso; 1:cdd.
    189 * ss_algosel_auto: if true, use wlc->stf->ss_algo_channel;
    190 *			else use wlc->band->stf->ss_mode_band.
    191 * ss_algo_channel: ss based on per-channel algo: 0: SISO, 1: CDD 2: STBC.
    192 * rxchain_restore_delay: delay time to restore default rxchain.
    193 * ldpc: AUTO/ON/OFF ldpc cap supported.
    194 * txcore[MAX_STREAMS_SUPPORTED + 1]: bitmap of selected core for each Nsts.
    195 * spatial_policy:
    196 */
    197struct brcms_stf {
    198	u8 hw_txchain;
    199	u8 txchain;
    200	u8 txstreams;
    201	u8 hw_rxchain;
    202	u8 rxchain;
    203	u8 rxstreams;
    204	u8 ant_rx_ovr;
    205	s8 txant;
    206	u16 phytxant;
    207	u8 ss_opmode;
    208	bool ss_algosel_auto;
    209	u16 ss_algo_channel;
    210	u8 rxchain_restore_delay;
    211	s8 ldpc;
    212	u8 txcore[MAX_STREAMS_SUPPORTED + 1];
    213	s8 spatial_policy;
    214};
    215
    216#define BRCMS_STF_SS_STBC_TX(wlc, scb) \
    217	(((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) \
    218	 || (((scb)->flags & SCB_STBCCAP) && \
    219	     (wlc)->band->band_stf_stbc_tx == AUTO && \
    220	     isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC))))
    221
    222#define BRCMS_STBC_CAP_PHY(wlc) (BRCMS_ISNPHY(wlc->band) && \
    223				 NREV_GE(wlc->band->phyrev, 3))
    224
    225#define BRCMS_SGI_CAP_PHY(wlc) ((BRCMS_ISNPHY(wlc->band) && \
    226				 NREV_GE(wlc->band->phyrev, 3)) || \
    227				BRCMS_ISLCNPHY(wlc->band))
    228
    229#define BRCMS_CHAN_PHYTYPE(x)     (((x) & RXS_CHAN_PHYTYPE_MASK) \
    230				   >> RXS_CHAN_PHYTYPE_SHIFT)
    231#define BRCMS_CHAN_CHANNEL(x)     (((x) & RXS_CHAN_ID_MASK) \
    232				   >> RXS_CHAN_ID_SHIFT)
    233
    234/*
    235 * core state (mac)
    236 */
    237struct brcms_core {
    238	uint coreidx;		/* # sb enumerated core */
    239
    240	/* fifo */
    241	uint *txavail[NFIFO];	/* # tx descriptors available */
    242
    243	struct macstat *macstat_snapshot;	/* mac hw prev read values */
    244};
    245
    246/*
    247 * band state (phy+ana+radio)
    248 */
    249struct brcms_band {
    250	int bandtype;		/* BRCM_BAND_2G, BRCM_BAND_5G */
    251	uint bandunit;		/* bandstate[] index */
    252
    253	u16 phytype;		/* phytype */
    254	u16 phyrev;
    255	u16 radioid;
    256	u16 radiorev;
    257	struct brcms_phy_pub *pi; /* pointer to phy specific information */
    258	bool abgphy_encore;
    259
    260	u8 gmode;		/* currently active gmode */
    261
    262	struct scb *hwrs_scb;	/* permanent scb for hw rateset */
    263
    264	/* band-specific copy of default_bss.rateset */
    265	struct brcms_c_rateset defrateset;
    266
    267	u8 band_stf_ss_mode;	/* Configured STF type, 0:siso; 1:cdd */
    268	s8 band_stf_stbc_tx;	/* STBC TX 0:off; 1:force on; -1:auto */
    269	/* rates supported by chip (phy-specific) */
    270	struct brcms_c_rateset hw_rateset;
    271	u8 basic_rate[BRCM_MAXRATE + 1]; /* basic rates indexed by rate */
    272	bool mimo_cap_40;	/* 40 MHz cap enabled on this band */
    273	s8 antgain;		/* antenna gain from srom */
    274
    275	u16 CWmin; /* minimum size of contention window, in unit of aSlotTime */
    276	u16 CWmax; /* maximum size of contention window, in unit of aSlotTime */
    277	struct ieee80211_supported_band band;
    278};
    279
    280/* module control blocks */
    281struct modulecb {
    282	/* module name : NULL indicates empty array member */
    283	char name[32];
    284	/* handle passed when handler 'doiovar' is called */
    285	struct brcms_info *hdl;
    286
    287	int (*down_fn)(void *handle); /* down handler. Note: the int returned
    288				       * by the down function is a count of the
    289				       * number of timers that could not be
    290				       * freed.
    291				       */
    292
    293};
    294
    295struct brcms_hw_band {
    296	int bandtype;		/* BRCM_BAND_2G, BRCM_BAND_5G */
    297	uint bandunit;		/* bandstate[] index */
    298	u16 mhfs[MHFMAX];	/* MHF array shadow */
    299	u8 bandhw_stf_ss_mode;	/* HW configured STF type, 0:siso; 1:cdd */
    300	u16 CWmin;
    301	u16 CWmax;
    302	u32 core_flags;
    303
    304	u16 phytype;		/* phytype */
    305	u16 phyrev;
    306	u16 radioid;
    307	u16 radiorev;
    308	struct brcms_phy_pub *pi; /* pointer to phy specific information */
    309	bool abgphy_encore;
    310};
    311
    312struct brcms_hardware {
    313	bool _piomode;		/* true if pio mode */
    314	struct brcms_c_info *wlc;
    315
    316	/* fifo */
    317	struct dma_pub *di[NFIFO];	/* dma handles, per fifo */
    318
    319	uint unit;		/* device instance number */
    320
    321	/* version info */
    322	u16 vendorid;	/* PCI vendor id */
    323	u16 deviceid;	/* PCI device id */
    324	uint corerev;		/* core revision */
    325	u8 sromrev;		/* version # of the srom */
    326	u16 boardrev;	/* version # of particular board */
    327	u32 boardflags;	/* Board specific flags from srom */
    328	u32 boardflags2;	/* More board flags if sromrev >= 4 */
    329	u32 machwcap;	/* MAC capabilities */
    330	u32 machwcap_backup;	/* backup of machwcap */
    331
    332	struct si_pub *sih;	/* SI handle (cookie for siutils calls) */
    333	struct bcma_device *d11core;	/* pointer to 802.11 core */
    334	struct phy_shim_info *physhim; /* phy shim layer handler */
    335	struct shared_phy *phy_sh;	/* pointer to shared phy state */
    336	struct brcms_hw_band *band;/* pointer to active per-band state */
    337	/* band state per phy/radio */
    338	struct brcms_hw_band *bandstate[MAXBANDS];
    339	u16 bmac_phytxant;	/* cache of high phytxant state */
    340	bool shortslot;		/* currently using 11g ShortSlot timing */
    341	u16 SRL;		/* 802.11 dot11ShortRetryLimit */
    342	u16 LRL;		/* 802.11 dot11LongRetryLimit */
    343	u16 SFBL;		/* Short Frame Rate Fallback Limit */
    344	u16 LFBL;		/* Long Frame Rate Fallback Limit */
    345
    346	bool up;		/* d11 hardware up and running */
    347	uint now;		/* # elapsed seconds */
    348	uint _nbands;		/* # bands supported */
    349	u16 chanspec;	/* bmac chanspec shadow */
    350
    351	uint *txavail[NFIFO];	/* # tx descriptors available */
    352	const u16 *xmtfifo_sz;	/* fifo size in 256B for each xmt fifo */
    353
    354	u32 pllreq;		/* pll requests to keep PLL on */
    355
    356	u8 suspended_fifos;	/* Which TX fifo to remain awake for */
    357	u32 maccontrol;	/* Cached value of maccontrol */
    358	uint mac_suspend_depth;	/* current depth of mac_suspend levels */
    359	u32 wake_override;	/* bit flags to force MAC to WAKE mode */
    360	u32 mute_override;	/* Prevent ucode from sending beacons */
    361	u8 etheraddr[ETH_ALEN];	/* currently configured ethernet address */
    362	bool noreset;		/* true= do not reset hw, used by WLC_OUT */
    363	bool forcefastclk;	/* true if h/w is forcing to use fast clk */
    364	bool clk;		/* core is out of reset and has clock */
    365	bool sbclk;		/* sb has clock */
    366	bool phyclk;		/* phy is out of reset and has clock */
    367
    368	bool ucode_loaded;	/* true after ucode downloaded */
    369
    370
    371	u8 hw_stf_ss_opmode;	/* STF single stream operation mode */
    372	u8 antsel_type;	/* Type of boardlevel mimo antenna switch-logic
    373				 * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
    374				 */
    375	u32 antsel_avail;	/*
    376				 * put struct antsel_info here if more info is
    377				 * needed
    378				 */
    379};
    380
    381/*
    382 * Principal common driver data structure.
    383 *
    384 * pub: pointer to driver public state.
    385 * wl: pointer to specific private state.
    386 * hw: HW related state.
    387 * clkreq_override: setting for clkreq for PCIE : Auto, 0, 1.
    388 * fastpwrup_dly: time in us needed to bring up d11 fast clock.
    389 * macintstatus: bit channel between isr and dpc.
    390 * macintmask: sw runtime master macintmask value.
    391 * defmacintmask: default "on" macintmask value.
    392 * clk: core is out of reset and has clock.
    393 * core: pointer to active io core.
    394 * band: pointer to active per-band state.
    395 * corestate: per-core state (one per hw core).
    396 * bandstate: per-band state (one per phy/radio).
    397 * qvalid: DirFrmQValid and BcMcFrmQValid.
    398 * ampdu: ampdu module handler.
    399 * asi: antsel module handler.
    400 * cmi: channel manager module handler.
    401 * vendorid: PCI vendor id.
    402 * deviceid: PCI device id.
    403 * ucode_rev: microcode revision.
    404 * machwcap: MAC capabilities, BMAC shadow.
    405 * perm_etheraddr: original sprom local ethernet address.
    406 * bandlocked: disable auto multi-band switching.
    407 * bandinit_pending: track band init in auto band.
    408 * radio_monitor: radio timer is running.
    409 * going_down: down path intermediate variable.
    410 * wdtimer: timer for watchdog routine.
    411 * radio_timer: timer for hw radio button monitor routine.
    412 * monitor: monitor (MPDU sniffing) mode.
    413 * bcnmisc_monitor: bcns promisc mode override for monitor.
    414 * _rifs: enable per-packet rifs.
    415 * bcn_li_bcn: beacon listen interval in # beacons.
    416 * bcn_li_dtim: beacon listen interval in # dtims.
    417 * WDarmed: watchdog timer is armed.
    418 * WDlast: last time wlc_watchdog() was called.
    419 * edcf_txop[IEEE80211_NUM_ACS]: current txop for each ac.
    420 * wme_retries: per-AC retry limits.
    421 * bsscfg: set of BSS configurations, idx 0 is default and always valid.
    422 * cfg: the primary bsscfg (can be AP or STA).
    423 * modulecb:
    424 * mimoft: SIGN or 11N.
    425 * cck_40txbw: 11N, cck tx b/w override when in 40MHZ mode.
    426 * ofdm_40txbw: 11N, ofdm tx b/w override when in 40MHZ mode.
    427 * mimo_40txbw: 11N, mimo tx b/w override when in 40MHZ mode.
    428 * default_bss: configured BSS parameters.
    429 * mc_fid_counter: BC/MC FIFO frame ID counter.
    430 * country_default: saved country for leaving 802.11d auto-country mode.
    431 * autocountry_default: initial country for 802.11d auto-country mode.
    432 * prb_resp_timeout: do not send prb resp if request older
    433 *		     than this, 0 = disable.
    434 * home_chanspec: shared home chanspec.
    435 * chanspec: target operational channel.
    436 * usr_fragthresh: user configured fragmentation threshold.
    437 * fragthresh[NFIFO]: per-fifo fragmentation thresholds.
    438 * RTSThresh: 802.11 dot11RTSThreshold.
    439 * SRL: 802.11 dot11ShortRetryLimit.
    440 * LRL: 802.11 dot11LongRetryLimit.
    441 * SFBL: Short Frame Rate Fallback Limit.
    442 * LFBL: Long Frame Rate Fallback Limit.
    443 * shortslot: currently using 11g ShortSlot timing.
    444 * shortslot_override: 11g ShortSlot override.
    445 * include_legacy_erp: include Legacy ERP info elt ID 47 as well as g ID 42.
    446 * PLCPHdr_override: 802.11b Preamble Type override.
    447 * stf:
    448 * bcn_rspec: save bcn ratespec purpose.
    449 * tempsense_lasttime;
    450 * tx_duty_cycle_ofdm: maximum allowed duty cycle for OFDM.
    451 * tx_duty_cycle_cck: maximum allowed duty cycle for CCK.
    452 * wiphy:
    453 * pri_scb: primary Station Control Block
    454 */
    455struct brcms_c_info {
    456	struct brcms_pub *pub;
    457	struct brcms_info *wl;
    458	struct brcms_hardware *hw;
    459
    460	/* clock */
    461	u16 fastpwrup_dly;
    462
    463	/* interrupt */
    464	u32 macintstatus;
    465	u32 macintmask;
    466	u32 defmacintmask;
    467
    468	bool clk;
    469
    470	/* multiband */
    471	struct brcms_core *core;
    472	struct brcms_band *band;
    473	struct brcms_core *corestate;
    474	struct brcms_band *bandstate[MAXBANDS];
    475
    476	/* packet queue */
    477	uint qvalid;
    478
    479	struct ampdu_info *ampdu;
    480	struct antsel_info *asi;
    481	struct brcms_cm_info *cmi;
    482
    483	u16 vendorid;
    484	u16 deviceid;
    485	uint ucode_rev;
    486
    487	u8 perm_etheraddr[ETH_ALEN];
    488
    489	bool bandlocked;
    490	bool bandinit_pending;
    491
    492	bool radio_monitor;
    493	bool going_down;
    494
    495	bool beacon_template_virgin;
    496
    497	struct brcms_timer *wdtimer;
    498	struct brcms_timer *radio_timer;
    499
    500	/* promiscuous */
    501	uint filter_flags;
    502
    503	/* driver feature */
    504	bool _rifs;
    505
    506	/* AP-STA synchronization, power save */
    507	u8 bcn_li_bcn;
    508	u8 bcn_li_dtim;
    509
    510	bool WDarmed;
    511	u32 WDlast;
    512
    513	/* WME */
    514	u16 edcf_txop[IEEE80211_NUM_ACS];
    515
    516	u16 wme_retries[IEEE80211_NUM_ACS];
    517
    518	struct brcms_bss_cfg *bsscfg;
    519
    520	struct modulecb *modulecb;
    521
    522	u8 mimoft;
    523	s8 cck_40txbw;
    524	s8 ofdm_40txbw;
    525	s8 mimo_40txbw;
    526
    527	struct brcms_bss_info *default_bss;
    528
    529	u16 mc_fid_counter;
    530
    531	char country_default[BRCM_CNTRY_BUF_SZ];
    532	char autocountry_default[BRCM_CNTRY_BUF_SZ];
    533	u16 prb_resp_timeout;
    534
    535	u16 home_chanspec;
    536
    537	/* PHY parameters */
    538	u16 chanspec;
    539	u16 usr_fragthresh;
    540	u16 fragthresh[NFIFO];
    541	u16 RTSThresh;
    542	u16 SRL;
    543	u16 LRL;
    544	u16 SFBL;
    545	u16 LFBL;
    546
    547	/* network config */
    548	bool shortslot;
    549	s8 shortslot_override;
    550	bool include_legacy_erp;
    551
    552	struct brcms_protection *protection;
    553	s8 PLCPHdr_override;
    554
    555	struct brcms_stf *stf;
    556
    557	u32 bcn_rspec;
    558
    559	uint tempsense_lasttime;
    560
    561	u16 tx_duty_cycle_ofdm;
    562	u16 tx_duty_cycle_cck;
    563
    564	struct wiphy *wiphy;
    565	struct scb pri_scb;
    566	struct ieee80211_vif *vif;
    567
    568	struct sk_buff *beacon;
    569	u16 beacon_tim_offset;
    570	u16 beacon_dtim_period;
    571	struct sk_buff *probe_resp;
    572};
    573
    574/* antsel module specific state */
    575struct antsel_info {
    576	struct brcms_c_info *wlc;	/* pointer to main wlc structure */
    577	struct brcms_pub *pub;		/* pointer to public fn */
    578	u8 antsel_type;	/* Type of boardlevel mimo antenna switch-logic
    579				 * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board
    580				 */
    581	u8 antsel_antswitch;	/* board level antenna switch type */
    582	bool antsel_avail;	/* Ant selection availability (SROM based) */
    583	struct brcms_antselcfg antcfg_11n; /* antenna configuration */
    584	struct brcms_antselcfg antcfg_cur; /* current antenna config (auto) */
    585};
    586
    587enum brcms_bss_type {
    588	BRCMS_TYPE_STATION,
    589	BRCMS_TYPE_AP,
    590	BRCMS_TYPE_ADHOC,
    591};
    592
    593/*
    594 * BSS configuration state
    595 *
    596 * wlc: wlc to which this bsscfg belongs to.
    597 * type: interface type
    598 * SSID_len: the length of SSID
    599 * SSID: SSID string
    600 *
    601 *
    602 * BSSID: BSSID (associated)
    603 * cur_etheraddr: h/w address
    604 * flags: BSSCFG flags; see below
    605 *
    606 * current_bss: BSS parms in ASSOCIATED state
    607 *
    608 *
    609 * ID: 'unique' ID of this bsscfg, assigned at bsscfg allocation
    610 */
    611struct brcms_bss_cfg {
    612	struct brcms_c_info *wlc;
    613	enum brcms_bss_type type;
    614	u8 SSID_len;
    615	u8 SSID[IEEE80211_MAX_SSID_LEN];
    616	u8 BSSID[ETH_ALEN];
    617	struct brcms_bss_info *current_bss;
    618};
    619
    620int brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p);
    621int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
    622			   uint *blocks);
    623
    624int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config);
    625void brcms_c_mac_promisc(struct brcms_c_info *wlc, uint filter_flags);
    626u16 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec, uint mac_len);
    627u32 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
    628			       bool use_rspec, u16 mimo_ctlchbw);
    629u16 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
    630			       u32 rts_rate, u32 frame_rate,
    631			       u8 rts_preamble_type, u8 frame_preamble_type,
    632			       uint frame_len, bool ba);
    633void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
    634			    struct ieee80211_sta *sta, void (*dma_callback_fn));
    635void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend);
    636int brcms_c_set_nmode(struct brcms_c_info *wlc);
    637void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, u32 bcn_rate);
    638void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type);
    639void brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
    640			  bool mute, struct txpwr_limits *txpwr);
    641void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v);
    642u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset);
    643void brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
    644		 int bands);
    645void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags);
    646void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val);
    647void brcms_b_phy_reset(struct brcms_hardware *wlc_hw);
    648void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw);
    649void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw);
    650void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
    651				     u32 override_bit);
    652void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
    653				       u32 override_bit);
    654void brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset,
    655				int len, void *buf);
    656u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate);
    657void brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
    658			   const void *buf, int len, u32 sel);
    659void brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset,
    660			     void *buf, int len, u32 sel);
    661void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode);
    662u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw);
    663void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk);
    664void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk);
    665void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on);
    666void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant);
    667void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode);
    668void brcms_c_init_scb(struct scb *scb);
    669
    670#endif				/* _BRCM_MAIN_H_ */