phy_n.c (937495B)
1// SPDX-License-Identifier: ISC 2/* 3 * Copyright (c) 2010 Broadcom Corporation 4 */ 5 6#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 8#include <linux/kernel.h> 9#include <linux/delay.h> 10#include <linux/cordic.h> 11 12#include <brcm_hw_ids.h> 13#include <aiutils.h> 14#include <chipcommon.h> 15#include <pmu.h> 16#include <d11.h> 17#include <phy_shim.h> 18#include "phy_int.h" 19#include "phy_hal.h" 20#include "phy_radio.h" 21#include "phyreg_n.h" 22#include "phytbl_n.h" 23#include "soc.h" 24 25#define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \ 26 read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 27 ((core == PHY_CORE_0) ? \ 28 radio_type##_##jspace##0 : \ 29 radio_type##_##jspace##1)) 30 31#define WRITE_RADIO_REG2(pi, radio_type, jspace, core, reg_name, value) \ 32 write_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ 33 ((core == PHY_CORE_0) ? \ 34 radio_type##_##jspace##0 : \ 35 radio_type##_##jspace##1), value) 36 37#define WRITE_RADIO_SYN(pi, radio_type, reg_name, value) \ 38 write_radio_reg(pi, radio_type##_##SYN##_##reg_name, value) 39 40#define READ_RADIO_REG3(pi, radio_type, jspace, core, reg_name) \ 41 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 42 radio_type##_##jspace##0##_##reg_name : \ 43 radio_type##_##jspace##1##_##reg_name)) 44 45#define WRITE_RADIO_REG3(pi, radio_type, jspace, core, reg_name, value) \ 46 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 47 radio_type##_##jspace##0##_##reg_name : \ 48 radio_type##_##jspace##1##_##reg_name), \ 49 value) 50 51#define READ_RADIO_REG4(pi, radio_type, jspace, core, reg_name) \ 52 read_radio_reg(pi, ((core == PHY_CORE_0) ? \ 53 radio_type##_##reg_name##_##jspace##0 : \ 54 radio_type##_##reg_name##_##jspace##1)) 55 56#define WRITE_RADIO_REG4(pi, radio_type, jspace, core, reg_name, value) \ 57 write_radio_reg(pi, ((core == PHY_CORE_0) ? \ 58 radio_type##_##reg_name##_##jspace##0 : \ 59 radio_type##_##reg_name##_##jspace##1), \ 60 value) 61 62#define NPHY_ACI_MAX_UNDETECT_WINDOW_SZ 40 63#define NPHY_ACI_CHANNEL_DELTA 5 64#define NPHY_ACI_CHANNEL_SKIP 4 65#define NPHY_ACI_40MHZ_CHANNEL_DELTA 6 66#define NPHY_ACI_40MHZ_CHANNEL_SKIP 5 67#define NPHY_ACI_40MHZ_CHANNEL_DELTA_GE_REV3 6 68#define NPHY_ACI_40MHZ_CHANNEL_SKIP_GE_REV3 5 69#define NPHY_ACI_CHANNEL_DELTA_GE_REV3 4 70#define NPHY_ACI_CHANNEL_SKIP_GE_REV3 3 71 72#define NPHY_NOISE_NOASSOC_GLITCH_TH_UP 2 73 74#define NPHY_NOISE_NOASSOC_GLITCH_TH_DN 8 75 76#define NPHY_NOISE_ASSOC_GLITCH_TH_UP 2 77 78#define NPHY_NOISE_ASSOC_GLITCH_TH_DN 8 79 80#define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_UP 2 81 82#define NPHY_NOISE_ASSOC_ACI_GLITCH_TH_DN 8 83 84#define NPHY_NOISE_NOASSOC_ENTER_TH 400 85 86#define NPHY_NOISE_ASSOC_ENTER_TH 400 87 88#define NPHY_NOISE_ASSOC_RX_GLITCH_BADPLCP_ENTER_TH 400 89 90#define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX 44 91#define NPHY_NOISE_CRSMINPWR_ARRAY_MAX_INDEX_REV_7 56 92 93#define NPHY_NOISE_NOASSOC_CRSIDX_INCR 16 94 95#define NPHY_NOISE_ASSOC_CRSIDX_INCR 8 96 97#define NPHY_IS_SROM_REINTERPRET NREV_GE(pi->pubpi.phy_rev, 5) 98 99#define NPHY_RSSICAL_MAXREAD 31 100 101#define NPHY_RSSICAL_NPOLL 8 102#define NPHY_RSSICAL_MAXD (1<<20) 103#define NPHY_MIN_RXIQ_PWR 2 104 105#define NPHY_RSSICAL_W1_TARGET 25 106#define NPHY_RSSICAL_W2_TARGET NPHY_RSSICAL_W1_TARGET 107#define NPHY_RSSICAL_NB_TARGET 0 108 109#define NPHY_RSSICAL_W1_TARGET_REV3 29 110#define NPHY_RSSICAL_W2_TARGET_REV3 NPHY_RSSICAL_W1_TARGET_REV3 111 112#define NPHY_CALSANITY_RSSI_NB_MAX_POS 9 113#define NPHY_CALSANITY_RSSI_NB_MAX_NEG -9 114#define NPHY_CALSANITY_RSSI_W1_MAX_POS 12 115#define NPHY_CALSANITY_RSSI_W1_MAX_NEG (NPHY_RSSICAL_W1_TARGET - \ 116 NPHY_RSSICAL_MAXREAD) 117#define NPHY_CALSANITY_RSSI_W2_MAX_POS NPHY_CALSANITY_RSSI_W1_MAX_POS 118#define NPHY_CALSANITY_RSSI_W2_MAX_NEG (NPHY_RSSICAL_W2_TARGET - \ 119 NPHY_RSSICAL_MAXREAD) 120#define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f))) 121#define NPHY_RSSI_NB_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_NB_MAX_POS) || \ 122 ((x) < NPHY_CALSANITY_RSSI_NB_MAX_NEG)) 123#define NPHY_RSSI_W1_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W1_MAX_POS) || \ 124 ((x) < NPHY_CALSANITY_RSSI_W1_MAX_NEG)) 125#define NPHY_RSSI_W2_VIOL(x) (((x) > NPHY_CALSANITY_RSSI_W2_MAX_POS) || \ 126 ((x) < NPHY_CALSANITY_RSSI_W2_MAX_NEG)) 127 128#define NPHY_IQCAL_NUMGAINS 9 129#define NPHY_N_GCTL 0x66 130 131#define NPHY_PAPD_EPS_TBL_SIZE 64 132#define NPHY_PAPD_SCL_TBL_SIZE 64 133#define NPHY_NUM_DIG_FILT_COEFFS 15 134 135#define NPHY_PAPD_COMP_OFF 0 136#define NPHY_PAPD_COMP_ON 1 137 138#define NPHY_SROM_TEMPSHIFT 32 139#define NPHY_SROM_MAXTEMPOFFSET 16 140#define NPHY_SROM_MINTEMPOFFSET -16 141 142#define NPHY_CAL_MAXTEMPDELTA 64 143 144#define NPHY_NOISEVAR_TBLLEN40 256 145#define NPHY_NOISEVAR_TBLLEN20 128 146 147#define NPHY_ANARXLPFBW_REDUCTIONFACT 7 148 149#define NPHY_ADJUSTED_MINCRSPOWER 0x1e 150 151/* 5357 Chip specific ChipControl register bits */ 152#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ 153#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ 154 155#define NPHY_CAL_TSSISAMPS 64 156#define NPHY_TEST_TONE_FREQ_40MHz 4000 157#define NPHY_TEST_TONE_FREQ_20MHz 2500 158 159#define MAX_205x_RCAL_WAITLOOPS 10000 160 161#define NPHY_RXCAL_TONEAMP 181 162#define NPHY_RXCAL_TONEFREQ_40MHz 4000 163#define NPHY_RXCAL_TONEFREQ_20MHz 2000 164 165#define TXFILT_SHAPING_OFDM20 0 166#define TXFILT_SHAPING_OFDM40 1 167#define TXFILT_SHAPING_CCK 2 168#define TXFILT_DEFAULT_OFDM20 3 169#define TXFILT_DEFAULT_OFDM40 4 170 171struct nphy_iqcal_params { 172 u16 txlpf; 173 u16 txgm; 174 u16 pga; 175 u16 pad; 176 u16 ipa; 177 u16 cal_gain; 178 u16 ncorr[5]; 179}; 180 181struct nphy_txiqcal_ladder { 182 u8 percent; 183 u8 g_env; 184}; 185 186struct nphy_ipa_txcalgains { 187 struct nphy_txgains gains; 188 bool useindex; 189 u8 index; 190}; 191 192struct nphy_papd_restore_state { 193 u16 fbmix[2]; 194 u16 vga_master[2]; 195 u16 intpa_master[2]; 196 u16 afectrl[2]; 197 u16 afeoverride[2]; 198 u16 pwrup[2]; 199 u16 atten[2]; 200 u16 mm; 201}; 202 203struct nphy_ipa_txrxgain { 204 u16 hpvga; 205 u16 lpf_biq1; 206 u16 lpf_biq0; 207 u16 lna2; 208 u16 lna1; 209 s8 txpwrindex; 210}; 211 212#define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) 213 214static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz[] = { 215 {0, 0, 0, 0, 0, 100}, 216 {0, 0, 0, 0, 0, 50}, 217 {0, 0, 0, 0, 0, -1}, 218 {0, 0, 0, 3, 0, -1}, 219 {0, 0, 3, 3, 0, -1}, 220 {0, 2, 3, 3, 0, -1} 221}; 222 223static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz[] = { 224 {0, 0, 0, 0, 0, 128}, 225 {0, 0, 0, 0, 0, 70}, 226 {0, 0, 0, 0, 0, 20}, 227 {0, 0, 0, 3, 0, 20}, 228 {0, 0, 3, 3, 0, 20}, 229 {0, 2, 3, 3, 0, 20} 230}; 231 232static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { 233 {0, 0, 0, 0, 0, 100}, 234 {0, 0, 0, 0, 0, 50}, 235 {0, 0, 0, 0, 0, -1}, 236 {0, 0, 0, 3, 0, -1}, 237 {0, 0, 3, 3, 0, -1}, 238 {0, 0, 5, 3, 0, -1} 239}; 240 241static const struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { 242 {0, 0, 0, 0, 0, 10}, 243 {0, 0, 0, 1, 0, 10}, 244 {0, 0, 1, 2, 0, 10}, 245 {0, 0, 1, 3, 0, 10}, 246 {0, 0, 4, 3, 0, 10}, 247 {0, 0, 6, 3, 0, 10} 248}; 249 250enum { 251 NPHY_RXCAL_GAIN_INIT = 0, 252 NPHY_RXCAL_GAIN_UP, 253 NPHY_RXCAL_GAIN_DOWN 254}; 255 256#define wlc_phy_get_papd_nphy(pi) \ 257 (read_phy_reg((pi), 0x1e7) & \ 258 ((0x1 << 15) | \ 259 (0x1 << 14) | \ 260 (0x1 << 13))) 261 262static const u16 NPHY_IPA_REV4_txdigi_filtcoeffs[][NPHY_NUM_DIG_FILT_COEFFS] = { 263 {-377, 137, -407, 208, -1527, 956, 93, 186, 93, 264 230, -44, 230, 201, -191, 201}, 265 {-77, 20, -98, 49, -93, 60, 56, 111, 56, 26, -5, 266 26, 34, -32, 34}, 267 {-360, 164, -376, 164, -1533, 576, 308, -314, 308, 268 121, -73, 121, 91, 124, 91}, 269 {-295, 200, -363, 142, -1391, 826, 151, 301, 151, 270 151, 301, 151, 602, -752, 602}, 271 {-92, 58, -96, 49, -104, 44, 17, 35, 17, 272 12, 25, 12, 13, 27, 13}, 273 {-375, 136, -399, 209, -1479, 949, 130, 260, 130, 274 230, -44, 230, 201, -191, 201}, 275 {0xed9, 0xc8, 0xe95, 0x8e, 0xa91, 0x33a, 0x97, 0x12d, 0x97, 276 0x97, 0x12d, 0x97, 0x25a, 0xd10, 0x25a} 277}; 278 279struct chan_info_nphy_2055 { 280 u16 chan; 281 u16 freq; 282 uint unknown; 283 u8 RF_pll_ref; 284 u8 RF_rf_pll_mod1; 285 u8 RF_rf_pll_mod0; 286 u8 RF_vco_cap_tail; 287 u8 RF_vco_cal1; 288 u8 RF_vco_cal2; 289 u8 RF_pll_lf_c1; 290 u8 RF_pll_lf_r1; 291 u8 RF_pll_lf_c2; 292 u8 RF_lgbuf_cen_buf; 293 u8 RF_lgen_tune1; 294 u8 RF_lgen_tune2; 295 u8 RF_core1_lgbuf_a_tune; 296 u8 RF_core1_lgbuf_g_tune; 297 u8 RF_core1_rxrf_reg1; 298 u8 RF_core1_tx_pga_pad_tn; 299 u8 RF_core1_tx_mx_bgtrim; 300 u8 RF_core2_lgbuf_a_tune; 301 u8 RF_core2_lgbuf_g_tune; 302 u8 RF_core2_rxrf_reg1; 303 u8 RF_core2_tx_pga_pad_tn; 304 u8 RF_core2_tx_mx_bgtrim; 305 u16 PHY_BW1a; 306 u16 PHY_BW2; 307 u16 PHY_BW3; 308 u16 PHY_BW4; 309 u16 PHY_BW5; 310 u16 PHY_BW6; 311}; 312 313struct chan_info_nphy_radio205x { 314 u16 chan; 315 u16 freq; 316 u8 RF_SYN_pll_vcocal1; 317 u8 RF_SYN_pll_vcocal2; 318 u8 RF_SYN_pll_refdiv; 319 u8 RF_SYN_pll_mmd2; 320 u8 RF_SYN_pll_mmd1; 321 u8 RF_SYN_pll_loopfilter1; 322 u8 RF_SYN_pll_loopfilter2; 323 u8 RF_SYN_pll_loopfilter3; 324 u8 RF_SYN_pll_loopfilter4; 325 u8 RF_SYN_pll_loopfilter5; 326 u8 RF_SYN_reserved_addr27; 327 u8 RF_SYN_reserved_addr28; 328 u8 RF_SYN_reserved_addr29; 329 u8 RF_SYN_logen_VCOBUF1; 330 u8 RF_SYN_logen_MIXER2; 331 u8 RF_SYN_logen_BUF3; 332 u8 RF_SYN_logen_BUF4; 333 u8 RF_RX0_lnaa_tune; 334 u8 RF_RX0_lnag_tune; 335 u8 RF_TX0_intpaa_boost_tune; 336 u8 RF_TX0_intpag_boost_tune; 337 u8 RF_TX0_pada_boost_tune; 338 u8 RF_TX0_padg_boost_tune; 339 u8 RF_TX0_pgaa_boost_tune; 340 u8 RF_TX0_pgag_boost_tune; 341 u8 RF_TX0_mixa_boost_tune; 342 u8 RF_TX0_mixg_boost_tune; 343 u8 RF_RX1_lnaa_tune; 344 u8 RF_RX1_lnag_tune; 345 u8 RF_TX1_intpaa_boost_tune; 346 u8 RF_TX1_intpag_boost_tune; 347 u8 RF_TX1_pada_boost_tune; 348 u8 RF_TX1_padg_boost_tune; 349 u8 RF_TX1_pgaa_boost_tune; 350 u8 RF_TX1_pgag_boost_tune; 351 u8 RF_TX1_mixa_boost_tune; 352 u8 RF_TX1_mixg_boost_tune; 353 u16 PHY_BW1a; 354 u16 PHY_BW2; 355 u16 PHY_BW3; 356 u16 PHY_BW4; 357 u16 PHY_BW5; 358 u16 PHY_BW6; 359}; 360 361struct chan_info_nphy_radio2057 { 362 u16 chan; 363 u16 freq; 364 u8 RF_vcocal_countval0; 365 u8 RF_vcocal_countval1; 366 u8 RF_rfpll_refmaster_sparextalsize; 367 u8 RF_rfpll_loopfilter_r1; 368 u8 RF_rfpll_loopfilter_c2; 369 u8 RF_rfpll_loopfilter_c1; 370 u8 RF_cp_kpd_idac; 371 u8 RF_rfpll_mmd0; 372 u8 RF_rfpll_mmd1; 373 u8 RF_vcobuf_tune; 374 u8 RF_logen_mx2g_tune; 375 u8 RF_logen_mx5g_tune; 376 u8 RF_logen_indbuf2g_tune; 377 u8 RF_logen_indbuf5g_tune; 378 u8 RF_txmix2g_tune_boost_pu_core0; 379 u8 RF_pad2g_tune_pus_core0; 380 u8 RF_pga_boost_tune_core0; 381 u8 RF_txmix5g_boost_tune_core0; 382 u8 RF_pad5g_tune_misc_pus_core0; 383 u8 RF_lna2g_tune_core0; 384 u8 RF_lna5g_tune_core0; 385 u8 RF_txmix2g_tune_boost_pu_core1; 386 u8 RF_pad2g_tune_pus_core1; 387 u8 RF_pga_boost_tune_core1; 388 u8 RF_txmix5g_boost_tune_core1; 389 u8 RF_pad5g_tune_misc_pus_core1; 390 u8 RF_lna2g_tune_core1; 391 u8 RF_lna5g_tune_core1; 392 u16 PHY_BW1a; 393 u16 PHY_BW2; 394 u16 PHY_BW3; 395 u16 PHY_BW4; 396 u16 PHY_BW5; 397 u16 PHY_BW6; 398}; 399 400struct chan_info_nphy_radio2057_rev5 { 401 u16 chan; 402 u16 freq; 403 u8 RF_vcocal_countval0; 404 u8 RF_vcocal_countval1; 405 u8 RF_rfpll_refmaster_sparextalsize; 406 u8 RF_rfpll_loopfilter_r1; 407 u8 RF_rfpll_loopfilter_c2; 408 u8 RF_rfpll_loopfilter_c1; 409 u8 RF_cp_kpd_idac; 410 u8 RF_rfpll_mmd0; 411 u8 RF_rfpll_mmd1; 412 u8 RF_vcobuf_tune; 413 u8 RF_logen_mx2g_tune; 414 u8 RF_logen_indbuf2g_tune; 415 u8 RF_txmix2g_tune_boost_pu_core0; 416 u8 RF_pad2g_tune_pus_core0; 417 u8 RF_lna2g_tune_core0; 418 u8 RF_txmix2g_tune_boost_pu_core1; 419 u8 RF_pad2g_tune_pus_core1; 420 u8 RF_lna2g_tune_core1; 421 u16 PHY_BW1a; 422 u16 PHY_BW2; 423 u16 PHY_BW3; 424 u16 PHY_BW4; 425 u16 PHY_BW5; 426 u16 PHY_BW6; 427}; 428 429struct nphy_sfo_cfg { 430 u16 PHY_BW1a; 431 u16 PHY_BW2; 432 u16 PHY_BW3; 433 u16 PHY_BW4; 434 u16 PHY_BW5; 435 u16 PHY_BW6; 436}; 437 438static const struct chan_info_nphy_2055 chan_info_nphy_2055[] = { 439 { 440 184, 4920, 3280, 0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 441 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 442 0x0F, 0x8F, 0x7B4, 0x7B0, 0x7AC, 0x214, 0x215, 0x216}, 443 { 444 186, 4930, 3287, 0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 445 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 446 0x0F, 0x8F, 0x7B8, 0x7B4, 0x7B0, 0x213, 0x214, 0x215}, 447 { 448 188, 4940, 3293, 0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 449 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 450 0x0F, 0x8F, 0x7BC, 0x7B8, 0x7B4, 0x212, 0x213, 0x214}, 451 { 452 190, 4950, 3300, 0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 453 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 454 0x0F, 0x8F, 0x7C0, 0x7BC, 0x7B8, 0x211, 0x212, 0x213}, 455 { 456 192, 4960, 3307, 0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 457 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 458 0x0F, 0x8F, 0x7C4, 0x7C0, 0x7BC, 0x20F, 0x211, 0x212}, 459 { 460 194, 4970, 3313, 0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 461 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 462 0x0F, 0x8F, 0x7C8, 0x7C4, 0x7C0, 0x20E, 0x20F, 0x211}, 463 { 464 196, 4980, 3320, 0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 465 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 466 0x0F, 0x8F, 0x7CC, 0x7C8, 0x7C4, 0x20D, 0x20E, 0x20F}, 467 { 468 198, 4990, 3327, 0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 469 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 470 0x0F, 0x8F, 0x7D0, 0x7CC, 0x7C8, 0x20C, 0x20D, 0x20E}, 471 { 472 200, 5000, 3333, 0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 473 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 474 0x0F, 0x8F, 0x7D4, 0x7D0, 0x7CC, 0x20B, 0x20C, 0x20D}, 475 { 476 202, 5010, 3340, 0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, 477 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 478 0x0F, 0x8F, 0x7D8, 0x7D4, 0x7D0, 0x20A, 0x20B, 0x20C}, 479 { 480 204, 5020, 3347, 0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 481 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 482 0x0F, 0x8F, 0x7DC, 0x7D8, 0x7D4, 0x209, 0x20A, 0x20B}, 483 { 484 206, 5030, 3353, 0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, 485 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 486 0x0F, 0x8F, 0x7E0, 0x7DC, 0x7D8, 0x208, 0x209, 0x20A}, 487 { 488 208, 5040, 3360, 0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 489 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 490 0x0F, 0x8F, 0x7E4, 0x7E0, 0x7DC, 0x207, 0x208, 0x209}, 491 { 492 210, 5050, 3367, 0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, 493 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, 494 0x0F, 0x8F, 0x7E8, 0x7E4, 0x7E0, 0x206, 0x207, 0x208}, 495 { 496 212, 5060, 3373, 0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 497 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 498 0x0F, 0x8E, 0x7EC, 0x7E8, 0x7E4, 0x205, 0x206, 0x207}, 499 { 500 214, 5070, 3380, 0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, 501 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x8E, 0xFF, 0x00, 0x0E, 502 0x0F, 0x8E, 0x7F0, 0x7EC, 0x7E8, 0x204, 0x205, 0x206}, 503 { 504 216, 5080, 3387, 0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, 505 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, 506 0x0F, 0x8D, 0x7F4, 0x7F0, 0x7EC, 0x203, 0x204, 0x205}, 507 { 508 218, 5090, 3393, 0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A, 509 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x8D, 0xEE, 0x00, 0x0E, 510 0x0F, 0x8D, 0x7F8, 0x7F4, 0x7F0, 0x202, 0x203, 0x204}, 511 { 512 220, 5100, 3400, 0x71, 0x01, 0xFE, 0x0C, 0xD6, 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0x1C0, 0x1C1}, 855 { 856 172, 5860, 3907, 0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, 857 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 858 0x00, 0x80, 0x92C, 0x928, 0x924, 0x1BF, 0x1BF, 0x1C0}, 859 { 860 174, 5870, 3913, 0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, 861 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 862 0x00, 0x80, 0x930, 0x92C, 0x928, 0x1BE, 0x1BF, 0x1BF}, 863 { 864 176, 5880, 3920, 0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, 865 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 866 0x00, 0x80, 0x934, 0x930, 0x92C, 0x1BD, 0x1BE, 0x1BF}, 867 { 868 178, 5890, 3927, 0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, 869 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 870 0x00, 0x80, 0x938, 0x934, 0x930, 0x1BC, 0x1BD, 0x1BE}, 871 { 872 180, 5900, 3933, 0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, 873 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 874 0x00, 0x80, 0x93C, 0x938, 0x934, 0x1BC, 0x1BC, 0x1BD}, 875 { 876 182, 5910, 3940, 0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, 877 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 878 0x00, 0x80, 0x940, 0x93C, 0x938, 0x1BB, 0x1BC, 0x1BC}, 879 { 880 1, 2412, 3216, 0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, 881 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, 0x80, 0xFF, 0x88, 0x0D, 882 0x0C, 0x80, 0x3C9, 0x3C5, 0x3C1, 0x43A, 0x43F, 0x443}, 883 { 884 2, 2417, 3223, 0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, 885 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, 0x80, 0xFF, 0x88, 0x0C, 886 0x0B, 0x80, 0x3CB, 0x3C7, 0x3C3, 0x438, 0x43D, 0x441}, 887 { 888 3, 2422, 3229, 0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, 889 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 890 0x0A, 0x80, 0x3CD, 0x3C9, 0x3C5, 0x436, 0x43A, 0x43F}, 891 { 892 4, 2427, 3236, 0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, 893 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x80, 0xFF, 0x88, 0x0C, 894 0x0A, 0x80, 0x3CF, 0x3CB, 0x3C7, 0x434, 0x438, 0x43D}, 895 { 896 5, 2432, 3243, 0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, 897 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, 0x80, 0xFF, 0x88, 0x0C, 898 0x09, 0x80, 0x3D1, 0x3CD, 0x3C9, 0x431, 0x436, 0x43A}, 899 { 900 6, 2437, 3249, 0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, 901 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, 0x80, 0xFF, 0x88, 0x0B, 902 0x08, 0x80, 0x3D3, 0x3CF, 0x3CB, 0x42F, 0x434, 0x438}, 903 { 904 7, 2442, 3256, 0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, 905 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, 0x80, 0xFF, 0x88, 0x0A, 906 0x07, 0x80, 0x3D5, 0x3D1, 0x3CD, 0x42D, 0x431, 0x436}, 907 { 908 8, 2447, 3263, 0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, 909 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, 0x80, 0xFF, 0x88, 0x0A, 910 0x06, 0x80, 0x3D7, 0x3D3, 0x3CF, 0x42B, 0x42F, 0x434}, 911 { 912 9, 2452, 3269, 0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, 913 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, 0x80, 0xFF, 0x88, 0x09, 914 0x06, 0x80, 0x3D9, 0x3D5, 0x3D1, 0x429, 0x42D, 0x431}, 915 { 916 10, 2457, 3276, 0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, 917 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, 0x80, 0xFF, 0x88, 0x08, 918 0x05, 0x80, 0x3DB, 0x3D7, 0x3D3, 0x427, 0x42B, 0x42F}, 919 { 920 11, 2462, 3283, 0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, 921 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, 0x80, 0xFF, 0x88, 0x08, 922 0x04, 0x80, 0x3DD, 0x3D9, 0x3D5, 0x424, 0x429, 0x42D}, 923 { 924 12, 2467, 3289, 0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, 925 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, 0x80, 0xFF, 0x88, 0x08, 926 0x03, 0x80, 0x3DF, 0x3DB, 0x3D7, 0x422, 0x427, 0x42B}, 927 { 928 13, 2472, 3296, 0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, 929 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, 0x80, 0xFF, 0x88, 0x07, 930 0x03, 0x80, 0x3E1, 0x3DD, 0x3D9, 0x420, 0x424, 0x429}, 931 { 932 14, 2484, 3312, 0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, 933 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, 0x80, 0xFF, 0x88, 0x07, 934 0x01, 0x80, 0x3E6, 0x3E2, 0x3DE, 0x41B, 0x41F, 0x424} 935}; 936 937static const struct chan_info_nphy_radio205x chan_info_nphyrev3_2056[] = { 938 { 939 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 940 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 941 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 942 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 943 { 944 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 945 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 946 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 947 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 948 { 949 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 950 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 951 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 952 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 953 { 954 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 955 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 956 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 957 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 958 { 959 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 960 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 961 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 962 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 963 { 964 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 965 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 966 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 967 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 968 { 969 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 970 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 971 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 972 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 973 { 974 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 975 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, 976 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x08, 0x00, 0x7f, 0x00, 0x0b, 977 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 978 { 979 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 980 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 981 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 982 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 983 { 984 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 985 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 986 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 987 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 988 { 989 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 990 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 991 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 992 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 993 { 994 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 995 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 996 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 997 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 998 { 999 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1000 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1001 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1002 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1003 { 1004 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1005 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1006 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1007 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1008 { 1009 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1010 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1011 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1012 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1013 { 1014 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1015 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1016 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1017 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1018 { 1019 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1020 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1021 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1022 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1023 { 1024 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1025 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1026 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1027 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1028 { 1029 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1030 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1031 0x00, 0x0b, 0x00, 0xff, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1032 0x00, 0xff, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1033 { 1034 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1035 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1036 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1037 0x00, 0xfc, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1038 { 1039 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1040 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1041 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1042 0x00, 0xfc, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1043 { 1044 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1045 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1046 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1047 0x00, 0xfc, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1048 { 1049 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1050 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1051 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1052 0x00, 0xfc, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 1053 { 1054 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 1055 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1056 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1057 0x00, 0xfc, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, 1058 { 1059 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, 1060 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x07, 0x00, 0x7f, 1061 0x00, 0x0b, 0x00, 0xfc, 0x00, 0xff, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0b, 1062 0x00, 0xfc, 0x00, 0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc}, 1063 { 1064 36, 5180, 0xb6, 0x01, 0x01, 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0x01, 1550 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x05, 0x00, 1551 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x70, 0x00, 1552 0x0f, 0x00, 0x0d, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 1553 { 1554 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 1555 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x05, 0x00, 1556 0x70, 0x00, 0x0f, 0x00, 0x0d, 0x00, 0xf0, 0x00, 0x05, 0x00, 0x70, 0x00, 1557 0x0f, 0x00, 0x0d, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 1558}; 1559 1560static const struct chan_info_nphy_radio205x chan_info_nphyrev4_2056_A1[] = { 1561 { 1562 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 1563 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1564 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1565 0x00, 0xff, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 1566 { 1567 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 1568 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1569 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1570 0x00, 0xff, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 1571 { 1572 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 1573 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1574 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1575 0x00, 0xff, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 1576 { 1577 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 1578 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1579 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1580 0x00, 0xff, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 1581 { 1582 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 1583 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1584 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1585 0x00, 0xff, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 1586 { 1587 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 1588 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1589 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1590 0x00, 0xff, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 1591 { 1592 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 1593 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1594 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1595 0x00, 0xff, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 1596 { 1597 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 1598 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, 1599 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0e, 0x00, 0x7f, 0x00, 0x0f, 1600 0x00, 0xff, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 1601 { 1602 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 1603 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1604 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1605 0x00, 0xff, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 1606 { 1607 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 1608 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1609 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1610 0x00, 0xff, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 1611 { 1612 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 1613 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1614 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1615 0x00, 0xff, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 1616 { 1617 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 1618 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1619 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1620 0x00, 0xff, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 1621 { 1622 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 1623 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1624 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1625 0x00, 0xff, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 1626 { 1627 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 1628 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1629 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1630 0x00, 0xff, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 1631 { 1632 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 1633 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1634 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1635 0x00, 0xff, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 1636 { 1637 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 1638 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1639 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1640 0x00, 0xff, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 1641 { 1642 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 1643 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1644 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1645 0x00, 0xff, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 1646 { 1647 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 1648 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0d, 0x00, 0x7f, 1649 0x00, 0x0f, 0x00, 0xff, 0x00, 0xff, 0x00, 0x0d, 0x00, 0x7f, 0x00, 0x0f, 1650 0x00, 0xff, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 1651 { 1652 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 1653 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1654 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1655 0x00, 0xfe, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 1656 { 1657 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 1658 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1659 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1660 0x00, 0xfe, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 1661 { 1662 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 1663 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1664 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1665 0x00, 0xfe, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 1666 { 1667 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 1668 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1669 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1670 0x00, 0xfe, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 1671 { 1672 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 1673 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1674 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1675 0x00, 0xfe, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 1676 { 1677 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 1678 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1679 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1680 0x00, 0xfe, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, 1681 { 1682 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, 1683 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0c, 0x00, 0x7f, 1684 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xff, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1685 0x00, 0xfe, 0x00, 0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc}, 1686 { 1687 36, 5180, 0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, 0x0c, 0x01, 1688 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xef, 0x00, 0x0c, 0x00, 0x7f, 1689 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xef, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1690 0x00, 0xfe, 0x00, 0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb}, 1691 { 1692 38, 5190, 0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, 0x0c, 0x01, 1693 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xef, 0x00, 0x0c, 0x00, 0x7f, 1694 0x00, 0x0f, 0x00, 0xfe, 0x00, 0xef, 0x00, 0x0c, 0x00, 0x7f, 0x00, 0x0f, 1695 0x00, 0xfe, 0x00, 0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa}, 1696 { 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1843 0x04, 0x04, 0x04, 0x8d, 0x0d, 0x00, 0xc8, 0x5c, 0x00, 0x07, 0x00, 0x7f, 1844 0x00, 0x0f, 0x00, 0xf8, 0x00, 0x5c, 0x00, 0x07, 0x00, 0x7f, 0x00, 0x0f, 1845 0x00, 0xf8, 0x00, 0x0898, 0x0894, 0x0890, 0x01dd, 0x01dd, 0x01de}, 1846 { 1847 100, 5500, 0x47, 0x01, 0x01, 0x02, 0x26, 0x05, 0x05, 0x04, 0x0c, 0x01, 1848 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x5c, 0x00, 0x06, 0x00, 0x7f, 1849 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x5c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1850 0x00, 0xf6, 0x00, 0x089c, 0x0898, 0x0894, 0x01dc, 0x01dd, 0x01dd}, 1851 { 1852 102, 5510, 0x47, 0x01, 0x01, 0x02, 0x27, 0x05, 0x05, 0x04, 0x0c, 0x01, 1853 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1854 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1855 0x00, 0xf6, 0x00, 0x08a0, 0x089c, 0x0898, 0x01db, 0x01dc, 0x01dd}, 1856 { 1857 104, 5520, 0x40, 0x01, 0x01, 0x02, 0x28, 0x05, 0x05, 0x04, 0x0c, 0x01, 1858 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x4c, 0x00, 0x06, 0x00, 0x7f, 1859 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x4c, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1860 0x00, 0xf6, 0x00, 0x08a4, 0x08a0, 0x089c, 0x01da, 0x01db, 0x01dc}, 1861 { 1862 106, 5530, 0x40, 0x01, 0x01, 0x02, 0x29, 0x05, 0x05, 0x04, 0x0c, 0x01, 1863 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1864 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1865 0x00, 0xf6, 0x00, 0x08a8, 0x08a4, 0x08a0, 0x01d9, 0x01da, 0x01db}, 1866 { 1867 108, 5540, 0x3a, 0x01, 0x01, 0x02, 0x2a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1868 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1869 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1870 0x00, 0xf6, 0x00, 0x08ac, 0x08a8, 0x08a4, 0x01d8, 0x01d9, 0x01da}, 1871 { 1872 110, 5550, 0x3a, 0x01, 0x01, 0x02, 0x2b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1873 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x3b, 0x00, 0x06, 0x00, 0x7f, 1874 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x3b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1875 0x00, 0xf6, 0x00, 0x08b0, 0x08ac, 0x08a8, 0x01d7, 0x01d8, 0x01d9}, 1876 { 1877 112, 5560, 0x34, 0x01, 0x01, 0x02, 0x2c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1878 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2b, 0x00, 0x06, 0x00, 0x7f, 1879 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2b, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1880 0x00, 0xf6, 0x00, 0x08b4, 0x08b0, 0x08ac, 0x01d7, 0x01d7, 0x01d8}, 1881 { 1882 114, 5570, 0x34, 0x01, 0x01, 0x02, 0x2d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1883 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x2a, 0x00, 0x06, 0x00, 0x7f, 1884 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x2a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1885 0x00, 0xf6, 0x00, 0x08b8, 0x08b4, 0x08b0, 0x01d6, 0x01d7, 0x01d7}, 1886 { 1887 116, 5580, 0x2e, 0x01, 0x01, 0x02, 0x2e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1888 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1889 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1890 0x00, 0xf6, 0x00, 0x08bc, 0x08b8, 0x08b4, 0x01d5, 0x01d6, 0x01d7}, 1891 { 1892 118, 5590, 0x2e, 0x01, 0x01, 0x02, 0x2f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1893 0x04, 0x04, 0x04, 0x8d, 0x0b, 0x00, 0x84, 0x1a, 0x00, 0x06, 0x00, 0x7f, 1894 0x00, 0x0d, 0x00, 0xf6, 0x00, 0x1a, 0x00, 0x06, 0x00, 0x7f, 0x00, 0x0d, 1895 0x00, 0xf6, 0x00, 0x08c0, 0x08bc, 0x08b8, 0x01d4, 0x01d5, 0x01d6}, 1896 { 1897 120, 5600, 0x28, 0x01, 0x01, 0x02, 0x30, 0x05, 0x05, 0x04, 0x0c, 0x01, 1898 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x1a, 0x00, 0x04, 0x00, 0x7f, 1899 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x1a, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1900 0x00, 0xf4, 0x00, 0x08c4, 0x08c0, 0x08bc, 0x01d3, 0x01d4, 0x01d5}, 1901 { 1902 122, 5610, 0x28, 0x01, 0x01, 0x02, 0x31, 0x05, 0x05, 0x04, 0x0c, 0x01, 1903 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1904 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1905 0x00, 0xf4, 0x00, 0x08c8, 0x08c4, 0x08c0, 0x01d2, 0x01d3, 0x01d4}, 1906 { 1907 124, 5620, 0x21, 0x01, 0x01, 0x02, 0x32, 0x05, 0x05, 0x04, 0x0c, 0x01, 1908 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x19, 0x00, 0x04, 0x00, 0x7f, 1909 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x19, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1910 0x00, 0xf4, 0x00, 0x08cc, 0x08c8, 0x08c4, 0x01d2, 0x01d2, 0x01d3}, 1911 { 1912 126, 5630, 0x21, 0x01, 0x01, 0x02, 0x33, 0x05, 0x05, 0x04, 0x0c, 0x01, 1913 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1914 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1915 0x00, 0xf4, 0x00, 0x08d0, 0x08cc, 0x08c8, 0x01d1, 0x01d2, 0x01d2}, 1916 { 1917 128, 5640, 0x1c, 0x01, 0x01, 0x02, 0x34, 0x05, 0x05, 0x04, 0x0c, 0x01, 1918 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x09, 0x00, 0x04, 0x00, 0x7f, 1919 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x09, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1920 0x00, 0xf4, 0x00, 0x08d4, 0x08d0, 0x08cc, 0x01d0, 0x01d1, 0x01d2}, 1921 { 1922 130, 5650, 0x1c, 0x01, 0x01, 0x02, 0x35, 0x05, 0x05, 0x04, 0x0c, 0x01, 1923 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1924 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1925 0x00, 0xf4, 0x00, 0x08d8, 0x08d4, 0x08d0, 0x01cf, 0x01d0, 0x01d1}, 1926 { 1927 132, 5660, 0x16, 0x01, 0x01, 0x02, 0x36, 0x05, 0x05, 0x04, 0x0c, 0x01, 1928 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1929 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1930 0x00, 0xf4, 0x00, 0x08dc, 0x08d8, 0x08d4, 0x01ce, 0x01cf, 0x01d0}, 1931 { 1932 134, 5670, 0x16, 0x01, 0x01, 0x02, 0x37, 0x05, 0x05, 0x04, 0x0c, 0x01, 1933 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1934 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1935 0x00, 0xf4, 0x00, 0x08e0, 0x08dc, 0x08d8, 0x01ce, 0x01ce, 0x01cf}, 1936 { 1937 136, 5680, 0x10, 0x01, 0x01, 0x02, 0x38, 0x05, 0x05, 0x04, 0x0c, 0x01, 1938 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x08, 0x00, 0x04, 0x00, 0x7f, 1939 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x08, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1940 0x00, 0xf4, 0x00, 0x08e4, 0x08e0, 0x08dc, 0x01cd, 0x01ce, 0x01ce}, 1941 { 1942 138, 5690, 0x10, 0x01, 0x01, 0x02, 0x39, 0x05, 0x05, 0x04, 0x0c, 0x01, 1943 0x05, 0x05, 0x05, 0x8b, 0x09, 0x00, 0x70, 0x07, 0x00, 0x04, 0x00, 0x7f, 1944 0x00, 0x0b, 0x00, 0xf4, 0x00, 0x07, 0x00, 0x04, 0x00, 0x7f, 0x00, 0x0b, 1945 0x00, 0xf4, 0x00, 0x08e8, 0x08e4, 0x08e0, 0x01cc, 0x01cd, 0x01ce}, 1946 { 1947 140, 5700, 0x0a, 0x01, 0x01, 0x02, 0x3a, 0x05, 0x05, 0x04, 0x0c, 0x01, 1948 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1949 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1950 0x00, 0xf2, 0x00, 0x08ec, 0x08e8, 0x08e4, 0x01cb, 0x01cc, 0x01cd}, 1951 { 1952 142, 5710, 0x0a, 0x01, 0x01, 0x02, 0x3b, 0x05, 0x05, 0x04, 0x0c, 0x01, 1953 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1954 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1955 0x00, 0xf2, 0x00, 0x08f0, 0x08ec, 0x08e8, 0x01ca, 0x01cb, 0x01cc}, 1956 { 1957 144, 5720, 0x0a, 0x01, 0x01, 0x02, 0x3c, 0x05, 0x05, 0x04, 0x0c, 0x01, 1958 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x07, 0x00, 0x03, 0x00, 0x7f, 1959 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x07, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1960 0x00, 0xf2, 0x00, 0x08f4, 0x08f0, 0x08ec, 0x01c9, 0x01ca, 0x01cb}, 1961 { 1962 145, 5725, 0x03, 0x01, 0x02, 0x04, 0x79, 0x07, 0x07, 0x04, 0x10, 0x01, 1963 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1964 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1965 0x00, 0xf2, 0x00, 0x08f6, 0x08f2, 0x08ee, 0x01c9, 0x01ca, 0x01cb}, 1966 { 1967 146, 5730, 0x0a, 0x01, 0x01, 0x02, 0x3d, 0x05, 0x05, 0x04, 0x0c, 0x01, 1968 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1969 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1970 0x00, 0xf2, 0x00, 0x08f8, 0x08f4, 0x08f0, 0x01c9, 0x01c9, 0x01ca}, 1971 { 1972 147, 5735, 0x03, 0x01, 0x02, 0x04, 0x7b, 0x07, 0x07, 0x04, 0x10, 0x01, 1973 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1974 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1975 0x00, 0xf2, 0x00, 0x08fa, 0x08f6, 0x08f2, 0x01c8, 0x01c9, 0x01ca}, 1976 { 1977 148, 5740, 0x0a, 0x01, 0x01, 0x02, 0x3e, 0x05, 0x05, 0x04, 0x0c, 0x01, 1978 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1979 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1980 0x00, 0xf2, 0x00, 0x08fc, 0x08f8, 0x08f4, 0x01c8, 0x01c9, 0x01c9}, 1981 { 1982 149, 5745, 0xfe, 0x00, 0x02, 0x04, 0x7d, 0x07, 0x07, 0x04, 0x10, 0x01, 1983 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1984 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1985 0x00, 0xf2, 0x00, 0x08fe, 0x08fa, 0x08f6, 0x01c8, 0x01c8, 0x01c9}, 1986 { 1987 150, 5750, 0x0a, 0x01, 0x01, 0x02, 0x3f, 0x05, 0x05, 0x04, 0x0c, 0x01, 1988 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x06, 0x00, 0x03, 0x00, 0x7f, 1989 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x06, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1990 0x00, 0xf2, 0x00, 0x0900, 0x08fc, 0x08f8, 0x01c7, 0x01c8, 0x01c9}, 1991 { 1992 151, 5755, 0xfe, 0x00, 0x02, 0x04, 0x7f, 0x07, 0x07, 0x04, 0x10, 0x01, 1993 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 1994 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 1995 0x00, 0xf2, 0x00, 0x0902, 0x08fe, 0x08fa, 0x01c7, 0x01c8, 0x01c8}, 1996 { 1997 152, 5760, 0x0a, 0x01, 0x01, 0x02, 0x40, 0x05, 0x05, 0x04, 0x0c, 0x01, 1998 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 1999 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2000 0x00, 0xf2, 0x00, 0x0904, 0x0900, 0x08fc, 0x01c6, 0x01c7, 0x01c8}, 2001 { 2002 153, 5765, 0xf8, 0x00, 0x02, 0x04, 0x81, 0x07, 0x07, 0x04, 0x10, 0x01, 2003 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2004 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2005 0x00, 0xf2, 0x00, 0x0906, 0x0902, 0x08fe, 0x01c6, 0x01c7, 0x01c8}, 2006 { 2007 154, 5770, 0x0a, 0x01, 0x01, 0x02, 0x41, 0x05, 0x05, 0x04, 0x0c, 0x01, 2008 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2009 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2010 0x00, 0xf2, 0x00, 0x0908, 0x0904, 0x0900, 0x01c6, 0x01c6, 0x01c7}, 2011 { 2012 155, 5775, 0xf8, 0x00, 0x02, 0x04, 0x83, 0x07, 0x07, 0x04, 0x10, 0x01, 2013 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2014 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2015 0x00, 0xf2, 0x00, 0x090a, 0x0906, 0x0902, 0x01c5, 0x01c6, 0x01c7}, 2016 { 2017 156, 5780, 0x0a, 0x01, 0x01, 0x02, 0x42, 0x05, 0x05, 0x04, 0x0c, 0x01, 2018 0x05, 0x05, 0x05, 0x8a, 0x06, 0x00, 0x40, 0x05, 0x00, 0x03, 0x00, 0x7f, 2019 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x05, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2020 0x00, 0xf2, 0x00, 0x090c, 0x0908, 0x0904, 0x01c5, 0x01c6, 0x01c6}, 2021 { 2022 157, 5785, 0xf2, 0x00, 0x02, 0x04, 0x85, 0x07, 0x07, 0x04, 0x10, 0x01, 2023 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2024 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2025 0x00, 0xf2, 0x00, 0x090e, 0x090a, 0x0906, 0x01c4, 0x01c5, 0x01c6}, 2026 { 2027 158, 5790, 0x0a, 0x01, 0x01, 0x02, 0x43, 0x05, 0x05, 0x04, 0x0c, 0x01, 2028 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2029 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2030 0x00, 0xf2, 0x00, 0x0910, 0x090c, 0x0908, 0x01c4, 0x01c5, 0x01c6}, 2031 { 2032 159, 5795, 0xf2, 0x00, 0x02, 0x04, 0x87, 0x07, 0x07, 0x04, 0x10, 0x01, 2033 0x06, 0x06, 0x06, 0x8a, 0x06, 0x00, 0x40, 0x04, 0x00, 0x03, 0x00, 0x7f, 2034 0x00, 0x0a, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x03, 0x00, 0x7f, 0x00, 0x0a, 2035 0x00, 0xf2, 0x00, 0x0912, 0x090e, 0x090a, 0x01c4, 0x01c4, 0x01c5}, 2036 { 2037 160, 5800, 0x0a, 0x01, 0x01, 0x02, 0x44, 0x05, 0x05, 0x04, 0x0c, 0x01, 2038 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2039 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2040 0x00, 0xf0, 0x00, 0x0914, 0x0910, 0x090c, 0x01c3, 0x01c4, 0x01c5}, 2041 { 2042 161, 5805, 0xed, 0x00, 0x02, 0x04, 0x89, 0x07, 0x07, 0x04, 0x10, 0x01, 2043 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2044 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2045 0x00, 0xf0, 0x00, 0x0916, 0x0912, 0x090e, 0x01c3, 0x01c4, 0x01c4}, 2046 { 2047 162, 5810, 0x0a, 0x01, 0x01, 0x02, 0x45, 0x05, 0x05, 0x04, 0x0c, 0x01, 2048 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2049 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2050 0x00, 0xf0, 0x00, 0x0918, 0x0914, 0x0910, 0x01c2, 0x01c3, 0x01c4}, 2051 { 2052 163, 5815, 0xed, 0x00, 0x02, 0x04, 0x8b, 0x07, 0x07, 0x04, 0x10, 0x01, 2053 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x04, 0x00, 0x02, 0x00, 0x7f, 2054 0x00, 0x09, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2055 0x00, 0xf0, 0x00, 0x091a, 0x0916, 0x0912, 0x01c2, 0x01c3, 0x01c4}, 2056 { 2057 164, 5820, 0x0a, 0x01, 0x01, 0x02, 0x46, 0x05, 0x05, 0x04, 0x0c, 0x01, 2058 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2059 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2060 0x00, 0xf0, 0x00, 0x091c, 0x0918, 0x0914, 0x01c2, 0x01c2, 0x01c3}, 2061 { 2062 165, 5825, 0xed, 0x00, 0x02, 0x04, 0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2063 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2064 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2065 0x00, 0xf0, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2066 { 2067 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2068 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2069 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2070 0x00, 0xf0, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2071 { 2072 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2073 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2074 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2075 0x00, 0xf0, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2076 { 2077 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2078 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2079 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2080 0x00, 0xf0, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2081 { 2082 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2083 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x03, 0x00, 0x02, 0x00, 0x7f, 2084 0x00, 0x09, 0x00, 0xf0, 0x00, 0x03, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2085 0x00, 0xf0, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2086 { 2087 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2088 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2089 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2090 0x00, 0xf0, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2091 { 2092 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2093 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2094 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2095 0x00, 0xf0, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2096 { 2097 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2098 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x02, 0x00, 0x02, 0x00, 0x7f, 2099 0x00, 0x09, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x02, 0x00, 0x7f, 0x00, 0x09, 2100 0x00, 0xf0, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2101 { 2102 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2103 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 2104 0x00, 0x07, 0x00, 0xf0, 0x00, 0x02, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2105 0x00, 0xf0, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2106 { 2107 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2108 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 2109 0x00, 0x07, 0x00, 0xf0, 0x00, 0x01, 0x00, 0x00, 0x00, 0x7f, 0x00, 0x07, 2110 0x00, 0xf0, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2111 { 2112 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2113 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2114 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2115 0x0f, 0x00, 0x0e, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2116 { 2117 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2118 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2119 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2120 0x0f, 0x00, 0x0e, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2121 { 2122 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2123 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xff, 0x00, 0x04, 0x00, 2124 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xff, 0x00, 0x04, 0x00, 0x70, 0x00, 2125 0x0f, 0x00, 0x0e, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2126 { 2127 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2128 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfd, 0x00, 0x04, 0x00, 2129 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfd, 0x00, 0x04, 0x00, 0x70, 0x00, 2130 0x0f, 0x00, 0x0e, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2131 { 2132 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2133 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfb, 0x00, 0x04, 0x00, 2134 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfb, 0x00, 0x04, 0x00, 0x70, 0x00, 2135 0x0f, 0x00, 0x0e, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2136 { 2137 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2138 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xfa, 0x00, 0x04, 0x00, 2139 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xfa, 0x00, 0x04, 0x00, 0x70, 0x00, 2140 0x0f, 0x00, 0x0e, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2141 { 2142 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2143 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x04, 0x00, 2144 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf8, 0x00, 0x04, 0x00, 0x70, 0x00, 2145 0x0f, 0x00, 0x0e, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2146 { 2147 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2148 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf7, 0x00, 0x04, 0x00, 2149 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf7, 0x00, 0x04, 0x00, 0x70, 0x00, 2150 0x0f, 0x00, 0x0e, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2151 { 2152 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2153 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf6, 0x00, 0x04, 0x00, 2154 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf6, 0x00, 0x04, 0x00, 0x70, 0x00, 2155 0x0f, 0x00, 0x0e, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2156 { 2157 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2158 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf5, 0x00, 0x04, 0x00, 2159 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf5, 0x00, 0x04, 0x00, 0x70, 0x00, 2160 0x0f, 0x00, 0x0e, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2161 { 2162 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2163 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf4, 0x00, 0x04, 0x00, 2164 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf4, 0x00, 0x04, 0x00, 0x70, 0x00, 2165 0x0f, 0x00, 0x0e, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2166 { 2167 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2168 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf3, 0x00, 0x04, 0x00, 2169 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf3, 0x00, 0x04, 0x00, 0x70, 0x00, 2170 0x0f, 0x00, 0x0e, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2171 { 2172 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2173 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf2, 0x00, 0x04, 0x00, 2174 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf2, 0x00, 0x04, 0x00, 0x70, 0x00, 2175 0x0f, 0x00, 0x0e, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2176 { 2177 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2178 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x04, 0x00, 2179 0x70, 0x00, 0x0f, 0x00, 0x0e, 0x00, 0xf0, 0x00, 0x04, 0x00, 0x70, 0x00, 2180 0x0f, 0x00, 0x0e, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2181}; 2182 2183static const struct chan_info_nphy_radio205x chan_info_nphyrev5_2056v5[] = { 2184 { 2185 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2186 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2187 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 2188 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2189 { 2190 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2191 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2192 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2193 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2194 { 2195 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2196 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2197 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2198 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2199 { 2200 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2201 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 2202 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 2203 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2204 { 2205 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2206 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2207 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 2208 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2209 { 2210 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2211 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2212 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2213 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2214 { 2215 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2216 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2217 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2218 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 2219 { 2220 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 2221 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2222 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2223 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 2224 { 2225 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 2226 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2227 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2228 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 2229 { 2230 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 2231 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 2232 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 2233 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 2234 { 2235 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 2236 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2237 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0d, 2238 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 2239 { 2240 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 2241 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x09, 0x00, 0x70, 2242 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2243 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 2244 { 2245 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x04, 0x0c, 0x01, 2246 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2247 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2248 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 2249 { 2250 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x04, 0x0c, 0x01, 2251 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x70, 2252 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2253 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 2254 { 2255 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x04, 0x0c, 0x01, 2256 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x70, 2257 0x00, 0x0c, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x70, 0x00, 0x0c, 2258 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 2259 { 2260 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x04, 0x0c, 0x01, 2261 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x08, 0x00, 0x70, 2262 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfd, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2263 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 2264 { 2265 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x04, 0x0c, 0x01, 2266 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2267 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2268 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 2269 { 2270 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x04, 0x0c, 0x01, 2271 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2272 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2273 0x00, 0x6f, 0x00, 0x07f8, 0x07f4, 0x07f0, 0x0202, 0x0203, 0x0204}, 2274 { 2275 220, 5100, 0xd6, 0x01, 0x01, 0x01, 0xfe, 0x05, 0x05, 0x04, 0x0c, 0x01, 2276 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2277 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2278 0x00, 0x6f, 0x00, 0x07fc, 0x07f8, 0x07f4, 0x0201, 0x0202, 0x0203}, 2279 { 2280 222, 5110, 0xd6, 0x01, 0x01, 0x01, 0xff, 0x05, 0x05, 0x04, 0x0c, 0x01, 2281 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2282 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2283 0x00, 0x6f, 0x00, 0x0800, 0x07fc, 0x07f8, 0x0200, 0x0201, 0x0202}, 2284 { 2285 224, 5120, 0xce, 0x01, 0x01, 0x02, 0x00, 0x05, 0x05, 0x04, 0x0c, 0x01, 2286 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfc, 0x00, 0x08, 0x00, 0x70, 2287 0x00, 0x0b, 0x00, 0x9f, 0x00, 0xfc, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0b, 2288 0x00, 0x6f, 0x00, 0x0804, 0x0800, 0x07fc, 0x01ff, 0x0200, 0x0201}, 2289 { 2290 226, 5130, 0xce, 0x01, 0x01, 0x02, 0x01, 0x05, 0x05, 0x04, 0x0c, 0x01, 2291 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x08, 0x00, 0x70, 2292 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x08, 0x00, 0x70, 0x00, 0x0a, 2293 0x00, 0x6f, 0x00, 0x0808, 0x0804, 0x0800, 0x01fe, 0x01ff, 0x0200}, 2294 { 2295 228, 5140, 0xc6, 0x01, 0x01, 0x02, 0x02, 0x05, 0x05, 0x04, 0x0c, 0x01, 2296 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2297 0x00, 0x0a, 0x00, 0x9f, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x0a, 2298 0x00, 0x6f, 0x00, 0x080c, 0x0808, 0x0804, 0x01fd, 0x01fe, 0x01ff}, 2299 { 2300 32, 5160, 0xbe, 0x01, 0x01, 0x02, 0x04, 0x05, 0x05, 0x04, 0x0c, 0x01, 2301 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x07, 0x00, 0x70, 2302 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x07, 0x00, 0x70, 0x00, 0x09, 2303 0x00, 0x6e, 0x00, 0x0814, 0x0810, 0x080c, 0x01fb, 0x01fc, 0x01fd}, 2304 { 2305 34, 5170, 0xbe, 0x01, 0x01, 0x02, 0x05, 0x05, 0x05, 0x04, 0x0c, 0x01, 2306 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfb, 0x00, 0x06, 0x00, 0x70, 2307 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfb, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2308 0x00, 0x6e, 0x00, 0x0818, 0x0814, 0x0810, 0x01fa, 0x01fb, 0x01fc}, 2309 { 2310 36, 5180, 0xb6, 0x01, 0x01, 0x02, 0x06, 0x05, 0x05, 0x04, 0x0c, 0x01, 2311 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2312 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2313 0x00, 0x6e, 0x00, 0x081c, 0x0818, 0x0814, 0x01f9, 0x01fa, 0x01fb}, 2314 { 2315 38, 5190, 0xb6, 0x01, 0x01, 0x02, 0x07, 0x05, 0x05, 0x04, 0x0c, 0x01, 2316 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2317 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2318 0x00, 0x6e, 0x00, 0x0820, 0x081c, 0x0818, 0x01f8, 0x01f9, 0x01fa}, 2319 { 2320 40, 5200, 0xaf, 0x01, 0x01, 0x02, 0x08, 0x05, 0x05, 0x04, 0x0c, 0x01, 2321 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2322 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2323 0x00, 0x6e, 0x00, 0x0824, 0x0820, 0x081c, 0x01f7, 0x01f8, 0x01f9}, 2324 { 2325 42, 5210, 0xaf, 0x01, 0x01, 0x02, 0x09, 0x05, 0x05, 0x04, 0x0c, 0x01, 2326 0x02, 0x02, 0x02, 0x8f, 0x0f, 0x00, 0xff, 0xfa, 0x00, 0x06, 0x00, 0x70, 2327 0x00, 0x09, 0x00, 0x9e, 0x00, 0xfa, 0x00, 0x06, 0x00, 0x70, 0x00, 0x09, 2328 0x00, 0x6e, 0x00, 0x0828, 0x0824, 0x0820, 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0x8d, 0x07, 0x07, 0x04, 0x10, 0x01, 2686 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2687 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2688 0x00, 0x82, 0x00, 0x091e, 0x091a, 0x0916, 0x01c1, 0x01c2, 0x01c3}, 2689 { 2690 166, 5830, 0x0a, 0x01, 0x01, 0x02, 0x47, 0x05, 0x05, 0x04, 0x0c, 0x01, 2691 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2692 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2693 0x00, 0x72, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 0x01c2, 0x01c2}, 2694 { 2695 168, 5840, 0x0a, 0x01, 0x01, 0x02, 0x48, 0x05, 0x05, 0x04, 0x0c, 0x01, 2696 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x10, 0x00, 0x00, 0x00, 0x70, 2697 0x00, 0x00, 0x00, 0x92, 0x00, 0x10, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2698 0x00, 0x72, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 0x01c1, 0x01c2}, 2699 { 2700 170, 5850, 0xe0, 0x00, 0x01, 0x02, 0x49, 0x05, 0x05, 0x04, 0x0c, 0x01, 2701 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2702 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2703 0x00, 0x72, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 0x01c0, 0x01c1}, 2704 { 2705 172, 5860, 0xde, 0x00, 0x01, 0x02, 0x4a, 0x05, 0x05, 0x04, 0x0c, 0x01, 2706 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2707 0x00, 0x00, 0x00, 0x92, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2708 0x00, 0x72, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 0x01bf, 0x01c0}, 2709 { 2710 174, 5870, 0xdb, 0x00, 0x01, 0x02, 0x4b, 0x05, 0x05, 0x04, 0x0c, 0x01, 2711 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2712 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2713 0x00, 0x71, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 2714 { 2715 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 2716 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2717 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2718 0x00, 0x71, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 2719 { 2720 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 2721 0x06, 0x06, 0x06, 0x88, 0x04, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x70, 2722 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2723 0x00, 0x71, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 2724 { 2725 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 2726 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2727 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2728 0x00, 0x71, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 2729 { 2730 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 2731 0x06, 0x06, 0x06, 0x87, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 2732 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 2733 0x00, 0x71, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 2734 { 2735 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 2736 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2737 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2738 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 2739 { 2740 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 2741 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x03, 0x00, 2742 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x1f, 0x00, 0x03, 0x00, 0x70, 0x00, 2743 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 2744 { 2745 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 2746 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x03, 0x00, 2747 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x0e, 0x00, 0x03, 0x00, 0x70, 0x00, 2748 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 2749 { 2750 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 2751 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x03, 0x00, 2752 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x03, 0x00, 0x70, 0x00, 2753 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 2754 { 2755 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 2756 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x03, 0x00, 2757 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0c, 0x00, 0x03, 0x00, 0x70, 0x00, 2758 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 2759 { 2760 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 2761 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x0b, 0x00, 0x03, 0x00, 2762 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x0b, 0x00, 0x03, 0x00, 0x70, 0x00, 2763 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 2764 { 2765 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 2766 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x09, 0x00, 0x03, 0x00, 2767 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x03, 0x00, 0x70, 0x00, 2768 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 2769 { 2770 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 2771 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x08, 0x00, 0x02, 0x00, 2772 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x08, 0x00, 0x02, 0x00, 0x70, 0x00, 2773 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 2774 { 2775 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 2776 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x07, 0x00, 0x02, 0x00, 2777 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x07, 0x00, 0x02, 0x00, 0x70, 0x00, 2778 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 2779 { 2780 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 2781 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x06, 0x00, 0x02, 0x00, 2782 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x06, 0x00, 0x02, 0x00, 0x70, 0x00, 2783 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 2784 { 2785 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 2786 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x05, 0x00, 0x02, 0x00, 2787 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x05, 0x00, 0x02, 0x00, 0x70, 0x00, 2788 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 2789 { 2790 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 2791 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x04, 0x00, 0x02, 0x00, 2792 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x04, 0x00, 0x02, 0x00, 0x70, 0x00, 2793 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 2794 { 2795 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 2796 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x03, 0x00, 0x02, 0x00, 2797 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x03, 0x00, 0x02, 0x00, 0x70, 0x00, 2798 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 2799 { 2800 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 2801 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 2802 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 2803 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 2804}; 2805 2806static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v6[] = { 2807 { 2808 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 2809 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2810 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2811 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 2812 { 2813 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 2814 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2815 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2816 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 2817 { 2818 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 2819 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2820 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2821 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 2822 { 2823 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 2824 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2825 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2826 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 2827 { 2828 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 2829 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2830 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2831 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 2832 { 2833 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 2834 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2835 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2836 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 2837 { 2838 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 2839 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2840 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2841 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 2842 { 2843 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 2844 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 2845 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 2846 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 2847 { 2848 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 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0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3335 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3336 0x00, 0x68, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 0x01bf, 0x01bf}, 3337 { 3338 176, 5880, 0xd8, 0x00, 0x01, 0x02, 0x4c, 0x05, 0x05, 0x04, 0x0c, 0x01, 3339 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3340 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3341 0x00, 0x68, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 0x01be, 0x01bf}, 3342 { 3343 178, 5890, 0xd6, 0x00, 0x01, 0x02, 0x4d, 0x05, 0x05, 0x04, 0x0c, 0x01, 3344 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3345 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3346 0x00, 0x68, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 0x01bd, 0x01be}, 3347 { 3348 180, 5900, 0xd3, 0x00, 0x01, 0x02, 0x4e, 0x05, 0x05, 0x04, 0x0c, 0x01, 3349 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3350 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3351 0x00, 0x68, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 0x01bc, 0x01bd}, 3352 { 3353 182, 5910, 0xd6, 0x00, 0x01, 0x02, 0x4f, 0x05, 0x05, 0x04, 0x0c, 0x01, 3354 0x06, 0x06, 0x06, 0x85, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 3355 0x00, 0x04, 0x00, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x00, 0x04, 3356 0x00, 0x68, 0x00, 0x0940, 0x093c, 0x0938, 0x01bb, 0x01bc, 0x01bc}, 3357 { 3358 1, 2412, 0x00, 0x01, 0x03, 0x09, 0x6c, 0x08, 0x08, 0x04, 0x16, 0x01, 3359 0x04, 0x04, 0x04, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3360 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3361 0x0b, 0x00, 0x0a, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3362 { 3363 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3364 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3365 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3366 0x0b, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 3367 { 3368 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 3369 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x67, 0x00, 0x03, 0x00, 3370 0x70, 0x00, 0x0b, 0x00, 0x0a, 0x00, 0x67, 0x00, 0x03, 0x00, 0x70, 0x00, 3371 0x0b, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 3372 { 3373 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 3374 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x57, 0x00, 0x03, 0x00, 3375 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x57, 0x00, 0x03, 0x00, 0x70, 0x00, 3376 0x0a, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 3377 { 3378 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 3379 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x56, 0x00, 0x03, 0x00, 3380 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x56, 0x00, 0x03, 0x00, 0x70, 0x00, 3381 0x0a, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 3382 { 3383 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 3384 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x46, 0x00, 0x03, 0x00, 3385 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x46, 0x00, 0x03, 0x00, 0x70, 0x00, 3386 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 3387 { 3388 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 3389 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 3390 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 3391 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 3392 { 3393 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 3394 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 3395 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 3396 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 3397 { 3398 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 3399 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 3400 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x23, 0x00, 0x02, 0x00, 0x70, 0x00, 3401 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 3402 { 3403 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 3404 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 3405 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x12, 0x00, 0x02, 0x00, 0x70, 0x00, 3406 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 3407 { 3408 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 3409 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 3410 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x02, 0x00, 0x02, 0x00, 0x70, 0x00, 3411 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 3412 { 3413 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 3414 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3415 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3416 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 3417 { 3418 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 3419 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 3420 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x01, 0x00, 0x02, 0x00, 0x70, 0x00, 3421 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 3422 { 3423 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 3424 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 3425 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 3426 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 3427}; 3428 3429static const struct chan_info_nphy_radio205x chan_info_nphyrev5n6_2056v7[] = { 3430 { 3431 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 3432 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3433 0x00, 0x0f, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0f, 3434 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 3435 { 3436 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 3437 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3438 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3439 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 3440 { 3441 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 3442 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3443 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3444 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 3445 { 3446 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 3447 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, 3448 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0b, 0x00, 0x70, 0x00, 0x0e, 3449 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 3450 { 3451 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 3452 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3453 0x00, 0x0e, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0e, 3454 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 3455 { 3456 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 3457 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3458 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3459 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 3460 { 3461 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 3462 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3463 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3464 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 3465 { 3466 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 3467 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3468 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3469 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 3470 { 3471 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 3472 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3473 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3474 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 3475 { 3476 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 3477 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0a, 0x00, 0x70, 3478 0x00, 0x0d, 0x00, 0x9f, 0x00, 0xff, 0x00, 0x0a, 0x00, 0x70, 0x00, 0x0d, 3479 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 3480 { 3481 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 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3983 0x70, 0x00, 0x0f, 0x00, 0x0b, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3984 0x0f, 0x00, 0x0b, 0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443}, 3985 { 3986 2, 2417, 0x00, 0x01, 0x03, 0x09, 0x71, 0x08, 0x08, 0x04, 0x16, 0x01, 3987 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3988 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3989 0x0f, 0x00, 0x0a, 0x03cb, 0x03c7, 0x03c3, 0x0438, 0x043d, 0x0441}, 3990 { 3991 3, 2422, 0x00, 0x01, 0x03, 0x09, 0x76, 0x08, 0x08, 0x04, 0x16, 0x01, 3992 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x89, 0x00, 0x03, 0x00, 3993 0x70, 0x00, 0x0f, 0x00, 0x0a, 0x00, 0x89, 0x00, 0x03, 0x00, 0x70, 0x00, 3994 0x0f, 0x00, 0x0a, 0x03cd, 0x03c9, 0x03c5, 0x0436, 0x043a, 0x043f}, 3995 { 3996 4, 2427, 0x00, 0x01, 0x03, 0x09, 0x7b, 0x08, 0x08, 0x04, 0x16, 0x01, 3997 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x78, 0x00, 0x03, 0x00, 3998 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x78, 0x00, 0x03, 0x00, 0x70, 0x00, 3999 0x0e, 0x00, 0x0a, 0x03cf, 0x03cb, 0x03c7, 0x0434, 0x0438, 0x043d}, 4000 { 4001 5, 2432, 0x00, 0x01, 0x03, 0x09, 0x80, 0x08, 0x08, 0x04, 0x16, 0x01, 4002 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x77, 0x00, 0x03, 0x00, 4003 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x77, 0x00, 0x03, 0x00, 0x70, 0x00, 4004 0x0e, 0x00, 0x0a, 0x03d1, 0x03cd, 0x03c9, 0x0431, 0x0436, 0x043a}, 4005 { 4006 6, 2437, 0x00, 0x01, 0x03, 0x09, 0x85, 0x08, 0x08, 0x04, 0x16, 0x01, 4007 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x76, 0x00, 0x03, 0x00, 4008 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x76, 0x00, 0x03, 0x00, 0x70, 0x00, 4009 0x0e, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4010 { 4011 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4012 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x66, 0x00, 0x03, 0x00, 4013 0x70, 0x00, 0x0e, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x03, 0x00, 0x70, 0x00, 4014 0x0e, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4015 { 4016 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4017 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x55, 0x00, 0x02, 0x00, 4018 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4019 0x0e, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4020 { 4021 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4022 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4023 0x70, 0x00, 0x0e, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4024 0x0e, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4025 { 4026 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4027 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4028 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4029 0x0d, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4030 { 4031 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4032 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 4033 0x70, 0x00, 0x0d, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4034 0x0d, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4035 { 4036 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4037 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x22, 0x00, 0x02, 0x00, 4038 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4039 0x0d, 0x00, 0x08, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4040 { 4041 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4042 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x11, 0x00, 0x02, 0x00, 4043 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4044 0x0d, 0x00, 0x08, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4045 { 4046 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4047 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4048 0x70, 0x00, 0x0d, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4049 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4050}; 4051 4052static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v8[] = { 4053 { 4054 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 4055 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4056 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4057 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4058 { 4059 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x04, 0x0c, 0x01, 4060 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4061 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4062 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4063 { 4064 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x04, 0x0c, 0x01, 4065 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4066 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4067 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4068 { 4069 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x04, 0x0c, 0x01, 4070 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4071 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4072 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4073 { 4074 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x04, 0x0c, 0x01, 4075 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4076 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4077 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4078 { 4079 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x04, 0x0c, 0x01, 4080 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4081 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4082 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4083 { 4084 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x04, 0x0c, 0x01, 4085 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4086 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4087 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4088 { 4089 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x04, 0x0c, 0x01, 4090 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4091 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4092 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4093 { 4094 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x04, 0x0c, 0x01, 4095 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4096 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4097 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4098 { 4099 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x04, 0x0c, 0x01, 4100 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4101 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4102 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4103 { 4104 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x04, 0x0c, 0x01, 4105 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4106 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4107 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4108 { 4109 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x04, 0x0c, 0x01, 4110 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4111 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4112 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4113 { 4114 208, 5040, 0xef, 0x01, 0x01, 0x01, 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0x00, 4632 0x0a, 0x00, 0x0a, 0x03d3, 0x03cf, 0x03cb, 0x042f, 0x0434, 0x0438}, 4633 { 4634 7, 2442, 0x00, 0x01, 0x03, 0x09, 0x8a, 0x08, 0x08, 0x04, 0x16, 0x01, 4635 0x05, 0x05, 0x05, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x45, 0x00, 0x02, 0x00, 4636 0x70, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x66, 0x00, 0x02, 0x00, 0x70, 0x00, 4637 0x0a, 0x00, 0x0a, 0x03d5, 0x03d1, 0x03cd, 0x042d, 0x0431, 0x0436}, 4638 { 4639 8, 2447, 0x00, 0x01, 0x03, 0x09, 0x8f, 0x08, 0x08, 0x04, 0x16, 0x01, 4640 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x34, 0x00, 0x02, 0x00, 4641 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x55, 0x00, 0x02, 0x00, 0x70, 0x00, 4642 0x0a, 0x00, 0x09, 0x03d7, 0x03d3, 0x03cf, 0x042b, 0x042f, 0x0434}, 4643 { 4644 9, 2452, 0x00, 0x01, 0x03, 0x09, 0x94, 0x08, 0x08, 0x04, 0x16, 0x01, 4645 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x23, 0x00, 0x02, 0x00, 4646 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x45, 0x00, 0x02, 0x00, 0x70, 0x00, 4647 0x0a, 0x00, 0x09, 0x03d9, 0x03d5, 0x03d1, 0x0429, 0x042d, 0x0431}, 4648 { 4649 10, 2457, 0x00, 0x01, 0x03, 0x09, 0x99, 0x08, 0x08, 0x04, 0x16, 0x01, 4650 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x12, 0x00, 0x02, 0x00, 4651 0x70, 0x00, 0x0a, 0x00, 0x09, 0x00, 0x34, 0x00, 0x02, 0x00, 0x70, 0x00, 4652 0x0a, 0x00, 0x09, 0x03db, 0x03d7, 0x03d3, 0x0427, 0x042b, 0x042f}, 4653 { 4654 11, 2462, 0x00, 0x01, 0x03, 0x09, 0x9e, 0x08, 0x08, 0x04, 0x16, 0x01, 4655 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 4656 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x33, 0x00, 0x02, 0x00, 0x70, 0x00, 4657 0x09, 0x00, 0x09, 0x03dd, 0x03d9, 0x03d5, 0x0424, 0x0429, 0x042d}, 4658 { 4659 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x08, 0x08, 0x04, 0x16, 0x01, 4660 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4661 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 4662 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 4663 { 4664 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x08, 0x08, 0x04, 0x16, 0x01, 4665 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 4666 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 4667 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 4668 { 4669 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x08, 0x08, 0x04, 0x16, 0x01, 4670 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 4671 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 4672 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 4673}; 4674 4675static const struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v11[] = { 4676 { 4677 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x02, 0x0c, 0x01, 4678 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4679 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4680 0x00, 0x6f, 0x00, 0x07b4, 0x07b0, 0x07ac, 0x0214, 0x0215, 0x0216}, 4681 { 4682 186, 4930, 0xff, 0x01, 0x01, 0x01, 0xed, 0x05, 0x05, 0x02, 0x0c, 0x01, 4683 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4684 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4685 0x00, 0x6f, 0x00, 0x07b8, 0x07b4, 0x07b0, 0x0213, 0x0214, 0x0215}, 4686 { 4687 188, 4940, 0xff, 0x01, 0x01, 0x01, 0xee, 0x05, 0x05, 0x02, 0x0c, 0x01, 4688 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4689 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4690 0x00, 0x6f, 0x00, 0x07bc, 0x07b8, 0x07b4, 0x0212, 0x0213, 0x0214}, 4691 { 4692 190, 4950, 0xff, 0x01, 0x01, 0x01, 0xef, 0x05, 0x05, 0x02, 0x0c, 0x01, 4693 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4694 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4695 0x00, 0x6f, 0x00, 0x07c0, 0x07bc, 0x07b8, 0x0211, 0x0212, 0x0213}, 4696 { 4697 192, 4960, 0xff, 0x01, 0x01, 0x01, 0xf0, 0x05, 0x05, 0x02, 0x0c, 0x01, 4698 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4699 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4700 0x00, 0x6f, 0x00, 0x07c4, 0x07c0, 0x07bc, 0x020f, 0x0211, 0x0212}, 4701 { 4702 194, 4970, 0xff, 0x01, 0x01, 0x01, 0xf1, 0x05, 0x05, 0x02, 0x0c, 0x01, 4703 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4704 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4705 0x00, 0x6f, 0x00, 0x07c8, 0x07c4, 0x07c0, 0x020e, 0x020f, 0x0211}, 4706 { 4707 196, 4980, 0xff, 0x01, 0x01, 0x01, 0xf2, 0x05, 0x05, 0x02, 0x0c, 0x01, 4708 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4709 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4710 0x00, 0x6f, 0x00, 0x07cc, 0x07c8, 0x07c4, 0x020d, 0x020e, 0x020f}, 4711 { 4712 198, 4990, 0xff, 0x01, 0x01, 0x01, 0xf3, 0x05, 0x05, 0x02, 0x0c, 0x01, 4713 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4714 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4715 0x00, 0x6f, 0x00, 0x07d0, 0x07cc, 0x07c8, 0x020c, 0x020d, 0x020e}, 4716 { 4717 200, 5000, 0xff, 0x01, 0x01, 0x01, 0xf4, 0x05, 0x05, 0x02, 0x0c, 0x01, 4718 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4719 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4720 0x00, 0x6f, 0x00, 0x07d4, 0x07d0, 0x07cc, 0x020b, 0x020c, 0x020d}, 4721 { 4722 202, 5010, 0xff, 0x01, 0x01, 0x01, 0xf5, 0x05, 0x05, 0x02, 0x0c, 0x01, 4723 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4724 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4725 0x00, 0x6f, 0x00, 0x07d8, 0x07d4, 0x07d0, 0x020a, 0x020b, 0x020c}, 4726 { 4727 204, 5020, 0xf7, 0x01, 0x01, 0x01, 0xf6, 0x05, 0x05, 0x02, 0x0c, 0x01, 4728 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4729 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4730 0x00, 0x6f, 0x00, 0x07dc, 0x07d8, 0x07d4, 0x0209, 0x020a, 0x020b}, 4731 { 4732 206, 5030, 0xf7, 0x01, 0x01, 0x01, 0xf7, 0x05, 0x05, 0x02, 0x0c, 0x01, 4733 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4734 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4735 0x00, 0x6f, 0x00, 0x07e0, 0x07dc, 0x07d8, 0x0208, 0x0209, 0x020a}, 4736 { 4737 208, 5040, 0xef, 0x01, 0x01, 0x01, 0xf8, 0x05, 0x05, 0x02, 0x0c, 0x01, 4738 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4739 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4740 0x00, 0x6f, 0x00, 0x07e4, 0x07e0, 0x07dc, 0x0207, 0x0208, 0x0209}, 4741 { 4742 210, 5050, 0xef, 0x01, 0x01, 0x01, 0xf9, 0x05, 0x05, 0x02, 0x0c, 0x01, 4743 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4744 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4745 0x00, 0x6f, 0x00, 0x07e8, 0x07e4, 0x07e0, 0x0206, 0x0207, 0x0208}, 4746 { 4747 212, 5060, 0xe6, 0x01, 0x01, 0x01, 0xfa, 0x05, 0x05, 0x02, 0x0c, 0x01, 4748 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, 4749 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfe, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4750 0x00, 0x6f, 0x00, 0x07ec, 0x07e8, 0x07e4, 0x0205, 0x0206, 0x0207}, 4751 { 4752 214, 5070, 0xe6, 0x01, 0x01, 0x01, 0xfb, 0x05, 0x05, 0x02, 0x0c, 0x01, 4753 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4754 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4755 0x00, 0x6f, 0x00, 0x07f0, 0x07ec, 0x07e8, 0x0204, 0x0205, 0x0206}, 4756 { 4757 216, 5080, 0xde, 0x01, 0x01, 0x01, 0xfc, 0x05, 0x05, 0x02, 0x0c, 0x01, 4758 0x01, 0x01, 0x01, 0x8f, 0x0f, 0x00, 0xff, 0xfd, 0x00, 0x09, 0x00, 0x77, 4759 0x00, 0x0f, 0x00, 0x6f, 0x00, 0xfd, 0x00, 0x09, 0x00, 0x77, 0x00, 0x0f, 4760 0x00, 0x6f, 0x00, 0x07f4, 0x07f0, 0x07ec, 0x0203, 0x0204, 0x0205}, 4761 { 4762 218, 5090, 0xde, 0x01, 0x01, 0x01, 0xfd, 0x05, 0x05, 0x02, 0x0c, 0x01, 4763 0x01, 0x01, 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0x0424, 0x0429, 0x042d}, 5281 { 5282 12, 2467, 0x00, 0x01, 0x03, 0x09, 0xa3, 0x06, 0x06, 0x04, 0x2b, 0x01, 5283 0x06, 0x06, 0x06, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5284 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x22, 0x00, 0x02, 0x00, 0x70, 0x00, 5285 0x09, 0x00, 0x09, 0x03df, 0x03db, 0x03d7, 0x0422, 0x0427, 0x042b}, 5286 { 5287 13, 2472, 0x00, 0x01, 0x03, 0x09, 0xa8, 0x06, 0x06, 0x04, 0x2b, 0x01, 5288 0x07, 0x07, 0x07, 0x8f, 0x30, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 5289 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x11, 0x00, 0x02, 0x00, 0x70, 0x00, 5290 0x09, 0x00, 0x09, 0x03e1, 0x03dd, 0x03d9, 0x0420, 0x0424, 0x0429}, 5291 { 5292 14, 2484, 0xff, 0x01, 0x03, 0x09, 0xb4, 0x06, 0x06, 0x04, 0x2b, 0x01, 5293 0x07, 0x07, 0x07, 0x8f, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 5294 0x70, 0x00, 0x09, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x70, 0x00, 5295 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} 5296}; 5297 5298static const struct chan_info_nphy_radio2057 chan_info_nphyrev7_2057_rev4[] = { 5299 { 5300 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 5301 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5302 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b4, 0x07b0, 0x07ac, 0x0214, 5303 0x0215, 5304 0x0216, 5305 }, 5306 { 5307 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 5308 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5309 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07b8, 0x07b4, 0x07b0, 0x0213, 5310 0x0214, 5311 0x0215, 5312 }, 5313 { 5314 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 5315 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5316 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07bc, 0x07b8, 0x07b4, 0x0212, 5317 0x0213, 5318 0x0214, 5319 }, 5320 { 5321 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 5322 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5323 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c0, 0x07bc, 0x07b8, 0x0211, 5324 0x0212, 5325 0x0213, 5326 }, 5327 { 5328 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 5329 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5330 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c4, 0x07c0, 0x07bc, 0x020f, 5331 0x0211, 5332 0x0212, 5333 }, 5334 { 5335 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 5336 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5337 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07c8, 0x07c4, 0x07c0, 0x020e, 5338 0x020f, 5339 0x0211, 5340 }, 5341 { 5342 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 5343 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5344 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07cc, 0x07c8, 0x07c4, 0x020d, 5345 0x020e, 5346 0x020f, 5347 }, 5348 { 5349 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 5350 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5351 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d0, 0x07cc, 0x07c8, 0x020c, 5352 0x020d, 5353 0x020e, 5354 }, 5355 { 5356 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 5357 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5358 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d4, 0x07d0, 0x07cc, 0x020b, 5359 0x020c, 5360 0x020d, 5361 }, 5362 { 5363 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 5364 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5365 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07d8, 0x07d4, 0x07d0, 0x020a, 5366 0x020b, 5367 0x020c, 5368 }, 5369 { 5370 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 5371 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5372 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07dc, 0x07d8, 0x07d4, 0x0209, 5373 0x020a, 5374 0x020b, 5375 }, 5376 { 5377 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 5378 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5379 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e0, 0x07dc, 0x07d8, 0x0208, 5380 0x0209, 5381 0x020a, 5382 }, 5383 { 5384 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 5385 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5386 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e4, 0x07e0, 0x07dc, 0x0207, 5387 0x0208, 5388 0x0209, 5389 }, 5390 { 5391 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 5392 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, 5393 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x07e8, 0x07e4, 0x07e0, 0x0206, 5394 0x0207, 5395 0x0208, 5396 }, 5397 { 5398 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 5399 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5400 0x00, 0x0f, 0x0f, 0xe3, 0x00, 0xef, 0x07ec, 0x07e8, 0x07e4, 0x0205, 5401 0x0206, 5402 0x0207, 5403 }, 5404 { 5405 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 5406 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5407 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f0, 0x07ec, 0x07e8, 0x0204, 5408 0x0205, 5409 0x0206, 5410 }, 5411 { 5412 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 5413 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x00, 5414 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xef, 0x07f4, 0x07f0, 0x07ec, 0x0203, 5415 0x0204, 5416 0x0205, 5417 }, 5418 { 5419 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 5420 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5421 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07f8, 0x07f4, 0x07f0, 0x0202, 5422 0x0203, 5423 0x0204, 5424 }, 5425 { 5426 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 5427 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5428 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x07fc, 0x07f8, 0x07f4, 0x0201, 5429 0x0202, 5430 0x0203, 5431 }, 5432 { 5433 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 5434 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5435 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0800, 0x07fc, 0x07f8, 0x0200, 5436 0x0201, 5437 0x0202, 5438 }, 5439 { 5440 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 5441 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5442 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0804, 0x0800, 0x07fc, 0x01ff, 5443 0x0200, 5444 0x0201, 5445 }, 5446 { 5447 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 5448 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x00, 5449 0x00, 0x0e, 0x0f, 0xe3, 0x00, 0xd6, 0x0808, 0x0804, 0x0800, 0x01fe, 5450 0x01ff, 5451 0x0200, 5452 }, 5453 { 5454 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 5455 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5456 0x00, 0x0e, 0x0e, 0xe3, 0x00, 0xd6, 0x080c, 0x0808, 0x0804, 0x01fd, 5457 0x01fe, 5458 0x01ff, 5459 }, 5460 { 5461 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 5462 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5463 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x0814, 0x0810, 0x080c, 0x01fb, 5464 0x01fc, 5465 0x01fd, 5466 }, 5467 { 5468 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 5469 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x00, 5470 0x00, 0x0d, 0x0e, 0xe3, 0x00, 0xd6, 0x0818, 0x0814, 0x0810, 0x01fa, 5471 0x01fb, 5472 0x01fc, 5473 }, 5474 { 5475 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 0x02, 0x0c, 5476 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0d, 0x0e, 0xd3, 0x00, 0xd6, 0x00, 5477 0x00, 0x0d, 0x0e, 0xd3, 0x00, 0xd6, 0x081c, 0x0818, 0x0814, 0x01f9, 5478 0x01fa, 5479 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0x091a, 0x0916, 0x01c1, 6003 0x01c2, 6004 0x01c3, 6005 }, 6006 { 6007 166, 5830, 0x97, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x47, 0x02, 0x05, 6008 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6009 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0920, 0x091c, 0x0918, 0x01c1, 6010 0x01c2, 6011 0x01c2, 6012 }, 6013 { 6014 168, 5840, 0x9a, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x48, 0x02, 0x05, 6015 0x00, 0x05, 0x00, 0x55, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6016 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 6017 0x01c1, 6018 0x01c2, 6019 }, 6020 { 6021 170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, 6022 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6023 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 6024 0x01c0, 6025 0x01c1, 6026 }, 6027 { 6028 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 6029 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6030 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 6031 0x01bf, 6032 0x01c0, 6033 }, 6034 { 6035 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 6036 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6037 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 6038 0x01bf, 6039 0x01bf, 6040 }, 6041 { 6042 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 6043 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6044 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 6045 0x01be, 6046 0x01bf, 6047 }, 6048 { 6049 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 6050 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6051 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 6052 0x01bd, 6053 0x01be, 6054 }, 6055 { 6056 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 6057 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x00, 6058 0x00, 0x03, 0x00, 0x43, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 6059 0x01bc, 6060 0x01bd, 6061 }, 6062 { 6063 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 6064 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6065 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 6066 0x043f, 6067 0x0443, 6068 }, 6069 { 6070 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 6071 0x0a, 0x00, 0x0a, 0x00, 0x71, 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6072 0xa3, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 6073 0x043d, 6074 0x0441, 6075 }, 6076 { 6077 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 6078 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6079 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 6080 0x043a, 6081 0x043f, 6082 }, 6083 { 6084 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 6085 0x09, 0x00, 0x09, 0x00, 0x71, 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x71, 6086 0x93, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 6087 0x0438, 6088 0x043d, 6089 }, 6090 { 6091 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 6092 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6093 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 6094 0x0436, 6095 0x043a, 6096 }, 6097 { 6098 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 6099 0x08, 0x00, 0x08, 0x00, 0x51, 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6100 0x83, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 6101 0x0434, 6102 0x0438, 6103 }, 6104 { 6105 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 6106 0x07, 0x00, 0x07, 0x00, 0x51, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x51, 6107 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 6108 0x0431, 6109 0x0436, 6110 }, 6111 { 6112 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 6113 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6114 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 6115 0x042f, 6116 0x0434, 6117 }, 6118 { 6119 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 6120 0x07, 0x00, 0x07, 0x00, 0x31, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6121 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6122 0x042d, 6123 0x0431, 6124 }, 6125 { 6126 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 6127 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6128 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 6129 0x042b, 6130 0x042f, 6131 }, 6132 { 6133 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 6134 0x06, 0x00, 0x06, 0x00, 0x31, 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x31, 6135 0x63, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 6136 0x0429, 6137 0x042d, 6138 }, 6139 { 6140 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 6141 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6142 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 6143 0x0427, 6144 0x042b, 6145 }, 6146 { 6147 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 6148 0x05, 0x00, 0x05, 0x00, 0x11, 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x11, 6149 0x53, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 6150 0x0424, 6151 0x0429, 6152 }, 6153 { 6154 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 6155 0x04, 0x00, 0x04, 0x00, 0x11, 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x11, 6156 0x43, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 6157 0x041f, 6158 0x0424} 6159}; 6160 6161static const struct chan_info_nphy_radio2057_rev5 6162chan_info_nphyrev8_2057_rev5[] = { 6163 { 6164 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6165 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6166 0x043a, 0x043f, 0x0443}, 6167 { 6168 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6169 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6170 0x0438, 0x043d, 0x0441}, 6171 { 6172 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6173 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6174 0x0436, 0x043a, 0x043f}, 6175 { 6176 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6177 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6178 0x0434, 0x0438, 0x043d}, 6179 { 6180 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6181 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6182 0x0431, 0x0436, 0x043a}, 6183 { 6184 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6185 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6186 0x042f, 0x0434, 0x0438}, 6187 { 6188 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6189 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6190 0x042d, 0x0431, 0x0436}, 6191 { 6192 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6193 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6194 0x042b, 0x042f, 0x0434}, 6195 { 6196 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6197 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6198 0x0429, 0x042d, 0x0431}, 6199 { 6200 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6201 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6202 0x0427, 0x042b, 0x042f}, 6203 { 6204 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6205 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6206 0x0424, 0x0429, 0x042d}, 6207 { 6208 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6209 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6210 0x0422, 0x0427, 0x042b}, 6211 { 6212 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6213 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6214 0x0420, 0x0424, 0x0429}, 6215 { 6216 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6217 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6218 0x041b, 0x041f, 0x0424} 6219}; 6220 6221static const struct chan_info_nphy_radio2057_rev5 6222chan_info_nphyrev9_2057_rev5v1[] = { 6223 { 6224 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 6225 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, 6226 0x043a, 0x043f, 0x0443}, 6227 { 6228 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0d, 6229 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03cb, 0x03c7, 0x03c3, 6230 0x0438, 0x043d, 0x0441}, 6231 { 6232 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0d, 6233 0x08, 0x0e, 0x61, 0x03, 0xef, 0x61, 0x03, 0xef, 0x03cd, 0x03c9, 0x03c5, 6234 0x0436, 0x043a, 0x043f}, 6235 { 6236 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0c, 6237 0x08, 0x0e, 0x61, 0x03, 0xdf, 0x61, 0x03, 0xdf, 0x03cf, 0x03cb, 0x03c7, 6238 0x0434, 0x0438, 0x043d}, 6239 { 6240 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0c, 6241 0x07, 0x0d, 0x61, 0x03, 0xcf, 0x61, 0x03, 0xcf, 0x03d1, 0x03cd, 0x03c9, 6242 0x0431, 0x0436, 0x043a}, 6243 { 6244 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0c, 6245 0x07, 0x0d, 0x61, 0x03, 0xbf, 0x61, 0x03, 0xbf, 0x03d3, 0x03cf, 0x03cb, 6246 0x042f, 0x0434, 0x0438}, 6247 { 6248 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0b, 6249 0x07, 0x0d, 0x61, 0x03, 0xaf, 0x61, 0x03, 0xaf, 0x03d5, 0x03d1, 0x03cd, 6250 0x042d, 0x0431, 0x0436}, 6251 { 6252 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0b, 6253 0x07, 0x0d, 0x61, 0x03, 0x9f, 0x61, 0x03, 0x9f, 0x03d7, 0x03d3, 0x03cf, 6254 0x042b, 0x042f, 0x0434}, 6255 { 6256 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0b, 6257 0x07, 0x0d, 0x61, 0x03, 0x8f, 0x61, 0x03, 0x8f, 0x03d9, 0x03d5, 0x03d1, 6258 0x0429, 0x042d, 0x0431}, 6259 { 6260 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0b, 6261 0x07, 0x0c, 0x61, 0x03, 0x7f, 0x61, 0x03, 0x7f, 0x03db, 0x03d7, 0x03d3, 6262 0x0427, 0x042b, 0x042f}, 6263 { 6264 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0b, 6265 0x07, 0x0c, 0x61, 0x03, 0x6f, 0x61, 0x03, 0x6f, 0x03dd, 0x03d9, 0x03d5, 6266 0x0424, 0x0429, 0x042d}, 6267 { 6268 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0b, 6269 0x06, 0x0c, 0x61, 0x03, 0x5f, 0x61, 0x03, 0x5f, 0x03df, 0x03db, 0x03d7, 6270 0x0422, 0x0427, 0x042b}, 6271 { 6272 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0a, 6273 0x06, 0x0b, 0x61, 0x03, 0x4f, 0x61, 0x03, 0x4f, 0x03e1, 0x03dd, 0x03d9, 6274 0x0420, 0x0424, 0x0429}, 6275 { 6276 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0a, 6277 0x06, 0x0b, 0x61, 0x03, 0x3f, 0x61, 0x03, 0x3f, 0x03e6, 0x03e2, 0x03de, 6278 0x041b, 0x041f, 0x0424} 6279}; 6280 6281static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev7[] = { 6282 { 6283 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 6284 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6285 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b4, 0x07b0, 0x07ac, 0x0214, 6286 0x0215, 6287 0x0216}, 6288 { 6289 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 6290 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6291 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 6292 0x0214, 6293 0x0215}, 6294 { 6295 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 6296 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6297 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 6298 0x0213, 6299 0x0214}, 6300 { 6301 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 6302 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6303 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 6304 0x0212, 6305 0x0213}, 6306 { 6307 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 6308 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6309 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 6310 0x0211, 6311 0x0212}, 6312 { 6313 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 6314 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6315 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 6316 0x020f, 6317 0x0211}, 6318 { 6319 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 6320 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6321 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 6322 0x020e, 6323 0x020f}, 6324 { 6325 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 6326 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 6327 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 6328 0x020d, 6329 0x020e}, 6330 { 6331 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 6332 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6333 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 6334 0x020c, 6335 0x020d}, 6336 { 6337 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 6338 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6339 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 6340 0x020b, 6341 0x020c}, 6342 { 6343 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 6344 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6345 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 6346 0x020a, 6347 0x020b}, 6348 { 6349 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 6350 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6351 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 6352 0x0209, 6353 0x020a}, 6354 { 6355 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 6356 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6357 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 6358 0x0208, 6359 0x0209}, 6360 { 6361 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 6362 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6363 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 6364 0x0207, 6365 0x0208}, 6366 { 6367 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 6368 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6369 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 6370 0x0206, 6371 0x0207}, 6372 { 6373 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 6374 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6375 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 6376 0x0205, 6377 0x0206}, 6378 { 6379 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 6380 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6381 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 6382 0x0204, 6383 0x0205}, 6384 { 6385 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 6386 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 6387 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 6388 0x0203, 6389 0x0204}, 6390 { 6391 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 6392 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6393 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 6394 0x0202, 6395 0x0203}, 6396 { 6397 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 6398 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6399 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 6400 0x0201, 6401 0x0202}, 6402 { 6403 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 6404 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6405 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 6406 0x0200, 6407 0x0201}, 6408 { 6409 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 6410 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6411 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 6412 0x01ff, 6413 0x0200}, 6414 { 6415 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 6416 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6417 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 6418 0x01fe, 6419 0x01ff}, 6420 { 6421 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 6422 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6423 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 6424 0x01fc, 6425 0x01fd}, 6426 { 6427 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 6428 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6429 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0818, 0x0814, 0x0810, 0x01fa, 6430 0x01fb, 6431 0x01fc}, 6432 { 6433 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 0x02, 0x0c, 6434 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6435 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x081c, 0x0818, 0x0814, 0x01f9, 6436 0x01fa, 6437 0x01fb}, 6438 { 6439 38, 5190, 0xc2, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x07, 0x02, 0x0c, 6440 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 6441 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0820, 0x081c, 0x0818, 0x01f8, 6442 0x01f9, 6443 0x01fa}, 6444 { 6445 40, 5200, 0xc5, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x08, 0x02, 0x0c, 6446 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6447 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0824, 0x0820, 0x081c, 0x01f7, 6448 0x01f8, 6449 0x01f9}, 6450 { 6451 42, 5210, 0xc8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x09, 0x02, 0x0c, 6452 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6453 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0828, 0x0824, 0x0820, 0x01f6, 6454 0x01f7, 6455 0x01f8}, 6456 { 6457 44, 5220, 0xcc, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0a, 0x02, 0x0c, 6458 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6459 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x082c, 0x0828, 0x0824, 0x01f5, 6460 0x01f6, 6461 0x01f7}, 6462 { 6463 46, 5230, 0xcf, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0b, 0x02, 0x0c, 6464 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6465 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0830, 0x082c, 0x0828, 0x01f4, 6466 0x01f5, 6467 0x01f6}, 6468 { 6469 48, 5240, 0xd2, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0c, 0x02, 0x0c, 6470 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 6471 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x0834, 0x0830, 0x082c, 0x01f3, 6472 0x01f4, 6473 0x01f5}, 6474 { 6475 50, 5250, 0xd6, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x0d, 0x02, 0x0c, 6476 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0x93, 0x00, 0xf8, 0x00, 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0x94, 0x09, 0x0f, 6986 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6987 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 6988 0x042d, 6989 0x0431}, 6990 { 6991 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 6992 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6993 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 6994 0x042b, 6995 0x042f}, 6996 { 6997 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 6998 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 6999 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7000 0x0429, 7001 0x042d}, 7002 { 7003 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7004 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7005 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7006 0x0427, 7007 0x042b}, 7008 { 7009 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7010 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7011 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7012 0x0424, 7013 0x0429}, 7014 { 7015 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7016 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7017 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7018 0x041f, 7019 0x0424} 7020}; 7021 7022static const struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev8[] = { 7023 { 7024 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 7025 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7026 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07b8, 0x07b4, 0x07b0, 0x0213, 7027 0x0214, 7028 0x0215}, 7029 { 7030 188, 4940, 0x6e, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xee, 0x01, 0x0f, 7031 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7032 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07bc, 0x07b8, 0x07b4, 0x0212, 7033 0x0213, 7034 0x0214}, 7035 { 7036 190, 4950, 0x72, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xef, 0x01, 0x0f, 7037 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7038 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c0, 0x07bc, 0x07b8, 0x0211, 7039 0x0212, 7040 0x0213}, 7041 { 7042 192, 4960, 0x75, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf0, 0x01, 0x0f, 7043 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7044 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c4, 0x07c0, 0x07bc, 0x020f, 7045 0x0211, 7046 0x0212}, 7047 { 7048 194, 4970, 0x78, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf1, 0x01, 0x0f, 7049 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7050 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07c8, 0x07c4, 0x07c0, 0x020e, 7051 0x020f, 7052 0x0211}, 7053 { 7054 196, 4980, 0x7c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf2, 0x01, 0x0f, 7055 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7056 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07cc, 0x07c8, 0x07c4, 0x020d, 7057 0x020e, 7058 0x020f}, 7059 { 7060 198, 4990, 0x7f, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf3, 0x01, 0x0f, 7061 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, 7062 0x00, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x07d0, 0x07cc, 0x07c8, 0x020c, 7063 0x020d, 7064 0x020e}, 7065 { 7066 200, 5000, 0x82, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf4, 0x01, 0x0f, 7067 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7068 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d4, 0x07d0, 0x07cc, 0x020b, 7069 0x020c, 7070 0x020d}, 7071 { 7072 202, 5010, 0x86, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf5, 0x01, 0x0f, 7073 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7074 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07d8, 0x07d4, 0x07d0, 0x020a, 7075 0x020b, 7076 0x020c}, 7077 { 7078 204, 5020, 0x89, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf6, 0x01, 0x0e, 7079 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7080 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07dc, 0x07d8, 0x07d4, 0x0209, 7081 0x020a, 7082 0x020b}, 7083 { 7084 206, 5030, 0x8c, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf7, 0x01, 0x0e, 7085 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7086 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e0, 0x07dc, 0x07d8, 0x0208, 7087 0x0209, 7088 0x020a}, 7089 { 7090 208, 5040, 0x90, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf8, 0x01, 0x0e, 7091 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7092 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e4, 0x07e0, 0x07dc, 0x0207, 7093 0x0208, 7094 0x0209}, 7095 { 7096 210, 5050, 0x93, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xf9, 0x01, 0x0e, 7097 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7098 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07e8, 0x07e4, 0x07e0, 0x0206, 7099 0x0207, 7100 0x0208}, 7101 { 7102 212, 5060, 0x96, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfa, 0x01, 0x0e, 7103 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7104 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07ec, 0x07e8, 0x07e4, 0x0205, 7105 0x0206, 7106 0x0207}, 7107 { 7108 214, 5070, 0x9a, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfb, 0x01, 0x0e, 7109 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7110 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f0, 0x07ec, 0x07e8, 0x0204, 7111 0x0205, 7112 0x0206}, 7113 { 7114 216, 5080, 0x9d, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfc, 0x01, 0x0e, 7115 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7116 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f4, 0x07f0, 0x07ec, 0x0203, 7117 0x0204, 7118 0x0205}, 7119 { 7120 218, 5090, 0xa0, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfd, 0x01, 0x0e, 7121 0x00, 0x0e, 0x00, 0xee, 0x00, 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x00, 7122 0x00, 0x0f, 0x0f, 0xb3, 0x00, 0xff, 0x07f8, 0x07f4, 0x07f0, 0x0202, 7123 0x0203, 7124 0x0204}, 7125 { 7126 220, 5100, 0xa4, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xfe, 0x01, 0x0d, 7127 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7128 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x07fc, 0x07f8, 0x07f4, 0x0201, 7129 0x0202, 7130 0x0203}, 7131 { 7132 222, 5110, 0xa7, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xff, 0x01, 0x0d, 7133 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7134 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0800, 0x07fc, 0x07f8, 0x0200, 7135 0x0201, 7136 0x0202}, 7137 { 7138 224, 5120, 0xaa, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x00, 0x02, 0x0d, 7139 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7140 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0804, 0x0800, 0x07fc, 0x01ff, 7141 0x0200, 7142 0x0201}, 7143 { 7144 226, 5130, 0xae, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x01, 0x02, 0x0d, 7145 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7146 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0808, 0x0804, 0x0800, 0x01fe, 7147 0x01ff, 7148 0x0200}, 7149 { 7150 228, 5140, 0xb1, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x02, 0x02, 0x0d, 7151 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7152 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x080c, 0x0808, 0x0804, 0x01fd, 7153 0x01fe, 7154 0x01ff}, 7155 { 7156 32, 5160, 0xb8, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x04, 0x02, 0x0d, 7157 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7158 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0814, 0x0810, 0x080c, 0x01fb, 7159 0x01fc, 7160 0x01fd}, 7161 { 7162 34, 5170, 0xbb, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x05, 0x02, 0x0d, 7163 0x00, 0x0d, 0x00, 0xdd, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7164 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x0818, 0x0814, 0x0810, 0x01fa, 7165 0x01fb, 7166 0x01fc}, 7167 { 7168 36, 5180, 0xbe, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x06, 0x02, 0x0c, 7169 0x00, 0x0c, 0x00, 0xcc, 0x00, 0x00, 0x0f, 0x0f, 0xa3, 0x00, 0xfc, 0x00, 7170 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0x00, 7632 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0924, 0x0920, 0x091c, 0x01c0, 7633 0x01c1, 7634 0x01c2}, 7635 { 7636 170, 5850, 0x9e, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x49, 0x02, 0x04, 7637 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7638 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0928, 0x0924, 0x0920, 0x01bf, 7639 0x01c0, 7640 0x01c1}, 7641 { 7642 172, 5860, 0xa1, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4a, 0x02, 0x04, 7643 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7644 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x092c, 0x0928, 0x0924, 0x01bf, 7645 0x01bf, 7646 0x01c0}, 7647 { 7648 174, 5870, 0xa4, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4b, 0x02, 0x04, 7649 0x00, 0x04, 0x00, 0x44, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7650 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0930, 0x092c, 0x0928, 0x01be, 7651 0x01bf, 7652 0x01bf}, 7653 { 7654 176, 5880, 0xa8, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4c, 0x02, 0x03, 7655 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7656 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0934, 0x0930, 0x092c, 0x01bd, 7657 0x01be, 7658 0x01bf}, 7659 { 7660 178, 5890, 0xab, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4d, 0x02, 0x03, 7661 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7662 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x0938, 0x0934, 0x0930, 0x01bc, 7663 0x01bd, 7664 0x01be}, 7665 { 7666 180, 5900, 0xae, 0x17, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0x4e, 0x02, 0x03, 7667 0x00, 0x03, 0x00, 0x33, 0x00, 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x00, 7668 0x00, 0x06, 0x01, 0x03, 0x00, 0x00, 0x093c, 0x0938, 0x0934, 0x01bc, 7669 0x01bc, 7670 0x01bd}, 7671 { 7672 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0f, 7673 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7674 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03c9, 0x03c5, 0x03c1, 0x043a, 7675 0x043f, 7676 0x0443}, 7677 { 7678 2, 2417, 0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71, 0x09, 0x0f, 7679 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7680 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cb, 0x03c7, 0x03c3, 0x0438, 7681 0x043d, 7682 0x0441}, 7683 { 7684 3, 2422, 0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76, 0x09, 0x0f, 7685 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7686 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cd, 0x03c9, 0x03c5, 0x0436, 7687 0x043a, 7688 0x043f}, 7689 { 7690 4, 2427, 0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b, 0x09, 0x0f, 7691 0x09, 0x00, 0x09, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7692 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03cf, 0x03cb, 0x03c7, 0x0434, 7693 0x0438, 7694 0x043d}, 7695 { 7696 5, 2432, 0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80, 0x09, 0x0f, 7697 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7698 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d1, 0x03cd, 0x03c9, 0x0431, 7699 0x0436, 7700 0x043a}, 7701 { 7702 6, 2437, 0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85, 0x09, 0x0f, 7703 0x08, 0x00, 0x08, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7704 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d3, 0x03cf, 0x03cb, 0x042f, 7705 0x0434, 7706 0x0438}, 7707 { 7708 7, 2442, 0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a, 0x09, 0x0f, 7709 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7710 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d5, 0x03d1, 0x03cd, 0x042d, 7711 0x0431, 7712 0x0436}, 7713 { 7714 8, 2447, 0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f, 0x09, 0x0f, 7715 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7716 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d7, 0x03d3, 0x03cf, 0x042b, 7717 0x042f, 7718 0x0434}, 7719 { 7720 9, 2452, 0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94, 0x09, 0x0f, 7721 0x07, 0x00, 0x07, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7722 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03d9, 0x03d5, 0x03d1, 0x0429, 7723 0x042d, 7724 0x0431}, 7725 { 7726 10, 2457, 0x66, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x99, 0x09, 0x0f, 7727 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7728 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03db, 0x03d7, 0x03d3, 0x0427, 7729 0x042b, 7730 0x042f}, 7731 { 7732 11, 2462, 0x69, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x9e, 0x09, 0x0f, 7733 0x06, 0x00, 0x06, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7734 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03dd, 0x03d9, 0x03d5, 0x0424, 7735 0x0429, 7736 0x042d}, 7737 { 7738 12, 2467, 0x6c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa3, 0x09, 0x0f, 7739 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7740 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03df, 0x03db, 0x03d7, 0x0422, 7741 0x0427, 7742 0x042b}, 7743 { 7744 13, 2472, 0x70, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xa8, 0x09, 0x0f, 7745 0x05, 0x00, 0x05, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x61, 7746 0x73, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x03e1, 0x03dd, 0x03d9, 0x0420, 7747 0x0424, 7748 0x0429}, 7749 { 7750 14, 2484, 0x78, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0xb4, 0x09, 0x0f, 7751 0x04, 0x00, 0x04, 0x00, 0x61, 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x61, 7752 0x73, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x03e6, 0x03e2, 0x03de, 0x041b, 7753 0x041f, 7754 0x0424} 7755}; 7756 7757static struct radio_regs regs_2055[] = { 7758 {0x02, 0x80, 0x80, 0, 0}, 7759 {0x03, 0, 0, 0, 0}, 7760 {0x04, 0x27, 0x27, 0, 0}, 7761 {0x05, 0, 0, 0, 0}, 7762 {0x06, 0x27, 0x27, 0, 0}, 7763 {0x07, 0x7f, 0x7f, 1, 1}, 7764 {0x08, 0x7, 0x7, 1, 1}, 7765 {0x09, 0x7f, 0x7f, 1, 1}, 7766 {0x0A, 0x7, 0x7, 1, 1}, 7767 {0x0B, 0x15, 0x15, 0, 0}, 7768 {0x0C, 0x15, 0x15, 0, 0}, 7769 {0x0D, 0x4f, 0x4f, 1, 1}, 7770 {0x0E, 0x5, 0x5, 1, 1}, 7771 {0x0F, 0x4f, 0x4f, 1, 1}, 7772 {0x10, 0x5, 0x5, 1, 1}, 7773 {0x11, 0xd0, 0xd0, 0, 0}, 7774 {0x12, 0x2, 0x2, 0, 0}, 7775 {0x13, 0, 0, 0, 0}, 7776 {0x14, 0x40, 0x40, 0, 0}, 7777 {0x15, 0, 0, 0, 0}, 7778 {0x16, 0, 0, 0, 0}, 7779 {0x17, 0, 0, 0, 0}, 7780 {0x18, 0, 0, 0, 0}, 7781 {0x19, 0, 0, 0, 0}, 7782 {0x1A, 0, 0, 0, 0}, 7783 {0x1B, 0, 0, 0, 0}, 7784 {0x1C, 0, 0, 0, 0}, 7785 {0x1D, 0xc0, 0xc0, 0, 0}, 7786 {0x1E, 0xff, 0xff, 0, 0}, 7787 {0x1F, 0xc0, 0xc0, 0, 0}, 7788 {0x20, 0xff, 0xff, 0, 0}, 7789 {0x21, 0xc0, 0xc0, 0, 0}, 7790 {0x22, 0, 0, 0, 0}, 7791 {0x23, 0x2c, 0x2c, 0, 0}, 7792 {0x24, 0, 0, 0, 0}, 7793 {0x25, 0, 0, 0, 0}, 7794 {0x26, 0, 0, 0, 0}, 7795 {0x27, 0, 0, 0, 0}, 7796 {0x28, 0, 0, 0, 0}, 7797 {0x29, 0, 0, 0, 0}, 7798 {0x2A, 0, 0, 0, 0}, 7799 {0x2B, 0, 0, 0, 0}, 7800 {0x2C, 0, 0, 0, 0}, 7801 {0x2D, 0xa4, 0xa4, 0, 0}, 7802 {0x2E, 0x38, 0x38, 0, 0}, 7803 {0x2F, 0, 0, 0, 0}, 7804 {0x30, 0x4, 0x4, 1, 1}, 7805 {0x31, 0, 0, 0, 0}, 7806 {0x32, 0xa, 0xa, 0, 0}, 7807 {0x33, 0x87, 0x87, 0, 0}, 7808 {0x34, 0x9, 0x9, 0, 0}, 7809 {0x35, 0x70, 0x70, 0, 0}, 7810 {0x36, 0x11, 0x11, 0, 0}, 7811 {0x37, 0x18, 0x18, 1, 1}, 7812 {0x38, 0x6, 0x6, 0, 0}, 7813 {0x39, 0x4, 0x4, 1, 1}, 7814 {0x3A, 0x6, 0x6, 0, 0}, 7815 {0x3B, 0x9e, 0x9e, 0, 0}, 7816 {0x3C, 0x9, 0x9, 0, 0}, 7817 {0x3D, 0xc8, 0xc8, 1, 1}, 7818 {0x3E, 0x88, 0x88, 0, 0}, 7819 {0x3F, 0, 0, 0, 0}, 7820 {0x40, 0, 0, 0, 0}, 7821 {0x41, 0, 0, 0, 0}, 7822 {0x42, 0x1, 0x1, 0, 0}, 7823 {0x43, 0x2, 0x2, 0, 0}, 7824 {0x44, 0x96, 0x96, 0, 0}, 7825 {0x45, 0x3e, 0x3e, 0, 0}, 7826 {0x46, 0x3e, 0x3e, 0, 0}, 7827 {0x47, 0x13, 0x13, 0, 0}, 7828 {0x48, 0x2, 0x2, 0, 0}, 7829 {0x49, 0x15, 0x15, 0, 0}, 7830 {0x4A, 0x7, 0x7, 0, 0}, 7831 {0x4B, 0, 0, 0, 0}, 7832 {0x4C, 0, 0, 0, 0}, 7833 {0x4D, 0, 0, 0, 0}, 7834 {0x4E, 0, 0, 0, 0}, 7835 {0x4F, 0, 0, 0, 0}, 7836 {0x50, 0x8, 0x8, 0, 0}, 7837 {0x51, 0x8, 0x8, 0, 0}, 7838 {0x52, 0x6, 0x6, 0, 0}, 7839 {0x53, 0x84, 0x84, 1, 1}, 7840 {0x54, 0xc3, 0xc3, 0, 0}, 7841 {0x55, 0x8f, 0x8f, 0, 0}, 7842 {0x56, 0xff, 0xff, 0, 0}, 7843 {0x57, 0xff, 0xff, 0, 0}, 7844 {0x58, 0x88, 0x88, 0, 0}, 7845 {0x59, 0x88, 0x88, 0, 0}, 7846 {0x5A, 0, 0, 0, 0}, 7847 {0x5B, 0xcc, 0xcc, 0, 0}, 7848 {0x5C, 0x6, 0x6, 0, 0}, 7849 {0x5D, 0x80, 0x80, 0, 0}, 7850 {0x5E, 0x80, 0x80, 0, 0}, 7851 {0x5F, 0xf8, 0xf8, 0, 0}, 7852 {0x60, 0x88, 0x88, 0, 0}, 7853 {0x61, 0x88, 0x88, 0, 0}, 7854 {0x62, 0x88, 0x8, 1, 1}, 7855 {0x63, 0x88, 0x88, 0, 0}, 7856 {0x64, 0, 0, 0, 0}, 7857 {0x65, 0x1, 0x1, 1, 1}, 7858 {0x66, 0x8a, 0x8a, 0, 0}, 7859 {0x67, 0x8, 0x8, 0, 0}, 7860 {0x68, 0x83, 0x83, 0, 0}, 7861 {0x69, 0x6, 0x6, 0, 0}, 7862 {0x6A, 0xa0, 0xa0, 0, 0}, 7863 {0x6B, 0xa, 0xa, 0, 0}, 7864 {0x6C, 0x87, 0x87, 1, 1}, 7865 {0x6D, 0x2a, 0x2a, 0, 0}, 7866 {0x6E, 0x2a, 0x2a, 0, 0}, 7867 {0x6F, 0x2a, 0x2a, 0, 0}, 7868 {0x70, 0x2a, 0x2a, 0, 0}, 7869 {0x71, 0x18, 0x18, 0, 0}, 7870 {0x72, 0x6a, 0x6a, 1, 1}, 7871 {0x73, 0xab, 0xab, 1, 1}, 7872 {0x74, 0x13, 0x13, 1, 1}, 7873 {0x75, 0xc1, 0xc1, 1, 1}, 7874 {0x76, 0xaa, 0xaa, 1, 1}, 7875 {0x77, 0x87, 0x87, 1, 1}, 7876 {0x78, 0, 0, 0, 0}, 7877 {0x79, 0x6, 0x6, 0, 0}, 7878 {0x7A, 0x7, 0x7, 0, 0}, 7879 {0x7B, 0x7, 0x7, 0, 0}, 7880 {0x7C, 0x15, 0x15, 0, 0}, 7881 {0x7D, 0x55, 0x55, 0, 0}, 7882 {0x7E, 0x97, 0x97, 1, 1}, 7883 {0x7F, 0x8, 0x8, 0, 0}, 7884 {0x80, 0x14, 0x14, 1, 1}, 7885 {0x81, 0x33, 0x33, 0, 0}, 7886 {0x82, 0x88, 0x88, 0, 0}, 7887 {0x83, 0x6, 0x6, 0, 0}, 7888 {0x84, 0x3, 0x3, 1, 1}, 7889 {0x85, 0xa, 0xa, 0, 0}, 7890 {0x86, 0x3, 0x3, 1, 1}, 7891 {0x87, 0x2a, 0x2a, 0, 0}, 7892 {0x88, 0xa4, 0xa4, 0, 0}, 7893 {0x89, 0x18, 0x18, 0, 0}, 7894 {0x8A, 0x28, 0x28, 0, 0}, 7895 {0x8B, 0, 0, 0, 0}, 7896 {0x8C, 0x4a, 0x4a, 0, 0}, 7897 {0x8D, 0, 0, 0, 0}, 7898 {0x8E, 0xf8, 0xf8, 0, 0}, 7899 {0x8F, 0x88, 0x88, 0, 0}, 7900 {0x90, 0x88, 0x88, 0, 0}, 7901 {0x91, 0x88, 0x8, 1, 1}, 7902 {0x92, 0x88, 0x88, 0, 0}, 7903 {0x93, 0, 0, 0, 0}, 7904 {0x94, 0x1, 0x1, 1, 1}, 7905 {0x95, 0x8a, 0x8a, 0, 0}, 7906 {0x96, 0x8, 0x8, 0, 0}, 7907 {0x97, 0x83, 0x83, 0, 0}, 7908 {0x98, 0x6, 0x6, 0, 0}, 7909 {0x99, 0xa0, 0xa0, 0, 0}, 7910 {0x9A, 0xa, 0xa, 0, 0}, 7911 {0x9B, 0x87, 0x87, 1, 1}, 7912 {0x9C, 0x2a, 0x2a, 0, 0}, 7913 {0x9D, 0x2a, 0x2a, 0, 0}, 7914 {0x9E, 0x2a, 0x2a, 0, 0}, 7915 {0x9F, 0x2a, 0x2a, 0, 0}, 7916 {0xA0, 0x18, 0x18, 0, 0}, 7917 {0xA1, 0x6a, 0x6a, 1, 1}, 7918 {0xA2, 0xab, 0xab, 1, 1}, 7919 {0xA3, 0x13, 0x13, 1, 1}, 7920 {0xA4, 0xc1, 0xc1, 1, 1}, 7921 {0xA5, 0xaa, 0xaa, 1, 1}, 7922 {0xA6, 0x87, 0x87, 1, 1}, 7923 {0xA7, 0, 0, 0, 0}, 7924 {0xA8, 0x6, 0x6, 0, 0}, 7925 {0xA9, 0x7, 0x7, 0, 0}, 7926 {0xAA, 0x7, 0x7, 0, 0}, 7927 {0xAB, 0x15, 0x15, 0, 0}, 7928 {0xAC, 0x55, 0x55, 0, 0}, 7929 {0xAD, 0x97, 0x97, 1, 1}, 7930 {0xAE, 0x8, 0x8, 0, 0}, 7931 {0xAF, 0x14, 0x14, 1, 1}, 7932 {0xB0, 0x33, 0x33, 0, 0}, 7933 {0xB1, 0x88, 0x88, 0, 0}, 7934 {0xB2, 0x6, 0x6, 0, 0}, 7935 {0xB3, 0x3, 0x3, 1, 1}, 7936 {0xB4, 0xa, 0xa, 0, 0}, 7937 {0xB5, 0x3, 0x3, 1, 1}, 7938 {0xB6, 0x2a, 0x2a, 0, 0}, 7939 {0xB7, 0xa4, 0xa4, 0, 0}, 7940 {0xB8, 0x18, 0x18, 0, 0}, 7941 {0xB9, 0x28, 0x28, 0, 0}, 7942 {0xBA, 0, 0, 0, 0}, 7943 {0xBB, 0x4a, 0x4a, 0, 0}, 7944 {0xBC, 0, 0, 0, 0}, 7945 {0xBD, 0x71, 0x71, 0, 0}, 7946 {0xBE, 0x72, 0x72, 0, 0}, 7947 {0xBF, 0x73, 0x73, 0, 0}, 7948 {0xC0, 0x74, 0x74, 0, 0}, 7949 {0xC1, 0x75, 0x75, 0, 0}, 7950 {0xC2, 0x76, 0x76, 0, 0}, 7951 {0xC3, 0x77, 0x77, 0, 0}, 7952 {0xC4, 0x78, 0x78, 0, 0}, 7953 {0xC5, 0x79, 0x79, 0, 0}, 7954 {0xC6, 0x7a, 0x7a, 0, 0}, 7955 {0xC7, 0, 0, 0, 0}, 7956 {0xC8, 0, 0, 0, 0}, 7957 {0xC9, 0, 0, 0, 0}, 7958 {0xCA, 0, 0, 0, 0}, 7959 {0xCB, 0, 0, 0, 0}, 7960 {0xCC, 0, 0, 0, 0}, 7961 {0xCD, 0, 0, 0, 0}, 7962 {0xCE, 0x6, 0x6, 0, 0}, 7963 {0xCF, 0, 0, 0, 0}, 7964 {0xD0, 0, 0, 0, 0}, 7965 {0xD1, 0x18, 0x18, 0, 0}, 7966 {0xD2, 0x88, 0x88, 0, 0}, 7967 {0xD3, 0, 0, 0, 0}, 7968 {0xD4, 0, 0, 0, 0}, 7969 {0xD5, 0, 0, 0, 0}, 7970 {0xD6, 0, 0, 0, 0}, 7971 {0xD7, 0, 0, 0, 0}, 7972 {0xD8, 0, 0, 0, 0}, 7973 {0xD9, 0, 0, 0, 0}, 7974 {0xDA, 0x6, 0x6, 0, 0}, 7975 {0xDB, 0, 0, 0, 0}, 7976 {0xDC, 0, 0, 0, 0}, 7977 {0xDD, 0x18, 0x18, 0, 0}, 7978 {0xDE, 0x88, 0x88, 0, 0}, 7979 {0xDF, 0, 0, 0, 0}, 7980 {0xE0, 0, 0, 0, 0}, 7981 {0xE1, 0, 0, 0, 0}, 7982 {0xE2, 0, 0, 0, 0}, 7983 {0xFFFF, 0, 0, 0, 0}, 7984}; 7985 7986static struct radio_regs regs_SYN_2056[] = { 7987 {0x02, 0, 0, 0, 0}, 7988 {0x03, 0, 0, 0, 0}, 7989 {0x04, 0, 0, 0, 0}, 7990 {0x05, 0, 0, 0, 0}, 7991 {0x06, 0, 0, 0, 0}, 7992 {0x07, 0, 0, 0, 0}, 7993 {0x08, 0, 0, 0, 0}, 7994 {0x09, 0x1, 0x1, 0, 0}, 7995 {0x0A, 0, 0, 0, 0}, 7996 {0x0B, 0, 0, 0, 0}, 7997 {0x0C, 0, 0, 0, 0}, 7998 {0x0D, 0, 0, 0, 0}, 7999 {0x0E, 0, 0, 0, 0}, 8000 {0x0F, 0, 0, 0, 0}, 8001 {0x10, 0, 0, 0, 0}, 8002 {0x11, 0, 0, 0, 0}, 8003 {0x12, 0, 0, 0, 0}, 8004 {0x13, 0, 0, 0, 0}, 8005 {0x14, 0, 0, 0, 0}, 8006 {0x15, 0, 0, 0, 0}, 8007 {0x16, 0, 0, 0, 0}, 8008 {0x17, 0, 0, 0, 0}, 8009 {0x18, 0, 0, 0, 0}, 8010 {0x19, 0, 0, 0, 0}, 8011 {0x1A, 0, 0, 0, 0}, 8012 {0x1B, 0, 0, 0, 0}, 8013 {0x1C, 0, 0, 0, 0}, 8014 {0x1D, 0, 0, 0, 0}, 8015 {0x1E, 0, 0, 0, 0}, 8016 {0x1F, 0, 0, 0, 0}, 8017 {0x20, 0, 0, 0, 0}, 8018 {0x21, 0, 0, 0, 0}, 8019 {0x22, 0x60, 0x60, 0, 0}, 8020 {0x23, 0x6, 0x6, 0, 0}, 8021 {0x24, 0xc, 0xc, 0, 0}, 8022 {0x25, 0, 0, 0, 0}, 8023 {0x26, 0, 0, 0, 0}, 8024 {0x27, 0, 0, 0, 0}, 8025 {0x28, 0x1, 0x1, 0, 0}, 8026 {0x29, 0, 0, 0, 0}, 8027 {0x2A, 0, 0, 0, 0}, 8028 {0x2B, 0, 0, 0, 0}, 8029 {0x2C, 0, 0, 0, 0}, 8030 {0x2D, 0, 0, 0, 0}, 8031 {0x2E, 0xd, 0xd, 0, 0}, 8032 {0x2F, 0x1f, 0x1f, 0, 0}, 8033 {0x30, 0x15, 0x15, 0, 0}, 8034 {0x31, 0xf, 0xf, 0, 0}, 8035 {0x32, 0, 0, 0, 0}, 8036 {0x33, 0, 0, 0, 0}, 8037 {0x34, 0, 0, 0, 0}, 8038 {0x35, 0, 0, 0, 0}, 8039 {0x36, 0, 0, 0, 0}, 8040 {0x37, 0, 0, 0, 0}, 8041 {0x38, 0, 0, 0, 0}, 8042 {0x39, 0, 0, 0, 0}, 8043 {0x3A, 0, 0, 0, 0}, 8044 {0x3B, 0, 0, 0, 0}, 8045 {0x3C, 0x13, 0x13, 0, 0}, 8046 {0x3D, 0xf, 0xf, 0, 0}, 8047 {0x3E, 0x18, 0x18, 0, 0}, 8048 {0x3F, 0, 0, 0, 0}, 8049 {0x40, 0, 0, 0, 0}, 8050 {0x41, 0x20, 0x20, 0, 0}, 8051 {0x42, 0x20, 0x20, 0, 0}, 8052 {0x43, 0, 0, 0, 0}, 8053 {0x44, 0x77, 0x77, 0, 0}, 8054 {0x45, 0x7, 0x7, 0, 0}, 8055 {0x46, 0x1, 0x1, 0, 0}, 8056 {0x47, 0x4, 0x4, 0, 0}, 8057 {0x48, 0xf, 0xf, 0, 0}, 8058 {0x49, 0x30, 0x30, 0, 0}, 8059 {0x4A, 0x32, 0x32, 0, 0}, 8060 {0x4B, 0xd, 0xd, 0, 0}, 8061 {0x4C, 0xd, 0xd, 0, 0}, 8062 {0x4D, 0x4, 0x4, 0, 0}, 8063 {0x4E, 0x6, 0x6, 0, 0}, 8064 {0x4F, 0x1, 0x1, 0, 0}, 8065 {0x50, 0x1c, 0x1c, 0, 0}, 8066 {0x51, 0x2, 0x2, 0, 0}, 8067 {0x52, 0x2, 0x2, 0, 0}, 8068 {0x53, 0xf7, 0xf7, 1, 1}, 8069 {0x54, 0xb4, 0xb4, 0, 0}, 8070 {0x55, 0xd2, 0xd2, 0, 0}, 8071 {0x56, 0, 0, 0, 0}, 8072 {0x57, 0, 0, 0, 0}, 8073 {0x58, 0x4, 0x4, 0, 0}, 8074 {0x59, 0x96, 0x96, 0, 0}, 8075 {0x5A, 0x3e, 0x3e, 0, 0}, 8076 {0x5B, 0x3e, 0x3e, 0, 0}, 8077 {0x5C, 0x13, 0x13, 0, 0}, 8078 {0x5D, 0x2, 0x2, 0, 0}, 8079 {0x5E, 0, 0, 0, 0}, 8080 {0x5F, 0x7, 0x7, 0, 0}, 8081 {0x60, 0x7, 0x7, 1, 1}, 8082 {0x61, 0x8, 0x8, 0, 0}, 8083 {0x62, 0x3, 0x3, 0, 0}, 8084 {0x63, 0, 0, 0, 0}, 8085 {0x64, 0, 0, 0, 0}, 8086 {0x65, 0, 0, 0, 0}, 8087 {0x66, 0, 0, 0, 0}, 8088 {0x67, 0, 0, 0, 0}, 8089 {0x68, 0x40, 0x40, 0, 0}, 8090 {0x69, 0, 0, 0, 0}, 8091 {0x6A, 0, 0, 0, 0}, 8092 {0x6B, 0, 0, 0, 0}, 8093 {0x6C, 0, 0, 0, 0}, 8094 {0x6D, 0x1, 0x1, 0, 0}, 8095 {0x6E, 0, 0, 0, 0}, 8096 {0x6F, 0, 0, 0, 0}, 8097 {0x70, 0x60, 0x60, 0, 0}, 8098 {0x71, 0x66, 0x66, 0, 0}, 8099 {0x72, 0xc, 0xc, 0, 0}, 8100 {0x73, 0x66, 0x66, 0, 0}, 8101 {0x74, 0x8f, 0x8f, 1, 1}, 8102 {0x75, 0, 0, 0, 0}, 8103 {0x76, 0xcc, 0xcc, 0, 0}, 8104 {0x77, 0x1, 0x1, 0, 0}, 8105 {0x78, 0x66, 0x66, 0, 0}, 8106 {0x79, 0x66, 0x66, 0, 0}, 8107 {0x7A, 0, 0, 0, 0}, 8108 {0x7B, 0, 0, 0, 0}, 8109 {0x7C, 0, 0, 0, 0}, 8110 {0x7D, 0, 0, 0, 0}, 8111 {0x7E, 0, 0, 0, 0}, 8112 {0x7F, 0, 0, 0, 0}, 8113 {0x80, 0, 0, 0, 0}, 8114 {0x81, 0, 0, 0, 0}, 8115 {0x82, 0, 0, 0, 0}, 8116 {0x83, 0, 0, 0, 0}, 8117 {0x84, 0, 0, 0, 0}, 8118 {0x85, 0xff, 0xff, 0, 0}, 8119 {0x86, 0, 0, 0, 0}, 8120 {0x87, 0, 0, 0, 0}, 8121 {0x88, 0, 0, 0, 0}, 8122 {0x89, 0, 0, 0, 0}, 8123 {0x8A, 0, 0, 0, 0}, 8124 {0x8B, 0, 0, 0, 0}, 8125 {0x8C, 0, 0, 0, 0}, 8126 {0x8D, 0, 0, 0, 0}, 8127 {0x8E, 0, 0, 0, 0}, 8128 {0x8F, 0, 0, 0, 0}, 8129 {0x90, 0, 0, 0, 0}, 8130 {0x91, 0, 0, 0, 0}, 8131 {0x92, 0, 0, 0, 0}, 8132 {0x93, 0, 0, 0, 0}, 8133 {0x94, 0, 0, 0, 0}, 8134 {0x95, 0, 0, 0, 0}, 8135 {0x96, 0, 0, 0, 0}, 8136 {0x97, 0, 0, 0, 0}, 8137 {0x98, 0, 0, 0, 0}, 8138 {0x99, 0, 0, 0, 0}, 8139 {0x9A, 0, 0, 0, 0}, 8140 {0x9B, 0, 0, 0, 0}, 8141 {0x9C, 0, 0, 0, 0}, 8142 {0x9D, 0, 0, 0, 0}, 8143 {0x9E, 0, 0, 0, 0}, 8144 {0x9F, 0x6, 0x6, 0, 0}, 8145 {0xA0, 0x66, 0x66, 0, 0}, 8146 {0xA1, 0x66, 0x66, 0, 0}, 8147 {0xA2, 0x66, 0x66, 0, 0}, 8148 {0xA3, 0x66, 0x66, 0, 0}, 8149 {0xA4, 0x66, 0x66, 0, 0}, 8150 {0xA5, 0x66, 0x66, 0, 0}, 8151 {0xA6, 0x66, 0x66, 0, 0}, 8152 {0xA7, 0x66, 0x66, 0, 0}, 8153 {0xA8, 0x66, 0x66, 0, 0}, 8154 {0xA9, 0x66, 0x66, 0, 0}, 8155 {0xAA, 0x66, 0x66, 0, 0}, 8156 {0xAB, 0x66, 0x66, 0, 0}, 8157 {0xAC, 0x66, 0x66, 0, 0}, 8158 {0xAD, 0x66, 0x66, 0, 0}, 8159 {0xAE, 0x66, 0x66, 0, 0}, 8160 {0xAF, 0x66, 0x66, 0, 0}, 8161 {0xB0, 0x66, 0x66, 0, 0}, 8162 {0xB1, 0x66, 0x66, 0, 0}, 8163 {0xB2, 0x66, 0x66, 0, 0}, 8164 {0xB3, 0xa, 0xa, 0, 0}, 8165 {0xB4, 0, 0, 0, 0}, 8166 {0xB5, 0, 0, 0, 0}, 8167 {0xB6, 0, 0, 0, 0}, 8168 {0xFFFF, 0, 0, 0, 0} 8169}; 8170 8171static struct radio_regs regs_TX_2056[] = { 8172 {0x02, 0, 0, 0, 0}, 8173 {0x03, 0, 0, 0, 0}, 8174 {0x04, 0, 0, 0, 0}, 8175 {0x05, 0, 0, 0, 0}, 8176 {0x06, 0, 0, 0, 0}, 8177 {0x07, 0, 0, 0, 0}, 8178 {0x08, 0, 0, 0, 0}, 8179 {0x09, 0, 0, 0, 0}, 8180 {0x0A, 0, 0, 0, 0}, 8181 {0x0B, 0, 0, 0, 0}, 8182 {0x0C, 0, 0, 0, 0}, 8183 {0x0D, 0, 0, 0, 0}, 8184 {0x0E, 0, 0, 0, 0}, 8185 {0x0F, 0, 0, 0, 0}, 8186 {0x10, 0, 0, 0, 0}, 8187 {0x11, 0, 0, 0, 0}, 8188 {0x12, 0, 0, 0, 0}, 8189 {0x13, 0, 0, 0, 0}, 8190 {0x14, 0, 0, 0, 0}, 8191 {0x15, 0, 0, 0, 0}, 8192 {0x16, 0, 0, 0, 0}, 8193 {0x17, 0, 0, 0, 0}, 8194 {0x18, 0, 0, 0, 0}, 8195 {0x19, 0, 0, 0, 0}, 8196 {0x1A, 0, 0, 0, 0}, 8197 {0x1B, 0, 0, 0, 0}, 8198 {0x1C, 0, 0, 0, 0}, 8199 {0x1D, 0, 0, 0, 0}, 8200 {0x1E, 0, 0, 0, 0}, 8201 {0x1F, 0, 0, 0, 0}, 8202 {0x20, 0, 0, 0, 0}, 8203 {0x21, 0x88, 0x88, 0, 0}, 8204 {0x22, 0x88, 0x88, 0, 0}, 8205 {0x23, 0x88, 0x88, 0, 0}, 8206 {0x24, 0x88, 0x88, 0, 0}, 8207 {0x25, 0xc, 0xc, 0, 0}, 8208 {0x26, 0, 0, 0, 0}, 8209 {0x27, 0x3, 0x3, 0, 0}, 8210 {0x28, 0, 0, 0, 0}, 8211 {0x29, 0x3, 0x3, 0, 0}, 8212 {0x2A, 0x37, 0x37, 0, 0}, 8213 {0x2B, 0x3, 0x3, 0, 0}, 8214 {0x2C, 0, 0, 0, 0}, 8215 {0x2D, 0, 0, 0, 0}, 8216 {0x2E, 0x1, 0x1, 0, 0}, 8217 {0x2F, 0x1, 0x1, 0, 0}, 8218 {0x30, 0, 0, 0, 0}, 8219 {0x31, 0, 0, 0, 0}, 8220 {0x32, 0, 0, 0, 0}, 8221 {0x33, 0x11, 0x11, 0, 0}, 8222 {0x34, 0x11, 0x11, 0, 0}, 8223 {0x35, 0, 0, 0, 0}, 8224 {0x36, 0, 0, 0, 0}, 8225 {0x37, 0x3, 0x3, 0, 0}, 8226 {0x38, 0xf, 0xf, 0, 0}, 8227 {0x39, 0, 0, 0, 0}, 8228 {0x3A, 0x2d, 0x2d, 0, 0}, 8229 {0x3B, 0, 0, 0, 0}, 8230 {0x3C, 0x6e, 0x6e, 0, 0}, 8231 {0x3D, 0xf0, 0xf0, 1, 1}, 8232 {0x3E, 0, 0, 0, 0}, 8233 {0x3F, 0, 0, 0, 0}, 8234 {0x40, 0, 0, 0, 0}, 8235 {0x41, 0x3, 0x3, 0, 0}, 8236 {0x42, 0x3, 0x3, 0, 0}, 8237 {0x43, 0, 0, 0, 0}, 8238 {0x44, 0x1e, 0x1e, 0, 0}, 8239 {0x45, 0, 0, 0, 0}, 8240 {0x46, 0x6e, 0x6e, 0, 0}, 8241 {0x47, 0xf0, 0xf0, 1, 1}, 8242 {0x48, 0, 0, 0, 0}, 8243 {0x49, 0x2, 0x2, 0, 0}, 8244 {0x4A, 0xff, 0xff, 1, 1}, 8245 {0x4B, 0xc, 0xc, 0, 0}, 8246 {0x4C, 0, 0, 0, 0}, 8247 {0x4D, 0x38, 0x38, 0, 0}, 8248 {0x4E, 0x70, 0x70, 1, 1}, 8249 {0x4F, 0x2, 0x2, 0, 0}, 8250 {0x50, 0x88, 0x88, 0, 0}, 8251 {0x51, 0xc, 0xc, 0, 0}, 8252 {0x52, 0, 0, 0, 0}, 8253 {0x53, 0x8, 0x8, 0, 0}, 8254 {0x54, 0x70, 0x70, 1, 1}, 8255 {0x55, 0x2, 0x2, 0, 0}, 8256 {0x56, 0xff, 0xff, 1, 1}, 8257 {0x57, 0, 0, 0, 0}, 8258 {0x58, 0x83, 0x83, 0, 0}, 8259 {0x59, 0x77, 0x77, 1, 1}, 8260 {0x5A, 0, 0, 0, 0}, 8261 {0x5B, 0x2, 0x2, 0, 0}, 8262 {0x5C, 0x88, 0x88, 0, 0}, 8263 {0x5D, 0, 0, 0, 0}, 8264 {0x5E, 0x8, 0x8, 0, 0}, 8265 {0x5F, 0x77, 0x77, 1, 1}, 8266 {0x60, 0x1, 0x1, 0, 0}, 8267 {0x61, 0, 0, 0, 0}, 8268 {0x62, 0x7, 0x7, 0, 0}, 8269 {0x63, 0, 0, 0, 0}, 8270 {0x64, 0x7, 0x7, 0, 0}, 8271 {0x65, 0, 0, 0, 0}, 8272 {0x66, 0, 0, 0, 0}, 8273 {0x67, 0x74, 0x74, 1, 1}, 8274 {0x68, 0, 0, 0, 0}, 8275 {0x69, 0xa, 0xa, 0, 0}, 8276 {0x6A, 0, 0, 0, 0}, 8277 {0x6B, 0, 0, 0, 0}, 8278 {0x6C, 0, 0, 0, 0}, 8279 {0x6D, 0, 0, 0, 0}, 8280 {0x6E, 0, 0, 0, 0}, 8281 {0x6F, 0, 0, 0, 0}, 8282 {0x70, 0, 0, 0, 0}, 8283 {0x71, 0x2, 0x2, 0, 0}, 8284 {0x72, 0, 0, 0, 0}, 8285 {0x73, 0, 0, 0, 0}, 8286 {0x74, 0xe, 0xe, 0, 0}, 8287 {0x75, 0xe, 0xe, 0, 0}, 8288 {0x76, 0xe, 0xe, 0, 0}, 8289 {0x77, 0x13, 0x13, 0, 0}, 8290 {0x78, 0x13, 0x13, 0, 0}, 8291 {0x79, 0x1b, 0x1b, 0, 0}, 8292 {0x7A, 0x1b, 0x1b, 0, 0}, 8293 {0x7B, 0x55, 0x55, 0, 0}, 8294 {0x7C, 0x5b, 0x5b, 0, 0}, 8295 {0x7D, 0, 0, 0, 0}, 8296 {0x7E, 0, 0, 0, 0}, 8297 {0x7F, 0, 0, 0, 0}, 8298 {0x80, 0, 0, 0, 0}, 8299 {0x81, 0, 0, 0, 0}, 8300 {0x82, 0, 0, 0, 0}, 8301 {0x83, 0, 0, 0, 0}, 8302 {0x84, 0, 0, 0, 0}, 8303 {0x85, 0, 0, 0, 0}, 8304 {0x86, 0, 0, 0, 0}, 8305 {0x87, 0, 0, 0, 0}, 8306 {0x88, 0, 0, 0, 0}, 8307 {0x89, 0, 0, 0, 0}, 8308 {0x8A, 0, 0, 0, 0}, 8309 {0x8B, 0, 0, 0, 0}, 8310 {0x8C, 0, 0, 0, 0}, 8311 {0x8D, 0, 0, 0, 0}, 8312 {0x8E, 0, 0, 0, 0}, 8313 {0x8F, 0, 0, 0, 0}, 8314 {0x90, 0, 0, 0, 0}, 8315 {0x91, 0, 0, 0, 0}, 8316 {0x92, 0, 0, 0, 0}, 8317 {0xFFFF, 0, 0, 0, 0} 8318}; 8319 8320static struct radio_regs regs_RX_2056[] = { 8321 {0x02, 0, 0, 0, 0}, 8322 {0x03, 0, 0, 0, 0}, 8323 {0x04, 0, 0, 0, 0}, 8324 {0x05, 0, 0, 0, 0}, 8325 {0x06, 0, 0, 0, 0}, 8326 {0x07, 0, 0, 0, 0}, 8327 {0x08, 0, 0, 0, 0}, 8328 {0x09, 0, 0, 0, 0}, 8329 {0x0A, 0, 0, 0, 0}, 8330 {0x0B, 0, 0, 0, 0}, 8331 {0x0C, 0, 0, 0, 0}, 8332 {0x0D, 0, 0, 0, 0}, 8333 {0x0E, 0, 0, 0, 0}, 8334 {0x0F, 0, 0, 0, 0}, 8335 {0x10, 0, 0, 0, 0}, 8336 {0x11, 0, 0, 0, 0}, 8337 {0x12, 0, 0, 0, 0}, 8338 {0x13, 0, 0, 0, 0}, 8339 {0x14, 0, 0, 0, 0}, 8340 {0x15, 0, 0, 0, 0}, 8341 {0x16, 0, 0, 0, 0}, 8342 {0x17, 0, 0, 0, 0}, 8343 {0x18, 0, 0, 0, 0}, 8344 {0x19, 0, 0, 0, 0}, 8345 {0x1A, 0, 0, 0, 0}, 8346 {0x1B, 0, 0, 0, 0}, 8347 {0x1C, 0, 0, 0, 0}, 8348 {0x1D, 0, 0, 0, 0}, 8349 {0x1E, 0, 0, 0, 0}, 8350 {0x1F, 0, 0, 0, 0}, 8351 {0x20, 0x3, 0x3, 0, 0}, 8352 {0x21, 0, 0, 0, 0}, 8353 {0x22, 0, 0, 0, 0}, 8354 {0x23, 0x90, 0x90, 0, 0}, 8355 {0x24, 0x55, 0x55, 0, 0}, 8356 {0x25, 0x15, 0x15, 0, 0}, 8357 {0x26, 0x5, 0x5, 0, 0}, 8358 {0x27, 0x15, 0x15, 0, 0}, 8359 {0x28, 0x5, 0x5, 0, 0}, 8360 {0x29, 0x20, 0x20, 0, 0}, 8361 {0x2A, 0x11, 0x11, 0, 0}, 8362 {0x2B, 0x90, 0x90, 0, 0}, 8363 {0x2C, 0, 0, 0, 0}, 8364 {0x2D, 0x88, 0x88, 0, 0}, 8365 {0x2E, 0x32, 0x32, 0, 0}, 8366 {0x2F, 0x77, 0x77, 0, 0}, 8367 {0x30, 0x17, 0x17, 1, 1}, 8368 {0x31, 0xff, 0xff, 1, 1}, 8369 {0x32, 0x20, 0x20, 0, 0}, 8370 {0x33, 0, 0, 0, 0}, 8371 {0x34, 0x88, 0x88, 0, 0}, 8372 {0x35, 0x32, 0x32, 0, 0}, 8373 {0x36, 0x77, 0x77, 0, 0}, 8374 {0x37, 0x17, 0x17, 1, 1}, 8375 {0x38, 0xf0, 0xf0, 1, 1}, 8376 {0x39, 0x20, 0x20, 0, 0}, 8377 {0x3A, 0x8, 0x8, 0, 0}, 8378 {0x3B, 0x99, 0x99, 0, 0}, 8379 {0x3C, 0, 0, 0, 0}, 8380 {0x3D, 0x44, 0x44, 1, 1}, 8381 {0x3E, 0, 0, 0, 0}, 8382 {0x3F, 0x44, 0x44, 0, 0}, 8383 {0x40, 0xf, 0xf, 1, 1}, 8384 {0x41, 0x6, 0x6, 0, 0}, 8385 {0x42, 0x4, 0x4, 0, 0}, 8386 {0x43, 0x50, 0x50, 1, 1}, 8387 {0x44, 0x8, 0x8, 0, 0}, 8388 {0x45, 0x99, 0x99, 0, 0}, 8389 {0x46, 0, 0, 0, 0}, 8390 {0x47, 0x11, 0x11, 0, 0}, 8391 {0x48, 0, 0, 0, 0}, 8392 {0x49, 0x44, 0x44, 0, 0}, 8393 {0x4A, 0x7, 0x7, 0, 0}, 8394 {0x4B, 0x6, 0x6, 0, 0}, 8395 {0x4C, 0x4, 0x4, 0, 0}, 8396 {0x4D, 0, 0, 0, 0}, 8397 {0x4E, 0, 0, 0, 0}, 8398 {0x4F, 0x66, 0x66, 0, 0}, 8399 {0x50, 0x66, 0x66, 0, 0}, 8400 {0x51, 0x57, 0x57, 0, 0}, 8401 {0x52, 0x57, 0x57, 0, 0}, 8402 {0x53, 0x44, 0x44, 0, 0}, 8403 {0x54, 0, 0, 0, 0}, 8404 {0x55, 0, 0, 0, 0}, 8405 {0x56, 0x8, 0x8, 0, 0}, 8406 {0x57, 0x8, 0x8, 0, 0}, 8407 {0x58, 0x7, 0x7, 0, 0}, 8408 {0x59, 0x22, 0x22, 0, 0}, 8409 {0x5A, 0x22, 0x22, 0, 0}, 8410 {0x5B, 0x2, 0x2, 0, 0}, 8411 {0x5C, 0x23, 0x23, 0, 0}, 8412 {0x5D, 0x7, 0x7, 0, 0}, 8413 {0x5E, 0x55, 0x55, 0, 0}, 8414 {0x5F, 0x23, 0x23, 0, 0}, 8415 {0x60, 0x41, 0x41, 0, 0}, 8416 {0x61, 0x1, 0x1, 0, 0}, 8417 {0x62, 0xa, 0xa, 0, 0}, 8418 {0x63, 0, 0, 0, 0}, 8419 {0x64, 0, 0, 0, 0}, 8420 {0x65, 0, 0, 0, 0}, 8421 {0x66, 0, 0, 0, 0}, 8422 {0x67, 0, 0, 0, 0}, 8423 {0x68, 0, 0, 0, 0}, 8424 {0x69, 0, 0, 0, 0}, 8425 {0x6A, 0, 0, 0, 0}, 8426 {0x6B, 0xc, 0xc, 0, 0}, 8427 {0x6C, 0, 0, 0, 0}, 8428 {0x6D, 0, 0, 0, 0}, 8429 {0x6E, 0, 0, 0, 0}, 8430 {0x6F, 0, 0, 0, 0}, 8431 {0x70, 0, 0, 0, 0}, 8432 {0x71, 0, 0, 0, 0}, 8433 {0x72, 0x22, 0x22, 0, 0}, 8434 {0x73, 0x22, 0x22, 0, 0}, 8435 {0x74, 0x2, 0x2, 0, 0}, 8436 {0x75, 0xa, 0xa, 0, 0}, 8437 {0x76, 0x1, 0x1, 0, 0}, 8438 {0x77, 0x22, 0x22, 0, 0}, 8439 {0x78, 0x30, 0x30, 0, 0}, 8440 {0x79, 0, 0, 0, 0}, 8441 {0x7A, 0, 0, 0, 0}, 8442 {0x7B, 0, 0, 0, 0}, 8443 {0x7C, 0, 0, 0, 0}, 8444 {0x7D, 0, 0, 0, 0}, 8445 {0x7E, 0, 0, 0, 0}, 8446 {0x7F, 0, 0, 0, 0}, 8447 {0x80, 0, 0, 0, 0}, 8448 {0x81, 0, 0, 0, 0}, 8449 {0x82, 0, 0, 0, 0}, 8450 {0x83, 0, 0, 0, 0}, 8451 {0x84, 0, 0, 0, 0}, 8452 {0x85, 0, 0, 0, 0}, 8453 {0x86, 0, 0, 0, 0}, 8454 {0x87, 0, 0, 0, 0}, 8455 {0x88, 0, 0, 0, 0}, 8456 {0x89, 0, 0, 0, 0}, 8457 {0x8A, 0, 0, 0, 0}, 8458 {0x8B, 0, 0, 0, 0}, 8459 {0x8C, 0, 0, 0, 0}, 8460 {0x8D, 0, 0, 0, 0}, 8461 {0x8E, 0, 0, 0, 0}, 8462 {0x8F, 0, 0, 0, 0}, 8463 {0x90, 0, 0, 0, 0}, 8464 {0x91, 0, 0, 0, 0}, 8465 {0x92, 0, 0, 0, 0}, 8466 {0x93, 0, 0, 0, 0}, 8467 {0x94, 0, 0, 0, 0}, 8468 {0xFFFF, 0, 0, 0, 0} 8469}; 8470 8471static struct radio_regs regs_SYN_2056_A1[] = { 8472 {0x02, 0, 0, 0, 0}, 8473 {0x03, 0, 0, 0, 0}, 8474 {0x04, 0, 0, 0, 0}, 8475 {0x05, 0, 0, 0, 0}, 8476 {0x06, 0, 0, 0, 0}, 8477 {0x07, 0, 0, 0, 0}, 8478 {0x08, 0, 0, 0, 0}, 8479 {0x09, 0x1, 0x1, 0, 0}, 8480 {0x0A, 0, 0, 0, 0}, 8481 {0x0B, 0, 0, 0, 0}, 8482 {0x0C, 0, 0, 0, 0}, 8483 {0x0D, 0, 0, 0, 0}, 8484 {0x0E, 0, 0, 0, 0}, 8485 {0x0F, 0, 0, 0, 0}, 8486 {0x10, 0, 0, 0, 0}, 8487 {0x11, 0, 0, 0, 0}, 8488 {0x12, 0, 0, 0, 0}, 8489 {0x13, 0, 0, 0, 0}, 8490 {0x14, 0, 0, 0, 0}, 8491 {0x15, 0, 0, 0, 0}, 8492 {0x16, 0, 0, 0, 0}, 8493 {0x17, 0, 0, 0, 0}, 8494 {0x18, 0, 0, 0, 0}, 8495 {0x19, 0, 0, 0, 0}, 8496 {0x1A, 0, 0, 0, 0}, 8497 {0x1B, 0, 0, 0, 0}, 8498 {0x1C, 0, 0, 0, 0}, 8499 {0x1D, 0, 0, 0, 0}, 8500 {0x1E, 0, 0, 0, 0}, 8501 {0x1F, 0, 0, 0, 0}, 8502 {0x20, 0, 0, 0, 0}, 8503 {0x21, 0, 0, 0, 0}, 8504 {0x22, 0x60, 0x60, 0, 0}, 8505 {0x23, 0x6, 0x6, 0, 0}, 8506 {0x24, 0xc, 0xc, 0, 0}, 8507 {0x25, 0, 0, 0, 0}, 8508 {0x26, 0, 0, 0, 0}, 8509 {0x27, 0, 0, 0, 0}, 8510 {0x28, 0x1, 0x1, 0, 0}, 8511 {0x29, 0, 0, 0, 0}, 8512 {0x2A, 0, 0, 0, 0}, 8513 {0x2B, 0, 0, 0, 0}, 8514 {0x2C, 0, 0, 0, 0}, 8515 {0x2D, 0, 0, 0, 0}, 8516 {0x2E, 0xd, 0xd, 0, 0}, 8517 {0x2F, 0x1f, 0x1f, 0, 0}, 8518 {0x30, 0x15, 0x15, 0, 0}, 8519 {0x31, 0xf, 0xf, 0, 0}, 8520 {0x32, 0, 0, 0, 0}, 8521 {0x33, 0, 0, 0, 0}, 8522 {0x34, 0, 0, 0, 0}, 8523 {0x35, 0, 0, 0, 0}, 8524 {0x36, 0, 0, 0, 0}, 8525 {0x37, 0, 0, 0, 0}, 8526 {0x38, 0, 0, 0, 0}, 8527 {0x39, 0, 0, 0, 0}, 8528 {0x3A, 0, 0, 0, 0}, 8529 {0x3B, 0, 0, 0, 0}, 8530 {0x3C, 0x13, 0x13, 0, 0}, 8531 {0x3D, 0xf, 0xf, 0, 0}, 8532 {0x3E, 0x18, 0x18, 0, 0}, 8533 {0x3F, 0, 0, 0, 0}, 8534 {0x40, 0, 0, 0, 0}, 8535 {0x41, 0x20, 0x20, 0, 0}, 8536 {0x42, 0x20, 0x20, 0, 0}, 8537 {0x43, 0, 0, 0, 0}, 8538 {0x44, 0x77, 0x77, 0, 0}, 8539 {0x45, 0x7, 0x7, 0, 0}, 8540 {0x46, 0x1, 0x1, 0, 0}, 8541 {0x47, 0x4, 0x4, 0, 0}, 8542 {0x48, 0xf, 0xf, 0, 0}, 8543 {0x49, 0x30, 0x30, 0, 0}, 8544 {0x4A, 0x32, 0x32, 0, 0}, 8545 {0x4B, 0xd, 0xd, 0, 0}, 8546 {0x4C, 0xd, 0xd, 0, 0}, 8547 {0x4D, 0x4, 0x4, 0, 0}, 8548 {0x4E, 0x6, 0x6, 0, 0}, 8549 {0x4F, 0x1, 0x1, 0, 0}, 8550 {0x50, 0x1c, 0x1c, 0, 0}, 8551 {0x51, 0x2, 0x2, 0, 0}, 8552 {0x52, 0x2, 0x2, 0, 0}, 8553 {0x53, 0xf7, 0xf7, 1, 1}, 8554 {0x54, 0xb4, 0xb4, 0, 0}, 8555 {0x55, 0xd2, 0xd2, 0, 0}, 8556 {0x56, 0, 0, 0, 0}, 8557 {0x57, 0, 0, 0, 0}, 8558 {0x58, 0x4, 0x4, 0, 0}, 8559 {0x59, 0x96, 0x96, 0, 0}, 8560 {0x5A, 0x3e, 0x3e, 0, 0}, 8561 {0x5B, 0x3e, 0x3e, 0, 0}, 8562 {0x5C, 0x13, 0x13, 0, 0}, 8563 {0x5D, 0x2, 0x2, 0, 0}, 8564 {0x5E, 0, 0, 0, 0}, 8565 {0x5F, 0x7, 0x7, 0, 0}, 8566 {0x60, 0x7, 0x7, 1, 1}, 8567 {0x61, 0x8, 0x8, 0, 0}, 8568 {0x62, 0x3, 0x3, 0, 0}, 8569 {0x63, 0, 0, 0, 0}, 8570 {0x64, 0, 0, 0, 0}, 8571 {0x65, 0, 0, 0, 0}, 8572 {0x66, 0, 0, 0, 0}, 8573 {0x67, 0, 0, 0, 0}, 8574 {0x68, 0x40, 0x40, 0, 0}, 8575 {0x69, 0, 0, 0, 0}, 8576 {0x6A, 0, 0, 0, 0}, 8577 {0x6B, 0, 0, 0, 0}, 8578 {0x6C, 0, 0, 0, 0}, 8579 {0x6D, 0x1, 0x1, 0, 0}, 8580 {0x6E, 0, 0, 0, 0}, 8581 {0x6F, 0, 0, 0, 0}, 8582 {0x70, 0x60, 0x60, 0, 0}, 8583 {0x71, 0x66, 0x66, 0, 0}, 8584 {0x72, 0xc, 0xc, 0, 0}, 8585 {0x73, 0x66, 0x66, 0, 0}, 8586 {0x74, 0x8f, 0x8f, 1, 1}, 8587 {0x75, 0, 0, 0, 0}, 8588 {0x76, 0xcc, 0xcc, 0, 0}, 8589 {0x77, 0x1, 0x1, 0, 0}, 8590 {0x78, 0x66, 0x66, 0, 0}, 8591 {0x79, 0x66, 0x66, 0, 0}, 8592 {0x7A, 0, 0, 0, 0}, 8593 {0x7B, 0, 0, 0, 0}, 8594 {0x7C, 0, 0, 0, 0}, 8595 {0x7D, 0, 0, 0, 0}, 8596 {0x7E, 0, 0, 0, 0}, 8597 {0x7F, 0, 0, 0, 0}, 8598 {0x80, 0, 0, 0, 0}, 8599 {0x81, 0, 0, 0, 0}, 8600 {0x82, 0, 0, 0, 0}, 8601 {0x83, 0, 0, 0, 0}, 8602 {0x84, 0, 0, 0, 0}, 8603 {0x85, 0xff, 0xff, 0, 0}, 8604 {0x86, 0, 0, 0, 0}, 8605 {0x87, 0, 0, 0, 0}, 8606 {0x88, 0, 0, 0, 0}, 8607 {0x89, 0, 0, 0, 0}, 8608 {0x8A, 0, 0, 0, 0}, 8609 {0x8B, 0, 0, 0, 0}, 8610 {0x8C, 0, 0, 0, 0}, 8611 {0x8D, 0, 0, 0, 0}, 8612 {0x8E, 0, 0, 0, 0}, 8613 {0x8F, 0, 0, 0, 0}, 8614 {0x90, 0, 0, 0, 0}, 8615 {0x91, 0, 0, 0, 0}, 8616 {0x92, 0, 0, 0, 0}, 8617 {0x93, 0, 0, 0, 0}, 8618 {0x94, 0, 0, 0, 0}, 8619 {0x95, 0, 0, 0, 0}, 8620 {0x96, 0, 0, 0, 0}, 8621 {0x97, 0, 0, 0, 0}, 8622 {0x98, 0, 0, 0, 0}, 8623 {0x99, 0, 0, 0, 0}, 8624 {0x9A, 0, 0, 0, 0}, 8625 {0x9B, 0, 0, 0, 0}, 8626 {0x9C, 0, 0, 0, 0}, 8627 {0x9D, 0, 0, 0, 0}, 8628 {0x9E, 0, 0, 0, 0}, 8629 {0x9F, 0x6, 0x6, 0, 0}, 8630 {0xA0, 0x66, 0x66, 0, 0}, 8631 {0xA1, 0x66, 0x66, 0, 0}, 8632 {0xA2, 0x66, 0x66, 0, 0}, 8633 {0xA3, 0x66, 0x66, 0, 0}, 8634 {0xA4, 0x66, 0x66, 0, 0}, 8635 {0xA5, 0x66, 0x66, 0, 0}, 8636 {0xA6, 0x66, 0x66, 0, 0}, 8637 {0xA7, 0x66, 0x66, 0, 0}, 8638 {0xA8, 0x66, 0x66, 0, 0}, 8639 {0xA9, 0x66, 0x66, 0, 0}, 8640 {0xAA, 0x66, 0x66, 0, 0}, 8641 {0xAB, 0x66, 0x66, 0, 0}, 8642 {0xAC, 0x66, 0x66, 0, 0}, 8643 {0xAD, 0x66, 0x66, 0, 0}, 8644 {0xAE, 0x66, 0x66, 0, 0}, 8645 {0xAF, 0x66, 0x66, 0, 0}, 8646 {0xB0, 0x66, 0x66, 0, 0}, 8647 {0xB1, 0x66, 0x66, 0, 0}, 8648 {0xB2, 0x66, 0x66, 0, 0}, 8649 {0xB3, 0xa, 0xa, 0, 0}, 8650 {0xB4, 0, 0, 0, 0}, 8651 {0xB5, 0, 0, 0, 0}, 8652 {0xB6, 0, 0, 0, 0}, 8653 {0xFFFF, 0, 0, 0, 0} 8654}; 8655 8656static struct radio_regs regs_TX_2056_A1[] = { 8657 {0x02, 0, 0, 0, 0}, 8658 {0x03, 0, 0, 0, 0}, 8659 {0x04, 0, 0, 0, 0}, 8660 {0x05, 0, 0, 0, 0}, 8661 {0x06, 0, 0, 0, 0}, 8662 {0x07, 0, 0, 0, 0}, 8663 {0x08, 0, 0, 0, 0}, 8664 {0x09, 0, 0, 0, 0}, 8665 {0x0A, 0, 0, 0, 0}, 8666 {0x0B, 0, 0, 0, 0}, 8667 {0x0C, 0, 0, 0, 0}, 8668 {0x0D, 0, 0, 0, 0}, 8669 {0x0E, 0, 0, 0, 0}, 8670 {0x0F, 0, 0, 0, 0}, 8671 {0x10, 0, 0, 0, 0}, 8672 {0x11, 0, 0, 0, 0}, 8673 {0x12, 0, 0, 0, 0}, 8674 {0x13, 0, 0, 0, 0}, 8675 {0x14, 0, 0, 0, 0}, 8676 {0x15, 0, 0, 0, 0}, 8677 {0x16, 0, 0, 0, 0}, 8678 {0x17, 0, 0, 0, 0}, 8679 {0x18, 0, 0, 0, 0}, 8680 {0x19, 0, 0, 0, 0}, 8681 {0x1A, 0, 0, 0, 0}, 8682 {0x1B, 0, 0, 0, 0}, 8683 {0x1C, 0, 0, 0, 0}, 8684 {0x1D, 0, 0, 0, 0}, 8685 {0x1E, 0, 0, 0, 0}, 8686 {0x1F, 0, 0, 0, 0}, 8687 {0x20, 0, 0, 0, 0}, 8688 {0x21, 0x88, 0x88, 0, 0}, 8689 {0x22, 0x88, 0x88, 0, 0}, 8690 {0x23, 0x88, 0x88, 0, 0}, 8691 {0x24, 0x88, 0x88, 0, 0}, 8692 {0x25, 0xc, 0xc, 0, 0}, 8693 {0x26, 0, 0, 0, 0}, 8694 {0x27, 0x3, 0x3, 0, 0}, 8695 {0x28, 0, 0, 0, 0}, 8696 {0x29, 0x3, 0x3, 0, 0}, 8697 {0x2A, 0x37, 0x37, 0, 0}, 8698 {0x2B, 0x3, 0x3, 0, 0}, 8699 {0x2C, 0, 0, 0, 0}, 8700 {0x2D, 0, 0, 0, 0}, 8701 {0x2E, 0x1, 0x1, 0, 0}, 8702 {0x2F, 0x1, 0x1, 0, 0}, 8703 {0x30, 0, 0, 0, 0}, 8704 {0x31, 0, 0, 0, 0}, 8705 {0x32, 0, 0, 0, 0}, 8706 {0x33, 0x11, 0x11, 0, 0}, 8707 {0x34, 0x11, 0x11, 0, 0}, 8708 {0x35, 0, 0, 0, 0}, 8709 {0x36, 0, 0, 0, 0}, 8710 {0x37, 0x3, 0x3, 0, 0}, 8711 {0x38, 0xf, 0xf, 0, 0}, 8712 {0x39, 0, 0, 0, 0}, 8713 {0x3A, 0x2d, 0x2d, 0, 0}, 8714 {0x3B, 0, 0, 0, 0}, 8715 {0x3C, 0x6e, 0x6e, 0, 0}, 8716 {0x3D, 0xf0, 0xf0, 1, 1}, 8717 {0x3E, 0, 0, 0, 0}, 8718 {0x3F, 0, 0, 0, 0}, 8719 {0x40, 0, 0, 0, 0}, 8720 {0x41, 0x3, 0x3, 0, 0}, 8721 {0x42, 0x3, 0x3, 0, 0}, 8722 {0x43, 0, 0, 0, 0}, 8723 {0x44, 0x1e, 0x1e, 0, 0}, 8724 {0x45, 0, 0, 0, 0}, 8725 {0x46, 0x6e, 0x6e, 0, 0}, 8726 {0x47, 0xf0, 0xf0, 1, 1}, 8727 {0x48, 0, 0, 0, 0}, 8728 {0x49, 0x2, 0x2, 0, 0}, 8729 {0x4A, 0xff, 0xff, 1, 1}, 8730 {0x4B, 0xc, 0xc, 0, 0}, 8731 {0x4C, 0, 0, 0, 0}, 8732 {0x4D, 0x38, 0x38, 0, 0}, 8733 {0x4E, 0x70, 0x70, 1, 1}, 8734 {0x4F, 0x2, 0x2, 0, 0}, 8735 {0x50, 0x88, 0x88, 0, 0}, 8736 {0x51, 0xc, 0xc, 0, 0}, 8737 {0x52, 0, 0, 0, 0}, 8738 {0x53, 0x8, 0x8, 0, 0}, 8739 {0x54, 0x70, 0x70, 1, 1}, 8740 {0x55, 0x2, 0x2, 0, 0}, 8741 {0x56, 0xff, 0xff, 1, 1}, 8742 {0x57, 0, 0, 0, 0}, 8743 {0x58, 0x83, 0x83, 0, 0}, 8744 {0x59, 0x77, 0x77, 1, 1}, 8745 {0x5A, 0, 0, 0, 0}, 8746 {0x5B, 0x2, 0x2, 0, 0}, 8747 {0x5C, 0x88, 0x88, 0, 0}, 8748 {0x5D, 0, 0, 0, 0}, 8749 {0x5E, 0x8, 0x8, 0, 0}, 8750 {0x5F, 0x77, 0x77, 1, 1}, 8751 {0x60, 0x1, 0x1, 0, 0}, 8752 {0x61, 0, 0, 0, 0}, 8753 {0x62, 0x7, 0x7, 0, 0}, 8754 {0x63, 0, 0, 0, 0}, 8755 {0x64, 0x7, 0x7, 0, 0}, 8756 {0x65, 0, 0, 0, 0}, 8757 {0x66, 0, 0, 0, 0}, 8758 {0x67, 0x72, 0x72, 1, 1}, 8759 {0x68, 0, 0, 0, 0}, 8760 {0x69, 0xa, 0xa, 0, 0}, 8761 {0x6A, 0, 0, 0, 0}, 8762 {0x6B, 0, 0, 0, 0}, 8763 {0x6C, 0, 0, 0, 0}, 8764 {0x6D, 0, 0, 0, 0}, 8765 {0x6E, 0, 0, 0, 0}, 8766 {0x6F, 0, 0, 0, 0}, 8767 {0x70, 0, 0, 0, 0}, 8768 {0x71, 0x2, 0x2, 0, 0}, 8769 {0x72, 0, 0, 0, 0}, 8770 {0x73, 0, 0, 0, 0}, 8771 {0x74, 0xe, 0xe, 0, 0}, 8772 {0x75, 0xe, 0xe, 0, 0}, 8773 {0x76, 0xe, 0xe, 0, 0}, 8774 {0x77, 0x13, 0x13, 0, 0}, 8775 {0x78, 0x13, 0x13, 0, 0}, 8776 {0x79, 0x1b, 0x1b, 0, 0}, 8777 {0x7A, 0x1b, 0x1b, 0, 0}, 8778 {0x7B, 0x55, 0x55, 0, 0}, 8779 {0x7C, 0x5b, 0x5b, 0, 0}, 8780 {0x7D, 0, 0, 0, 0}, 8781 {0x7E, 0, 0, 0, 0}, 8782 {0x7F, 0, 0, 0, 0}, 8783 {0x80, 0, 0, 0, 0}, 8784 {0x81, 0, 0, 0, 0}, 8785 {0x82, 0, 0, 0, 0}, 8786 {0x83, 0, 0, 0, 0}, 8787 {0x84, 0, 0, 0, 0}, 8788 {0x85, 0, 0, 0, 0}, 8789 {0x86, 0, 0, 0, 0}, 8790 {0x87, 0, 0, 0, 0}, 8791 {0x88, 0, 0, 0, 0}, 8792 {0x89, 0, 0, 0, 0}, 8793 {0x8A, 0, 0, 0, 0}, 8794 {0x8B, 0, 0, 0, 0}, 8795 {0x8C, 0, 0, 0, 0}, 8796 {0x8D, 0, 0, 0, 0}, 8797 {0x8E, 0, 0, 0, 0}, 8798 {0x8F, 0, 0, 0, 0}, 8799 {0x90, 0, 0, 0, 0}, 8800 {0x91, 0, 0, 0, 0}, 8801 {0x92, 0, 0, 0, 0}, 8802 {0xFFFF, 0, 0, 0, 0} 8803}; 8804 8805static struct radio_regs regs_RX_2056_A1[] = { 8806 {0x02, 0, 0, 0, 0}, 8807 {0x03, 0, 0, 0, 0}, 8808 {0x04, 0, 0, 0, 0}, 8809 {0x05, 0, 0, 0, 0}, 8810 {0x06, 0, 0, 0, 0}, 8811 {0x07, 0, 0, 0, 0}, 8812 {0x08, 0, 0, 0, 0}, 8813 {0x09, 0, 0, 0, 0}, 8814 {0x0A, 0, 0, 0, 0}, 8815 {0x0B, 0, 0, 0, 0}, 8816 {0x0C, 0, 0, 0, 0}, 8817 {0x0D, 0, 0, 0, 0}, 8818 {0x0E, 0, 0, 0, 0}, 8819 {0x0F, 0, 0, 0, 0}, 8820 {0x10, 0, 0, 0, 0}, 8821 {0x11, 0, 0, 0, 0}, 8822 {0x12, 0, 0, 0, 0}, 8823 {0x13, 0, 0, 0, 0}, 8824 {0x14, 0, 0, 0, 0}, 8825 {0x15, 0, 0, 0, 0}, 8826 {0x16, 0, 0, 0, 0}, 8827 {0x17, 0, 0, 0, 0}, 8828 {0x18, 0, 0, 0, 0}, 8829 {0x19, 0, 0, 0, 0}, 8830 {0x1A, 0, 0, 0, 0}, 8831 {0x1B, 0, 0, 0, 0}, 8832 {0x1C, 0, 0, 0, 0}, 8833 {0x1D, 0, 0, 0, 0}, 8834 {0x1E, 0, 0, 0, 0}, 8835 {0x1F, 0, 0, 0, 0}, 8836 {0x20, 0x3, 0x3, 0, 0}, 8837 {0x21, 0, 0, 0, 0}, 8838 {0x22, 0, 0, 0, 0}, 8839 {0x23, 0x90, 0x90, 0, 0}, 8840 {0x24, 0x55, 0x55, 0, 0}, 8841 {0x25, 0x15, 0x15, 0, 0}, 8842 {0x26, 0x5, 0x5, 0, 0}, 8843 {0x27, 0x15, 0x15, 0, 0}, 8844 {0x28, 0x5, 0x5, 0, 0}, 8845 {0x29, 0x20, 0x20, 0, 0}, 8846 {0x2A, 0x11, 0x11, 0, 0}, 8847 {0x2B, 0x90, 0x90, 0, 0}, 8848 {0x2C, 0, 0, 0, 0}, 8849 {0x2D, 0x88, 0x88, 0, 0}, 8850 {0x2E, 0x32, 0x32, 0, 0}, 8851 {0x2F, 0x77, 0x77, 0, 0}, 8852 {0x30, 0x17, 0x17, 1, 1}, 8853 {0x31, 0xff, 0xff, 1, 1}, 8854 {0x32, 0x20, 0x20, 0, 0}, 8855 {0x33, 0, 0, 0, 0}, 8856 {0x34, 0x88, 0x88, 0, 0}, 8857 {0x35, 0x32, 0x32, 0, 0}, 8858 {0x36, 0x77, 0x77, 0, 0}, 8859 {0x37, 0x17, 0x17, 1, 1}, 8860 {0x38, 0xf0, 0xf0, 1, 1}, 8861 {0x39, 0x20, 0x20, 0, 0}, 8862 {0x3A, 0x8, 0x8, 0, 0}, 8863 {0x3B, 0x55, 0x55, 1, 1}, 8864 {0x3C, 0, 0, 0, 0}, 8865 {0x3D, 0x44, 0x44, 1, 1}, 8866 {0x3E, 0, 0, 0, 0}, 8867 {0x3F, 0x44, 0x44, 0, 0}, 8868 {0x40, 0xf, 0xf, 1, 1}, 8869 {0x41, 0x6, 0x6, 0, 0}, 8870 {0x42, 0x4, 0x4, 0, 0}, 8871 {0x43, 0x50, 0x50, 1, 1}, 8872 {0x44, 0x8, 0x8, 0, 0}, 8873 {0x45, 0x55, 0x55, 1, 1}, 8874 {0x46, 0, 0, 0, 0}, 8875 {0x47, 0x11, 0x11, 0, 0}, 8876 {0x48, 0, 0, 0, 0}, 8877 {0x49, 0x44, 0x44, 0, 0}, 8878 {0x4A, 0x7, 0x7, 0, 0}, 8879 {0x4B, 0x6, 0x6, 0, 0}, 8880 {0x4C, 0x4, 0x4, 0, 0}, 8881 {0x4D, 0, 0, 0, 0}, 8882 {0x4E, 0, 0, 0, 0}, 8883 {0x4F, 0x26, 0x26, 1, 1}, 8884 {0x50, 0x26, 0x26, 1, 1}, 8885 {0x51, 0xf, 0xf, 1, 1}, 8886 {0x52, 0xf, 0xf, 1, 1}, 8887 {0x53, 0x44, 0x44, 0, 0}, 8888 {0x54, 0, 0, 0, 0}, 8889 {0x55, 0, 0, 0, 0}, 8890 {0x56, 0x8, 0x8, 0, 0}, 8891 {0x57, 0x8, 0x8, 0, 0}, 8892 {0x58, 0x7, 0x7, 0, 0}, 8893 {0x59, 0x22, 0x22, 0, 0}, 8894 {0x5A, 0x22, 0x22, 0, 0}, 8895 {0x5B, 0x2, 0x2, 0, 0}, 8896 {0x5C, 0x2f, 0x2f, 1, 1}, 8897 {0x5D, 0x7, 0x7, 0, 0}, 8898 {0x5E, 0x55, 0x55, 0, 0}, 8899 {0x5F, 0x23, 0x23, 0, 0}, 8900 {0x60, 0x41, 0x41, 0, 0}, 8901 {0x61, 0x1, 0x1, 0, 0}, 8902 {0x62, 0xa, 0xa, 0, 0}, 8903 {0x63, 0, 0, 0, 0}, 8904 {0x64, 0, 0, 0, 0}, 8905 {0x65, 0, 0, 0, 0}, 8906 {0x66, 0, 0, 0, 0}, 8907 {0x67, 0, 0, 0, 0}, 8908 {0x68, 0, 0, 0, 0}, 8909 {0x69, 0, 0, 0, 0}, 8910 {0x6A, 0, 0, 0, 0}, 8911 {0x6B, 0xc, 0xc, 0, 0}, 8912 {0x6C, 0, 0, 0, 0}, 8913 {0x6D, 0, 0, 0, 0}, 8914 {0x6E, 0, 0, 0, 0}, 8915 {0x6F, 0, 0, 0, 0}, 8916 {0x70, 0, 0, 0, 0}, 8917 {0x71, 0, 0, 0, 0}, 8918 {0x72, 0x22, 0x22, 0, 0}, 8919 {0x73, 0x22, 0x22, 0, 0}, 8920 {0x74, 0, 0, 1, 1}, 8921 {0x75, 0xa, 0xa, 0, 0}, 8922 {0x76, 0x1, 0x1, 0, 0}, 8923 {0x77, 0x22, 0x22, 0, 0}, 8924 {0x78, 0x30, 0x30, 0, 0}, 8925 {0x79, 0, 0, 0, 0}, 8926 {0x7A, 0, 0, 0, 0}, 8927 {0x7B, 0, 0, 0, 0}, 8928 {0x7C, 0, 0, 0, 0}, 8929 {0x7D, 0, 0, 0, 0}, 8930 {0x7E, 0, 0, 0, 0}, 8931 {0x7F, 0, 0, 0, 0}, 8932 {0x80, 0, 0, 0, 0}, 8933 {0x81, 0, 0, 0, 0}, 8934 {0x82, 0, 0, 0, 0}, 8935 {0x83, 0, 0, 0, 0}, 8936 {0x84, 0, 0, 0, 0}, 8937 {0x85, 0, 0, 0, 0}, 8938 {0x86, 0, 0, 0, 0}, 8939 {0x87, 0, 0, 0, 0}, 8940 {0x88, 0, 0, 0, 0}, 8941 {0x89, 0, 0, 0, 0}, 8942 {0x8A, 0, 0, 0, 0}, 8943 {0x8B, 0, 0, 0, 0}, 8944 {0x8C, 0, 0, 0, 0}, 8945 {0x8D, 0, 0, 0, 0}, 8946 {0x8E, 0, 0, 0, 0}, 8947 {0x8F, 0, 0, 0, 0}, 8948 {0x90, 0, 0, 0, 0}, 8949 {0x91, 0, 0, 0, 0}, 8950 {0x92, 0, 0, 0, 0}, 8951 {0x93, 0, 0, 0, 0}, 8952 {0x94, 0, 0, 0, 0}, 8953 {0xFFFF, 0, 0, 0, 0} 8954}; 8955 8956static struct radio_regs regs_SYN_2056_rev5[] = { 8957 {0x02, 0, 0, 0, 0}, 8958 {0x03, 0, 0, 0, 0}, 8959 {0x04, 0, 0, 0, 0}, 8960 {0x05, 0, 0, 0, 0}, 8961 {0x06, 0, 0, 0, 0}, 8962 {0x07, 0, 0, 0, 0}, 8963 {0x08, 0, 0, 0, 0}, 8964 {0x09, 0x1, 0x1, 0, 0}, 8965 {0x0A, 0, 0, 0, 0}, 8966 {0x0B, 0, 0, 0, 0}, 8967 {0x0C, 0, 0, 0, 0}, 8968 {0x0D, 0, 0, 0, 0}, 8969 {0x0E, 0, 0, 0, 0}, 8970 {0x0F, 0, 0, 0, 0}, 8971 {0x10, 0, 0, 0, 0}, 8972 {0x11, 0, 0, 0, 0}, 8973 {0x12, 0, 0, 0, 0}, 8974 {0x13, 0, 0, 0, 0}, 8975 {0x14, 0, 0, 0, 0}, 8976 {0x15, 0, 0, 0, 0}, 8977 {0x16, 0, 0, 0, 0}, 8978 {0x17, 0, 0, 0, 0}, 8979 {0x18, 0, 0, 0, 0}, 8980 {0x19, 0, 0, 0, 0}, 8981 {0x1A, 0, 0, 0, 0}, 8982 {0x1B, 0, 0, 0, 0}, 8983 {0x1C, 0, 0, 0, 0}, 8984 {0x1D, 0, 0, 0, 0}, 8985 {0x1E, 0, 0, 0, 0}, 8986 {0x1F, 0, 0, 0, 0}, 8987 {0x20, 0, 0, 0, 0}, 8988 {0x21, 0, 0, 0, 0}, 8989 {0x22, 0x60, 0x60, 0, 0}, 8990 {0x23, 0x6, 0x6, 0, 0}, 8991 {0x24, 0xc, 0xc, 0, 0}, 8992 {0x25, 0, 0, 0, 0}, 8993 {0x26, 0, 0, 0, 0}, 8994 {0x27, 0, 0, 0, 0}, 8995 {0x28, 0x1, 0x1, 0, 0}, 8996 {0x29, 0, 0, 0, 0}, 8997 {0x2A, 0, 0, 0, 0}, 8998 {0x2B, 0, 0, 0, 0}, 8999 {0x2C, 0, 0, 0, 0}, 9000 {0x2D, 0, 0, 0, 0}, 9001 {0x2E, 0, 0, 0, 0}, 9002 {0x2F, 0x1f, 0x1f, 0, 0}, 9003 {0x30, 0x15, 0x15, 0, 0}, 9004 {0x31, 0xf, 0xf, 0, 0}, 9005 {0x32, 0, 0, 0, 0}, 9006 {0x33, 0, 0, 0, 0}, 9007 {0x34, 0, 0, 0, 0}, 9008 {0x35, 0, 0, 0, 0}, 9009 {0x36, 0, 0, 0, 0}, 9010 {0x37, 0, 0, 0, 0}, 9011 {0x38, 0, 0, 0, 0}, 9012 {0x39, 0, 0, 0, 0}, 9013 {0x3A, 0, 0, 0, 0}, 9014 {0x3B, 0, 0, 0, 0}, 9015 {0x3C, 0x13, 0x13, 0, 0}, 9016 {0x3D, 0xf, 0xf, 0, 0}, 9017 {0x3E, 0x18, 0x18, 0, 0}, 9018 {0x3F, 0, 0, 0, 0}, 9019 {0x40, 0, 0, 0, 0}, 9020 {0x41, 0x20, 0x20, 0, 0}, 9021 {0x42, 0x20, 0x20, 0, 0}, 9022 {0x43, 0, 0, 0, 0}, 9023 {0x44, 0x77, 0x77, 0, 0}, 9024 {0x45, 0x7, 0x7, 0, 0}, 9025 {0x46, 0x1, 0x1, 0, 0}, 9026 {0x47, 0x4, 0x4, 0, 0}, 9027 {0x48, 0xf, 0xf, 0, 0}, 9028 {0x49, 0x30, 0x30, 0, 0}, 9029 {0x4A, 0x32, 0x32, 0, 0}, 9030 {0x4B, 0xd, 0xd, 0, 0}, 9031 {0x4C, 0xd, 0xd, 0, 0}, 9032 {0x4D, 0x4, 0x4, 0, 0}, 9033 {0x4E, 0x6, 0x6, 0, 0}, 9034 {0x4F, 0x1, 0x1, 0, 0}, 9035 {0x50, 0x1c, 0x1c, 0, 0}, 9036 {0x51, 0x2, 0x2, 0, 0}, 9037 {0x52, 0x2, 0x2, 0, 0}, 9038 {0x53, 0xf7, 0xf7, 1, 1}, 9039 {0x54, 0xb4, 0xb4, 0, 0}, 9040 {0x55, 0xd2, 0xd2, 0, 0}, 9041 {0x56, 0, 0, 0, 0}, 9042 {0x57, 0, 0, 0, 0}, 9043 {0x58, 0x4, 0x4, 0, 0}, 9044 {0x59, 0x96, 0x96, 0, 0}, 9045 {0x5A, 0x3e, 0x3e, 0, 0}, 9046 {0x5B, 0x3e, 0x3e, 0, 0}, 9047 {0x5C, 0x13, 0x13, 0, 0}, 9048 {0x5D, 0x2, 0x2, 0, 0}, 9049 {0x5E, 0, 0, 0, 0}, 9050 {0x5F, 0x7, 0x7, 0, 0}, 9051 {0x60, 0x7, 0x7, 1, 1}, 9052 {0x61, 0x8, 0x8, 0, 0}, 9053 {0x62, 0x3, 0x3, 0, 0}, 9054 {0x63, 0, 0, 0, 0}, 9055 {0x64, 0, 0, 0, 0}, 9056 {0x65, 0, 0, 0, 0}, 9057 {0x66, 0, 0, 0, 0}, 9058 {0x67, 0, 0, 0, 0}, 9059 {0x68, 0x40, 0x40, 0, 0}, 9060 {0x69, 0, 0, 0, 0}, 9061 {0x6A, 0, 0, 0, 0}, 9062 {0x6B, 0, 0, 0, 0}, 9063 {0x6C, 0, 0, 0, 0}, 9064 {0x6D, 0x1, 0x1, 0, 0}, 9065 {0x6E, 0, 0, 0, 0}, 9066 {0x6F, 0, 0, 0, 0}, 9067 {0x70, 0x60, 0x60, 0, 0}, 9068 {0x71, 0x66, 0x66, 0, 0}, 9069 {0x72, 0xc, 0xc, 0, 0}, 9070 {0x73, 0x66, 0x66, 0, 0}, 9071 {0x74, 0x8f, 0x8f, 1, 1}, 9072 {0x75, 0, 0, 0, 0}, 9073 {0x76, 0xcc, 0xcc, 0, 0}, 9074 {0x77, 0x1, 0x1, 0, 0}, 9075 {0x78, 0x66, 0x66, 0, 0}, 9076 {0x79, 0x66, 0x66, 0, 0}, 9077 {0x7A, 0, 0, 0, 0}, 9078 {0x7B, 0, 0, 0, 0}, 9079 {0x7C, 0, 0, 0, 0}, 9080 {0x7D, 0, 0, 0, 0}, 9081 {0x7E, 0, 0, 0, 0}, 9082 {0x7F, 0, 0, 0, 0}, 9083 {0x80, 0, 0, 0, 0}, 9084 {0x81, 0, 0, 0, 0}, 9085 {0x82, 0, 0, 0, 0}, 9086 {0x83, 0, 0, 0, 0}, 9087 {0x84, 0, 0, 0, 0}, 9088 {0x85, 0xff, 0xff, 0, 0}, 9089 {0x86, 0, 0, 0, 0}, 9090 {0x87, 0, 0, 0, 0}, 9091 {0x88, 0, 0, 0, 0}, 9092 {0x89, 0, 0, 0, 0}, 9093 {0x8A, 0, 0, 0, 0}, 9094 {0x8B, 0, 0, 0, 0}, 9095 {0x8C, 0, 0, 0, 0}, 9096 {0x8D, 0, 0, 0, 0}, 9097 {0x8E, 0, 0, 0, 0}, 9098 {0x8F, 0, 0, 0, 0}, 9099 {0x90, 0, 0, 0, 0}, 9100 {0x91, 0, 0, 0, 0}, 9101 {0x92, 0, 0, 0, 0}, 9102 {0x93, 0, 0, 0, 0}, 9103 {0x94, 0, 0, 0, 0}, 9104 {0x95, 0, 0, 0, 0}, 9105 {0x96, 0, 0, 0, 0}, 9106 {0x97, 0, 0, 0, 0}, 9107 {0x98, 0, 0, 0, 0}, 9108 {0x99, 0, 0, 0, 0}, 9109 {0x9A, 0, 0, 0, 0}, 9110 {0x9B, 0, 0, 0, 0}, 9111 {0x9C, 0, 0, 0, 0}, 9112 {0x9D, 0, 0, 0, 0}, 9113 {0x9E, 0, 0, 0, 0}, 9114 {0x9F, 0x6, 0x6, 0, 0}, 9115 {0xA0, 0x66, 0x66, 0, 0}, 9116 {0xA1, 0x66, 0x66, 0, 0}, 9117 {0xA2, 0x66, 0x66, 0, 0}, 9118 {0xA3, 0x66, 0x66, 0, 0}, 9119 {0xA4, 0x66, 0x66, 0, 0}, 9120 {0xA5, 0x66, 0x66, 0, 0}, 9121 {0xA6, 0x66, 0x66, 0, 0}, 9122 {0xA7, 0x66, 0x66, 0, 0}, 9123 {0xA8, 0x66, 0x66, 0, 0}, 9124 {0xA9, 0x66, 0x66, 0, 0}, 9125 {0xAA, 0x66, 0x66, 0, 0}, 9126 {0xAB, 0x66, 0x66, 0, 0}, 9127 {0xAC, 0x66, 0x66, 0, 0}, 9128 {0xAD, 0x66, 0x66, 0, 0}, 9129 {0xAE, 0x66, 0x66, 0, 0}, 9130 {0xAF, 0x66, 0x66, 0, 0}, 9131 {0xB0, 0x66, 0x66, 0, 0}, 9132 {0xB1, 0x66, 0x66, 0, 0}, 9133 {0xB2, 0x66, 0x66, 0, 0}, 9134 {0xB3, 0xa, 0xa, 0, 0}, 9135 {0xB4, 0, 0, 0, 0}, 9136 {0xB5, 0, 0, 0, 0}, 9137 {0xB6, 0, 0, 0, 0}, 9138 {0xFFFF, 0, 0, 0, 0} 9139}; 9140 9141static struct radio_regs regs_TX_2056_rev5[] = { 9142 {0x02, 0, 0, 0, 0}, 9143 {0x03, 0, 0, 0, 0}, 9144 {0x04, 0, 0, 0, 0}, 9145 {0x05, 0, 0, 0, 0}, 9146 {0x06, 0, 0, 0, 0}, 9147 {0x07, 0, 0, 0, 0}, 9148 {0x08, 0, 0, 0, 0}, 9149 {0x09, 0, 0, 0, 0}, 9150 {0x0A, 0, 0, 0, 0}, 9151 {0x0B, 0, 0, 0, 0}, 9152 {0x0C, 0, 0, 0, 0}, 9153 {0x0D, 0, 0, 0, 0}, 9154 {0x0E, 0, 0, 0, 0}, 9155 {0x0F, 0, 0, 0, 0}, 9156 {0x10, 0, 0, 0, 0}, 9157 {0x11, 0, 0, 0, 0}, 9158 {0x12, 0, 0, 0, 0}, 9159 {0x13, 0, 0, 0, 0}, 9160 {0x14, 0, 0, 0, 0}, 9161 {0x15, 0, 0, 0, 0}, 9162 {0x16, 0, 0, 0, 0}, 9163 {0x17, 0, 0, 0, 0}, 9164 {0x18, 0, 0, 0, 0}, 9165 {0x19, 0, 0, 0, 0}, 9166 {0x1A, 0, 0, 0, 0}, 9167 {0x1B, 0, 0, 0, 0}, 9168 {0x1C, 0, 0, 0, 0}, 9169 {0x1D, 0, 0, 0, 0}, 9170 {0x1E, 0, 0, 0, 0}, 9171 {0x1F, 0, 0, 0, 0}, 9172 {0x20, 0, 0, 0, 0}, 9173 {0x21, 0x88, 0x88, 0, 0}, 9174 {0x22, 0x88, 0x88, 0, 0}, 9175 {0x23, 0x88, 0x88, 0, 0}, 9176 {0x24, 0x88, 0x88, 0, 0}, 9177 {0x25, 0xc, 0xc, 0, 0}, 9178 {0x26, 0, 0, 0, 0}, 9179 {0x27, 0x3, 0x3, 0, 0}, 9180 {0x28, 0, 0, 0, 0}, 9181 {0x29, 0x3, 0x3, 0, 0}, 9182 {0x2A, 0x37, 0x37, 0, 0}, 9183 {0x2B, 0x3, 0x3, 0, 0}, 9184 {0x2C, 0, 0, 0, 0}, 9185 {0x2D, 0, 0, 0, 0}, 9186 {0x2E, 0x1, 0x1, 0, 0}, 9187 {0x2F, 0x1, 0x1, 0, 0}, 9188 {0x30, 0, 0, 0, 0}, 9189 {0x31, 0, 0, 0, 0}, 9190 {0x32, 0, 0, 0, 0}, 9191 {0x33, 0x11, 0x11, 0, 0}, 9192 {0x34, 0x11, 0x11, 0, 0}, 9193 {0x35, 0, 0, 0, 0}, 9194 {0x36, 0, 0, 0, 0}, 9195 {0x37, 0x3, 0x3, 0, 0}, 9196 {0x38, 0xf, 0xf, 0, 0}, 9197 {0x39, 0, 0, 0, 0}, 9198 {0x3A, 0x2d, 0x2d, 0, 0}, 9199 {0x3B, 0, 0, 0, 0}, 9200 {0x3C, 0x6e, 0x6e, 0, 0}, 9201 {0x3D, 0xf0, 0xf0, 1, 1}, 9202 {0x3E, 0, 0, 0, 0}, 9203 {0x3F, 0, 0, 0, 0}, 9204 {0x40, 0, 0, 0, 0}, 9205 {0x41, 0x3, 0x3, 0, 0}, 9206 {0x42, 0x3, 0x3, 0, 0}, 9207 {0x43, 0, 0, 0, 0}, 9208 {0x44, 0x1e, 0x1e, 0, 0}, 9209 {0x45, 0, 0, 0, 0}, 9210 {0x46, 0x6e, 0x6e, 0, 0}, 9211 {0x47, 0xf0, 0xf0, 1, 1}, 9212 {0x48, 0, 0, 0, 0}, 9213 {0x49, 0x2, 0x2, 0, 0}, 9214 {0x4A, 0xff, 0xff, 1, 1}, 9215 {0x4B, 0xc, 0xc, 0, 0}, 9216 {0x4C, 0, 0, 0, 0}, 9217 {0x4D, 0x38, 0x38, 0, 0}, 9218 {0x4E, 0x70, 0x70, 1, 1}, 9219 {0x4F, 0x2, 0x2, 0, 0}, 9220 {0x50, 0x88, 0x88, 0, 0}, 9221 {0x51, 0xc, 0xc, 0, 0}, 9222 {0x52, 0, 0, 0, 0}, 9223 {0x53, 0x8, 0x8, 0, 0}, 9224 {0x54, 0x70, 0x70, 1, 1}, 9225 {0x55, 0x2, 0x2, 0, 0}, 9226 {0x56, 0xff, 0xff, 1, 1}, 9227 {0x57, 0, 0, 0, 0}, 9228 {0x58, 0x83, 0x83, 0, 0}, 9229 {0x59, 0x77, 0x77, 1, 1}, 9230 {0x5A, 0, 0, 0, 0}, 9231 {0x5B, 0x2, 0x2, 0, 0}, 9232 {0x5C, 0x88, 0x88, 0, 0}, 9233 {0x5D, 0, 0, 0, 0}, 9234 {0x5E, 0x8, 0x8, 0, 0}, 9235 {0x5F, 0x77, 0x77, 1, 1}, 9236 {0x60, 0x1, 0x1, 0, 0}, 9237 {0x61, 0, 0, 0, 0}, 9238 {0x62, 0x7, 0x7, 0, 0}, 9239 {0x63, 0, 0, 0, 0}, 9240 {0x64, 0x7, 0x7, 0, 0}, 9241 {0x65, 0, 0, 0, 0}, 9242 {0x66, 0, 0, 0, 0}, 9243 {0x67, 0, 0, 1, 1}, 9244 {0x68, 0, 0, 0, 0}, 9245 {0x69, 0xa, 0xa, 0, 0}, 9246 {0x6A, 0, 0, 0, 0}, 9247 {0x6B, 0, 0, 0, 0}, 9248 {0x6C, 0, 0, 0, 0}, 9249 {0x6D, 0, 0, 0, 0}, 9250 {0x6E, 0, 0, 0, 0}, 9251 {0x6F, 0, 0, 0, 0}, 9252 {0x70, 0, 0, 0, 0}, 9253 {0x71, 0x2, 0x2, 0, 0}, 9254 {0x72, 0, 0, 0, 0}, 9255 {0x73, 0, 0, 0, 0}, 9256 {0x74, 0xe, 0xe, 0, 0}, 9257 {0x75, 0xe, 0xe, 0, 0}, 9258 {0x76, 0xe, 0xe, 0, 0}, 9259 {0x77, 0x13, 0x13, 0, 0}, 9260 {0x78, 0x13, 0x13, 0, 0}, 9261 {0x79, 0x1b, 0x1b, 0, 0}, 9262 {0x7A, 0x1b, 0x1b, 0, 0}, 9263 {0x7B, 0x55, 0x55, 0, 0}, 9264 {0x7C, 0x5b, 0x5b, 0, 0}, 9265 {0x7D, 0, 0, 0, 0}, 9266 {0x7E, 0, 0, 0, 0}, 9267 {0x7F, 0, 0, 0, 0}, 9268 {0x80, 0, 0, 0, 0}, 9269 {0x81, 0, 0, 0, 0}, 9270 {0x82, 0, 0, 0, 0}, 9271 {0x83, 0, 0, 0, 0}, 9272 {0x84, 0, 0, 0, 0}, 9273 {0x85, 0, 0, 0, 0}, 9274 {0x86, 0, 0, 0, 0}, 9275 {0x87, 0, 0, 0, 0}, 9276 {0x88, 0, 0, 0, 0}, 9277 {0x89, 0, 0, 0, 0}, 9278 {0x8A, 0, 0, 0, 0}, 9279 {0x8B, 0, 0, 0, 0}, 9280 {0x8C, 0, 0, 0, 0}, 9281 {0x8D, 0, 0, 0, 0}, 9282 {0x8E, 0, 0, 0, 0}, 9283 {0x8F, 0, 0, 0, 0}, 9284 {0x90, 0, 0, 0, 0}, 9285 {0x91, 0, 0, 0, 0}, 9286 {0x92, 0, 0, 0, 0}, 9287 {0x93, 0x70, 0x70, 0, 0}, 9288 {0x94, 0x70, 0x70, 0, 0}, 9289 {0x95, 0x71, 0x71, 1, 1}, 9290 {0x96, 0x71, 0x71, 1, 1}, 9291 {0x97, 0x72, 0x72, 1, 1}, 9292 {0x98, 0x73, 0x73, 1, 1}, 9293 {0x99, 0x74, 0x74, 1, 1}, 9294 {0x9A, 0x75, 0x75, 1, 1}, 9295 {0xFFFF, 0, 0, 0, 0} 9296}; 9297 9298static struct radio_regs regs_RX_2056_rev5[] = { 9299 {0x02, 0, 0, 0, 0}, 9300 {0x03, 0, 0, 0, 0}, 9301 {0x04, 0, 0, 0, 0}, 9302 {0x05, 0, 0, 0, 0}, 9303 {0x06, 0, 0, 0, 0}, 9304 {0x07, 0, 0, 0, 0}, 9305 {0x08, 0, 0, 0, 0}, 9306 {0x09, 0, 0, 0, 0}, 9307 {0x0A, 0, 0, 0, 0}, 9308 {0x0B, 0, 0, 0, 0}, 9309 {0x0C, 0, 0, 0, 0}, 9310 {0x0D, 0, 0, 0, 0}, 9311 {0x0E, 0, 0, 0, 0}, 9312 {0x0F, 0, 0, 0, 0}, 9313 {0x10, 0, 0, 0, 0}, 9314 {0x11, 0, 0, 0, 0}, 9315 {0x12, 0, 0, 0, 0}, 9316 {0x13, 0, 0, 0, 0}, 9317 {0x14, 0, 0, 0, 0}, 9318 {0x15, 0, 0, 0, 0}, 9319 {0x16, 0, 0, 0, 0}, 9320 {0x17, 0, 0, 0, 0}, 9321 {0x18, 0, 0, 0, 0}, 9322 {0x19, 0, 0, 0, 0}, 9323 {0x1A, 0, 0, 0, 0}, 9324 {0x1B, 0, 0, 0, 0}, 9325 {0x1C, 0, 0, 0, 0}, 9326 {0x1D, 0, 0, 0, 0}, 9327 {0x1E, 0, 0, 0, 0}, 9328 {0x1F, 0, 0, 0, 0}, 9329 {0x20, 0x3, 0x3, 0, 0}, 9330 {0x21, 0, 0, 0, 0}, 9331 {0x22, 0, 0, 0, 0}, 9332 {0x23, 0x90, 0x90, 0, 0}, 9333 {0x24, 0x55, 0x55, 0, 0}, 9334 {0x25, 0x15, 0x15, 0, 0}, 9335 {0x26, 0x5, 0x5, 0, 0}, 9336 {0x27, 0x15, 0x15, 0, 0}, 9337 {0x28, 0x5, 0x5, 0, 0}, 9338 {0x29, 0x20, 0x20, 0, 0}, 9339 {0x2A, 0x11, 0x11, 0, 0}, 9340 {0x2B, 0x90, 0x90, 0, 0}, 9341 {0x2C, 0, 0, 0, 0}, 9342 {0x2D, 0x88, 0x88, 0, 0}, 9343 {0x2E, 0x32, 0x32, 0, 0}, 9344 {0x2F, 0x77, 0x77, 0, 0}, 9345 {0x30, 0x17, 0x17, 1, 1}, 9346 {0x31, 0xff, 0xff, 1, 1}, 9347 {0x32, 0x20, 0x20, 0, 0}, 9348 {0x33, 0, 0, 0, 0}, 9349 {0x34, 0x88, 0x88, 0, 0}, 9350 {0x35, 0x32, 0x32, 0, 0}, 9351 {0x36, 0x77, 0x77, 0, 0}, 9352 {0x37, 0x17, 0x17, 1, 1}, 9353 {0x38, 0xf0, 0xf0, 1, 1}, 9354 {0x39, 0x20, 0x20, 0, 0}, 9355 {0x3A, 0x8, 0x8, 0, 0}, 9356 {0x3B, 0x55, 0x55, 1, 1}, 9357 {0x3C, 0, 0, 0, 0}, 9358 {0x3D, 0x88, 0x88, 1, 1}, 9359 {0x3E, 0, 0, 0, 0}, 9360 {0x3F, 0, 0, 1, 1}, 9361 {0x40, 0x7, 0x7, 1, 1}, 9362 {0x41, 0x6, 0x6, 0, 0}, 9363 {0x42, 0x4, 0x4, 0, 0}, 9364 {0x43, 0, 0, 0, 0}, 9365 {0x44, 0x8, 0x8, 0, 0}, 9366 {0x45, 0x55, 0x55, 1, 1}, 9367 {0x46, 0, 0, 0, 0}, 9368 {0x47, 0x11, 0x11, 0, 0}, 9369 {0x48, 0, 0, 0, 0}, 9370 {0x49, 0, 0, 1, 1}, 9371 {0x4A, 0x7, 0x7, 0, 0}, 9372 {0x4B, 0x6, 0x6, 0, 0}, 9373 {0x4C, 0x4, 0x4, 0, 0}, 9374 {0x4D, 0, 0, 0, 0}, 9375 {0x4E, 0, 0, 0, 0}, 9376 {0x4F, 0x26, 0x26, 1, 1}, 9377 {0x50, 0x26, 0x26, 1, 1}, 9378 {0x51, 0xf, 0xf, 1, 1}, 9379 {0x52, 0xf, 0xf, 1, 1}, 9380 {0x53, 0x44, 0x44, 0, 0}, 9381 {0x54, 0, 0, 0, 0}, 9382 {0x55, 0, 0, 0, 0}, 9383 {0x56, 0x8, 0x8, 0, 0}, 9384 {0x57, 0x8, 0x8, 0, 0}, 9385 {0x58, 0x7, 0x7, 0, 0}, 9386 {0x59, 0x22, 0x22, 0, 0}, 9387 {0x5A, 0x22, 0x22, 0, 0}, 9388 {0x5B, 0x2, 0x2, 0, 0}, 9389 {0x5C, 0x4, 0x4, 1, 1}, 9390 {0x5D, 0x7, 0x7, 0, 0}, 9391 {0x5E, 0x55, 0x55, 0, 0}, 9392 {0x5F, 0x23, 0x23, 0, 0}, 9393 {0x60, 0x41, 0x41, 0, 0}, 9394 {0x61, 0x1, 0x1, 0, 0}, 9395 {0x62, 0xa, 0xa, 0, 0}, 9396 {0x63, 0, 0, 0, 0}, 9397 {0x64, 0, 0, 0, 0}, 9398 {0x65, 0, 0, 0, 0}, 9399 {0x66, 0, 0, 0, 0}, 9400 {0x67, 0, 0, 0, 0}, 9401 {0x68, 0, 0, 0, 0}, 9402 {0x69, 0, 0, 0, 0}, 9403 {0x6A, 0, 0, 0, 0}, 9404 {0x6B, 0xc, 0xc, 0, 0}, 9405 {0x6C, 0, 0, 0, 0}, 9406 {0x6D, 0, 0, 0, 0}, 9407 {0x6E, 0, 0, 0, 0}, 9408 {0x6F, 0, 0, 0, 0}, 9409 {0x70, 0, 0, 0, 0}, 9410 {0x71, 0, 0, 0, 0}, 9411 {0x72, 0x22, 0x22, 0, 0}, 9412 {0x73, 0x22, 0x22, 0, 0}, 9413 {0x74, 0, 0, 1, 1}, 9414 {0x75, 0xa, 0xa, 0, 0}, 9415 {0x76, 0x1, 0x1, 0, 0}, 9416 {0x77, 0x22, 0x22, 0, 0}, 9417 {0x78, 0x30, 0x30, 0, 0}, 9418 {0x79, 0, 0, 0, 0}, 9419 {0x7A, 0, 0, 0, 0}, 9420 {0x7B, 0, 0, 0, 0}, 9421 {0x7C, 0, 0, 0, 0}, 9422 {0x7D, 0, 0, 0, 0}, 9423 {0x7E, 0, 0, 0, 0}, 9424 {0x7F, 0, 0, 0, 0}, 9425 {0x80, 0, 0, 0, 0}, 9426 {0x81, 0, 0, 0, 0}, 9427 {0x82, 0, 0, 0, 0}, 9428 {0x83, 0, 0, 0, 0}, 9429 {0x84, 0, 0, 0, 0}, 9430 {0x85, 0, 0, 0, 0}, 9431 {0x86, 0, 0, 0, 0}, 9432 {0x87, 0, 0, 0, 0}, 9433 {0x88, 0, 0, 0, 0}, 9434 {0x89, 0, 0, 0, 0}, 9435 {0x8A, 0, 0, 0, 0}, 9436 {0x8B, 0, 0, 0, 0}, 9437 {0x8C, 0, 0, 0, 0}, 9438 {0x8D, 0, 0, 0, 0}, 9439 {0x8E, 0, 0, 0, 0}, 9440 {0x8F, 0, 0, 0, 0}, 9441 {0x90, 0, 0, 0, 0}, 9442 {0x91, 0, 0, 0, 0}, 9443 {0x92, 0, 0, 0, 0}, 9444 {0x93, 0, 0, 0, 0}, 9445 {0x94, 0, 0, 0, 0}, 9446 {0xFFFF, 0, 0, 0, 0} 9447}; 9448 9449static struct radio_regs regs_SYN_2056_rev6[] = { 9450 {0x02, 0, 0, 0, 0}, 9451 {0x03, 0, 0, 0, 0}, 9452 {0x04, 0, 0, 0, 0}, 9453 {0x05, 0, 0, 0, 0}, 9454 {0x06, 0, 0, 0, 0}, 9455 {0x07, 0, 0, 0, 0}, 9456 {0x08, 0, 0, 0, 0}, 9457 {0x09, 0x1, 0x1, 0, 0}, 9458 {0x0A, 0, 0, 0, 0}, 9459 {0x0B, 0, 0, 0, 0}, 9460 {0x0C, 0, 0, 0, 0}, 9461 {0x0D, 0, 0, 0, 0}, 9462 {0x0E, 0, 0, 0, 0}, 9463 {0x0F, 0, 0, 0, 0}, 9464 {0x10, 0, 0, 0, 0}, 9465 {0x11, 0, 0, 0, 0}, 9466 {0x12, 0, 0, 0, 0}, 9467 {0x13, 0, 0, 0, 0}, 9468 {0x14, 0, 0, 0, 0}, 9469 {0x15, 0, 0, 0, 0}, 9470 {0x16, 0, 0, 0, 0}, 9471 {0x17, 0, 0, 0, 0}, 9472 {0x18, 0, 0, 0, 0}, 9473 {0x19, 0, 0, 0, 0}, 9474 {0x1A, 0, 0, 0, 0}, 9475 {0x1B, 0, 0, 0, 0}, 9476 {0x1C, 0, 0, 0, 0}, 9477 {0x1D, 0, 0, 0, 0}, 9478 {0x1E, 0, 0, 0, 0}, 9479 {0x1F, 0, 0, 0, 0}, 9480 {0x20, 0, 0, 0, 0}, 9481 {0x21, 0, 0, 0, 0}, 9482 {0x22, 0x60, 0x60, 0, 0}, 9483 {0x23, 0x6, 0x6, 0, 0}, 9484 {0x24, 0xc, 0xc, 0, 0}, 9485 {0x25, 0, 0, 0, 0}, 9486 {0x26, 0, 0, 0, 0}, 9487 {0x27, 0, 0, 0, 0}, 9488 {0x28, 0x1, 0x1, 0, 0}, 9489 {0x29, 0, 0, 0, 0}, 9490 {0x2A, 0, 0, 0, 0}, 9491 {0x2B, 0, 0, 0, 0}, 9492 {0x2C, 0, 0, 0, 0}, 9493 {0x2D, 0, 0, 0, 0}, 9494 {0x2E, 0, 0, 0, 0}, 9495 {0x2F, 0x1f, 0x1f, 0, 0}, 9496 {0x30, 0x15, 0x15, 0, 0}, 9497 {0x31, 0xf, 0xf, 0, 0}, 9498 {0x32, 0, 0, 0, 0}, 9499 {0x33, 0, 0, 0, 0}, 9500 {0x34, 0, 0, 0, 0}, 9501 {0x35, 0, 0, 0, 0}, 9502 {0x36, 0, 0, 0, 0}, 9503 {0x37, 0, 0, 0, 0}, 9504 {0x38, 0, 0, 0, 0}, 9505 {0x39, 0, 0, 0, 0}, 9506 {0x3A, 0, 0, 0, 0}, 9507 {0x3B, 0, 0, 0, 0}, 9508 {0x3C, 0x13, 0x13, 0, 0}, 9509 {0x3D, 0xf, 0xf, 0, 0}, 9510 {0x3E, 0x18, 0x18, 0, 0}, 9511 {0x3F, 0, 0, 0, 0}, 9512 {0x40, 0, 0, 0, 0}, 9513 {0x41, 0x20, 0x20, 0, 0}, 9514 {0x42, 0x20, 0x20, 0, 0}, 9515 {0x43, 0, 0, 0, 0}, 9516 {0x44, 0x77, 0x77, 0, 0}, 9517 {0x45, 0x7, 0x7, 0, 0}, 9518 {0x46, 0x1, 0x1, 0, 0}, 9519 {0x47, 0x4, 0x4, 0, 0}, 9520 {0x48, 0xf, 0xf, 0, 0}, 9521 {0x49, 0x30, 0x30, 0, 0}, 9522 {0x4A, 0x32, 0x32, 0, 0}, 9523 {0x4B, 0xd, 0xd, 0, 0}, 9524 {0x4C, 0xd, 0xd, 0, 0}, 9525 {0x4D, 0x4, 0x4, 0, 0}, 9526 {0x4E, 0x6, 0x6, 0, 0}, 9527 {0x4F, 0x1, 0x1, 0, 0}, 9528 {0x50, 0x1c, 0x1c, 0, 0}, 9529 {0x51, 0x2, 0x2, 0, 0}, 9530 {0x52, 0x2, 0x2, 0, 0}, 9531 {0x53, 0xf7, 0xf7, 1, 1}, 9532 {0x54, 0xb4, 0xb4, 0, 0}, 9533 {0x55, 0xd2, 0xd2, 0, 0}, 9534 {0x56, 0, 0, 0, 0}, 9535 {0x57, 0, 0, 0, 0}, 9536 {0x58, 0x4, 0x4, 0, 0}, 9537 {0x59, 0x96, 0x96, 0, 0}, 9538 {0x5A, 0x3e, 0x3e, 0, 0}, 9539 {0x5B, 0x3e, 0x3e, 0, 0}, 9540 {0x5C, 0x13, 0x13, 0, 0}, 9541 {0x5D, 0x2, 0x2, 0, 0}, 9542 {0x5E, 0, 0, 0, 0}, 9543 {0x5F, 0x7, 0x7, 0, 0}, 9544 {0x60, 0x7, 0x7, 1, 1}, 9545 {0x61, 0x8, 0x8, 0, 0}, 9546 {0x62, 0x3, 0x3, 0, 0}, 9547 {0x63, 0, 0, 0, 0}, 9548 {0x64, 0, 0, 0, 0}, 9549 {0x65, 0, 0, 0, 0}, 9550 {0x66, 0, 0, 0, 0}, 9551 {0x67, 0, 0, 0, 0}, 9552 {0x68, 0x40, 0x40, 0, 0}, 9553 {0x69, 0, 0, 0, 0}, 9554 {0x6A, 0, 0, 0, 0}, 9555 {0x6B, 0, 0, 0, 0}, 9556 {0x6C, 0, 0, 0, 0}, 9557 {0x6D, 0x1, 0x1, 0, 0}, 9558 {0x6E, 0, 0, 0, 0}, 9559 {0x6F, 0, 0, 0, 0}, 9560 {0x70, 0x60, 0x60, 0, 0}, 9561 {0x71, 0x66, 0x66, 0, 0}, 9562 {0x72, 0xc, 0xc, 0, 0}, 9563 {0x73, 0x66, 0x66, 0, 0}, 9564 {0x74, 0x8f, 0x8f, 1, 1}, 9565 {0x75, 0, 0, 0, 0}, 9566 {0x76, 0xcc, 0xcc, 0, 0}, 9567 {0x77, 0x1, 0x1, 0, 0}, 9568 {0x78, 0x66, 0x66, 0, 0}, 9569 {0x79, 0x66, 0x66, 0, 0}, 9570 {0x7A, 0, 0, 0, 0}, 9571 {0x7B, 0, 0, 0, 0}, 9572 {0x7C, 0, 0, 0, 0}, 9573 {0x7D, 0, 0, 0, 0}, 9574 {0x7E, 0, 0, 0, 0}, 9575 {0x7F, 0, 0, 0, 0}, 9576 {0x80, 0, 0, 0, 0}, 9577 {0x81, 0, 0, 0, 0}, 9578 {0x82, 0, 0, 0, 0}, 9579 {0x83, 0, 0, 0, 0}, 9580 {0x84, 0, 0, 0, 0}, 9581 {0x85, 0xff, 0xff, 0, 0}, 9582 {0x86, 0, 0, 0, 0}, 9583 {0x87, 0, 0, 0, 0}, 9584 {0x88, 0, 0, 0, 0}, 9585 {0x89, 0, 0, 0, 0}, 9586 {0x8A, 0, 0, 0, 0}, 9587 {0x8B, 0, 0, 0, 0}, 9588 {0x8C, 0, 0, 0, 0}, 9589 {0x8D, 0, 0, 0, 0}, 9590 {0x8E, 0, 0, 0, 0}, 9591 {0x8F, 0, 0, 0, 0}, 9592 {0x90, 0, 0, 0, 0}, 9593 {0x91, 0, 0, 0, 0}, 9594 {0x92, 0, 0, 0, 0}, 9595 {0x93, 0, 0, 0, 0}, 9596 {0x94, 0, 0, 0, 0}, 9597 {0x95, 0, 0, 0, 0}, 9598 {0x96, 0, 0, 0, 0}, 9599 {0x97, 0, 0, 0, 0}, 9600 {0x98, 0, 0, 0, 0}, 9601 {0x99, 0, 0, 0, 0}, 9602 {0x9A, 0, 0, 0, 0}, 9603 {0x9B, 0, 0, 0, 0}, 9604 {0x9C, 0, 0, 0, 0}, 9605 {0x9D, 0, 0, 0, 0}, 9606 {0x9E, 0, 0, 0, 0}, 9607 {0x9F, 0x6, 0x6, 0, 0}, 9608 {0xA0, 0x66, 0x66, 0, 0}, 9609 {0xA1, 0x66, 0x66, 0, 0}, 9610 {0xA2, 0x66, 0x66, 0, 0}, 9611 {0xA3, 0x66, 0x66, 0, 0}, 9612 {0xA4, 0x66, 0x66, 0, 0}, 9613 {0xA5, 0x66, 0x66, 0, 0}, 9614 {0xA6, 0x66, 0x66, 0, 0}, 9615 {0xA7, 0x66, 0x66, 0, 0}, 9616 {0xA8, 0x66, 0x66, 0, 0}, 9617 {0xA9, 0x66, 0x66, 0, 0}, 9618 {0xAA, 0x66, 0x66, 0, 0}, 9619 {0xAB, 0x66, 0x66, 0, 0}, 9620 {0xAC, 0x66, 0x66, 0, 0}, 9621 {0xAD, 0x66, 0x66, 0, 0}, 9622 {0xAE, 0x66, 0x66, 0, 0}, 9623 {0xAF, 0x66, 0x66, 0, 0}, 9624 {0xB0, 0x66, 0x66, 0, 0}, 9625 {0xB1, 0x66, 0x66, 0, 0}, 9626 {0xB2, 0x66, 0x66, 0, 0}, 9627 {0xB3, 0xa, 0xa, 0, 0}, 9628 {0xB4, 0, 0, 0, 0}, 9629 {0xB5, 0, 0, 0, 0}, 9630 {0xB6, 0, 0, 0, 0}, 9631 {0xFFFF, 0, 0, 0, 0} 9632}; 9633 9634static struct radio_regs regs_TX_2056_rev6[] = { 9635 {0x02, 0, 0, 0, 0}, 9636 {0x03, 0, 0, 0, 0}, 9637 {0x04, 0, 0, 0, 0}, 9638 {0x05, 0, 0, 0, 0}, 9639 {0x06, 0, 0, 0, 0}, 9640 {0x07, 0, 0, 0, 0}, 9641 {0x08, 0, 0, 0, 0}, 9642 {0x09, 0, 0, 0, 0}, 9643 {0x0A, 0, 0, 0, 0}, 9644 {0x0B, 0, 0, 0, 0}, 9645 {0x0C, 0, 0, 0, 0}, 9646 {0x0D, 0, 0, 0, 0}, 9647 {0x0E, 0, 0, 0, 0}, 9648 {0x0F, 0, 0, 0, 0}, 9649 {0x10, 0, 0, 0, 0}, 9650 {0x11, 0, 0, 0, 0}, 9651 {0x12, 0, 0, 0, 0}, 9652 {0x13, 0, 0, 0, 0}, 9653 {0x14, 0, 0, 0, 0}, 9654 {0x15, 0, 0, 0, 0}, 9655 {0x16, 0, 0, 0, 0}, 9656 {0x17, 0, 0, 0, 0}, 9657 {0x18, 0, 0, 0, 0}, 9658 {0x19, 0, 0, 0, 0}, 9659 {0x1A, 0, 0, 0, 0}, 9660 {0x1B, 0, 0, 0, 0}, 9661 {0x1C, 0, 0, 0, 0}, 9662 {0x1D, 0, 0, 0, 0}, 9663 {0x1E, 0, 0, 0, 0}, 9664 {0x1F, 0, 0, 0, 0}, 9665 {0x20, 0, 0, 0, 0}, 9666 {0x21, 0x88, 0x88, 0, 0}, 9667 {0x22, 0x88, 0x88, 0, 0}, 9668 {0x23, 0x88, 0x88, 0, 0}, 9669 {0x24, 0x88, 0x88, 0, 0}, 9670 {0x25, 0xc, 0xc, 0, 0}, 9671 {0x26, 0, 0, 0, 0}, 9672 {0x27, 0x3, 0x3, 0, 0}, 9673 {0x28, 0, 0, 0, 0}, 9674 {0x29, 0x3, 0x3, 0, 0}, 9675 {0x2A, 0x37, 0x37, 0, 0}, 9676 {0x2B, 0x3, 0x3, 0, 0}, 9677 {0x2C, 0, 0, 0, 0}, 9678 {0x2D, 0, 0, 0, 0}, 9679 {0x2E, 0x1, 0x1, 0, 0}, 9680 {0x2F, 0x1, 0x1, 0, 0}, 9681 {0x30, 0, 0, 0, 0}, 9682 {0x31, 0, 0, 0, 0}, 9683 {0x32, 0, 0, 0, 0}, 9684 {0x33, 0x11, 0x11, 0, 0}, 9685 {0x34, 0xee, 0xee, 1, 1}, 9686 {0x35, 0, 0, 0, 0}, 9687 {0x36, 0, 0, 0, 0}, 9688 {0x37, 0x3, 0x3, 0, 0}, 9689 {0x38, 0x50, 0x50, 1, 1}, 9690 {0x39, 0, 0, 0, 0}, 9691 {0x3A, 0x50, 0x50, 1, 1}, 9692 {0x3B, 0, 0, 0, 0}, 9693 {0x3C, 0x6e, 0x6e, 0, 0}, 9694 {0x3D, 0xf0, 0xf0, 1, 1}, 9695 {0x3E, 0, 0, 0, 0}, 9696 {0x3F, 0, 0, 0, 0}, 9697 {0x40, 0, 0, 0, 0}, 9698 {0x41, 0x3, 0x3, 0, 0}, 9699 {0x42, 0x3, 0x3, 0, 0}, 9700 {0x43, 0, 0, 0, 0}, 9701 {0x44, 0x1e, 0x1e, 0, 0}, 9702 {0x45, 0, 0, 0, 0}, 9703 {0x46, 0x6e, 0x6e, 0, 0}, 9704 {0x47, 0xf0, 0xf0, 1, 1}, 9705 {0x48, 0, 0, 0, 0}, 9706 {0x49, 0x2, 0x2, 0, 0}, 9707 {0x4A, 0xff, 0xff, 1, 1}, 9708 {0x4B, 0xc, 0xc, 0, 0}, 9709 {0x4C, 0, 0, 0, 0}, 9710 {0x4D, 0x38, 0x38, 0, 0}, 9711 {0x4E, 0x70, 0x70, 1, 1}, 9712 {0x4F, 0x2, 0x2, 0, 0}, 9713 {0x50, 0x88, 0x88, 0, 0}, 9714 {0x51, 0xc, 0xc, 0, 0}, 9715 {0x52, 0, 0, 0, 0}, 9716 {0x53, 0x8, 0x8, 0, 0}, 9717 {0x54, 0x70, 0x70, 1, 1}, 9718 {0x55, 0x2, 0x2, 0, 0}, 9719 {0x56, 0xff, 0xff, 1, 1}, 9720 {0x57, 0, 0, 0, 0}, 9721 {0x58, 0x83, 0x83, 0, 0}, 9722 {0x59, 0x77, 0x77, 1, 1}, 9723 {0x5A, 0, 0, 0, 0}, 9724 {0x5B, 0x2, 0x2, 0, 0}, 9725 {0x5C, 0x88, 0x88, 0, 0}, 9726 {0x5D, 0, 0, 0, 0}, 9727 {0x5E, 0x8, 0x8, 0, 0}, 9728 {0x5F, 0x77, 0x77, 1, 1}, 9729 {0x60, 0x1, 0x1, 0, 0}, 9730 {0x61, 0, 0, 0, 0}, 9731 {0x62, 0x7, 0x7, 0, 0}, 9732 {0x63, 0, 0, 0, 0}, 9733 {0x64, 0x7, 0x7, 0, 0}, 9734 {0x65, 0, 0, 0, 0}, 9735 {0x66, 0, 0, 0, 0}, 9736 {0x67, 0, 0, 1, 1}, 9737 {0x68, 0, 0, 0, 0}, 9738 {0x69, 0xa, 0xa, 0, 0}, 9739 {0x6A, 0, 0, 0, 0}, 9740 {0x6B, 0, 0, 0, 0}, 9741 {0x6C, 0, 0, 0, 0}, 9742 {0x6D, 0, 0, 0, 0}, 9743 {0x6E, 0, 0, 0, 0}, 9744 {0x6F, 0, 0, 0, 0}, 9745 {0x70, 0, 0, 0, 0}, 9746 {0x71, 0x2, 0x2, 0, 0}, 9747 {0x72, 0, 0, 0, 0}, 9748 {0x73, 0, 0, 0, 0}, 9749 {0x74, 0xe, 0xe, 0, 0}, 9750 {0x75, 0xe, 0xe, 0, 0}, 9751 {0x76, 0xe, 0xe, 0, 0}, 9752 {0x77, 0x13, 0x13, 0, 0}, 9753 {0x78, 0x13, 0x13, 0, 0}, 9754 {0x79, 0x1b, 0x1b, 0, 0}, 9755 {0x7A, 0x1b, 0x1b, 0, 0}, 9756 {0x7B, 0x55, 0x55, 0, 0}, 9757 {0x7C, 0x5b, 0x5b, 0, 0}, 9758 {0x7D, 0x30, 0x30, 1, 1}, 9759 {0x7E, 0, 0, 0, 0}, 9760 {0x7F, 0, 0, 0, 0}, 9761 {0x80, 0, 0, 0, 0}, 9762 {0x81, 0, 0, 0, 0}, 9763 {0x82, 0, 0, 0, 0}, 9764 {0x83, 0, 0, 0, 0}, 9765 {0x84, 0, 0, 0, 0}, 9766 {0x85, 0, 0, 0, 0}, 9767 {0x86, 0, 0, 0, 0}, 9768 {0x87, 0, 0, 0, 0}, 9769 {0x88, 0, 0, 0, 0}, 9770 {0x89, 0, 0, 0, 0}, 9771 {0x8A, 0, 0, 0, 0}, 9772 {0x8B, 0, 0, 0, 0}, 9773 {0x8C, 0, 0, 0, 0}, 9774 {0x8D, 0, 0, 0, 0}, 9775 {0x8E, 0, 0, 0, 0}, 9776 {0x8F, 0, 0, 0, 0}, 9777 {0x90, 0, 0, 0, 0}, 9778 {0x91, 0, 0, 0, 0}, 9779 {0x92, 0, 0, 0, 0}, 9780 {0x93, 0x70, 0x70, 0, 0}, 9781 {0x94, 0x70, 0x70, 0, 0}, 9782 {0x95, 0x70, 0x70, 0, 0}, 9783 {0x96, 0x70, 0x70, 0, 0}, 9784 {0x97, 0x70, 0x70, 0, 0}, 9785 {0x98, 0x70, 0x70, 0, 0}, 9786 {0x99, 0x70, 0x70, 0, 0}, 9787 {0x9A, 0x70, 0x70, 0, 0}, 9788 {0xFFFF, 0, 0, 0, 0} 9789}; 9790 9791static struct radio_regs regs_RX_2056_rev6[] = { 9792 {0x02, 0, 0, 0, 0}, 9793 {0x03, 0, 0, 0, 0}, 9794 {0x04, 0, 0, 0, 0}, 9795 {0x05, 0, 0, 0, 0}, 9796 {0x06, 0, 0, 0, 0}, 9797 {0x07, 0, 0, 0, 0}, 9798 {0x08, 0, 0, 0, 0}, 9799 {0x09, 0, 0, 0, 0}, 9800 {0x0A, 0, 0, 0, 0}, 9801 {0x0B, 0, 0, 0, 0}, 9802 {0x0C, 0, 0, 0, 0}, 9803 {0x0D, 0, 0, 0, 0}, 9804 {0x0E, 0, 0, 0, 0}, 9805 {0x0F, 0, 0, 0, 0}, 9806 {0x10, 0, 0, 0, 0}, 9807 {0x11, 0, 0, 0, 0}, 9808 {0x12, 0, 0, 0, 0}, 9809 {0x13, 0, 0, 0, 0}, 9810 {0x14, 0, 0, 0, 0}, 9811 {0x15, 0, 0, 0, 0}, 9812 {0x16, 0, 0, 0, 0}, 9813 {0x17, 0, 0, 0, 0}, 9814 {0x18, 0, 0, 0, 0}, 9815 {0x19, 0, 0, 0, 0}, 9816 {0x1A, 0, 0, 0, 0}, 9817 {0x1B, 0, 0, 0, 0}, 9818 {0x1C, 0, 0, 0, 0}, 9819 {0x1D, 0, 0, 0, 0}, 9820 {0x1E, 0, 0, 0, 0}, 9821 {0x1F, 0, 0, 0, 0}, 9822 {0x20, 0x3, 0x3, 0, 0}, 9823 {0x21, 0, 0, 0, 0}, 9824 {0x22, 0, 0, 0, 0}, 9825 {0x23, 0x90, 0x90, 0, 0}, 9826 {0x24, 0x55, 0x55, 0, 0}, 9827 {0x25, 0x15, 0x15, 0, 0}, 9828 {0x26, 0x5, 0x5, 0, 0}, 9829 {0x27, 0x15, 0x15, 0, 0}, 9830 {0x28, 0x5, 0x5, 0, 0}, 9831 {0x29, 0x20, 0x20, 0, 0}, 9832 {0x2A, 0x11, 0x11, 0, 0}, 9833 {0x2B, 0x90, 0x90, 0, 0}, 9834 {0x2C, 0, 0, 0, 0}, 9835 {0x2D, 0x88, 0x88, 0, 0}, 9836 {0x2E, 0x32, 0x32, 0, 0}, 9837 {0x2F, 0x77, 0x77, 0, 0}, 9838 {0x30, 0x17, 0x17, 1, 1}, 9839 {0x31, 0xff, 0xff, 1, 1}, 9840 {0x32, 0x20, 0x20, 0, 0}, 9841 {0x33, 0, 0, 0, 0}, 9842 {0x34, 0x88, 0x88, 0, 0}, 9843 {0x35, 0x32, 0x32, 0, 0}, 9844 {0x36, 0x77, 0x77, 0, 0}, 9845 {0x37, 0x17, 0x17, 1, 1}, 9846 {0x38, 0xf0, 0xf0, 1, 1}, 9847 {0x39, 0x20, 0x20, 0, 0}, 9848 {0x3A, 0x8, 0x8, 0, 0}, 9849 {0x3B, 0x55, 0x55, 1, 1}, 9850 {0x3C, 0, 0, 0, 0}, 9851 {0x3D, 0x88, 0x88, 1, 1}, 9852 {0x3E, 0, 0, 0, 0}, 9853 {0x3F, 0x44, 0x44, 0, 0}, 9854 {0x40, 0x7, 0x7, 1, 1}, 9855 {0x41, 0x6, 0x6, 0, 0}, 9856 {0x42, 0x4, 0x4, 0, 0}, 9857 {0x43, 0, 0, 0, 0}, 9858 {0x44, 0x8, 0x8, 0, 0}, 9859 {0x45, 0x55, 0x55, 1, 1}, 9860 {0x46, 0, 0, 0, 0}, 9861 {0x47, 0x11, 0x11, 0, 0}, 9862 {0x48, 0, 0, 0, 0}, 9863 {0x49, 0x44, 0x44, 0, 0}, 9864 {0x4A, 0x7, 0x7, 0, 0}, 9865 {0x4B, 0x6, 0x6, 0, 0}, 9866 {0x4C, 0x4, 0x4, 0, 0}, 9867 {0x4D, 0, 0, 0, 0}, 9868 {0x4E, 0, 0, 0, 0}, 9869 {0x4F, 0x26, 0x26, 1, 1}, 9870 {0x50, 0x26, 0x26, 1, 1}, 9871 {0x51, 0xf, 0xf, 1, 1}, 9872 {0x52, 0xf, 0xf, 1, 1}, 9873 {0x53, 0x44, 0x44, 0, 0}, 9874 {0x54, 0, 0, 0, 0}, 9875 {0x55, 0, 0, 0, 0}, 9876 {0x56, 0x8, 0x8, 0, 0}, 9877 {0x57, 0x8, 0x8, 0, 0}, 9878 {0x58, 0x7, 0x7, 0, 0}, 9879 {0x59, 0x22, 0x22, 0, 0}, 9880 {0x5A, 0x22, 0x22, 0, 0}, 9881 {0x5B, 0x2, 0x2, 0, 0}, 9882 {0x5C, 0x4, 0x4, 1, 1}, 9883 {0x5D, 0x7, 0x7, 0, 0}, 9884 {0x5E, 0x55, 0x55, 0, 0}, 9885 {0x5F, 0x23, 0x23, 0, 0}, 9886 {0x60, 0x41, 0x41, 0, 0}, 9887 {0x61, 0x1, 0x1, 0, 0}, 9888 {0x62, 0xa, 0xa, 0, 0}, 9889 {0x63, 0, 0, 0, 0}, 9890 {0x64, 0, 0, 0, 0}, 9891 {0x65, 0, 0, 0, 0}, 9892 {0x66, 0, 0, 0, 0}, 9893 {0x67, 0, 0, 0, 0}, 9894 {0x68, 0, 0, 0, 0}, 9895 {0x69, 0, 0, 0, 0}, 9896 {0x6A, 0, 0, 0, 0}, 9897 {0x6B, 0xc, 0xc, 0, 0}, 9898 {0x6C, 0, 0, 0, 0}, 9899 {0x6D, 0, 0, 0, 0}, 9900 {0x6E, 0, 0, 0, 0}, 9901 {0x6F, 0, 0, 0, 0}, 9902 {0x70, 0, 0, 0, 0}, 9903 {0x71, 0, 0, 0, 0}, 9904 {0x72, 0x22, 0x22, 0, 0}, 9905 {0x73, 0x22, 0x22, 0, 0}, 9906 {0x74, 0, 0, 1, 1}, 9907 {0x75, 0xa, 0xa, 0, 0}, 9908 {0x76, 0x1, 0x1, 0, 0}, 9909 {0x77, 0x22, 0x22, 0, 0}, 9910 {0x78, 0x30, 0x30, 0, 0}, 9911 {0x79, 0, 0, 0, 0}, 9912 {0x7A, 0, 0, 0, 0}, 9913 {0x7B, 0, 0, 0, 0}, 9914 {0x7C, 0, 0, 0, 0}, 9915 {0x7D, 0x5, 0x5, 1, 1}, 9916 {0x7E, 0, 0, 0, 0}, 9917 {0x7F, 0, 0, 0, 0}, 9918 {0x80, 0, 0, 0, 0}, 9919 {0x81, 0, 0, 0, 0}, 9920 {0x82, 0, 0, 0, 0}, 9921 {0x83, 0, 0, 0, 0}, 9922 {0x84, 0, 0, 0, 0}, 9923 {0x85, 0, 0, 0, 0}, 9924 {0x86, 0, 0, 0, 0}, 9925 {0x87, 0, 0, 0, 0}, 9926 {0x88, 0, 0, 0, 0}, 9927 {0x89, 0, 0, 0, 0}, 9928 {0x8A, 0, 0, 0, 0}, 9929 {0x8B, 0, 0, 0, 0}, 9930 {0x8C, 0, 0, 0, 0}, 9931 {0x8D, 0, 0, 0, 0}, 9932 {0x8E, 0, 0, 0, 0}, 9933 {0x8F, 0, 0, 0, 0}, 9934 {0x90, 0, 0, 0, 0}, 9935 {0x91, 0, 0, 0, 0}, 9936 {0x92, 0, 0, 0, 0}, 9937 {0x93, 0, 0, 0, 0}, 9938 {0x94, 0, 0, 0, 0}, 9939 {0xFFFF, 0, 0, 0, 0} 9940}; 9941 9942static struct radio_regs regs_SYN_2056_rev7[] = { 9943 {0x02, 0, 0, 0, 0}, 9944 {0x03, 0, 0, 0, 0}, 9945 {0x04, 0, 0, 0, 0}, 9946 {0x05, 0, 0, 0, 0}, 9947 {0x06, 0, 0, 0, 0}, 9948 {0x07, 0, 0, 0, 0}, 9949 {0x08, 0, 0, 0, 0}, 9950 {0x09, 0x1, 0x1, 0, 0}, 9951 {0x0A, 0, 0, 0, 0}, 9952 {0x0B, 0, 0, 0, 0}, 9953 {0x0C, 0, 0, 0, 0}, 9954 {0x0D, 0, 0, 0, 0}, 9955 {0x0E, 0, 0, 0, 0}, 9956 {0x0F, 0, 0, 0, 0}, 9957 {0x10, 0, 0, 0, 0}, 9958 {0x11, 0, 0, 0, 0}, 9959 {0x12, 0, 0, 0, 0}, 9960 {0x13, 0, 0, 0, 0}, 9961 {0x14, 0, 0, 0, 0}, 9962 {0x15, 0, 0, 0, 0}, 9963 {0x16, 0, 0, 0, 0}, 9964 {0x17, 0, 0, 0, 0}, 9965 {0x18, 0, 0, 0, 0}, 9966 {0x19, 0, 0, 0, 0}, 9967 {0x1A, 0, 0, 0, 0}, 9968 {0x1B, 0, 0, 0, 0}, 9969 {0x1C, 0, 0, 0, 0}, 9970 {0x1D, 0, 0, 0, 0}, 9971 {0x1E, 0, 0, 0, 0}, 9972 {0x1F, 0, 0, 0, 0}, 9973 {0x20, 0, 0, 0, 0}, 9974 {0x21, 0, 0, 0, 0}, 9975 {0x22, 0x60, 0x60, 0, 0}, 9976 {0x23, 0x6, 0x6, 0, 0}, 9977 {0x24, 0xc, 0xc, 0, 0}, 9978 {0x25, 0, 0, 0, 0}, 9979 {0x26, 0, 0, 0, 0}, 9980 {0x27, 0, 0, 0, 0}, 9981 {0x28, 0x1, 0x1, 0, 0}, 9982 {0x29, 0, 0, 0, 0}, 9983 {0x2A, 0, 0, 0, 0}, 9984 {0x2B, 0, 0, 0, 0}, 9985 {0x2C, 0, 0, 0, 0}, 9986 {0x2D, 0, 0, 0, 0}, 9987 {0x2E, 0, 0, 0, 0}, 9988 {0x2F, 0x1f, 0x1f, 0, 0}, 9989 {0x30, 0x15, 0x15, 0, 0}, 9990 {0x31, 0xf, 0xf, 0, 0}, 9991 {0x32, 0, 0, 0, 0}, 9992 {0x33, 0, 0, 0, 0}, 9993 {0x34, 0, 0, 0, 0}, 9994 {0x35, 0, 0, 0, 0}, 9995 {0x36, 0, 0, 0, 0}, 9996 {0x37, 0, 0, 0, 0}, 9997 {0x38, 0, 0, 0, 0}, 9998 {0x39, 0, 0, 0, 0}, 9999 {0x3A, 0, 0, 0, 0}, 10000 {0x3B, 0, 0, 0, 0}, 10001 {0x3C, 0x13, 0x13, 0, 0}, 10002 {0x3D, 0xf, 0xf, 0, 0}, 10003 {0x3E, 0x18, 0x18, 0, 0}, 10004 {0x3F, 0, 0, 0, 0}, 10005 {0x40, 0, 0, 0, 0}, 10006 {0x41, 0x20, 0x20, 0, 0}, 10007 {0x42, 0x20, 0x20, 0, 0}, 10008 {0x43, 0, 0, 0, 0}, 10009 {0x44, 0x77, 0x77, 0, 0}, 10010 {0x45, 0x7, 0x7, 0, 0}, 10011 {0x46, 0x1, 0x1, 0, 0}, 10012 {0x47, 0x4, 0x4, 0, 0}, 10013 {0x48, 0xf, 0xf, 0, 0}, 10014 {0x49, 0x30, 0x30, 0, 0}, 10015 {0x4A, 0x32, 0x32, 0, 0}, 10016 {0x4B, 0xd, 0xd, 0, 0}, 10017 {0x4C, 0xd, 0xd, 0, 0}, 10018 {0x4D, 0x4, 0x4, 0, 0}, 10019 {0x4E, 0x6, 0x6, 0, 0}, 10020 {0x4F, 0x1, 0x1, 0, 0}, 10021 {0x50, 0x1c, 0x1c, 0, 0}, 10022 {0x51, 0x2, 0x2, 0, 0}, 10023 {0x52, 0x2, 0x2, 0, 0}, 10024 {0x53, 0xf7, 0xf7, 1, 1}, 10025 {0x54, 0xb4, 0xb4, 0, 0}, 10026 {0x55, 0xd2, 0xd2, 0, 0}, 10027 {0x56, 0, 0, 0, 0}, 10028 {0x57, 0, 0, 0, 0}, 10029 {0x58, 0x4, 0x4, 0, 0}, 10030 {0x59, 0x96, 0x96, 0, 0}, 10031 {0x5A, 0x3e, 0x3e, 0, 0}, 10032 {0x5B, 0x3e, 0x3e, 0, 0}, 10033 {0x5C, 0x13, 0x13, 0, 0}, 10034 {0x5D, 0x2, 0x2, 0, 0}, 10035 {0x5E, 0, 0, 0, 0}, 10036 {0x5F, 0x7, 0x7, 0, 0}, 10037 {0x60, 0x7, 0x7, 1, 1}, 10038 {0x61, 0x8, 0x8, 0, 0}, 10039 {0x62, 0x3, 0x3, 0, 0}, 10040 {0x63, 0, 0, 0, 0}, 10041 {0x64, 0, 0, 0, 0}, 10042 {0x65, 0, 0, 0, 0}, 10043 {0x66, 0, 0, 0, 0}, 10044 {0x67, 0, 0, 0, 0}, 10045 {0x68, 0x40, 0x40, 0, 0}, 10046 {0x69, 0, 0, 0, 0}, 10047 {0x6A, 0, 0, 0, 0}, 10048 {0x6B, 0, 0, 0, 0}, 10049 {0x6C, 0, 0, 0, 0}, 10050 {0x6D, 0x1, 0x1, 0, 0}, 10051 {0x6E, 0, 0, 0, 0}, 10052 {0x6F, 0, 0, 0, 0}, 10053 {0x70, 0x60, 0x60, 0, 0}, 10054 {0x71, 0x66, 0x66, 0, 0}, 10055 {0x72, 0xc, 0xc, 0, 0}, 10056 {0x73, 0x66, 0x66, 0, 0}, 10057 {0x74, 0x8f, 0x8f, 1, 1}, 10058 {0x75, 0, 0, 0, 0}, 10059 {0x76, 0xcc, 0xcc, 0, 0}, 10060 {0x77, 0x1, 0x1, 0, 0}, 10061 {0x78, 0x66, 0x66, 0, 0}, 10062 {0x79, 0x66, 0x66, 0, 0}, 10063 {0x7A, 0, 0, 0, 0}, 10064 {0x7B, 0, 0, 0, 0}, 10065 {0x7C, 0, 0, 0, 0}, 10066 {0x7D, 0, 0, 0, 0}, 10067 {0x7E, 0, 0, 0, 0}, 10068 {0x7F, 0, 0, 0, 0}, 10069 {0x80, 0, 0, 0, 0}, 10070 {0x81, 0, 0, 0, 0}, 10071 {0x82, 0, 0, 0, 0}, 10072 {0x83, 0, 0, 0, 0}, 10073 {0x84, 0, 0, 0, 0}, 10074 {0x85, 0xff, 0xff, 0, 0}, 10075 {0x86, 0, 0, 0, 0}, 10076 {0x87, 0, 0, 0, 0}, 10077 {0x88, 0, 0, 0, 0}, 10078 {0x89, 0, 0, 0, 0}, 10079 {0x8A, 0, 0, 0, 0}, 10080 {0x8B, 0, 0, 0, 0}, 10081 {0x8C, 0, 0, 0, 0}, 10082 {0x8D, 0, 0, 0, 0}, 10083 {0x8E, 0, 0, 0, 0}, 10084 {0x8F, 0, 0, 0, 0}, 10085 {0x90, 0, 0, 0, 0}, 10086 {0x91, 0, 0, 0, 0}, 10087 {0x92, 0, 0, 0, 0}, 10088 {0x93, 0, 0, 0, 0}, 10089 {0x94, 0, 0, 0, 0}, 10090 {0x95, 0, 0, 0, 0}, 10091 {0x96, 0, 0, 0, 0}, 10092 {0x97, 0, 0, 0, 0}, 10093 {0x98, 0, 0, 0, 0}, 10094 {0x99, 0, 0, 0, 0}, 10095 {0x9A, 0, 0, 0, 0}, 10096 {0x9B, 0, 0, 0, 0}, 10097 {0x9C, 0, 0, 0, 0}, 10098 {0x9D, 0, 0, 0, 0}, 10099 {0x9E, 0, 0, 0, 0}, 10100 {0x9F, 0x6, 0x6, 0, 0}, 10101 {0xA0, 0x66, 0x66, 0, 0}, 10102 {0xA1, 0x66, 0x66, 0, 0}, 10103 {0xA2, 0x66, 0x66, 0, 0}, 10104 {0xA3, 0x66, 0x66, 0, 0}, 10105 {0xA4, 0x66, 0x66, 0, 0}, 10106 {0xA5, 0x66, 0x66, 0, 0}, 10107 {0xA6, 0x66, 0x66, 0, 0}, 10108 {0xA7, 0x66, 0x66, 0, 0}, 10109 {0xA8, 0x66, 0x66, 0, 0}, 10110 {0xA9, 0x66, 0x66, 0, 0}, 10111 {0xAA, 0x66, 0x66, 0, 0}, 10112 {0xAB, 0x66, 0x66, 0, 0}, 10113 {0xAC, 0x66, 0x66, 0, 0}, 10114 {0xAD, 0x66, 0x66, 0, 0}, 10115 {0xAE, 0x66, 0x66, 0, 0}, 10116 {0xAF, 0x66, 0x66, 0, 0}, 10117 {0xB0, 0x66, 0x66, 0, 0}, 10118 {0xB1, 0x66, 0x66, 0, 0}, 10119 {0xB2, 0x66, 0x66, 0, 0}, 10120 {0xB3, 0xa, 0xa, 0, 0}, 10121 {0xB4, 0, 0, 0, 0}, 10122 {0xB5, 0, 0, 0, 0}, 10123 {0xB6, 0, 0, 0, 0}, 10124 {0xFFFF, 0, 0, 0, 0}, 10125}; 10126 10127static struct radio_regs regs_TX_2056_rev7[] = { 10128 {0x02, 0, 0, 0, 0}, 10129 {0x03, 0, 0, 0, 0}, 10130 {0x04, 0, 0, 0, 0}, 10131 {0x05, 0, 0, 0, 0}, 10132 {0x06, 0, 0, 0, 0}, 10133 {0x07, 0, 0, 0, 0}, 10134 {0x08, 0, 0, 0, 0}, 10135 {0x09, 0, 0, 0, 0}, 10136 {0x0A, 0, 0, 0, 0}, 10137 {0x0B, 0, 0, 0, 0}, 10138 {0x0C, 0, 0, 0, 0}, 10139 {0x0D, 0, 0, 0, 0}, 10140 {0x0E, 0, 0, 0, 0}, 10141 {0x0F, 0, 0, 0, 0}, 10142 {0x10, 0, 0, 0, 0}, 10143 {0x11, 0, 0, 0, 0}, 10144 {0x12, 0, 0, 0, 0}, 10145 {0x13, 0, 0, 0, 0}, 10146 {0x14, 0, 0, 0, 0}, 10147 {0x15, 0, 0, 0, 0}, 10148 {0x16, 0, 0, 0, 0}, 10149 {0x17, 0, 0, 0, 0}, 10150 {0x18, 0, 0, 0, 0}, 10151 {0x19, 0, 0, 0, 0}, 10152 {0x1A, 0, 0, 0, 0}, 10153 {0x1B, 0, 0, 0, 0}, 10154 {0x1C, 0, 0, 0, 0}, 10155 {0x1D, 0, 0, 0, 0}, 10156 {0x1E, 0, 0, 0, 0}, 10157 {0x1F, 0, 0, 0, 0}, 10158 {0x20, 0, 0, 0, 0}, 10159 {0x21, 0x88, 0x88, 0, 0}, 10160 {0x22, 0x88, 0x88, 0, 0}, 10161 {0x23, 0x88, 0x88, 0, 0}, 10162 {0x24, 0x88, 0x88, 0, 0}, 10163 {0x25, 0xc, 0xc, 0, 0}, 10164 {0x26, 0, 0, 0, 0}, 10165 {0x27, 0x3, 0x3, 0, 0}, 10166 {0x28, 0, 0, 0, 0}, 10167 {0x29, 0x3, 0x3, 0, 0}, 10168 {0x2A, 0x37, 0x37, 0, 0}, 10169 {0x2B, 0x3, 0x3, 0, 0}, 10170 {0x2C, 0, 0, 0, 0}, 10171 {0x2D, 0, 0, 0, 0}, 10172 {0x2E, 0x1, 0x1, 0, 0}, 10173 {0x2F, 0x1, 0x1, 0, 0}, 10174 {0x30, 0, 0, 0, 0}, 10175 {0x31, 0, 0, 0, 0}, 10176 {0x32, 0, 0, 0, 0}, 10177 {0x33, 0x11, 0x11, 0, 0}, 10178 {0x34, 0xee, 0xee, 1, 1}, 10179 {0x35, 0, 0, 0, 0}, 10180 {0x36, 0, 0, 0, 0}, 10181 {0x37, 0x3, 0x3, 0, 0}, 10182 {0x38, 0x50, 0x50, 1, 1}, 10183 {0x39, 0, 0, 0, 0}, 10184 {0x3A, 0x50, 0x50, 1, 1}, 10185 {0x3B, 0, 0, 0, 0}, 10186 {0x3C, 0x6e, 0x6e, 0, 0}, 10187 {0x3D, 0xf0, 0xf0, 1, 1}, 10188 {0x3E, 0, 0, 0, 0}, 10189 {0x3F, 0, 0, 0, 0}, 10190 {0x40, 0, 0, 0, 0}, 10191 {0x41, 0x3, 0x3, 0, 0}, 10192 {0x42, 0x3, 0x3, 0, 0}, 10193 {0x43, 0, 0, 0, 0}, 10194 {0x44, 0x1e, 0x1e, 0, 0}, 10195 {0x45, 0, 0, 0, 0}, 10196 {0x46, 0x6e, 0x6e, 0, 0}, 10197 {0x47, 0xf0, 0xf0, 1, 1}, 10198 {0x48, 0, 0, 0, 0}, 10199 {0x49, 0x2, 0x2, 0, 0}, 10200 {0x4A, 0xff, 0xff, 1, 1}, 10201 {0x4B, 0xc, 0xc, 0, 0}, 10202 {0x4C, 0, 0, 0, 0}, 10203 {0x4D, 0x38, 0x38, 0, 0}, 10204 {0x4E, 0x70, 0x70, 1, 1}, 10205 {0x4F, 0x2, 0x2, 0, 0}, 10206 {0x50, 0x88, 0x88, 0, 0}, 10207 {0x51, 0xc, 0xc, 0, 0}, 10208 {0x52, 0, 0, 0, 0}, 10209 {0x53, 0x8, 0x8, 0, 0}, 10210 {0x54, 0x70, 0x70, 1, 1}, 10211 {0x55, 0x2, 0x2, 0, 0}, 10212 {0x56, 0xff, 0xff, 1, 1}, 10213 {0x57, 0, 0, 0, 0}, 10214 {0x58, 0x83, 0x83, 0, 0}, 10215 {0x59, 0x77, 0x77, 1, 1}, 10216 {0x5A, 0, 0, 0, 0}, 10217 {0x5B, 0x2, 0x2, 0, 0}, 10218 {0x5C, 0x88, 0x88, 0, 0}, 10219 {0x5D, 0, 0, 0, 0}, 10220 {0x5E, 0x8, 0x8, 0, 0}, 10221 {0x5F, 0x77, 0x77, 1, 1}, 10222 {0x60, 0x1, 0x1, 0, 0}, 10223 {0x61, 0, 0, 0, 0}, 10224 {0x62, 0x7, 0x7, 0, 0}, 10225 {0x63, 0, 0, 0, 0}, 10226 {0x64, 0x7, 0x7, 0, 0}, 10227 {0x65, 0, 0, 0, 0}, 10228 {0x66, 0, 0, 0, 0}, 10229 {0x67, 0, 0, 1, 1}, 10230 {0x68, 0, 0, 0, 0}, 10231 {0x69, 0xa, 0xa, 0, 0}, 10232 {0x6A, 0, 0, 0, 0}, 10233 {0x6B, 0, 0, 0, 0}, 10234 {0x6C, 0, 0, 0, 0}, 10235 {0x6D, 0, 0, 0, 0}, 10236 {0x6E, 0, 0, 0, 0}, 10237 {0x6F, 0, 0, 0, 0}, 10238 {0x70, 0, 0, 0, 0}, 10239 {0x71, 0x2, 0x2, 0, 0}, 10240 {0x72, 0, 0, 0, 0}, 10241 {0x73, 0, 0, 0, 0}, 10242 {0x74, 0xe, 0xe, 0, 0}, 10243 {0x75, 0xe, 0xe, 0, 0}, 10244 {0x76, 0xe, 0xe, 0, 0}, 10245 {0x77, 0x13, 0x13, 0, 0}, 10246 {0x78, 0x13, 0x13, 0, 0}, 10247 {0x79, 0x1b, 0x1b, 0, 0}, 10248 {0x7A, 0x1b, 0x1b, 0, 0}, 10249 {0x7B, 0x55, 0x55, 0, 0}, 10250 {0x7C, 0x5b, 0x5b, 0, 0}, 10251 {0x7D, 0x30, 0x30, 1, 1}, 10252 {0x7E, 0, 0, 0, 0}, 10253 {0x7F, 0, 0, 0, 0}, 10254 {0x80, 0, 0, 0, 0}, 10255 {0x81, 0, 0, 0, 0}, 10256 {0x82, 0, 0, 0, 0}, 10257 {0x83, 0, 0, 0, 0}, 10258 {0x84, 0, 0, 0, 0}, 10259 {0x85, 0, 0, 0, 0}, 10260 {0x86, 0, 0, 0, 0}, 10261 {0x87, 0, 0, 0, 0}, 10262 {0x88, 0, 0, 0, 0}, 10263 {0x89, 0, 0, 0, 0}, 10264 {0x8A, 0, 0, 0, 0}, 10265 {0x8B, 0, 0, 0, 0}, 10266 {0x8C, 0, 0, 0, 0}, 10267 {0x8D, 0, 0, 0, 0}, 10268 {0x8E, 0, 0, 0, 0}, 10269 {0x8F, 0, 0, 0, 0}, 10270 {0x90, 0, 0, 0, 0}, 10271 {0x91, 0, 0, 0, 0}, 10272 {0x92, 0, 0, 0, 0}, 10273 {0x93, 0x70, 0x70, 0, 0}, 10274 {0x94, 0x70, 0x70, 0, 0}, 10275 {0x95, 0x71, 0x71, 1, 1}, 10276 {0x96, 0x71, 0x71, 1, 1}, 10277 {0x97, 0x72, 0x72, 1, 1}, 10278 {0x98, 0x73, 0x73, 1, 1}, 10279 {0x99, 0x74, 0x74, 1, 1}, 10280 {0x9A, 0x75, 0x75, 1, 1}, 10281 {0xFFFF, 0, 0, 0, 0}, 10282}; 10283 10284static struct radio_regs regs_RX_2056_rev7[] = { 10285 {0x02, 0, 0, 0, 0}, 10286 {0x03, 0, 0, 0, 0}, 10287 {0x04, 0, 0, 0, 0}, 10288 {0x05, 0, 0, 0, 0}, 10289 {0x06, 0, 0, 0, 0}, 10290 {0x07, 0, 0, 0, 0}, 10291 {0x08, 0, 0, 0, 0}, 10292 {0x09, 0, 0, 0, 0}, 10293 {0x0A, 0, 0, 0, 0}, 10294 {0x0B, 0, 0, 0, 0}, 10295 {0x0C, 0, 0, 0, 0}, 10296 {0x0D, 0, 0, 0, 0}, 10297 {0x0E, 0, 0, 0, 0}, 10298 {0x0F, 0, 0, 0, 0}, 10299 {0x10, 0, 0, 0, 0}, 10300 {0x11, 0, 0, 0, 0}, 10301 {0x12, 0, 0, 0, 0}, 10302 {0x13, 0, 0, 0, 0}, 10303 {0x14, 0, 0, 0, 0}, 10304 {0x15, 0, 0, 0, 0}, 10305 {0x16, 0, 0, 0, 0}, 10306 {0x17, 0, 0, 0, 0}, 10307 {0x18, 0, 0, 0, 0}, 10308 {0x19, 0, 0, 0, 0}, 10309 {0x1A, 0, 0, 0, 0}, 10310 {0x1B, 0, 0, 0, 0}, 10311 {0x1C, 0, 0, 0, 0}, 10312 {0x1D, 0, 0, 0, 0}, 10313 {0x1E, 0, 0, 0, 0}, 10314 {0x1F, 0, 0, 0, 0}, 10315 {0x20, 0x3, 0x3, 0, 0}, 10316 {0x21, 0, 0, 0, 0}, 10317 {0x22, 0, 0, 0, 0}, 10318 {0x23, 0x90, 0x90, 0, 0}, 10319 {0x24, 0x55, 0x55, 0, 0}, 10320 {0x25, 0x15, 0x15, 0, 0}, 10321 {0x26, 0x5, 0x5, 0, 0}, 10322 {0x27, 0x15, 0x15, 0, 0}, 10323 {0x28, 0x5, 0x5, 0, 0}, 10324 {0x29, 0x20, 0x20, 0, 0}, 10325 {0x2A, 0x11, 0x11, 0, 0}, 10326 {0x2B, 0x90, 0x90, 0, 0}, 10327 {0x2C, 0, 0, 0, 0}, 10328 {0x2D, 0x88, 0x88, 0, 0}, 10329 {0x2E, 0x32, 0x32, 0, 0}, 10330 {0x2F, 0x77, 0x77, 0, 0}, 10331 {0x30, 0x17, 0x17, 1, 1}, 10332 {0x31, 0xff, 0xff, 1, 1}, 10333 {0x32, 0x20, 0x20, 0, 0}, 10334 {0x33, 0, 0, 0, 0}, 10335 {0x34, 0x88, 0x88, 0, 0}, 10336 {0x35, 0x32, 0x32, 0, 0}, 10337 {0x36, 0x77, 0x77, 0, 0}, 10338 {0x37, 0x17, 0x17, 1, 1}, 10339 {0x38, 0xf0, 0xf0, 1, 1}, 10340 {0x39, 0x20, 0x20, 0, 0}, 10341 {0x3A, 0x8, 0x8, 0, 0}, 10342 {0x3B, 0x55, 0x55, 1, 1}, 10343 {0x3C, 0, 0, 0, 0}, 10344 {0x3D, 0x88, 0x88, 1, 1}, 10345 {0x3E, 0, 0, 0, 0}, 10346 {0x3F, 0, 0, 1, 1}, 10347 {0x40, 0x7, 0x7, 1, 1}, 10348 {0x41, 0x6, 0x6, 0, 0}, 10349 {0x42, 0x4, 0x4, 0, 0}, 10350 {0x43, 0, 0, 0, 0}, 10351 {0x44, 0x8, 0x8, 0, 0}, 10352 {0x45, 0x55, 0x55, 1, 1}, 10353 {0x46, 0, 0, 0, 0}, 10354 {0x47, 0x11, 0x11, 0, 0}, 10355 {0x48, 0, 0, 0, 0}, 10356 {0x49, 0, 0, 1, 1}, 10357 {0x4A, 0x7, 0x7, 0, 0}, 10358 {0x4B, 0x6, 0x6, 0, 0}, 10359 {0x4C, 0x4, 0x4, 0, 0}, 10360 {0x4D, 0, 0, 0, 0}, 10361 {0x4E, 0, 0, 0, 0}, 10362 {0x4F, 0x26, 0x26, 1, 1}, 10363 {0x50, 0x26, 0x26, 1, 1}, 10364 {0x51, 0xf, 0xf, 1, 1}, 10365 {0x52, 0xf, 0xf, 1, 1}, 10366 {0x53, 0x44, 0x44, 0, 0}, 10367 {0x54, 0, 0, 0, 0}, 10368 {0x55, 0, 0, 0, 0}, 10369 {0x56, 0x8, 0x8, 0, 0}, 10370 {0x57, 0x8, 0x8, 0, 0}, 10371 {0x58, 0x7, 0x7, 0, 0}, 10372 {0x59, 0x22, 0x22, 0, 0}, 10373 {0x5A, 0x22, 0x22, 0, 0}, 10374 {0x5B, 0x2, 0x2, 0, 0}, 10375 {0x5C, 0x4, 0x4, 1, 1}, 10376 {0x5D, 0x7, 0x7, 0, 0}, 10377 {0x5E, 0x55, 0x55, 0, 0}, 10378 {0x5F, 0x23, 0x23, 0, 0}, 10379 {0x60, 0x41, 0x41, 0, 0}, 10380 {0x61, 0x1, 0x1, 0, 0}, 10381 {0x62, 0xa, 0xa, 0, 0}, 10382 {0x63, 0, 0, 0, 0}, 10383 {0x64, 0, 0, 0, 0}, 10384 {0x65, 0, 0, 0, 0}, 10385 {0x66, 0, 0, 0, 0}, 10386 {0x67, 0, 0, 0, 0}, 10387 {0x68, 0, 0, 0, 0}, 10388 {0x69, 0, 0, 0, 0}, 10389 {0x6A, 0, 0, 0, 0}, 10390 {0x6B, 0xc, 0xc, 0, 0}, 10391 {0x6C, 0, 0, 0, 0}, 10392 {0x6D, 0, 0, 0, 0}, 10393 {0x6E, 0, 0, 0, 0}, 10394 {0x6F, 0, 0, 0, 0}, 10395 {0x70, 0, 0, 0, 0}, 10396 {0x71, 0, 0, 0, 0}, 10397 {0x72, 0x22, 0x22, 0, 0}, 10398 {0x73, 0x22, 0x22, 0, 0}, 10399 {0x74, 0, 0, 1, 1}, 10400 {0x75, 0xa, 0xa, 0, 0}, 10401 {0x76, 0x1, 0x1, 0, 0}, 10402 {0x77, 0x22, 0x22, 0, 0}, 10403 {0x78, 0x30, 0x30, 0, 0}, 10404 {0x79, 0, 0, 0, 0}, 10405 {0x7A, 0, 0, 0, 0}, 10406 {0x7B, 0, 0, 0, 0}, 10407 {0x7C, 0, 0, 0, 0}, 10408 {0x7D, 0, 0, 0, 0}, 10409 {0x7E, 0, 0, 0, 0}, 10410 {0x7F, 0, 0, 0, 0}, 10411 {0x80, 0, 0, 0, 0}, 10412 {0x81, 0, 0, 0, 0}, 10413 {0x82, 0, 0, 0, 0}, 10414 {0x83, 0, 0, 0, 0}, 10415 {0x84, 0, 0, 0, 0}, 10416 {0x85, 0, 0, 0, 0}, 10417 {0x86, 0, 0, 0, 0}, 10418 {0x87, 0, 0, 0, 0}, 10419 {0x88, 0, 0, 0, 0}, 10420 {0x89, 0, 0, 0, 0}, 10421 {0x8A, 0, 0, 0, 0}, 10422 {0x8B, 0, 0, 0, 0}, 10423 {0x8C, 0, 0, 0, 0}, 10424 {0x8D, 0, 0, 0, 0}, 10425 {0x8E, 0, 0, 0, 0}, 10426 {0x8F, 0, 0, 0, 0}, 10427 {0x90, 0, 0, 0, 0}, 10428 {0x91, 0, 0, 0, 0}, 10429 {0x92, 0, 0, 0, 0}, 10430 {0x93, 0, 0, 0, 0}, 10431 {0x94, 0, 0, 0, 0}, 10432 {0xFFFF, 0, 0, 0, 0}, 10433}; 10434 10435static struct radio_regs regs_SYN_2056_rev8[] = { 10436 {0x02, 0, 0, 0, 0}, 10437 {0x03, 0, 0, 0, 0}, 10438 {0x04, 0, 0, 0, 0}, 10439 {0x05, 0, 0, 0, 0}, 10440 {0x06, 0, 0, 0, 0}, 10441 {0x07, 0, 0, 0, 0}, 10442 {0x08, 0, 0, 0, 0}, 10443 {0x09, 0x1, 0x1, 0, 0}, 10444 {0x0A, 0, 0, 0, 0}, 10445 {0x0B, 0, 0, 0, 0}, 10446 {0x0C, 0, 0, 0, 0}, 10447 {0x0D, 0, 0, 0, 0}, 10448 {0x0E, 0, 0, 0, 0}, 10449 {0x0F, 0, 0, 0, 0}, 10450 {0x10, 0, 0, 0, 0}, 10451 {0x11, 0, 0, 0, 0}, 10452 {0x12, 0, 0, 0, 0}, 10453 {0x13, 0, 0, 0, 0}, 10454 {0x14, 0, 0, 0, 0}, 10455 {0x15, 0, 0, 0, 0}, 10456 {0x16, 0, 0, 0, 0}, 10457 {0x17, 0, 0, 0, 0}, 10458 {0x18, 0, 0, 0, 0}, 10459 {0x19, 0, 0, 0, 0}, 10460 {0x1A, 0, 0, 0, 0}, 10461 {0x1B, 0, 0, 0, 0}, 10462 {0x1C, 0, 0, 0, 0}, 10463 {0x1D, 0, 0, 0, 0}, 10464 {0x1E, 0, 0, 0, 0}, 10465 {0x1F, 0, 0, 0, 0}, 10466 {0x20, 0, 0, 0, 0}, 10467 {0x21, 0, 0, 0, 0}, 10468 {0x22, 0x60, 0x60, 0, 0}, 10469 {0x23, 0x6, 0x6, 0, 0}, 10470 {0x24, 0xc, 0xc, 0, 0}, 10471 {0x25, 0, 0, 0, 0}, 10472 {0x26, 0, 0, 0, 0}, 10473 {0x27, 0, 0, 0, 0}, 10474 {0x28, 0x1, 0x1, 0, 0}, 10475 {0x29, 0, 0, 0, 0}, 10476 {0x2A, 0, 0, 0, 0}, 10477 {0x2B, 0, 0, 0, 0}, 10478 {0x2C, 0, 0, 0, 0}, 10479 {0x2D, 0, 0, 0, 0}, 10480 {0x2E, 0, 0, 0, 0}, 10481 {0x2F, 0x1f, 0x1f, 0, 0}, 10482 {0x30, 0x15, 0x15, 0, 0}, 10483 {0x31, 0xf, 0xf, 0, 0}, 10484 {0x32, 0, 0, 0, 0}, 10485 {0x33, 0, 0, 0, 0}, 10486 {0x34, 0, 0, 0, 0}, 10487 {0x35, 0, 0, 0, 0}, 10488 {0x36, 0, 0, 0, 0}, 10489 {0x37, 0, 0, 0, 0}, 10490 {0x38, 0, 0, 0, 0}, 10491 {0x39, 0, 0, 0, 0}, 10492 {0x3A, 0, 0, 0, 0}, 10493 {0x3B, 0, 0, 0, 0}, 10494 {0x3C, 0x13, 0x13, 0, 0}, 10495 {0x3D, 0xf, 0xf, 0, 0}, 10496 {0x3E, 0x18, 0x18, 0, 0}, 10497 {0x3F, 0, 0, 0, 0}, 10498 {0x40, 0, 0, 0, 0}, 10499 {0x41, 0x20, 0x20, 0, 0}, 10500 {0x42, 0x20, 0x20, 0, 0}, 10501 {0x43, 0, 0, 0, 0}, 10502 {0x44, 0x77, 0x77, 0, 0}, 10503 {0x45, 0x7, 0x7, 0, 0}, 10504 {0x46, 0x1, 0x1, 0, 0}, 10505 {0x47, 0x4, 0x4, 0, 0}, 10506 {0x48, 0xf, 0xf, 0, 0}, 10507 {0x49, 0x30, 0x30, 0, 0}, 10508 {0x4A, 0x32, 0x32, 0, 0}, 10509 {0x4B, 0xd, 0xd, 0, 0}, 10510 {0x4C, 0xd, 0xd, 0, 0}, 10511 {0x4D, 0x4, 0x4, 0, 0}, 10512 {0x4E, 0x6, 0x6, 0, 0}, 10513 {0x4F, 0x1, 0x1, 0, 0}, 10514 {0x50, 0x1c, 0x1c, 0, 0}, 10515 {0x51, 0x2, 0x2, 0, 0}, 10516 {0x52, 0x2, 0x2, 0, 0}, 10517 {0x53, 0xf7, 0xf7, 1, 1}, 10518 {0x54, 0xb4, 0xb4, 0, 0}, 10519 {0x55, 0xd2, 0xd2, 0, 0}, 10520 {0x56, 0, 0, 0, 0}, 10521 {0x57, 0, 0, 0, 0}, 10522 {0x58, 0x4, 0x4, 0, 0}, 10523 {0x59, 0x96, 0x96, 0, 0}, 10524 {0x5A, 0x3e, 0x3e, 0, 0}, 10525 {0x5B, 0x3e, 0x3e, 0, 0}, 10526 {0x5C, 0x13, 0x13, 0, 0}, 10527 {0x5D, 0x2, 0x2, 0, 0}, 10528 {0x5E, 0, 0, 0, 0}, 10529 {0x5F, 0x7, 0x7, 0, 0}, 10530 {0x60, 0x7, 0x7, 1, 1}, 10531 {0x61, 0x8, 0x8, 0, 0}, 10532 {0x62, 0x3, 0x3, 0, 0}, 10533 {0x63, 0, 0, 0, 0}, 10534 {0x64, 0, 0, 0, 0}, 10535 {0x65, 0, 0, 0, 0}, 10536 {0x66, 0, 0, 0, 0}, 10537 {0x67, 0, 0, 0, 0}, 10538 {0x68, 0x40, 0x40, 0, 0}, 10539 {0x69, 0, 0, 0, 0}, 10540 {0x6A, 0, 0, 0, 0}, 10541 {0x6B, 0, 0, 0, 0}, 10542 {0x6C, 0, 0, 0, 0}, 10543 {0x6D, 0x1, 0x1, 0, 0}, 10544 {0x6E, 0, 0, 0, 0}, 10545 {0x6F, 0, 0, 0, 0}, 10546 {0x70, 0x60, 0x60, 0, 0}, 10547 {0x71, 0x66, 0x66, 0, 0}, 10548 {0x72, 0xc, 0xc, 0, 0}, 10549 {0x73, 0x66, 0x66, 0, 0}, 10550 {0x74, 0x8f, 0x8f, 1, 1}, 10551 {0x75, 0, 0, 0, 0}, 10552 {0x76, 0xcc, 0xcc, 0, 0}, 10553 {0x77, 0x1, 0x1, 0, 0}, 10554 {0x78, 0x66, 0x66, 0, 0}, 10555 {0x79, 0x66, 0x66, 0, 0}, 10556 {0x7A, 0, 0, 0, 0}, 10557 {0x7B, 0, 0, 0, 0}, 10558 {0x7C, 0, 0, 0, 0}, 10559 {0x7D, 0, 0, 0, 0}, 10560 {0x7E, 0, 0, 0, 0}, 10561 {0x7F, 0, 0, 0, 0}, 10562 {0x80, 0, 0, 0, 0}, 10563 {0x81, 0, 0, 0, 0}, 10564 {0x82, 0, 0, 0, 0}, 10565 {0x83, 0, 0, 0, 0}, 10566 {0x84, 0, 0, 0, 0}, 10567 {0x85, 0xff, 0xff, 0, 0}, 10568 {0x86, 0, 0, 0, 0}, 10569 {0x87, 0, 0, 0, 0}, 10570 {0x88, 0, 0, 0, 0}, 10571 {0x89, 0, 0, 0, 0}, 10572 {0x8A, 0, 0, 0, 0}, 10573 {0x8B, 0, 0, 0, 0}, 10574 {0x8C, 0, 0, 0, 0}, 10575 {0x8D, 0, 0, 0, 0}, 10576 {0x8E, 0, 0, 0, 0}, 10577 {0x8F, 0, 0, 0, 0}, 10578 {0x90, 0, 0, 0, 0}, 10579 {0x91, 0, 0, 0, 0}, 10580 {0x92, 0, 0, 0, 0}, 10581 {0x93, 0, 0, 0, 0}, 10582 {0x94, 0, 0, 0, 0}, 10583 {0x95, 0, 0, 0, 0}, 10584 {0x96, 0, 0, 0, 0}, 10585 {0x97, 0, 0, 0, 0}, 10586 {0x98, 0, 0, 0, 0}, 10587 {0x99, 0, 0, 0, 0}, 10588 {0x9A, 0, 0, 0, 0}, 10589 {0x9B, 0, 0, 0, 0}, 10590 {0x9C, 0, 0, 0, 0}, 10591 {0x9D, 0, 0, 0, 0}, 10592 {0x9E, 0, 0, 0, 0}, 10593 {0x9F, 0x6, 0x6, 0, 0}, 10594 {0xA0, 0x66, 0x66, 0, 0}, 10595 {0xA1, 0x66, 0x66, 0, 0}, 10596 {0xA2, 0x66, 0x66, 0, 0}, 10597 {0xA3, 0x66, 0x66, 0, 0}, 10598 {0xA4, 0x66, 0x66, 0, 0}, 10599 {0xA5, 0x66, 0x66, 0, 0}, 10600 {0xA6, 0x66, 0x66, 0, 0}, 10601 {0xA7, 0x66, 0x66, 0, 0}, 10602 {0xA8, 0x66, 0x66, 0, 0}, 10603 {0xA9, 0x66, 0x66, 0, 0}, 10604 {0xAA, 0x66, 0x66, 0, 0}, 10605 {0xAB, 0x66, 0x66, 0, 0}, 10606 {0xAC, 0x66, 0x66, 0, 0}, 10607 {0xAD, 0x66, 0x66, 0, 0}, 10608 {0xAE, 0x66, 0x66, 0, 0}, 10609 {0xAF, 0x66, 0x66, 0, 0}, 10610 {0xB0, 0x66, 0x66, 0, 0}, 10611 {0xB1, 0x66, 0x66, 0, 0}, 10612 {0xB2, 0x66, 0x66, 0, 0}, 10613 {0xB3, 0xa, 0xa, 0, 0}, 10614 {0xB4, 0, 0, 0, 0}, 10615 {0xB5, 0, 0, 0, 0}, 10616 {0xB6, 0, 0, 0, 0}, 10617 {0xFFFF, 0, 0, 0, 0}, 10618}; 10619 10620static struct radio_regs regs_TX_2056_rev8[] = { 10621 {0x02, 0, 0, 0, 0}, 10622 {0x03, 0, 0, 0, 0}, 10623 {0x04, 0, 0, 0, 0}, 10624 {0x05, 0, 0, 0, 0}, 10625 {0x06, 0, 0, 0, 0}, 10626 {0x07, 0, 0, 0, 0}, 10627 {0x08, 0, 0, 0, 0}, 10628 {0x09, 0, 0, 0, 0}, 10629 {0x0A, 0, 0, 0, 0}, 10630 {0x0B, 0, 0, 0, 0}, 10631 {0x0C, 0, 0, 0, 0}, 10632 {0x0D, 0, 0, 0, 0}, 10633 {0x0E, 0, 0, 0, 0}, 10634 {0x0F, 0, 0, 0, 0}, 10635 {0x10, 0, 0, 0, 0}, 10636 {0x11, 0, 0, 0, 0}, 10637 {0x12, 0, 0, 0, 0}, 10638 {0x13, 0, 0, 0, 0}, 10639 {0x14, 0, 0, 0, 0}, 10640 {0x15, 0, 0, 0, 0}, 10641 {0x16, 0, 0, 0, 0}, 10642 {0x17, 0, 0, 0, 0}, 10643 {0x18, 0, 0, 0, 0}, 10644 {0x19, 0, 0, 0, 0}, 10645 {0x1A, 0, 0, 0, 0}, 10646 {0x1B, 0, 0, 0, 0}, 10647 {0x1C, 0, 0, 0, 0}, 10648 {0x1D, 0, 0, 0, 0}, 10649 {0x1E, 0, 0, 0, 0}, 10650 {0x1F, 0, 0, 0, 0}, 10651 {0x20, 0, 0, 0, 0}, 10652 {0x21, 0x88, 0x88, 0, 0}, 10653 {0x22, 0x88, 0x88, 0, 0}, 10654 {0x23, 0x88, 0x88, 0, 0}, 10655 {0x24, 0x88, 0x88, 0, 0}, 10656 {0x25, 0xc, 0xc, 0, 0}, 10657 {0x26, 0, 0, 0, 0}, 10658 {0x27, 0x3, 0x3, 0, 0}, 10659 {0x28, 0, 0, 0, 0}, 10660 {0x29, 0x3, 0x3, 0, 0}, 10661 {0x2A, 0x37, 0x37, 0, 0}, 10662 {0x2B, 0x3, 0x3, 0, 0}, 10663 {0x2C, 0, 0, 0, 0}, 10664 {0x2D, 0, 0, 0, 0}, 10665 {0x2E, 0x1, 0x1, 0, 0}, 10666 {0x2F, 0x1, 0x1, 0, 0}, 10667 {0x30, 0, 0, 0, 0}, 10668 {0x31, 0, 0, 0, 0}, 10669 {0x32, 0, 0, 0, 0}, 10670 {0x33, 0x11, 0x11, 0, 0}, 10671 {0x34, 0xee, 0xee, 1, 1}, 10672 {0x35, 0, 0, 0, 0}, 10673 {0x36, 0, 0, 0, 0}, 10674 {0x37, 0x3, 0x3, 0, 0}, 10675 {0x38, 0x50, 0x50, 1, 1}, 10676 {0x39, 0, 0, 0, 0}, 10677 {0x3A, 0x50, 0x50, 1, 1}, 10678 {0x3B, 0, 0, 0, 0}, 10679 {0x3C, 0x6e, 0x6e, 0, 0}, 10680 {0x3D, 0xf0, 0xf0, 1, 1}, 10681 {0x3E, 0, 0, 0, 0}, 10682 {0x3F, 0, 0, 0, 0}, 10683 {0x40, 0, 0, 0, 0}, 10684 {0x41, 0x3, 0x3, 0, 0}, 10685 {0x42, 0x3, 0x3, 0, 0}, 10686 {0x43, 0, 0, 0, 0}, 10687 {0x44, 0x1e, 0x1e, 0, 0}, 10688 {0x45, 0, 0, 0, 0}, 10689 {0x46, 0x6e, 0x6e, 0, 0}, 10690 {0x47, 0xf0, 0xf0, 1, 1}, 10691 {0x48, 0, 0, 0, 0}, 10692 {0x49, 0x2, 0x2, 0, 0}, 10693 {0x4A, 0xff, 0xff, 1, 1}, 10694 {0x4B, 0xc, 0xc, 0, 0}, 10695 {0x4C, 0, 0, 0, 0}, 10696 {0x4D, 0x38, 0x38, 0, 0}, 10697 {0x4E, 0x70, 0x70, 1, 1}, 10698 {0x4F, 0x2, 0x2, 0, 0}, 10699 {0x50, 0x88, 0x88, 0, 0}, 10700 {0x51, 0xc, 0xc, 0, 0}, 10701 {0x52, 0, 0, 0, 0}, 10702 {0x53, 0x8, 0x8, 0, 0}, 10703 {0x54, 0x70, 0x70, 1, 1}, 10704 {0x55, 0x2, 0x2, 0, 0}, 10705 {0x56, 0xff, 0xff, 1, 1}, 10706 {0x57, 0, 0, 0, 0}, 10707 {0x58, 0x83, 0x83, 0, 0}, 10708 {0x59, 0x77, 0x77, 1, 1}, 10709 {0x5A, 0, 0, 0, 0}, 10710 {0x5B, 0x2, 0x2, 0, 0}, 10711 {0x5C, 0x88, 0x88, 0, 0}, 10712 {0x5D, 0, 0, 0, 0}, 10713 {0x5E, 0x8, 0x8, 0, 0}, 10714 {0x5F, 0x77, 0x77, 1, 1}, 10715 {0x60, 0x1, 0x1, 0, 0}, 10716 {0x61, 0, 0, 0, 0}, 10717 {0x62, 0x7, 0x7, 0, 0}, 10718 {0x63, 0, 0, 0, 0}, 10719 {0x64, 0x7, 0x7, 0, 0}, 10720 {0x65, 0, 0, 0, 0}, 10721 {0x66, 0, 0, 0, 0}, 10722 {0x67, 0, 0, 1, 1}, 10723 {0x68, 0, 0, 0, 0}, 10724 {0x69, 0xa, 0xa, 0, 0}, 10725 {0x6A, 0, 0, 0, 0}, 10726 {0x6B, 0, 0, 0, 0}, 10727 {0x6C, 0, 0, 0, 0}, 10728 {0x6D, 0, 0, 0, 0}, 10729 {0x6E, 0, 0, 0, 0}, 10730 {0x6F, 0, 0, 0, 0}, 10731 {0x70, 0, 0, 0, 0}, 10732 {0x71, 0x2, 0x2, 0, 0}, 10733 {0x72, 0, 0, 0, 0}, 10734 {0x73, 0, 0, 0, 0}, 10735 {0x74, 0xe, 0xe, 0, 0}, 10736 {0x75, 0xe, 0xe, 0, 0}, 10737 {0x76, 0xe, 0xe, 0, 0}, 10738 {0x77, 0x13, 0x13, 0, 0}, 10739 {0x78, 0x13, 0x13, 0, 0}, 10740 {0x79, 0x1b, 0x1b, 0, 0}, 10741 {0x7A, 0x1b, 0x1b, 0, 0}, 10742 {0x7B, 0x55, 0x55, 0, 0}, 10743 {0x7C, 0x5b, 0x5b, 0, 0}, 10744 {0x7D, 0x30, 0x30, 1, 1}, 10745 {0x7E, 0, 0, 0, 0}, 10746 {0x7F, 0, 0, 0, 0}, 10747 {0x80, 0, 0, 0, 0}, 10748 {0x81, 0, 0, 0, 0}, 10749 {0x82, 0, 0, 0, 0}, 10750 {0x83, 0, 0, 0, 0}, 10751 {0x84, 0, 0, 0, 0}, 10752 {0x85, 0, 0, 0, 0}, 10753 {0x86, 0, 0, 0, 0}, 10754 {0x87, 0, 0, 0, 0}, 10755 {0x88, 0, 0, 0, 0}, 10756 {0x89, 0, 0, 0, 0}, 10757 {0x8A, 0, 0, 0, 0}, 10758 {0x8B, 0, 0, 0, 0}, 10759 {0x8C, 0, 0, 0, 0}, 10760 {0x8D, 0, 0, 0, 0}, 10761 {0x8E, 0, 0, 0, 0}, 10762 {0x8F, 0, 0, 0, 0}, 10763 {0x90, 0, 0, 0, 0}, 10764 {0x91, 0, 0, 0, 0}, 10765 {0x92, 0, 0, 0, 0}, 10766 {0x93, 0x70, 0x70, 0, 0}, 10767 {0x94, 0x70, 0x70, 0, 0}, 10768 {0x95, 0x70, 0x70, 0, 0}, 10769 {0x96, 0x70, 0x70, 0, 0}, 10770 {0x97, 0x70, 0x70, 0, 0}, 10771 {0x98, 0x70, 0x70, 0, 0}, 10772 {0x99, 0x70, 0x70, 0, 0}, 10773 {0x9A, 0x70, 0x70, 0, 0}, 10774 {0xFFFF, 0, 0, 0, 0}, 10775}; 10776 10777static struct radio_regs regs_RX_2056_rev8[] = { 10778 {0x02, 0, 0, 0, 0}, 10779 {0x03, 0, 0, 0, 0}, 10780 {0x04, 0, 0, 0, 0}, 10781 {0x05, 0, 0, 0, 0}, 10782 {0x06, 0, 0, 0, 0}, 10783 {0x07, 0, 0, 0, 0}, 10784 {0x08, 0, 0, 0, 0}, 10785 {0x09, 0, 0, 0, 0}, 10786 {0x0A, 0, 0, 0, 0}, 10787 {0x0B, 0, 0, 0, 0}, 10788 {0x0C, 0, 0, 0, 0}, 10789 {0x0D, 0, 0, 0, 0}, 10790 {0x0E, 0, 0, 0, 0}, 10791 {0x0F, 0, 0, 0, 0}, 10792 {0x10, 0, 0, 0, 0}, 10793 {0x11, 0, 0, 0, 0}, 10794 {0x12, 0, 0, 0, 0}, 10795 {0x13, 0, 0, 0, 0}, 10796 {0x14, 0, 0, 0, 0}, 10797 {0x15, 0, 0, 0, 0}, 10798 {0x16, 0, 0, 0, 0}, 10799 {0x17, 0, 0, 0, 0}, 10800 {0x18, 0, 0, 0, 0}, 10801 {0x19, 0, 0, 0, 0}, 10802 {0x1A, 0, 0, 0, 0}, 10803 {0x1B, 0, 0, 0, 0}, 10804 {0x1C, 0, 0, 0, 0}, 10805 {0x1D, 0, 0, 0, 0}, 10806 {0x1E, 0, 0, 0, 0}, 10807 {0x1F, 0, 0, 0, 0}, 10808 {0x20, 0x3, 0x3, 0, 0}, 10809 {0x21, 0, 0, 0, 0}, 10810 {0x22, 0, 0, 0, 0}, 10811 {0x23, 0x90, 0x90, 0, 0}, 10812 {0x24, 0x55, 0x55, 0, 0}, 10813 {0x25, 0x15, 0x15, 0, 0}, 10814 {0x26, 0x5, 0x5, 0, 0}, 10815 {0x27, 0x15, 0x15, 0, 0}, 10816 {0x28, 0x5, 0x5, 0, 0}, 10817 {0x29, 0x20, 0x20, 0, 0}, 10818 {0x2A, 0x11, 0x11, 0, 0}, 10819 {0x2B, 0x90, 0x90, 0, 0}, 10820 {0x2C, 0, 0, 0, 0}, 10821 {0x2D, 0x88, 0x88, 0, 0}, 10822 {0x2E, 0x32, 0x32, 0, 0}, 10823 {0x2F, 0x77, 0x77, 0, 0}, 10824 {0x30, 0x17, 0x17, 1, 1}, 10825 {0x31, 0xff, 0xff, 1, 1}, 10826 {0x32, 0x20, 0x20, 0, 0}, 10827 {0x33, 0, 0, 0, 0}, 10828 {0x34, 0x88, 0x88, 0, 0}, 10829 {0x35, 0x32, 0x32, 0, 0}, 10830 {0x36, 0x77, 0x77, 0, 0}, 10831 {0x37, 0x17, 0x17, 1, 1}, 10832 {0x38, 0xf0, 0xf0, 1, 1}, 10833 {0x39, 0x20, 0x20, 0, 0}, 10834 {0x3A, 0x8, 0x8, 0, 0}, 10835 {0x3B, 0x55, 0x55, 1, 1}, 10836 {0x3C, 0, 0, 0, 0}, 10837 {0x3D, 0x88, 0x88, 1, 1}, 10838 {0x3E, 0, 0, 0, 0}, 10839 {0x3F, 0x44, 0x44, 0, 0}, 10840 {0x40, 0x7, 0x7, 1, 1}, 10841 {0x41, 0x6, 0x6, 0, 0}, 10842 {0x42, 0x4, 0x4, 0, 0}, 10843 {0x43, 0, 0, 0, 0}, 10844 {0x44, 0x8, 0x8, 0, 0}, 10845 {0x45, 0x55, 0x55, 1, 1}, 10846 {0x46, 0, 0, 0, 0}, 10847 {0x47, 0x11, 0x11, 0, 0}, 10848 {0x48, 0, 0, 0, 0}, 10849 {0x49, 0x44, 0x44, 0, 0}, 10850 {0x4A, 0x7, 0x7, 0, 0}, 10851 {0x4B, 0x6, 0x6, 0, 0}, 10852 {0x4C, 0x4, 0x4, 0, 0}, 10853 {0x4D, 0, 0, 0, 0}, 10854 {0x4E, 0, 0, 0, 0}, 10855 {0x4F, 0x26, 0x26, 1, 1}, 10856 {0x50, 0x26, 0x26, 1, 1}, 10857 {0x51, 0xf, 0xf, 1, 1}, 10858 {0x52, 0xf, 0xf, 1, 1}, 10859 {0x53, 0x44, 0x44, 0, 0}, 10860 {0x54, 0, 0, 0, 0}, 10861 {0x55, 0, 0, 0, 0}, 10862 {0x56, 0x8, 0x8, 0, 0}, 10863 {0x57, 0x8, 0x8, 0, 0}, 10864 {0x58, 0x7, 0x7, 0, 0}, 10865 {0x59, 0x22, 0x22, 0, 0}, 10866 {0x5A, 0x22, 0x22, 0, 0}, 10867 {0x5B, 0x2, 0x2, 0, 0}, 10868 {0x5C, 0x4, 0x4, 1, 1}, 10869 {0x5D, 0x7, 0x7, 0, 0}, 10870 {0x5E, 0x55, 0x55, 0, 0}, 10871 {0x5F, 0x23, 0x23, 0, 0}, 10872 {0x60, 0x41, 0x41, 0, 0}, 10873 {0x61, 0x1, 0x1, 0, 0}, 10874 {0x62, 0xa, 0xa, 0, 0}, 10875 {0x63, 0, 0, 0, 0}, 10876 {0x64, 0, 0, 0, 0}, 10877 {0x65, 0, 0, 0, 0}, 10878 {0x66, 0, 0, 0, 0}, 10879 {0x67, 0, 0, 0, 0}, 10880 {0x68, 0, 0, 0, 0}, 10881 {0x69, 0, 0, 0, 0}, 10882 {0x6A, 0, 0, 0, 0}, 10883 {0x6B, 0xc, 0xc, 0, 0}, 10884 {0x6C, 0, 0, 0, 0}, 10885 {0x6D, 0, 0, 0, 0}, 10886 {0x6E, 0, 0, 0, 0}, 10887 {0x6F, 0, 0, 0, 0}, 10888 {0x70, 0, 0, 0, 0}, 10889 {0x71, 0, 0, 0, 0}, 10890 {0x72, 0x22, 0x22, 0, 0}, 10891 {0x73, 0x22, 0x22, 0, 0}, 10892 {0x74, 0, 0, 1, 1}, 10893 {0x75, 0xa, 0xa, 0, 0}, 10894 {0x76, 0x1, 0x1, 0, 0}, 10895 {0x77, 0x22, 0x22, 0, 0}, 10896 {0x78, 0x30, 0x30, 0, 0}, 10897 {0x79, 0, 0, 0, 0}, 10898 {0x7A, 0, 0, 0, 0}, 10899 {0x7B, 0, 0, 0, 0}, 10900 {0x7C, 0, 0, 0, 0}, 10901 {0x7D, 0x5, 0x5, 1, 1}, 10902 {0x7E, 0, 0, 0, 0}, 10903 {0x7F, 0, 0, 0, 0}, 10904 {0x80, 0, 0, 0, 0}, 10905 {0x81, 0, 0, 0, 0}, 10906 {0x82, 0, 0, 0, 0}, 10907 {0x83, 0, 0, 0, 0}, 10908 {0x84, 0, 0, 0, 0}, 10909 {0x85, 0, 0, 0, 0}, 10910 {0x86, 0, 0, 0, 0}, 10911 {0x87, 0, 0, 0, 0}, 10912 {0x88, 0, 0, 0, 0}, 10913 {0x89, 0, 0, 0, 0}, 10914 {0x8A, 0, 0, 0, 0}, 10915 {0x8B, 0, 0, 0, 0}, 10916 {0x8C, 0, 0, 0, 0}, 10917 {0x8D, 0, 0, 0, 0}, 10918 {0x8E, 0, 0, 0, 0}, 10919 {0x8F, 0, 0, 0, 0}, 10920 {0x90, 0, 0, 0, 0}, 10921 {0x91, 0, 0, 0, 0}, 10922 {0x92, 0, 0, 0, 0}, 10923 {0x93, 0, 0, 0, 0}, 10924 {0x94, 0, 0, 0, 0}, 10925 {0xFFFF, 0, 0, 0, 0}, 10926}; 10927 10928static const struct radio_regs regs_SYN_2056_rev11[] = { 10929 {0x02, 0, 0, 0, 0}, 10930 {0x03, 0, 0, 0, 0}, 10931 {0x04, 0, 0, 0, 0}, 10932 {0x05, 0, 0, 0, 0}, 10933 {0x06, 0, 0, 0, 0}, 10934 {0x07, 0, 0, 0, 0}, 10935 {0x08, 0, 0, 0, 0}, 10936 {0x09, 0x1, 0x1, 0, 0}, 10937 {0x0A, 0, 0, 0, 0}, 10938 {0x0B, 0, 0, 0, 0}, 10939 {0x0C, 0, 0, 0, 0}, 10940 {0x0D, 0, 0, 0, 0}, 10941 {0x0E, 0, 0, 0, 0}, 10942 {0x0F, 0, 0, 0, 0}, 10943 {0x10, 0, 0, 0, 0}, 10944 {0x11, 0, 0, 0, 0}, 10945 {0x12, 0, 0, 0, 0}, 10946 {0x13, 0, 0, 0, 0}, 10947 {0x14, 0, 0, 0, 0}, 10948 {0x15, 0, 0, 0, 0}, 10949 {0x16, 0, 0, 0, 0}, 10950 {0x17, 0, 0, 0, 0}, 10951 {0x18, 0, 0, 0, 0}, 10952 {0x19, 0, 0, 0, 0}, 10953 {0x1A, 0, 0, 0, 0}, 10954 {0x1B, 0, 0, 0, 0}, 10955 {0x1C, 0, 0, 0, 0}, 10956 {0x1D, 0, 0, 0, 0}, 10957 {0x1E, 0, 0, 0, 0}, 10958 {0x1F, 0, 0, 0, 0}, 10959 {0x20, 0, 0, 0, 0}, 10960 {0x21, 0, 0, 0, 0}, 10961 {0x22, 0x60, 0x60, 0, 0}, 10962 {0x23, 0x6, 0x6, 0, 0}, 10963 {0x24, 0xc, 0xc, 0, 0}, 10964 {0x25, 0, 0, 0, 0}, 10965 {0x26, 0, 0, 0, 0}, 10966 {0x27, 0, 0, 0, 0}, 10967 {0x28, 0x1, 0x1, 0, 0}, 10968 {0x29, 0, 0, 0, 0}, 10969 {0x2A, 0, 0, 0, 0}, 10970 {0x2B, 0, 0, 0, 0}, 10971 {0x2C, 0, 0, 0, 0}, 10972 {0x2D, 0, 0, 0, 0}, 10973 {0x2E, 0, 0, 0, 0}, 10974 {0x2F, 0x1f, 0x1f, 0, 0}, 10975 {0x30, 0x15, 0x15, 0, 0}, 10976 {0x31, 0xf, 0xf, 0, 0}, 10977 {0x32, 0, 0, 0, 0}, 10978 {0x33, 0, 0, 0, 0}, 10979 {0x34, 0, 0, 0, 0}, 10980 {0x35, 0, 0, 0, 0}, 10981 {0x36, 0, 0, 0, 0}, 10982 {0x37, 0, 0, 0, 0}, 10983 {0x38, 0, 0, 0, 0}, 10984 {0x39, 0, 0, 0, 0}, 10985 {0x3A, 0, 0, 0, 0}, 10986 {0x3B, 0, 0, 0, 0}, 10987 {0x3C, 0x13, 0x13, 0, 0}, 10988 {0x3D, 0xf, 0xf, 0, 0}, 10989 {0x3E, 0x18, 0x18, 0, 0}, 10990 {0x3F, 0, 0, 0, 0}, 10991 {0x40, 0, 0, 0, 0}, 10992 {0x41, 0x20, 0x20, 0, 0}, 10993 {0x42, 0x20, 0x20, 0, 0}, 10994 {0x43, 0, 0, 0, 0}, 10995 {0x44, 0x77, 0x77, 0, 0}, 10996 {0x45, 0x7, 0x7, 0, 0}, 10997 {0x46, 0x1, 0x1, 0, 0}, 10998 {0x47, 0x6, 0x6, 1, 1}, 10999 {0x48, 0xf, 0xf, 0, 0}, 11000 {0x49, 0x3f, 0x3f, 1, 1}, 11001 {0x4A, 0x32, 0x32, 0, 0}, 11002 {0x4B, 0x6, 0x6, 1, 1}, 11003 {0x4C, 0x6, 0x6, 1, 1}, 11004 {0x4D, 0x4, 0x4, 0, 0}, 11005 {0x4E, 0x2b, 0x2b, 1, 1}, 11006 {0x4F, 0x1, 0x1, 0, 0}, 11007 {0x50, 0x1c, 0x1c, 0, 0}, 11008 {0x51, 0x2, 0x2, 0, 0}, 11009 {0x52, 0x2, 0x2, 0, 0}, 11010 {0x53, 0xf7, 0xf7, 1, 1}, 11011 {0x54, 0xb4, 0xb4, 0, 0}, 11012 {0x55, 0xd2, 0xd2, 0, 0}, 11013 {0x56, 0, 0, 0, 0}, 11014 {0x57, 0, 0, 0, 0}, 11015 {0x58, 0x4, 0x4, 0, 0}, 11016 {0x59, 0x96, 0x96, 0, 0}, 11017 {0x5A, 0x3e, 0x3e, 0, 0}, 11018 {0x5B, 0x3e, 0x3e, 0, 0}, 11019 {0x5C, 0x13, 0x13, 0, 0}, 11020 {0x5D, 0x2, 0x2, 0, 0}, 11021 {0x5E, 0, 0, 0, 0}, 11022 {0x5F, 0x7, 0x7, 0, 0}, 11023 {0x60, 0x7, 0x7, 1, 1}, 11024 {0x61, 0x8, 0x8, 0, 0}, 11025 {0x62, 0x3, 0x3, 0, 0}, 11026 {0x63, 0, 0, 0, 0}, 11027 {0x64, 0, 0, 0, 0}, 11028 {0x65, 0, 0, 0, 0}, 11029 {0x66, 0, 0, 0, 0}, 11030 {0x67, 0, 0, 0, 0}, 11031 {0x68, 0x40, 0x40, 0, 0}, 11032 {0x69, 0, 0, 0, 0}, 11033 {0x6A, 0, 0, 0, 0}, 11034 {0x6B, 0, 0, 0, 0}, 11035 {0x6C, 0, 0, 0, 0}, 11036 {0x6D, 0x1, 0x1, 0, 0}, 11037 {0x6E, 0, 0, 0, 0}, 11038 {0x6F, 0, 0, 0, 0}, 11039 {0x70, 0x60, 0x60, 0, 0}, 11040 {0x71, 0x66, 0x66, 0, 0}, 11041 {0x72, 0xc, 0xc, 0, 0}, 11042 {0x73, 0x66, 0x66, 0, 0}, 11043 {0x74, 0x8f, 0x8f, 1, 1}, 11044 {0x75, 0, 0, 0, 0}, 11045 {0x76, 0xcc, 0xcc, 0, 0}, 11046 {0x77, 0x1, 0x1, 0, 0}, 11047 {0x78, 0x66, 0x66, 0, 0}, 11048 {0x79, 0x66, 0x66, 0, 0}, 11049 {0x7A, 0, 0, 0, 0}, 11050 {0x7B, 0, 0, 0, 0}, 11051 {0x7C, 0, 0, 0, 0}, 11052 {0x7D, 0, 0, 0, 0}, 11053 {0x7E, 0, 0, 0, 0}, 11054 {0x7F, 0, 0, 0, 0}, 11055 {0x80, 0, 0, 0, 0}, 11056 {0x81, 0, 0, 0, 0}, 11057 {0x82, 0, 0, 0, 0}, 11058 {0x83, 0, 0, 0, 0}, 11059 {0x84, 0, 0, 0, 0}, 11060 {0x85, 0xff, 0xff, 0, 0}, 11061 {0x86, 0, 0, 0, 0}, 11062 {0x87, 0, 0, 0, 0}, 11063 {0x88, 0, 0, 0, 0}, 11064 {0x89, 0, 0, 0, 0}, 11065 {0x8A, 0, 0, 0, 0}, 11066 {0x8B, 0, 0, 0, 0}, 11067 {0x8C, 0, 0, 0, 0}, 11068 {0x8D, 0, 0, 0, 0}, 11069 {0x8E, 0, 0, 0, 0}, 11070 {0x8F, 0, 0, 0, 0}, 11071 {0x90, 0, 0, 0, 0}, 11072 {0x91, 0, 0, 0, 0}, 11073 {0x92, 0, 0, 0, 0}, 11074 {0x93, 0, 0, 0, 0}, 11075 {0x94, 0, 0, 0, 0}, 11076 {0x95, 0, 0, 0, 0}, 11077 {0x96, 0, 0, 0, 0}, 11078 {0x97, 0, 0, 0, 0}, 11079 {0x98, 0, 0, 0, 0}, 11080 {0x99, 0, 0, 0, 0}, 11081 {0x9A, 0, 0, 0, 0}, 11082 {0x9B, 0, 0, 0, 0}, 11083 {0x9C, 0, 0, 0, 0}, 11084 {0x9D, 0, 0, 0, 0}, 11085 {0x9E, 0, 0, 0, 0}, 11086 {0x9F, 0x6, 0x6, 0, 0}, 11087 {0xA0, 0x66, 0x66, 0, 0}, 11088 {0xA1, 0x66, 0x66, 0, 0}, 11089 {0xA2, 0x66, 0x66, 0, 0}, 11090 {0xA3, 0x66, 0x66, 0, 0}, 11091 {0xA4, 0x66, 0x66, 0, 0}, 11092 {0xA5, 0x66, 0x66, 0, 0}, 11093 {0xA6, 0x66, 0x66, 0, 0}, 11094 {0xA7, 0x66, 0x66, 0, 0}, 11095 {0xA8, 0x66, 0x66, 0, 0}, 11096 {0xA9, 0x66, 0x66, 0, 0}, 11097 {0xAA, 0x66, 0x66, 0, 0}, 11098 {0xAB, 0x66, 0x66, 0, 0}, 11099 {0xAC, 0x66, 0x66, 0, 0}, 11100 {0xAD, 0x66, 0x66, 0, 0}, 11101 {0xAE, 0x66, 0x66, 0, 0}, 11102 {0xAF, 0x66, 0x66, 0, 0}, 11103 {0xB0, 0x66, 0x66, 0, 0}, 11104 {0xB1, 0x66, 0x66, 0, 0}, 11105 {0xB2, 0x66, 0x66, 0, 0}, 11106 {0xB3, 0xa, 0xa, 0, 0}, 11107 {0xB4, 0, 0, 0, 0}, 11108 {0xB5, 0, 0, 0, 0}, 11109 {0xB6, 0, 0, 0, 0}, 11110 {0xFFFF, 0, 0, 0, 0}, 11111}; 11112 11113static const struct radio_regs regs_TX_2056_rev11[] = { 11114 {0x02, 0, 0, 0, 0}, 11115 {0x03, 0, 0, 0, 0}, 11116 {0x04, 0, 0, 0, 0}, 11117 {0x05, 0, 0, 0, 0}, 11118 {0x06, 0, 0, 0, 0}, 11119 {0x07, 0, 0, 0, 0}, 11120 {0x08, 0, 0, 0, 0}, 11121 {0x09, 0, 0, 0, 0}, 11122 {0x0A, 0, 0, 0, 0}, 11123 {0x0B, 0, 0, 0, 0}, 11124 {0x0C, 0, 0, 0, 0}, 11125 {0x0D, 0, 0, 0, 0}, 11126 {0x0E, 0, 0, 0, 0}, 11127 {0x0F, 0, 0, 0, 0}, 11128 {0x10, 0, 0, 0, 0}, 11129 {0x11, 0, 0, 0, 0}, 11130 {0x12, 0, 0, 0, 0}, 11131 {0x13, 0, 0, 0, 0}, 11132 {0x14, 0, 0, 0, 0}, 11133 {0x15, 0, 0, 0, 0}, 11134 {0x16, 0, 0, 0, 0}, 11135 {0x17, 0, 0, 0, 0}, 11136 {0x18, 0, 0, 0, 0}, 11137 {0x19, 0, 0, 0, 0}, 11138 {0x1A, 0, 0, 0, 0}, 11139 {0x1B, 0, 0, 0, 0}, 11140 {0x1C, 0, 0, 0, 0}, 11141 {0x1D, 0, 0, 0, 0}, 11142 {0x1E, 0, 0, 0, 0}, 11143 {0x1F, 0, 0, 0, 0}, 11144 {0x20, 0, 0, 0, 0}, 11145 {0x21, 0x88, 0x88, 0, 0}, 11146 {0x22, 0x88, 0x88, 0, 0}, 11147 {0x23, 0x88, 0x88, 0, 0}, 11148 {0x24, 0x88, 0x88, 0, 0}, 11149 {0x25, 0xc, 0xc, 0, 0}, 11150 {0x26, 0, 0, 0, 0}, 11151 {0x27, 0x3, 0x3, 0, 0}, 11152 {0x28, 0, 0, 0, 0}, 11153 {0x29, 0x3, 0x3, 0, 0}, 11154 {0x2A, 0x37, 0x37, 0, 0}, 11155 {0x2B, 0x3, 0x3, 0, 0}, 11156 {0x2C, 0, 0, 0, 0}, 11157 {0x2D, 0, 0, 0, 0}, 11158 {0x2E, 0x1, 0x1, 0, 0}, 11159 {0x2F, 0x1, 0x1, 0, 0}, 11160 {0x30, 0, 0, 0, 0}, 11161 {0x31, 0, 0, 0, 0}, 11162 {0x32, 0, 0, 0, 0}, 11163 {0x33, 0x11, 0x11, 0, 0}, 11164 {0x34, 0xee, 0xee, 1, 1}, 11165 {0x35, 0, 0, 0, 0}, 11166 {0x36, 0, 0, 0, 0}, 11167 {0x37, 0x3, 0x3, 0, 0}, 11168 {0x38, 0x50, 0x50, 1, 1}, 11169 {0x39, 0, 0, 0, 0}, 11170 {0x3A, 0x50, 0x50, 1, 1}, 11171 {0x3B, 0, 0, 0, 0}, 11172 {0x3C, 0x6e, 0x6e, 0, 0}, 11173 {0x3D, 0xf0, 0xf0, 1, 1}, 11174 {0x3E, 0, 0, 0, 0}, 11175 {0x3F, 0, 0, 0, 0}, 11176 {0x40, 0, 0, 0, 0}, 11177 {0x41, 0x3, 0x3, 0, 0}, 11178 {0x42, 0x3, 0x3, 0, 0}, 11179 {0x43, 0, 0, 0, 0}, 11180 {0x44, 0x1e, 0x1e, 0, 0}, 11181 {0x45, 0, 0, 0, 0}, 11182 {0x46, 0x6e, 0x6e, 0, 0}, 11183 {0x47, 0xf0, 0xf0, 1, 1}, 11184 {0x48, 0, 0, 0, 0}, 11185 {0x49, 0x2, 0x2, 0, 0}, 11186 {0x4A, 0xff, 0xff, 1, 1}, 11187 {0x4B, 0xc, 0xc, 0, 0}, 11188 {0x4C, 0, 0, 0, 0}, 11189 {0x4D, 0x38, 0x38, 0, 0}, 11190 {0x4E, 0x70, 0x70, 1, 1}, 11191 {0x4F, 0x2, 0x2, 0, 0}, 11192 {0x50, 0x88, 0x88, 0, 0}, 11193 {0x51, 0xc, 0xc, 0, 0}, 11194 {0x52, 0, 0, 0, 0}, 11195 {0x53, 0x8, 0x8, 0, 0}, 11196 {0x54, 0x70, 0x70, 1, 1}, 11197 {0x55, 0x2, 0x2, 0, 0}, 11198 {0x56, 0xff, 0xff, 1, 1}, 11199 {0x57, 0, 0, 0, 0}, 11200 {0x58, 0x83, 0x83, 0, 0}, 11201 {0x59, 0x77, 0x77, 1, 1}, 11202 {0x5A, 0, 0, 0, 0}, 11203 {0x5B, 0x2, 0x2, 0, 0}, 11204 {0x5C, 0x88, 0x88, 0, 0}, 11205 {0x5D, 0, 0, 0, 0}, 11206 {0x5E, 0x8, 0x8, 0, 0}, 11207 {0x5F, 0x77, 0x77, 1, 1}, 11208 {0x60, 0x1, 0x1, 0, 0}, 11209 {0x61, 0, 0, 0, 0}, 11210 {0x62, 0x7, 0x7, 0, 0}, 11211 {0x63, 0, 0, 0, 0}, 11212 {0x64, 0x7, 0x7, 0, 0}, 11213 {0x65, 0, 0, 0, 0}, 11214 {0x66, 0, 0, 0, 0}, 11215 {0x67, 0, 0, 1, 1}, 11216 {0x68, 0, 0, 0, 0}, 11217 {0x69, 0xa, 0xa, 0, 0}, 11218 {0x6A, 0, 0, 0, 0}, 11219 {0x6B, 0, 0, 0, 0}, 11220 {0x6C, 0, 0, 0, 0}, 11221 {0x6D, 0, 0, 0, 0}, 11222 {0x6E, 0, 0, 0, 0}, 11223 {0x6F, 0, 0, 0, 0}, 11224 {0x70, 0, 0, 0, 0}, 11225 {0x71, 0x2, 0x2, 0, 0}, 11226 {0x72, 0, 0, 0, 0}, 11227 {0x73, 0, 0, 0, 0}, 11228 {0x74, 0xe, 0xe, 0, 0}, 11229 {0x75, 0xe, 0xe, 0, 0}, 11230 {0x76, 0xe, 0xe, 0, 0}, 11231 {0x77, 0x13, 0x13, 0, 0}, 11232 {0x78, 0x13, 0x13, 0, 0}, 11233 {0x79, 0x1b, 0x1b, 0, 0}, 11234 {0x7A, 0x1b, 0x1b, 0, 0}, 11235 {0x7B, 0x55, 0x55, 0, 0}, 11236 {0x7C, 0x5b, 0x5b, 0, 0}, 11237 {0x7D, 0x30, 0x30, 1, 1}, 11238 {0x7E, 0, 0, 0, 0}, 11239 {0x7F, 0, 0, 0, 0}, 11240 {0x80, 0, 0, 0, 0}, 11241 {0x81, 0, 0, 0, 0}, 11242 {0x82, 0, 0, 0, 0}, 11243 {0x83, 0, 0, 0, 0}, 11244 {0x84, 0, 0, 0, 0}, 11245 {0x85, 0, 0, 0, 0}, 11246 {0x86, 0, 0, 0, 0}, 11247 {0x87, 0, 0, 0, 0}, 11248 {0x88, 0, 0, 0, 0}, 11249 {0x89, 0, 0, 0, 0}, 11250 {0x8A, 0, 0, 0, 0}, 11251 {0x8B, 0, 0, 0, 0}, 11252 {0x8C, 0, 0, 0, 0}, 11253 {0x8D, 0, 0, 0, 0}, 11254 {0x8E, 0, 0, 0, 0}, 11255 {0x8F, 0, 0, 0, 0}, 11256 {0x90, 0, 0, 0, 0}, 11257 {0x91, 0, 0, 0, 0}, 11258 {0x92, 0, 0, 0, 0}, 11259 {0x93, 0x70, 0x70, 0, 0}, 11260 {0x94, 0x70, 0x70, 0, 0}, 11261 {0x95, 0x70, 0x70, 0, 0}, 11262 {0x96, 0x70, 0x70, 0, 0}, 11263 {0x97, 0x70, 0x70, 0, 0}, 11264 {0x98, 0x70, 0x70, 0, 0}, 11265 {0x99, 0x70, 0x70, 0, 0}, 11266 {0x9A, 0x70, 0x70, 0, 0}, 11267 {0xFFFF, 0, 0, 0, 0}, 11268}; 11269 11270static const struct radio_regs regs_RX_2056_rev11[] = { 11271 {0x02, 0, 0, 0, 0}, 11272 {0x03, 0, 0, 0, 0}, 11273 {0x04, 0, 0, 0, 0}, 11274 {0x05, 0, 0, 0, 0}, 11275 {0x06, 0, 0, 0, 0}, 11276 {0x07, 0, 0, 0, 0}, 11277 {0x08, 0, 0, 0, 0}, 11278 {0x09, 0, 0, 0, 0}, 11279 {0x0A, 0, 0, 0, 0}, 11280 {0x0B, 0, 0, 0, 0}, 11281 {0x0C, 0, 0, 0, 0}, 11282 {0x0D, 0, 0, 0, 0}, 11283 {0x0E, 0, 0, 0, 0}, 11284 {0x0F, 0, 0, 0, 0}, 11285 {0x10, 0, 0, 0, 0}, 11286 {0x11, 0, 0, 0, 0}, 11287 {0x12, 0, 0, 0, 0}, 11288 {0x13, 0, 0, 0, 0}, 11289 {0x14, 0, 0, 0, 0}, 11290 {0x15, 0, 0, 0, 0}, 11291 {0x16, 0, 0, 0, 0}, 11292 {0x17, 0, 0, 0, 0}, 11293 {0x18, 0, 0, 0, 0}, 11294 {0x19, 0, 0, 0, 0}, 11295 {0x1A, 0, 0, 0, 0}, 11296 {0x1B, 0, 0, 0, 0}, 11297 {0x1C, 0, 0, 0, 0}, 11298 {0x1D, 0, 0, 0, 0}, 11299 {0x1E, 0, 0, 0, 0}, 11300 {0x1F, 0, 0, 0, 0}, 11301 {0x20, 0x3, 0x3, 0, 0}, 11302 {0x21, 0, 0, 0, 0}, 11303 {0x22, 0, 0, 0, 0}, 11304 {0x23, 0x90, 0x90, 0, 0}, 11305 {0x24, 0x55, 0x55, 0, 0}, 11306 {0x25, 0x15, 0x15, 0, 0}, 11307 {0x26, 0x5, 0x5, 0, 0}, 11308 {0x27, 0x15, 0x15, 0, 0}, 11309 {0x28, 0x5, 0x5, 0, 0}, 11310 {0x29, 0x20, 0x20, 0, 0}, 11311 {0x2A, 0x11, 0x11, 0, 0}, 11312 {0x2B, 0x90, 0x90, 0, 0}, 11313 {0x2C, 0, 0, 0, 0}, 11314 {0x2D, 0x88, 0x88, 0, 0}, 11315 {0x2E, 0x32, 0x32, 0, 0}, 11316 {0x2F, 0x77, 0x77, 0, 0}, 11317 {0x30, 0x17, 0x17, 1, 1}, 11318 {0x31, 0xff, 0xff, 1, 1}, 11319 {0x32, 0x20, 0x20, 0, 0}, 11320 {0x33, 0, 0, 0, 0}, 11321 {0x34, 0x88, 0x88, 0, 0}, 11322 {0x35, 0x32, 0x32, 0, 0}, 11323 {0x36, 0x77, 0x77, 0, 0}, 11324 {0x37, 0x17, 0x17, 1, 1}, 11325 {0x38, 0xf0, 0xf0, 1, 1}, 11326 {0x39, 0x20, 0x20, 0, 0}, 11327 {0x3A, 0x8, 0x8, 0, 0}, 11328 {0x3B, 0x55, 0x55, 1, 1}, 11329 {0x3C, 0, 0, 0, 0}, 11330 {0x3D, 0x88, 0x88, 1, 1}, 11331 {0x3E, 0, 0, 0, 0}, 11332 {0x3F, 0x44, 0x44, 0, 0}, 11333 {0x40, 0x7, 0x7, 1, 1}, 11334 {0x41, 0x6, 0x6, 0, 0}, 11335 {0x42, 0x4, 0x4, 0, 0}, 11336 {0x43, 0, 0, 0, 0}, 11337 {0x44, 0x8, 0x8, 0, 0}, 11338 {0x45, 0x55, 0x55, 1, 1}, 11339 {0x46, 0, 0, 0, 0}, 11340 {0x47, 0x11, 0x11, 0, 0}, 11341 {0x48, 0, 0, 0, 0}, 11342 {0x49, 0x44, 0x44, 0, 0}, 11343 {0x4A, 0x7, 0x7, 0, 0}, 11344 {0x4B, 0x6, 0x6, 0, 0}, 11345 {0x4C, 0x4, 0x4, 0, 0}, 11346 {0x4D, 0, 0, 0, 0}, 11347 {0x4E, 0, 0, 0, 0}, 11348 {0x4F, 0x26, 0x26, 1, 1}, 11349 {0x50, 0x26, 0x26, 1, 1}, 11350 {0x51, 0xf, 0xf, 1, 1}, 11351 {0x52, 0xf, 0xf, 1, 1}, 11352 {0x53, 0x44, 0x44, 0, 0}, 11353 {0x54, 0, 0, 0, 0}, 11354 {0x55, 0, 0, 0, 0}, 11355 {0x56, 0x8, 0x8, 0, 0}, 11356 {0x57, 0x8, 0x8, 0, 0}, 11357 {0x58, 0x7, 0x7, 0, 0}, 11358 {0x59, 0x22, 0x22, 0, 0}, 11359 {0x5A, 0x22, 0x22, 0, 0}, 11360 {0x5B, 0x2, 0x2, 0, 0}, 11361 {0x5C, 0x4, 0x4, 1, 1}, 11362 {0x5D, 0x7, 0x7, 0, 0}, 11363 {0x5E, 0x55, 0x55, 0, 0}, 11364 {0x5F, 0x23, 0x23, 0, 0}, 11365 {0x60, 0x41, 0x41, 0, 0}, 11366 {0x61, 0x1, 0x1, 0, 0}, 11367 {0x62, 0xa, 0xa, 0, 0}, 11368 {0x63, 0, 0, 0, 0}, 11369 {0x64, 0, 0, 0, 0}, 11370 {0x65, 0, 0, 0, 0}, 11371 {0x66, 0, 0, 0, 0}, 11372 {0x67, 0, 0, 0, 0}, 11373 {0x68, 0, 0, 0, 0}, 11374 {0x69, 0, 0, 0, 0}, 11375 {0x6A, 0, 0, 0, 0}, 11376 {0x6B, 0xc, 0xc, 0, 0}, 11377 {0x6C, 0, 0, 0, 0}, 11378 {0x6D, 0, 0, 0, 0}, 11379 {0x6E, 0, 0, 0, 0}, 11380 {0x6F, 0, 0, 0, 0}, 11381 {0x70, 0, 0, 0, 0}, 11382 {0x71, 0, 0, 0, 0}, 11383 {0x72, 0x22, 0x22, 0, 0}, 11384 {0x73, 0x22, 0x22, 0, 0}, 11385 {0x74, 0, 0, 1, 1}, 11386 {0x75, 0xa, 0xa, 0, 0}, 11387 {0x76, 0x1, 0x1, 0, 0}, 11388 {0x77, 0x22, 0x22, 0, 0}, 11389 {0x78, 0x30, 0x30, 0, 0}, 11390 {0x79, 0, 0, 0, 0}, 11391 {0x7A, 0, 0, 0, 0}, 11392 {0x7B, 0, 0, 0, 0}, 11393 {0x7C, 0, 0, 0, 0}, 11394 {0x7D, 0x5, 0x5, 1, 1}, 11395 {0x7E, 0, 0, 0, 0}, 11396 {0x7F, 0, 0, 0, 0}, 11397 {0x80, 0, 0, 0, 0}, 11398 {0x81, 0, 0, 0, 0}, 11399 {0x82, 0, 0, 0, 0}, 11400 {0x83, 0, 0, 0, 0}, 11401 {0x84, 0, 0, 0, 0}, 11402 {0x85, 0, 0, 0, 0}, 11403 {0x86, 0, 0, 0, 0}, 11404 {0x87, 0, 0, 0, 0}, 11405 {0x88, 0, 0, 0, 0}, 11406 {0x89, 0, 0, 0, 0}, 11407 {0x8A, 0, 0, 0, 0}, 11408 {0x8B, 0, 0, 0, 0}, 11409 {0x8C, 0, 0, 0, 0}, 11410 {0x8D, 0, 0, 0, 0}, 11411 {0x8E, 0, 0, 0, 0}, 11412 {0x8F, 0, 0, 0, 0}, 11413 {0x90, 0, 0, 0, 0}, 11414 {0x91, 0, 0, 0, 0}, 11415 {0x92, 0, 0, 0, 0}, 11416 {0x93, 0, 0, 0, 0}, 11417 {0x94, 0, 0, 0, 0}, 11418 {0xFFFF, 0, 0, 0, 0}, 11419}; 11420 11421static struct radio_20xx_regs regs_2057_rev4[] = { 11422 {0x00, 0x84, 0}, 11423 {0x01, 0, 0}, 11424 {0x02, 0x60, 0}, 11425 {0x03, 0x1f, 0}, 11426 {0x04, 0x4, 0}, 11427 {0x05, 0x2, 0}, 11428 {0x06, 0x1, 0}, 11429 {0x07, 0x1, 0}, 11430 {0x08, 0x1, 0}, 11431 {0x09, 0x69, 0}, 11432 {0x0A, 0x66, 0}, 11433 {0x0B, 0x6, 0}, 11434 {0x0C, 0x18, 0}, 11435 {0x0D, 0x3, 0}, 11436 {0x0E, 0x20, 1}, 11437 {0x0F, 0x20, 0}, 11438 {0x10, 0, 0}, 11439 {0x11, 0x7c, 0}, 11440 {0x12, 0x42, 0}, 11441 {0x13, 0xbd, 0}, 11442 {0x14, 0x7, 0}, 11443 {0x15, 0xf7, 0}, 11444 {0x16, 0x8, 0}, 11445 {0x17, 0x17, 0}, 11446 {0x18, 0x7, 0}, 11447 {0x19, 0, 0}, 11448 {0x1A, 0x2, 0}, 11449 {0x1B, 0x13, 0}, 11450 {0x1C, 0x3e, 0}, 11451 {0x1D, 0x3e, 0}, 11452 {0x1E, 0x96, 0}, 11453 {0x1F, 0x4, 0}, 11454 {0x20, 0, 0}, 11455 {0x21, 0, 0}, 11456 {0x22, 0x17, 0}, 11457 {0x23, 0x4, 0}, 11458 {0x24, 0x1, 0}, 11459 {0x25, 0x6, 0}, 11460 {0x26, 0x4, 0}, 11461 {0x27, 0xd, 0}, 11462 {0x28, 0xd, 0}, 11463 {0x29, 0x30, 0}, 11464 {0x2A, 0x32, 0}, 11465 {0x2B, 0x8, 0}, 11466 {0x2C, 0x1c, 0}, 11467 {0x2D, 0x2, 0}, 11468 {0x2E, 0x4, 0}, 11469 {0x2F, 0x7f, 0}, 11470 {0x30, 0x27, 0}, 11471 {0x31, 0, 1}, 11472 {0x32, 0, 1}, 11473 {0x33, 0, 1}, 11474 {0x34, 0, 0}, 11475 {0x35, 0x26, 1}, 11476 {0x36, 0x18, 0}, 11477 {0x37, 0x7, 0}, 11478 {0x38, 0x66, 0}, 11479 {0x39, 0x66, 0}, 11480 {0x3A, 0x66, 0}, 11481 {0x3B, 0x66, 0}, 11482 {0x3C, 0xff, 1}, 11483 {0x3D, 0xff, 1}, 11484 {0x3E, 0xff, 1}, 11485 {0x3F, 0xff, 1}, 11486 {0x40, 0x16, 0}, 11487 {0x41, 0x7, 0}, 11488 {0x42, 0x19, 0}, 11489 {0x43, 0x7, 0}, 11490 {0x44, 0x6, 0}, 11491 {0x45, 0x3, 0}, 11492 {0x46, 0x1, 0}, 11493 {0x47, 0x7, 0}, 11494 {0x48, 0x33, 0}, 11495 {0x49, 0x5, 0}, 11496 {0x4A, 0x77, 0}, 11497 {0x4B, 0x66, 0}, 11498 {0x4C, 0x66, 0}, 11499 {0x4D, 0, 0}, 11500 {0x4E, 0x4, 0}, 11501 {0x4F, 0xc, 0}, 11502 {0x50, 0, 0}, 11503 {0x51, 0x75, 0}, 11504 {0x56, 0x7, 0}, 11505 {0x57, 0, 0}, 11506 {0x58, 0, 0}, 11507 {0x59, 0xa8, 0}, 11508 {0x5A, 0, 0}, 11509 {0x5B, 0x1f, 0}, 11510 {0x5C, 0x30, 0}, 11511 {0x5D, 0x1, 0}, 11512 {0x5E, 0x30, 0}, 11513 {0x5F, 0x70, 0}, 11514 {0x60, 0, 0}, 11515 {0x61, 0, 0}, 11516 {0x62, 0x33, 1}, 11517 {0x63, 0x19, 0}, 11518 {0x64, 0x62, 0}, 11519 {0x65, 0, 0}, 11520 {0x66, 0x11, 0}, 11521 {0x69, 0, 0}, 11522 {0x6A, 0x7e, 0}, 11523 {0x6B, 0x3f, 0}, 11524 {0x6C, 0x7f, 0}, 11525 {0x6D, 0x78, 0}, 11526 {0x6E, 0xc8, 0}, 11527 {0x6F, 0x88, 0}, 11528 {0x70, 0x8, 0}, 11529 {0x71, 0xf, 0}, 11530 {0x72, 0xbc, 0}, 11531 {0x73, 0x8, 0}, 11532 {0x74, 0x60, 0}, 11533 {0x75, 0x1e, 0}, 11534 {0x76, 0x70, 0}, 11535 {0x77, 0, 0}, 11536 {0x78, 0, 0}, 11537 {0x79, 0, 0}, 11538 {0x7A, 0x33, 0}, 11539 {0x7B, 0x1e, 0}, 11540 {0x7C, 0x62, 0}, 11541 {0x7D, 0x11, 0}, 11542 {0x80, 0x3c, 0}, 11543 {0x81, 0x9c, 0}, 11544 {0x82, 0xa, 0}, 11545 {0x83, 0x9d, 0}, 11546 {0x84, 0xa, 0}, 11547 {0x85, 0, 0}, 11548 {0x86, 0x40, 0}, 11549 {0x87, 0x40, 0}, 11550 {0x88, 0x88, 0}, 11551 {0x89, 0x10, 0}, 11552 {0x8A, 0xf0, 1}, 11553 {0x8B, 0x10, 1}, 11554 {0x8C, 0xf0, 1}, 11555 {0x8D, 0, 0}, 11556 {0x8E, 0, 0}, 11557 {0x8F, 0x10, 0}, 11558 {0x90, 0x55, 0}, 11559 {0x91, 0x3f, 1}, 11560 {0x92, 0x36, 1}, 11561 {0x93, 0, 0}, 11562 {0x94, 0, 0}, 11563 {0x95, 0, 0}, 11564 {0x96, 0x87, 0}, 11565 {0x97, 0x11, 0}, 11566 {0x98, 0, 0}, 11567 {0x99, 0x33, 0}, 11568 {0x9A, 0x88, 0}, 11569 {0x9B, 0, 0}, 11570 {0x9C, 0x87, 0}, 11571 {0x9D, 0x11, 0}, 11572 {0x9E, 0, 0}, 11573 {0x9F, 0x33, 0}, 11574 {0xA0, 0x88, 0}, 11575 {0xA1, 0xe1, 0}, 11576 {0xA2, 0x3f, 0}, 11577 {0xA3, 0x44, 0}, 11578 {0xA4, 0x8c, 1}, 11579 {0xA5, 0x6d, 0}, 11580 {0xA6, 0x22, 0}, 11581 {0xA7, 0xbe, 0}, 11582 {0xA8, 0x55, 1}, 11583 {0xA9, 0xc, 0}, 11584 {0xAA, 0xc, 0}, 11585 {0xAB, 0xaa, 0}, 11586 {0xAC, 0x2, 0}, 11587 {0xAD, 0, 0}, 11588 {0xAE, 0x10, 0}, 11589 {0xAF, 0x1, 1}, 11590 {0xB0, 0, 0}, 11591 {0xB1, 0, 0}, 11592 {0xB2, 0x80, 0}, 11593 {0xB3, 0x60, 0}, 11594 {0xB4, 0x44, 0}, 11595 {0xB5, 0x55, 0}, 11596 {0xB6, 0x1, 0}, 11597 {0xB7, 0x55, 0}, 11598 {0xB8, 0x1, 0}, 11599 {0xB9, 0x5, 0}, 11600 {0xBA, 0x55, 0}, 11601 {0xBB, 0x55, 0}, 11602 {0xC1, 0, 0}, 11603 {0xC2, 0, 0}, 11604 {0xC3, 0, 0}, 11605 {0xC4, 0, 0}, 11606 {0xC5, 0, 0}, 11607 {0xC6, 0, 0}, 11608 {0xC7, 0, 0}, 11609 {0xC8, 0, 0}, 11610 {0xC9, 0, 0}, 11611 {0xCA, 0, 0}, 11612 {0xCB, 0, 0}, 11613 {0xCC, 0, 0}, 11614 {0xCD, 0, 0}, 11615 {0xCE, 0x5e, 0}, 11616 {0xCF, 0xc, 0}, 11617 {0xD0, 0xc, 0}, 11618 {0xD1, 0xc, 0}, 11619 {0xD2, 0, 0}, 11620 {0xD3, 0x2b, 0}, 11621 {0xD4, 0xc, 0}, 11622 {0xD5, 0, 0}, 11623 {0xD6, 0x75, 0}, 11624 {0xDB, 0x7, 0}, 11625 {0xDC, 0, 0}, 11626 {0xDD, 0, 0}, 11627 {0xDE, 0xa8, 0}, 11628 {0xDF, 0, 0}, 11629 {0xE0, 0x1f, 0}, 11630 {0xE1, 0x30, 0}, 11631 {0xE2, 0x1, 0}, 11632 {0xE3, 0x30, 0}, 11633 {0xE4, 0x70, 0}, 11634 {0xE5, 0, 0}, 11635 {0xE6, 0, 0}, 11636 {0xE7, 0x33, 0}, 11637 {0xE8, 0x19, 0}, 11638 {0xE9, 0x62, 0}, 11639 {0xEA, 0, 0}, 11640 {0xEB, 0x11, 0}, 11641 {0xEE, 0, 0}, 11642 {0xEF, 0x7e, 0}, 11643 {0xF0, 0x3f, 0}, 11644 {0xF1, 0x7f, 0}, 11645 {0xF2, 0x78, 0}, 11646 {0xF3, 0xc8, 0}, 11647 {0xF4, 0x88, 0}, 11648 {0xF5, 0x8, 0}, 11649 {0xF6, 0xf, 0}, 11650 {0xF7, 0xbc, 0}, 11651 {0xF8, 0x8, 0}, 11652 {0xF9, 0x60, 0}, 11653 {0xFA, 0x1e, 0}, 11654 {0xFB, 0x70, 0}, 11655 {0xFC, 0, 0}, 11656 {0xFD, 0, 0}, 11657 {0xFE, 0, 0}, 11658 {0xFF, 0x33, 0}, 11659 {0x100, 0x1e, 0}, 11660 {0x101, 0x62, 0}, 11661 {0x102, 0x11, 0}, 11662 {0x105, 0x3c, 0}, 11663 {0x106, 0x9c, 0}, 11664 {0x107, 0xa, 0}, 11665 {0x108, 0x9d, 0}, 11666 {0x109, 0xa, 0}, 11667 {0x10A, 0, 0}, 11668 {0x10B, 0x40, 0}, 11669 {0x10C, 0x40, 0}, 11670 {0x10D, 0x88, 0}, 11671 {0x10E, 0x10, 0}, 11672 {0x10F, 0xf0, 1}, 11673 {0x110, 0x10, 1}, 11674 {0x111, 0xf0, 1}, 11675 {0x112, 0, 0}, 11676 {0x113, 0, 0}, 11677 {0x114, 0x10, 0}, 11678 {0x115, 0x55, 0}, 11679 {0x116, 0x3f, 1}, 11680 {0x117, 0x36, 1}, 11681 {0x118, 0, 0}, 11682 {0x119, 0, 0}, 11683 {0x11A, 0, 0}, 11684 {0x11B, 0x87, 0}, 11685 {0x11C, 0x11, 0}, 11686 {0x11D, 0, 0}, 11687 {0x11E, 0x33, 0}, 11688 {0x11F, 0x88, 0}, 11689 {0x120, 0, 0}, 11690 {0x121, 0x87, 0}, 11691 {0x122, 0x11, 0}, 11692 {0x123, 0, 0}, 11693 {0x124, 0x33, 0}, 11694 {0x125, 0x88, 0}, 11695 {0x126, 0xe1, 0}, 11696 {0x127, 0x3f, 0}, 11697 {0x128, 0x44, 0}, 11698 {0x129, 0x8c, 1}, 11699 {0x12A, 0x6d, 0}, 11700 {0x12B, 0x22, 0}, 11701 {0x12C, 0xbe, 0}, 11702 {0x12D, 0x55, 1}, 11703 {0x12E, 0xc, 0}, 11704 {0x12F, 0xc, 0}, 11705 {0x130, 0xaa, 0}, 11706 {0x131, 0x2, 0}, 11707 {0x132, 0, 0}, 11708 {0x133, 0x10, 0}, 11709 {0x134, 0x1, 1}, 11710 {0x135, 0, 0}, 11711 {0x136, 0, 0}, 11712 {0x137, 0x80, 0}, 11713 {0x138, 0x60, 0}, 11714 {0x139, 0x44, 0}, 11715 {0x13A, 0x55, 0}, 11716 {0x13B, 0x1, 0}, 11717 {0x13C, 0x55, 0}, 11718 {0x13D, 0x1, 0}, 11719 {0x13E, 0x5, 0}, 11720 {0x13F, 0x55, 0}, 11721 {0x140, 0x55, 0}, 11722 {0x146, 0, 0}, 11723 {0x147, 0, 0}, 11724 {0x148, 0, 0}, 11725 {0x149, 0, 0}, 11726 {0x14A, 0, 0}, 11727 {0x14B, 0, 0}, 11728 {0x14C, 0, 0}, 11729 {0x14D, 0, 0}, 11730 {0x14E, 0, 0}, 11731 {0x14F, 0, 0}, 11732 {0x150, 0, 0}, 11733 {0x151, 0, 0}, 11734 {0x152, 0, 0}, 11735 {0x153, 0, 0}, 11736 {0x154, 0xc, 0}, 11737 {0x155, 0xc, 0}, 11738 {0x156, 0xc, 0}, 11739 {0x157, 0, 0}, 11740 {0x158, 0x2b, 0}, 11741 {0x159, 0x84, 0}, 11742 {0x15A, 0x15, 0}, 11743 {0x15B, 0xf, 0}, 11744 {0x15C, 0, 0}, 11745 {0x15D, 0, 0}, 11746 {0x15E, 0, 1}, 11747 {0x15F, 0, 1}, 11748 {0x160, 0, 1}, 11749 {0x161, 0, 1}, 11750 {0x162, 0, 1}, 11751 {0x163, 0, 1}, 11752 {0x164, 0, 0}, 11753 {0x165, 0, 0}, 11754 {0x166, 0, 0}, 11755 {0x167, 0, 0}, 11756 {0x168, 0, 0}, 11757 {0x169, 0x2, 1}, 11758 {0x16A, 0, 1}, 11759 {0x16B, 0, 1}, 11760 {0x16C, 0, 1}, 11761 {0x16D, 0, 0}, 11762 {0x170, 0, 0}, 11763 {0x171, 0x77, 0}, 11764 {0x172, 0x77, 0}, 11765 {0x173, 0x77, 0}, 11766 {0x174, 0x77, 0}, 11767 {0x175, 0, 0}, 11768 {0x176, 0x3, 0}, 11769 {0x177, 0x37, 0}, 11770 {0x178, 0x3, 0}, 11771 {0x179, 0, 0}, 11772 {0x17A, 0x21, 0}, 11773 {0x17B, 0x21, 0}, 11774 {0x17C, 0, 0}, 11775 {0x17D, 0xaa, 0}, 11776 {0x17E, 0, 0}, 11777 {0x17F, 0xaa, 0}, 11778 {0x180, 0, 0}, 11779 {0x190, 0, 0}, 11780 {0x191, 0x77, 0}, 11781 {0x192, 0x77, 0}, 11782 {0x193, 0x77, 0}, 11783 {0x194, 0x77, 0}, 11784 {0x195, 0, 0}, 11785 {0x196, 0x3, 0}, 11786 {0x197, 0x37, 0}, 11787 {0x198, 0x3, 0}, 11788 {0x199, 0, 0}, 11789 {0x19A, 0x21, 0}, 11790 {0x19B, 0x21, 0}, 11791 {0x19C, 0, 0}, 11792 {0x19D, 0xaa, 0}, 11793 {0x19E, 0, 0}, 11794 {0x19F, 0xaa, 0}, 11795 {0x1A0, 0, 0}, 11796 {0x1A1, 0x2, 0}, 11797 {0x1A2, 0xf, 0}, 11798 {0x1A3, 0xf, 0}, 11799 {0x1A4, 0, 1}, 11800 {0x1A5, 0, 1}, 11801 {0x1A6, 0, 1}, 11802 {0x1A7, 0x2, 0}, 11803 {0x1A8, 0xf, 0}, 11804 {0x1A9, 0xf, 0}, 11805 {0x1AA, 0, 1}, 11806 {0x1AB, 0, 1}, 11807 {0x1AC, 0, 1}, 11808 {0xFFFF, 0, 0}, 11809}; 11810 11811static struct radio_20xx_regs regs_2057_rev5[] = { 11812 {0x00, 0, 1}, 11813 {0x01, 0x57, 1}, 11814 {0x02, 0x20, 1}, 11815 {0x03, 0x1f, 0}, 11816 {0x04, 0x4, 0}, 11817 {0x05, 0x2, 0}, 11818 {0x06, 0x1, 0}, 11819 {0x07, 0x1, 0}, 11820 {0x08, 0x1, 0}, 11821 {0x09, 0x69, 0}, 11822 {0x0A, 0x66, 0}, 11823 {0x0B, 0x6, 0}, 11824 {0x0C, 0x18, 0}, 11825 {0x0D, 0x3, 0}, 11826 {0x0E, 0x20, 0}, 11827 {0x0F, 0x20, 0}, 11828 {0x10, 0, 0}, 11829 {0x11, 0x7c, 0}, 11830 {0x12, 0x42, 0}, 11831 {0x13, 0xbd, 0}, 11832 {0x14, 0x7, 0}, 11833 {0x15, 0x87, 0}, 11834 {0x16, 0x8, 0}, 11835 {0x17, 0x17, 0}, 11836 {0x18, 0x7, 0}, 11837 {0x19, 0, 0}, 11838 {0x1A, 0x2, 0}, 11839 {0x1B, 0x13, 0}, 11840 {0x1C, 0x3e, 0}, 11841 {0x1D, 0x3e, 0}, 11842 {0x1E, 0x96, 0}, 11843 {0x1F, 0x4, 0}, 11844 {0x20, 0, 0}, 11845 {0x21, 0, 0}, 11846 {0x22, 0x17, 0}, 11847 {0x23, 0x6, 1}, 11848 {0x24, 0x1, 0}, 11849 {0x25, 0x6, 0}, 11850 {0x26, 0x4, 0}, 11851 {0x27, 0xd, 0}, 11852 {0x28, 0xd, 0}, 11853 {0x29, 0x30, 0}, 11854 {0x2A, 0x32, 0}, 11855 {0x2B, 0x8, 0}, 11856 {0x2C, 0x1c, 0}, 11857 {0x2D, 0x2, 0}, 11858 {0x2E, 0x4, 0}, 11859 {0x2F, 0x7f, 0}, 11860 {0x30, 0x27, 0}, 11861 {0x31, 0, 1}, 11862 {0x32, 0, 1}, 11863 {0x33, 0, 1}, 11864 {0x34, 0, 0}, 11865 {0x35, 0x20, 0}, 11866 {0x36, 0x18, 0}, 11867 {0x37, 0x7, 0}, 11868 {0x38, 0x66, 0}, 11869 {0x39, 0x66, 0}, 11870 {0x3C, 0xff, 0}, 11871 {0x3D, 0xff, 0}, 11872 {0x40, 0x16, 0}, 11873 {0x41, 0x7, 0}, 11874 {0x45, 0x3, 0}, 11875 {0x46, 0x1, 0}, 11876 {0x47, 0x7, 0}, 11877 {0x4B, 0x66, 0}, 11878 {0x4C, 0x66, 0}, 11879 {0x4D, 0, 0}, 11880 {0x4E, 0x4, 0}, 11881 {0x4F, 0xc, 0}, 11882 {0x50, 0, 0}, 11883 {0x51, 0x70, 1}, 11884 {0x56, 0x7, 0}, 11885 {0x57, 0, 0}, 11886 {0x58, 0, 0}, 11887 {0x59, 0x88, 1}, 11888 {0x5A, 0, 0}, 11889 {0x5B, 0x1f, 0}, 11890 {0x5C, 0x20, 1}, 11891 {0x5D, 0x1, 0}, 11892 {0x5E, 0x30, 0}, 11893 {0x5F, 0x70, 0}, 11894 {0x60, 0, 0}, 11895 {0x61, 0, 0}, 11896 {0x62, 0x33, 1}, 11897 {0x63, 0xf, 1}, 11898 {0x64, 0xf, 1}, 11899 {0x65, 0, 0}, 11900 {0x66, 0x11, 0}, 11901 {0x80, 0x3c, 0}, 11902 {0x81, 0x1, 1}, 11903 {0x82, 0xa, 0}, 11904 {0x85, 0, 0}, 11905 {0x86, 0x40, 0}, 11906 {0x87, 0x40, 0}, 11907 {0x88, 0x88, 0}, 11908 {0x89, 0x10, 0}, 11909 {0x8A, 0xf0, 0}, 11910 {0x8B, 0x10, 0}, 11911 {0x8C, 0xf0, 0}, 11912 {0x8F, 0x10, 0}, 11913 {0x90, 0x55, 0}, 11914 {0x91, 0x3f, 1}, 11915 {0x92, 0x36, 1}, 11916 {0x93, 0, 0}, 11917 {0x94, 0, 0}, 11918 {0x95, 0, 0}, 11919 {0x96, 0x87, 0}, 11920 {0x97, 0x11, 0}, 11921 {0x98, 0, 0}, 11922 {0x99, 0x33, 0}, 11923 {0x9A, 0x88, 0}, 11924 {0xA1, 0x20, 1}, 11925 {0xA2, 0x3f, 0}, 11926 {0xA3, 0x44, 0}, 11927 {0xA4, 0x8c, 0}, 11928 {0xA5, 0x6c, 0}, 11929 {0xA6, 0x22, 0}, 11930 {0xA7, 0xbe, 0}, 11931 {0xA8, 0x55, 0}, 11932 {0xAA, 0xc, 0}, 11933 {0xAB, 0xaa, 0}, 11934 {0xAC, 0x2, 0}, 11935 {0xAD, 0, 0}, 11936 {0xAE, 0x10, 0}, 11937 {0xAF, 0x1, 0}, 11938 {0xB0, 0, 0}, 11939 {0xB1, 0, 0}, 11940 {0xB2, 0x80, 0}, 11941 {0xB3, 0x60, 0}, 11942 {0xB4, 0x44, 0}, 11943 {0xB5, 0x55, 0}, 11944 {0xB6, 0x1, 0}, 11945 {0xB7, 0x55, 0}, 11946 {0xB8, 0x1, 0}, 11947 {0xB9, 0x5, 0}, 11948 {0xBA, 0x55, 0}, 11949 {0xBB, 0x55, 0}, 11950 {0xC3, 0, 0}, 11951 {0xC4, 0, 0}, 11952 {0xC5, 0, 0}, 11953 {0xC6, 0, 0}, 11954 {0xC7, 0, 0}, 11955 {0xC8, 0, 0}, 11956 {0xC9, 0, 0}, 11957 {0xCA, 0, 0}, 11958 {0xCB, 0, 0}, 11959 {0xCD, 0, 0}, 11960 {0xCE, 0x5e, 0}, 11961 {0xCF, 0xc, 0}, 11962 {0xD0, 0xc, 0}, 11963 {0xD1, 0xc, 0}, 11964 {0xD2, 0, 0}, 11965 {0xD3, 0x2b, 0}, 11966 {0xD4, 0xc, 0}, 11967 {0xD5, 0, 0}, 11968 {0xD6, 0x70, 1}, 11969 {0xDB, 0x7, 0}, 11970 {0xDC, 0, 0}, 11971 {0xDD, 0, 0}, 11972 {0xDE, 0x88, 1}, 11973 {0xDF, 0, 0}, 11974 {0xE0, 0x1f, 0}, 11975 {0xE1, 0x20, 1}, 11976 {0xE2, 0x1, 0}, 11977 {0xE3, 0x30, 0}, 11978 {0xE4, 0x70, 0}, 11979 {0xE5, 0, 0}, 11980 {0xE6, 0, 0}, 11981 {0xE7, 0x33, 0}, 11982 {0xE8, 0xf, 1}, 11983 {0xE9, 0xf, 1}, 11984 {0xEA, 0, 0}, 11985 {0xEB, 0x11, 0}, 11986 {0x105, 0x3c, 0}, 11987 {0x106, 0x1, 1}, 11988 {0x107, 0xa, 0}, 11989 {0x10A, 0, 0}, 11990 {0x10B, 0x40, 0}, 11991 {0x10C, 0x40, 0}, 11992 {0x10D, 0x88, 0}, 11993 {0x10E, 0x10, 0}, 11994 {0x10F, 0xf0, 0}, 11995 {0x110, 0x10, 0}, 11996 {0x111, 0xf0, 0}, 11997 {0x114, 0x10, 0}, 11998 {0x115, 0x55, 0}, 11999 {0x116, 0x3f, 1}, 12000 {0x117, 0x36, 1}, 12001 {0x118, 0, 0}, 12002 {0x119, 0, 0}, 12003 {0x11A, 0, 0}, 12004 {0x11B, 0x87, 0}, 12005 {0x11C, 0x11, 0}, 12006 {0x11D, 0, 0}, 12007 {0x11E, 0x33, 0}, 12008 {0x11F, 0x88, 0}, 12009 {0x126, 0x20, 1}, 12010 {0x127, 0x3f, 0}, 12011 {0x128, 0x44, 0}, 12012 {0x129, 0x8c, 0}, 12013 {0x12A, 0x6c, 0}, 12014 {0x12B, 0x22, 0}, 12015 {0x12C, 0xbe, 0}, 12016 {0x12D, 0x55, 0}, 12017 {0x12F, 0xc, 0}, 12018 {0x130, 0xaa, 0}, 12019 {0x131, 0x2, 0}, 12020 {0x132, 0, 0}, 12021 {0x133, 0x10, 0}, 12022 {0x134, 0x1, 0}, 12023 {0x135, 0, 0}, 12024 {0x136, 0, 0}, 12025 {0x137, 0x80, 0}, 12026 {0x138, 0x60, 0}, 12027 {0x139, 0x44, 0}, 12028 {0x13A, 0x55, 0}, 12029 {0x13B, 0x1, 0}, 12030 {0x13C, 0x55, 0}, 12031 {0x13D, 0x1, 0}, 12032 {0x13E, 0x5, 0}, 12033 {0x13F, 0x55, 0}, 12034 {0x140, 0x55, 0}, 12035 {0x148, 0, 0}, 12036 {0x149, 0, 0}, 12037 {0x14A, 0, 0}, 12038 {0x14B, 0, 0}, 12039 {0x14C, 0, 0}, 12040 {0x14D, 0, 0}, 12041 {0x14E, 0, 0}, 12042 {0x14F, 0, 0}, 12043 {0x150, 0, 0}, 12044 {0x154, 0xc, 0}, 12045 {0x155, 0xc, 0}, 12046 {0x156, 0xc, 0}, 12047 {0x157, 0, 0}, 12048 {0x158, 0x2b, 0}, 12049 {0x159, 0x84, 0}, 12050 {0x15A, 0x15, 0}, 12051 {0x15B, 0xf, 0}, 12052 {0x15C, 0, 0}, 12053 {0x15D, 0, 0}, 12054 {0x15E, 0, 1}, 12055 {0x15F, 0, 1}, 12056 {0x160, 0, 1}, 12057 {0x161, 0, 1}, 12058 {0x162, 0, 1}, 12059 {0x163, 0, 1}, 12060 {0x164, 0, 0}, 12061 {0x165, 0, 0}, 12062 {0x166, 0, 0}, 12063 {0x167, 0, 0}, 12064 {0x168, 0, 0}, 12065 {0x169, 0, 0}, 12066 {0x16A, 0, 1}, 12067 {0x16B, 0, 1}, 12068 {0x16C, 0, 1}, 12069 {0x16D, 0, 0}, 12070 {0x170, 0, 0}, 12071 {0x171, 0x77, 0}, 12072 {0x172, 0x77, 0}, 12073 {0x173, 0x77, 0}, 12074 {0x174, 0x77, 0}, 12075 {0x175, 0, 0}, 12076 {0x176, 0x3, 0}, 12077 {0x177, 0x37, 0}, 12078 {0x178, 0x3, 0}, 12079 {0x179, 0, 0}, 12080 {0x17B, 0x21, 0}, 12081 {0x17C, 0, 0}, 12082 {0x17D, 0xaa, 0}, 12083 {0x17E, 0, 0}, 12084 {0x190, 0, 0}, 12085 {0x191, 0x77, 0}, 12086 {0x192, 0x77, 0}, 12087 {0x193, 0x77, 0}, 12088 {0x194, 0x77, 0}, 12089 {0x195, 0, 0}, 12090 {0x196, 0x3, 0}, 12091 {0x197, 0x37, 0}, 12092 {0x198, 0x3, 0}, 12093 {0x199, 0, 0}, 12094 {0x19B, 0x21, 0}, 12095 {0x19C, 0, 0}, 12096 {0x19D, 0xaa, 0}, 12097 {0x19E, 0, 0}, 12098 {0x1A1, 0x2, 0}, 12099 {0x1A2, 0xf, 0}, 12100 {0x1A3, 0xf, 0}, 12101 {0x1A4, 0, 1}, 12102 {0x1A5, 0, 1}, 12103 {0x1A6, 0, 1}, 12104 {0x1A7, 0x2, 0}, 12105 {0x1A8, 0xf, 0}, 12106 {0x1A9, 0xf, 0}, 12107 {0x1AA, 0, 1}, 12108 {0x1AB, 0, 1}, 12109 {0x1AC, 0, 1}, 12110 {0x1AD, 0x84, 0}, 12111 {0x1AE, 0x60, 0}, 12112 {0x1AF, 0x47, 0}, 12113 {0x1B0, 0x47, 0}, 12114 {0x1B1, 0, 0}, 12115 {0x1B2, 0, 0}, 12116 {0x1B3, 0, 0}, 12117 {0x1B4, 0, 0}, 12118 {0x1B5, 0, 0}, 12119 {0x1B6, 0, 0}, 12120 {0x1B7, 0xc, 1}, 12121 {0x1B8, 0, 0}, 12122 {0x1B9, 0, 0}, 12123 {0x1BA, 0, 0}, 12124 {0x1BB, 0, 0}, 12125 {0x1BC, 0, 0}, 12126 {0x1BD, 0, 0}, 12127 {0x1BE, 0, 0}, 12128 {0x1BF, 0, 0}, 12129 {0x1C0, 0, 0}, 12130 {0x1C1, 0x1, 1}, 12131 {0x1C2, 0x80, 1}, 12132 {0x1C3, 0, 0}, 12133 {0x1C4, 0, 0}, 12134 {0x1C5, 0, 0}, 12135 {0x1C6, 0, 0}, 12136 {0x1C7, 0, 0}, 12137 {0x1C8, 0, 0}, 12138 {0x1C9, 0, 0}, 12139 {0x1CA, 0, 0}, 12140 {0xFFFF, 0, 0} 12141}; 12142 12143static struct radio_20xx_regs regs_2057_rev5v1[] = { 12144 {0x00, 0x15, 1}, 12145 {0x01, 0x57, 1}, 12146 {0x02, 0x20, 1}, 12147 {0x03, 0x1f, 0}, 12148 {0x04, 0x4, 0}, 12149 {0x05, 0x2, 0}, 12150 {0x06, 0x1, 0}, 12151 {0x07, 0x1, 0}, 12152 {0x08, 0x1, 0}, 12153 {0x09, 0x69, 0}, 12154 {0x0A, 0x66, 0}, 12155 {0x0B, 0x6, 0}, 12156 {0x0C, 0x18, 0}, 12157 {0x0D, 0x3, 0}, 12158 {0x0E, 0x20, 0}, 12159 {0x0F, 0x20, 0}, 12160 {0x10, 0, 0}, 12161 {0x11, 0x7c, 0}, 12162 {0x12, 0x42, 0}, 12163 {0x13, 0xbd, 0}, 12164 {0x14, 0x7, 0}, 12165 {0x15, 0x87, 0}, 12166 {0x16, 0x8, 0}, 12167 {0x17, 0x17, 0}, 12168 {0x18, 0x7, 0}, 12169 {0x19, 0, 0}, 12170 {0x1A, 0x2, 0}, 12171 {0x1B, 0x13, 0}, 12172 {0x1C, 0x3e, 0}, 12173 {0x1D, 0x3e, 0}, 12174 {0x1E, 0x96, 0}, 12175 {0x1F, 0x4, 0}, 12176 {0x20, 0, 0}, 12177 {0x21, 0, 0}, 12178 {0x22, 0x17, 0}, 12179 {0x23, 0x6, 1}, 12180 {0x24, 0x1, 0}, 12181 {0x25, 0x6, 0}, 12182 {0x26, 0x4, 0}, 12183 {0x27, 0xd, 0}, 12184 {0x28, 0xd, 0}, 12185 {0x29, 0x30, 0}, 12186 {0x2A, 0x32, 0}, 12187 {0x2B, 0x8, 0}, 12188 {0x2C, 0x1c, 0}, 12189 {0x2D, 0x2, 0}, 12190 {0x2E, 0x4, 0}, 12191 {0x2F, 0x7f, 0}, 12192 {0x30, 0x27, 0}, 12193 {0x31, 0, 1}, 12194 {0x32, 0, 1}, 12195 {0x33, 0, 1}, 12196 {0x34, 0, 0}, 12197 {0x35, 0x20, 0}, 12198 {0x36, 0x18, 0}, 12199 {0x37, 0x7, 0}, 12200 {0x38, 0x66, 0}, 12201 {0x39, 0x66, 0}, 12202 {0x3C, 0xff, 0}, 12203 {0x3D, 0xff, 0}, 12204 {0x40, 0x16, 0}, 12205 {0x41, 0x7, 0}, 12206 {0x45, 0x3, 0}, 12207 {0x46, 0x1, 0}, 12208 {0x47, 0x7, 0}, 12209 {0x4B, 0x66, 0}, 12210 {0x4C, 0x66, 0}, 12211 {0x4D, 0, 0}, 12212 {0x4E, 0x4, 0}, 12213 {0x4F, 0xc, 0}, 12214 {0x50, 0, 0}, 12215 {0x51, 0x70, 1}, 12216 {0x56, 0x7, 0}, 12217 {0x57, 0, 0}, 12218 {0x58, 0, 0}, 12219 {0x59, 0x88, 1}, 12220 {0x5A, 0, 0}, 12221 {0x5B, 0x1f, 0}, 12222 {0x5C, 0x20, 1}, 12223 {0x5D, 0x1, 0}, 12224 {0x5E, 0x30, 0}, 12225 {0x5F, 0x70, 0}, 12226 {0x60, 0, 0}, 12227 {0x61, 0, 0}, 12228 {0x62, 0x33, 1}, 12229 {0x63, 0xf, 1}, 12230 {0x64, 0xf, 1}, 12231 {0x65, 0, 0}, 12232 {0x66, 0x11, 0}, 12233 {0x80, 0x3c, 0}, 12234 {0x81, 0x1, 1}, 12235 {0x82, 0xa, 0}, 12236 {0x85, 0, 0}, 12237 {0x86, 0x40, 0}, 12238 {0x87, 0x40, 0}, 12239 {0x88, 0x88, 0}, 12240 {0x89, 0x10, 0}, 12241 {0x8A, 0xf0, 0}, 12242 {0x8B, 0x10, 0}, 12243 {0x8C, 0xf0, 0}, 12244 {0x8F, 0x10, 0}, 12245 {0x90, 0x55, 0}, 12246 {0x91, 0x3f, 1}, 12247 {0x92, 0x36, 1}, 12248 {0x93, 0, 0}, 12249 {0x94, 0, 0}, 12250 {0x95, 0, 0}, 12251 {0x96, 0x87, 0}, 12252 {0x97, 0x11, 0}, 12253 {0x98, 0, 0}, 12254 {0x99, 0x33, 0}, 12255 {0x9A, 0x88, 0}, 12256 {0xA1, 0x20, 1}, 12257 {0xA2, 0x3f, 0}, 12258 {0xA3, 0x44, 0}, 12259 {0xA4, 0x8c, 0}, 12260 {0xA5, 0x6c, 0}, 12261 {0xA6, 0x22, 0}, 12262 {0xA7, 0xbe, 0}, 12263 {0xA8, 0x55, 0}, 12264 {0xAA, 0xc, 0}, 12265 {0xAB, 0xaa, 0}, 12266 {0xAC, 0x2, 0}, 12267 {0xAD, 0, 0}, 12268 {0xAE, 0x10, 0}, 12269 {0xAF, 0x1, 0}, 12270 {0xB0, 0, 0}, 12271 {0xB1, 0, 0}, 12272 {0xB2, 0x80, 0}, 12273 {0xB3, 0x60, 0}, 12274 {0xB4, 0x44, 0}, 12275 {0xB5, 0x55, 0}, 12276 {0xB6, 0x1, 0}, 12277 {0xB7, 0x55, 0}, 12278 {0xB8, 0x1, 0}, 12279 {0xB9, 0x5, 0}, 12280 {0xBA, 0x55, 0}, 12281 {0xBB, 0x55, 0}, 12282 {0xC3, 0, 0}, 12283 {0xC4, 0, 0}, 12284 {0xC5, 0, 0}, 12285 {0xC6, 0, 0}, 12286 {0xC7, 0, 0}, 12287 {0xC8, 0, 0}, 12288 {0xC9, 0x1, 1}, 12289 {0xCA, 0, 0}, 12290 {0xCB, 0, 0}, 12291 {0xCD, 0, 0}, 12292 {0xCE, 0x5e, 0}, 12293 {0xCF, 0xc, 0}, 12294 {0xD0, 0xc, 0}, 12295 {0xD1, 0xc, 0}, 12296 {0xD2, 0, 0}, 12297 {0xD3, 0x2b, 0}, 12298 {0xD4, 0xc, 0}, 12299 {0xD5, 0, 0}, 12300 {0xD6, 0x70, 1}, 12301 {0xDB, 0x7, 0}, 12302 {0xDC, 0, 0}, 12303 {0xDD, 0, 0}, 12304 {0xDE, 0x88, 1}, 12305 {0xDF, 0, 0}, 12306 {0xE0, 0x1f, 0}, 12307 {0xE1, 0x20, 1}, 12308 {0xE2, 0x1, 0}, 12309 {0xE3, 0x30, 0}, 12310 {0xE4, 0x70, 0}, 12311 {0xE5, 0, 0}, 12312 {0xE6, 0, 0}, 12313 {0xE7, 0x33, 0}, 12314 {0xE8, 0xf, 1}, 12315 {0xE9, 0xf, 1}, 12316 {0xEA, 0, 0}, 12317 {0xEB, 0x11, 0}, 12318 {0x105, 0x3c, 0}, 12319 {0x106, 0x1, 1}, 12320 {0x107, 0xa, 0}, 12321 {0x10A, 0, 0}, 12322 {0x10B, 0x40, 0}, 12323 {0x10C, 0x40, 0}, 12324 {0x10D, 0x88, 0}, 12325 {0x10E, 0x10, 0}, 12326 {0x10F, 0xf0, 0}, 12327 {0x110, 0x10, 0}, 12328 {0x111, 0xf0, 0}, 12329 {0x114, 0x10, 0}, 12330 {0x115, 0x55, 0}, 12331 {0x116, 0x3f, 1}, 12332 {0x117, 0x36, 1}, 12333 {0x118, 0, 0}, 12334 {0x119, 0, 0}, 12335 {0x11A, 0, 0}, 12336 {0x11B, 0x87, 0}, 12337 {0x11C, 0x11, 0}, 12338 {0x11D, 0, 0}, 12339 {0x11E, 0x33, 0}, 12340 {0x11F, 0x88, 0}, 12341 {0x126, 0x20, 1}, 12342 {0x127, 0x3f, 0}, 12343 {0x128, 0x44, 0}, 12344 {0x129, 0x8c, 0}, 12345 {0x12A, 0x6c, 0}, 12346 {0x12B, 0x22, 0}, 12347 {0x12C, 0xbe, 0}, 12348 {0x12D, 0x55, 0}, 12349 {0x12F, 0xc, 0}, 12350 {0x130, 0xaa, 0}, 12351 {0x131, 0x2, 0}, 12352 {0x132, 0, 0}, 12353 {0x133, 0x10, 0}, 12354 {0x134, 0x1, 0}, 12355 {0x135, 0, 0}, 12356 {0x136, 0, 0}, 12357 {0x137, 0x80, 0}, 12358 {0x138, 0x60, 0}, 12359 {0x139, 0x44, 0}, 12360 {0x13A, 0x55, 0}, 12361 {0x13B, 0x1, 0}, 12362 {0x13C, 0x55, 0}, 12363 {0x13D, 0x1, 0}, 12364 {0x13E, 0x5, 0}, 12365 {0x13F, 0x55, 0}, 12366 {0x140, 0x55, 0}, 12367 {0x148, 0, 0}, 12368 {0x149, 0, 0}, 12369 {0x14A, 0, 0}, 12370 {0x14B, 0, 0}, 12371 {0x14C, 0, 0}, 12372 {0x14D, 0, 0}, 12373 {0x14E, 0x1, 1}, 12374 {0x14F, 0, 0}, 12375 {0x150, 0, 0}, 12376 {0x154, 0xc, 0}, 12377 {0x155, 0xc, 0}, 12378 {0x156, 0xc, 0}, 12379 {0x157, 0, 0}, 12380 {0x158, 0x2b, 0}, 12381 {0x159, 0x84, 0}, 12382 {0x15A, 0x15, 0}, 12383 {0x15B, 0xf, 0}, 12384 {0x15C, 0, 0}, 12385 {0x15D, 0, 0}, 12386 {0x15E, 0, 1}, 12387 {0x15F, 0, 1}, 12388 {0x160, 0, 1}, 12389 {0x161, 0, 1}, 12390 {0x162, 0, 1}, 12391 {0x163, 0, 1}, 12392 {0x164, 0, 0}, 12393 {0x165, 0, 0}, 12394 {0x166, 0, 0}, 12395 {0x167, 0, 0}, 12396 {0x168, 0, 0}, 12397 {0x169, 0, 0}, 12398 {0x16A, 0, 1}, 12399 {0x16B, 0, 1}, 12400 {0x16C, 0, 1}, 12401 {0x16D, 0, 0}, 12402 {0x170, 0, 0}, 12403 {0x171, 0x77, 0}, 12404 {0x172, 0x77, 0}, 12405 {0x173, 0x77, 0}, 12406 {0x174, 0x77, 0}, 12407 {0x175, 0, 0}, 12408 {0x176, 0x3, 0}, 12409 {0x177, 0x37, 0}, 12410 {0x178, 0x3, 0}, 12411 {0x179, 0, 0}, 12412 {0x17B, 0x21, 0}, 12413 {0x17C, 0, 0}, 12414 {0x17D, 0xaa, 0}, 12415 {0x17E, 0, 0}, 12416 {0x190, 0, 0}, 12417 {0x191, 0x77, 0}, 12418 {0x192, 0x77, 0}, 12419 {0x193, 0x77, 0}, 12420 {0x194, 0x77, 0}, 12421 {0x195, 0, 0}, 12422 {0x196, 0x3, 0}, 12423 {0x197, 0x37, 0}, 12424 {0x198, 0x3, 0}, 12425 {0x199, 0, 0}, 12426 {0x19B, 0x21, 0}, 12427 {0x19C, 0, 0}, 12428 {0x19D, 0xaa, 0}, 12429 {0x19E, 0, 0}, 12430 {0x1A1, 0x2, 0}, 12431 {0x1A2, 0xf, 0}, 12432 {0x1A3, 0xf, 0}, 12433 {0x1A4, 0, 1}, 12434 {0x1A5, 0, 1}, 12435 {0x1A6, 0, 1}, 12436 {0x1A7, 0x2, 0}, 12437 {0x1A8, 0xf, 0}, 12438 {0x1A9, 0xf, 0}, 12439 {0x1AA, 0, 1}, 12440 {0x1AB, 0, 1}, 12441 {0x1AC, 0, 1}, 12442 {0x1AD, 0x84, 0}, 12443 {0x1AE, 0x60, 0}, 12444 {0x1AF, 0x47, 0}, 12445 {0x1B0, 0x47, 0}, 12446 {0x1B1, 0, 0}, 12447 {0x1B2, 0, 0}, 12448 {0x1B3, 0, 0}, 12449 {0x1B4, 0, 0}, 12450 {0x1B5, 0, 0}, 12451 {0x1B6, 0, 0}, 12452 {0x1B7, 0xc, 1}, 12453 {0x1B8, 0, 0}, 12454 {0x1B9, 0, 0}, 12455 {0x1BA, 0, 0}, 12456 {0x1BB, 0, 0}, 12457 {0x1BC, 0, 0}, 12458 {0x1BD, 0, 0}, 12459 {0x1BE, 0, 0}, 12460 {0x1BF, 0, 0}, 12461 {0x1C0, 0, 0}, 12462 {0x1C1, 0x1, 1}, 12463 {0x1C2, 0x80, 1}, 12464 {0x1C3, 0, 0}, 12465 {0x1C4, 0, 0}, 12466 {0x1C5, 0, 0}, 12467 {0x1C6, 0, 0}, 12468 {0x1C7, 0, 0}, 12469 {0x1C8, 0, 0}, 12470 {0x1C9, 0, 0}, 12471 {0x1CA, 0, 0}, 12472 {0xFFFF, 0, 0} 12473}; 12474 12475static struct radio_20xx_regs regs_2057_rev7[] = { 12476 {0x00, 0, 1}, 12477 {0x01, 0x57, 1}, 12478 {0x02, 0x20, 1}, 12479 {0x03, 0x1f, 0}, 12480 {0x04, 0x4, 0}, 12481 {0x05, 0x2, 0}, 12482 {0x06, 0x1, 0}, 12483 {0x07, 0x1, 0}, 12484 {0x08, 0x1, 0}, 12485 {0x09, 0x69, 0}, 12486 {0x0A, 0x66, 0}, 12487 {0x0B, 0x6, 0}, 12488 {0x0C, 0x18, 0}, 12489 {0x0D, 0x3, 0}, 12490 {0x0E, 0x20, 0}, 12491 {0x0F, 0x20, 0}, 12492 {0x10, 0, 0}, 12493 {0x11, 0x7c, 0}, 12494 {0x12, 0x42, 0}, 12495 {0x13, 0xbd, 0}, 12496 {0x14, 0x7, 0}, 12497 {0x15, 0x87, 0}, 12498 {0x16, 0x8, 0}, 12499 {0x17, 0x17, 0}, 12500 {0x18, 0x7, 0}, 12501 {0x19, 0, 0}, 12502 {0x1A, 0x2, 0}, 12503 {0x1B, 0x13, 0}, 12504 {0x1C, 0x3e, 0}, 12505 {0x1D, 0x3e, 0}, 12506 {0x1E, 0x96, 0}, 12507 {0x1F, 0x4, 0}, 12508 {0x20, 0, 0}, 12509 {0x21, 0, 0}, 12510 {0x22, 0x17, 0}, 12511 {0x23, 0x6, 0}, 12512 {0x24, 0x1, 0}, 12513 {0x25, 0x6, 0}, 12514 {0x26, 0x4, 0}, 12515 {0x27, 0xd, 0}, 12516 {0x28, 0xd, 0}, 12517 {0x29, 0x30, 0}, 12518 {0x2A, 0x32, 0}, 12519 {0x2B, 0x8, 0}, 12520 {0x2C, 0x1c, 0}, 12521 {0x2D, 0x2, 0}, 12522 {0x2E, 0x4, 0}, 12523 {0x2F, 0x7f, 0}, 12524 {0x30, 0x27, 0}, 12525 {0x31, 0, 1}, 12526 {0x32, 0, 1}, 12527 {0x33, 0, 1}, 12528 {0x34, 0, 0}, 12529 {0x35, 0x20, 0}, 12530 {0x36, 0x18, 0}, 12531 {0x37, 0x7, 0}, 12532 {0x38, 0x66, 0}, 12533 {0x39, 0x66, 0}, 12534 {0x3A, 0x66, 0}, 12535 {0x3B, 0x66, 0}, 12536 {0x3C, 0xff, 0}, 12537 {0x3D, 0xff, 0}, 12538 {0x3E, 0xff, 0}, 12539 {0x3F, 0xff, 0}, 12540 {0x40, 0x16, 0}, 12541 {0x41, 0x7, 0}, 12542 {0x42, 0x19, 0}, 12543 {0x43, 0x7, 0}, 12544 {0x44, 0x6, 0}, 12545 {0x45, 0x3, 0}, 12546 {0x46, 0x1, 0}, 12547 {0x47, 0x7, 0}, 12548 {0x48, 0x33, 0}, 12549 {0x49, 0x5, 0}, 12550 {0x4A, 0x77, 0}, 12551 {0x4B, 0x66, 0}, 12552 {0x4C, 0x66, 0}, 12553 {0x4D, 0, 0}, 12554 {0x4E, 0x4, 0}, 12555 {0x4F, 0xc, 0}, 12556 {0x50, 0, 0}, 12557 {0x51, 0x70, 1}, 12558 {0x56, 0x7, 0}, 12559 {0x57, 0, 0}, 12560 {0x58, 0, 0}, 12561 {0x59, 0x88, 1}, 12562 {0x5A, 0, 0}, 12563 {0x5B, 0x1f, 0}, 12564 {0x5C, 0x20, 1}, 12565 {0x5D, 0x1, 0}, 12566 {0x5E, 0x30, 0}, 12567 {0x5F, 0x70, 0}, 12568 {0x60, 0, 0}, 12569 {0x61, 0, 0}, 12570 {0x62, 0x33, 1}, 12571 {0x63, 0xf, 1}, 12572 {0x64, 0x13, 1}, 12573 {0x65, 0, 0}, 12574 {0x66, 0xee, 1}, 12575 {0x69, 0, 0}, 12576 {0x6A, 0x7e, 0}, 12577 {0x6B, 0x3f, 0}, 12578 {0x6C, 0x7f, 0}, 12579 {0x6D, 0x78, 0}, 12580 {0x6E, 0x58, 1}, 12581 {0x6F, 0x88, 0}, 12582 {0x70, 0x8, 0}, 12583 {0x71, 0xf, 0}, 12584 {0x72, 0xbc, 0}, 12585 {0x73, 0x8, 0}, 12586 {0x74, 0x60, 0}, 12587 {0x75, 0x13, 1}, 12588 {0x76, 0x70, 0}, 12589 {0x77, 0, 0}, 12590 {0x78, 0, 0}, 12591 {0x79, 0, 0}, 12592 {0x7A, 0x33, 0}, 12593 {0x7B, 0x13, 1}, 12594 {0x7C, 0x14, 1}, 12595 {0x7D, 0xee, 1}, 12596 {0x80, 0x3c, 0}, 12597 {0x81, 0x1, 1}, 12598 {0x82, 0xa, 0}, 12599 {0x83, 0x9d, 0}, 12600 {0x84, 0xa, 0}, 12601 {0x85, 0, 0}, 12602 {0x86, 0x40, 0}, 12603 {0x87, 0x40, 0}, 12604 {0x88, 0x88, 0}, 12605 {0x89, 0x10, 0}, 12606 {0x8A, 0xf0, 0}, 12607 {0x8B, 0x10, 0}, 12608 {0x8C, 0xf0, 0}, 12609 {0x8D, 0, 0}, 12610 {0x8E, 0, 0}, 12611 {0x8F, 0x10, 0}, 12612 {0x90, 0x55, 0}, 12613 {0x91, 0x3f, 1}, 12614 {0x92, 0x36, 1}, 12615 {0x93, 0, 0}, 12616 {0x94, 0, 0}, 12617 {0x95, 0, 0}, 12618 {0x96, 0x87, 0}, 12619 {0x97, 0x11, 0}, 12620 {0x98, 0, 0}, 12621 {0x99, 0x33, 0}, 12622 {0x9A, 0x88, 0}, 12623 {0x9B, 0, 0}, 12624 {0x9C, 0x87, 0}, 12625 {0x9D, 0x11, 0}, 12626 {0x9E, 0, 0}, 12627 {0x9F, 0x33, 0}, 12628 {0xA0, 0x88, 0}, 12629 {0xA1, 0x20, 1}, 12630 {0xA2, 0x3f, 0}, 12631 {0xA3, 0x44, 0}, 12632 {0xA4, 0x8c, 0}, 12633 {0xA5, 0x6c, 0}, 12634 {0xA6, 0x22, 0}, 12635 {0xA7, 0xbe, 0}, 12636 {0xA8, 0x55, 0}, 12637 {0xAA, 0xc, 0}, 12638 {0xAB, 0xaa, 0}, 12639 {0xAC, 0x2, 0}, 12640 {0xAD, 0, 0}, 12641 {0xAE, 0x10, 0}, 12642 {0xAF, 0x1, 0}, 12643 {0xB0, 0, 0}, 12644 {0xB1, 0, 0}, 12645 {0xB2, 0x80, 0}, 12646 {0xB3, 0x60, 0}, 12647 {0xB4, 0x44, 0}, 12648 {0xB5, 0x55, 0}, 12649 {0xB6, 0x1, 0}, 12650 {0xB7, 0x55, 0}, 12651 {0xB8, 0x1, 0}, 12652 {0xB9, 0x5, 0}, 12653 {0xBA, 0x55, 0}, 12654 {0xBB, 0x55, 0}, 12655 {0xC1, 0, 0}, 12656 {0xC2, 0, 0}, 12657 {0xC3, 0, 0}, 12658 {0xC4, 0, 0}, 12659 {0xC5, 0, 0}, 12660 {0xC6, 0, 0}, 12661 {0xC7, 0, 0}, 12662 {0xC8, 0, 0}, 12663 {0xC9, 0, 0}, 12664 {0xCA, 0, 0}, 12665 {0xCB, 0, 0}, 12666 {0xCC, 0, 0}, 12667 {0xCD, 0, 0}, 12668 {0xCE, 0x5e, 0}, 12669 {0xCF, 0xc, 0}, 12670 {0xD0, 0xc, 0}, 12671 {0xD1, 0xc, 0}, 12672 {0xD2, 0, 0}, 12673 {0xD3, 0x2b, 0}, 12674 {0xD4, 0xc, 0}, 12675 {0xD5, 0, 0}, 12676 {0xD6, 0x70, 1}, 12677 {0xDB, 0x7, 0}, 12678 {0xDC, 0, 0}, 12679 {0xDD, 0, 0}, 12680 {0xDE, 0x88, 1}, 12681 {0xDF, 0, 0}, 12682 {0xE0, 0x1f, 0}, 12683 {0xE1, 0x20, 1}, 12684 {0xE2, 0x1, 0}, 12685 {0xE3, 0x30, 0}, 12686 {0xE4, 0x70, 0}, 12687 {0xE5, 0, 0}, 12688 {0xE6, 0, 0}, 12689 {0xE7, 0x33, 0}, 12690 {0xE8, 0xf, 1}, 12691 {0xE9, 0x13, 1}, 12692 {0xEA, 0, 0}, 12693 {0xEB, 0xee, 1}, 12694 {0xEE, 0, 0}, 12695 {0xEF, 0x7e, 0}, 12696 {0xF0, 0x3f, 0}, 12697 {0xF1, 0x7f, 0}, 12698 {0xF2, 0x78, 0}, 12699 {0xF3, 0x58, 1}, 12700 {0xF4, 0x88, 0}, 12701 {0xF5, 0x8, 0}, 12702 {0xF6, 0xf, 0}, 12703 {0xF7, 0xbc, 0}, 12704 {0xF8, 0x8, 0}, 12705 {0xF9, 0x60, 0}, 12706 {0xFA, 0x13, 1}, 12707 {0xFB, 0x70, 0}, 12708 {0xFC, 0, 0}, 12709 {0xFD, 0, 0}, 12710 {0xFE, 0, 0}, 12711 {0xFF, 0x33, 0}, 12712 {0x100, 0x13, 1}, 12713 {0x101, 0x14, 1}, 12714 {0x102, 0xee, 1}, 12715 {0x105, 0x3c, 0}, 12716 {0x106, 0x1, 1}, 12717 {0x107, 0xa, 0}, 12718 {0x108, 0x9d, 0}, 12719 {0x109, 0xa, 0}, 12720 {0x10A, 0, 0}, 12721 {0x10B, 0x40, 0}, 12722 {0x10C, 0x40, 0}, 12723 {0x10D, 0x88, 0}, 12724 {0x10E, 0x10, 0}, 12725 {0x10F, 0xf0, 0}, 12726 {0x110, 0x10, 0}, 12727 {0x111, 0xf0, 0}, 12728 {0x112, 0, 0}, 12729 {0x113, 0, 0}, 12730 {0x114, 0x10, 0}, 12731 {0x115, 0x55, 0}, 12732 {0x116, 0x3f, 1}, 12733 {0x117, 0x36, 1}, 12734 {0x118, 0, 0}, 12735 {0x119, 0, 0}, 12736 {0x11A, 0, 0}, 12737 {0x11B, 0x87, 0}, 12738 {0x11C, 0x11, 0}, 12739 {0x11D, 0, 0}, 12740 {0x11E, 0x33, 0}, 12741 {0x11F, 0x88, 0}, 12742 {0x120, 0, 0}, 12743 {0x121, 0x87, 0}, 12744 {0x122, 0x11, 0}, 12745 {0x123, 0, 0}, 12746 {0x124, 0x33, 0}, 12747 {0x125, 0x88, 0}, 12748 {0x126, 0x20, 1}, 12749 {0x127, 0x3f, 0}, 12750 {0x128, 0x44, 0}, 12751 {0x129, 0x8c, 0}, 12752 {0x12A, 0x6c, 0}, 12753 {0x12B, 0x22, 0}, 12754 {0x12C, 0xbe, 0}, 12755 {0x12D, 0x55, 0}, 12756 {0x12F, 0xc, 0}, 12757 {0x130, 0xaa, 0}, 12758 {0x131, 0x2, 0}, 12759 {0x132, 0, 0}, 12760 {0x133, 0x10, 0}, 12761 {0x134, 0x1, 0}, 12762 {0x135, 0, 0}, 12763 {0x136, 0, 0}, 12764 {0x137, 0x80, 0}, 12765 {0x138, 0x60, 0}, 12766 {0x139, 0x44, 0}, 12767 {0x13A, 0x55, 0}, 12768 {0x13B, 0x1, 0}, 12769 {0x13C, 0x55, 0}, 12770 {0x13D, 0x1, 0}, 12771 {0x13E, 0x5, 0}, 12772 {0x13F, 0x55, 0}, 12773 {0x140, 0x55, 0}, 12774 {0x146, 0, 0}, 12775 {0x147, 0, 0}, 12776 {0x148, 0, 0}, 12777 {0x149, 0, 0}, 12778 {0x14A, 0, 0}, 12779 {0x14B, 0, 0}, 12780 {0x14C, 0, 0}, 12781 {0x14D, 0, 0}, 12782 {0x14E, 0, 0}, 12783 {0x14F, 0, 0}, 12784 {0x150, 0, 0}, 12785 {0x151, 0, 0}, 12786 {0x154, 0xc, 0}, 12787 {0x155, 0xc, 0}, 12788 {0x156, 0xc, 0}, 12789 {0x157, 0, 0}, 12790 {0x158, 0x2b, 0}, 12791 {0x159, 0x84, 0}, 12792 {0x15A, 0x15, 0}, 12793 {0x15B, 0xf, 0}, 12794 {0x15C, 0, 0}, 12795 {0x15D, 0, 0}, 12796 {0x15E, 0, 1}, 12797 {0x15F, 0, 1}, 12798 {0x160, 0, 1}, 12799 {0x161, 0, 1}, 12800 {0x162, 0, 1}, 12801 {0x163, 0, 1}, 12802 {0x164, 0, 0}, 12803 {0x165, 0, 0}, 12804 {0x166, 0, 0}, 12805 {0x167, 0, 0}, 12806 {0x168, 0, 0}, 12807 {0x169, 0, 0}, 12808 {0x16A, 0, 1}, 12809 {0x16B, 0, 1}, 12810 {0x16C, 0, 1}, 12811 {0x16D, 0, 0}, 12812 {0x170, 0, 0}, 12813 {0x171, 0x77, 0}, 12814 {0x172, 0x77, 0}, 12815 {0x173, 0x77, 0}, 12816 {0x174, 0x77, 0}, 12817 {0x175, 0, 0}, 12818 {0x176, 0x3, 0}, 12819 {0x177, 0x37, 0}, 12820 {0x178, 0x3, 0}, 12821 {0x179, 0, 0}, 12822 {0x17A, 0x21, 0}, 12823 {0x17B, 0x21, 0}, 12824 {0x17C, 0, 0}, 12825 {0x17D, 0xaa, 0}, 12826 {0x17E, 0, 0}, 12827 {0x17F, 0xaa, 0}, 12828 {0x180, 0, 0}, 12829 {0x190, 0, 0}, 12830 {0x191, 0x77, 0}, 12831 {0x192, 0x77, 0}, 12832 {0x193, 0x77, 0}, 12833 {0x194, 0x77, 0}, 12834 {0x195, 0, 0}, 12835 {0x196, 0x3, 0}, 12836 {0x197, 0x37, 0}, 12837 {0x198, 0x3, 0}, 12838 {0x199, 0, 0}, 12839 {0x19A, 0x21, 0}, 12840 {0x19B, 0x21, 0}, 12841 {0x19C, 0, 0}, 12842 {0x19D, 0xaa, 0}, 12843 {0x19E, 0, 0}, 12844 {0x19F, 0xaa, 0}, 12845 {0x1A0, 0, 0}, 12846 {0x1A1, 0x2, 0}, 12847 {0x1A2, 0xf, 0}, 12848 {0x1A3, 0xf, 0}, 12849 {0x1A4, 0, 1}, 12850 {0x1A5, 0, 1}, 12851 {0x1A6, 0, 1}, 12852 {0x1A7, 0x2, 0}, 12853 {0x1A8, 0xf, 0}, 12854 {0x1A9, 0xf, 0}, 12855 {0x1AA, 0, 1}, 12856 {0x1AB, 0, 1}, 12857 {0x1AC, 0, 1}, 12858 {0x1AD, 0x84, 0}, 12859 {0x1AE, 0x60, 0}, 12860 {0x1AF, 0x47, 0}, 12861 {0x1B0, 0x47, 0}, 12862 {0x1B1, 0, 0}, 12863 {0x1B2, 0, 0}, 12864 {0x1B3, 0, 0}, 12865 {0x1B4, 0, 0}, 12866 {0x1B5, 0, 0}, 12867 {0x1B6, 0, 0}, 12868 {0x1B7, 0x5, 1}, 12869 {0x1B8, 0, 0}, 12870 {0x1B9, 0, 0}, 12871 {0x1BA, 0, 0}, 12872 {0x1BB, 0, 0}, 12873 {0x1BC, 0, 0}, 12874 {0x1BD, 0, 0}, 12875 {0x1BE, 0, 0}, 12876 {0x1BF, 0, 0}, 12877 {0x1C0, 0, 0}, 12878 {0x1C1, 0, 0}, 12879 {0x1C2, 0xa0, 1}, 12880 {0x1C3, 0, 0}, 12881 {0x1C4, 0, 0}, 12882 {0x1C5, 0, 0}, 12883 {0x1C6, 0, 0}, 12884 {0x1C7, 0, 0}, 12885 {0x1C8, 0, 0}, 12886 {0x1C9, 0, 0}, 12887 {0x1CA, 0, 0}, 12888 {0xFFFF, 0, 0} 12889}; 12890 12891static struct radio_20xx_regs regs_2057_rev8[] = { 12892 {0x00, 0x8, 1}, 12893 {0x01, 0x57, 1}, 12894 {0x02, 0x20, 1}, 12895 {0x03, 0x1f, 0}, 12896 {0x04, 0x4, 0}, 12897 {0x05, 0x2, 0}, 12898 {0x06, 0x1, 0}, 12899 {0x07, 0x1, 0}, 12900 {0x08, 0x1, 0}, 12901 {0x09, 0x69, 0}, 12902 {0x0A, 0x66, 0}, 12903 {0x0B, 0x6, 0}, 12904 {0x0C, 0x18, 0}, 12905 {0x0D, 0x3, 0}, 12906 {0x0E, 0x20, 0}, 12907 {0x0F, 0x20, 0}, 12908 {0x10, 0, 0}, 12909 {0x11, 0x7c, 0}, 12910 {0x12, 0x42, 0}, 12911 {0x13, 0xbd, 0}, 12912 {0x14, 0x7, 0}, 12913 {0x15, 0x87, 0}, 12914 {0x16, 0x8, 0}, 12915 {0x17, 0x17, 0}, 12916 {0x18, 0x7, 0}, 12917 {0x19, 0, 0}, 12918 {0x1A, 0x2, 0}, 12919 {0x1B, 0x13, 0}, 12920 {0x1C, 0x3e, 0}, 12921 {0x1D, 0x3e, 0}, 12922 {0x1E, 0x96, 0}, 12923 {0x1F, 0x4, 0}, 12924 {0x20, 0, 0}, 12925 {0x21, 0, 0}, 12926 {0x22, 0x17, 0}, 12927 {0x23, 0x6, 0}, 12928 {0x24, 0x1, 0}, 12929 {0x25, 0x6, 0}, 12930 {0x26, 0x4, 0}, 12931 {0x27, 0xd, 0}, 12932 {0x28, 0xd, 0}, 12933 {0x29, 0x30, 0}, 12934 {0x2A, 0x32, 0}, 12935 {0x2B, 0x8, 0}, 12936 {0x2C, 0x1c, 0}, 12937 {0x2D, 0x2, 0}, 12938 {0x2E, 0x4, 0}, 12939 {0x2F, 0x7f, 0}, 12940 {0x30, 0x27, 0}, 12941 {0x31, 0, 1}, 12942 {0x32, 0, 1}, 12943 {0x33, 0, 1}, 12944 {0x34, 0, 0}, 12945 {0x35, 0x20, 0}, 12946 {0x36, 0x18, 0}, 12947 {0x37, 0x7, 0}, 12948 {0x38, 0x66, 0}, 12949 {0x39, 0x66, 0}, 12950 {0x3A, 0x66, 0}, 12951 {0x3B, 0x66, 0}, 12952 {0x3C, 0xff, 0}, 12953 {0x3D, 0xff, 0}, 12954 {0x3E, 0xff, 0}, 12955 {0x3F, 0xff, 0}, 12956 {0x40, 0x16, 0}, 12957 {0x41, 0x7, 0}, 12958 {0x42, 0x19, 0}, 12959 {0x43, 0x7, 0}, 12960 {0x44, 0x6, 0}, 12961 {0x45, 0x3, 0}, 12962 {0x46, 0x1, 0}, 12963 {0x47, 0x7, 0}, 12964 {0x48, 0x33, 0}, 12965 {0x49, 0x5, 0}, 12966 {0x4A, 0x77, 0}, 12967 {0x4B, 0x66, 0}, 12968 {0x4C, 0x66, 0}, 12969 {0x4D, 0, 0}, 12970 {0x4E, 0x4, 0}, 12971 {0x4F, 0xc, 0}, 12972 {0x50, 0, 0}, 12973 {0x51, 0x70, 1}, 12974 {0x56, 0x7, 0}, 12975 {0x57, 0, 0}, 12976 {0x58, 0, 0}, 12977 {0x59, 0x88, 1}, 12978 {0x5A, 0, 0}, 12979 {0x5B, 0x1f, 0}, 12980 {0x5C, 0x20, 1}, 12981 {0x5D, 0x1, 0}, 12982 {0x5E, 0x30, 0}, 12983 {0x5F, 0x70, 0}, 12984 {0x60, 0, 0}, 12985 {0x61, 0, 0}, 12986 {0x62, 0x33, 1}, 12987 {0x63, 0xf, 1}, 12988 {0x64, 0xf, 1}, 12989 {0x65, 0, 0}, 12990 {0x66, 0x11, 0}, 12991 {0x69, 0, 0}, 12992 {0x6A, 0x7e, 0}, 12993 {0x6B, 0x3f, 0}, 12994 {0x6C, 0x7f, 0}, 12995 {0x6D, 0x78, 0}, 12996 {0x6E, 0x58, 1}, 12997 {0x6F, 0x88, 0}, 12998 {0x70, 0x8, 0}, 12999 {0x71, 0xf, 0}, 13000 {0x72, 0xbc, 0}, 13001 {0x73, 0x8, 0}, 13002 {0x74, 0x60, 0}, 13003 {0x75, 0x13, 1}, 13004 {0x76, 0x70, 0}, 13005 {0x77, 0, 0}, 13006 {0x78, 0, 0}, 13007 {0x79, 0, 0}, 13008 {0x7A, 0x33, 0}, 13009 {0x7B, 0x13, 1}, 13010 {0x7C, 0xf, 1}, 13011 {0x7D, 0xee, 1}, 13012 {0x80, 0x3c, 0}, 13013 {0x81, 0x1, 1}, 13014 {0x82, 0xa, 0}, 13015 {0x83, 0x9d, 0}, 13016 {0x84, 0xa, 0}, 13017 {0x85, 0, 0}, 13018 {0x86, 0x40, 0}, 13019 {0x87, 0x40, 0}, 13020 {0x88, 0x88, 0}, 13021 {0x89, 0x10, 0}, 13022 {0x8A, 0xf0, 0}, 13023 {0x8B, 0x10, 0}, 13024 {0x8C, 0xf0, 0}, 13025 {0x8D, 0, 0}, 13026 {0x8E, 0, 0}, 13027 {0x8F, 0x10, 0}, 13028 {0x90, 0x55, 0}, 13029 {0x91, 0x3f, 1}, 13030 {0x92, 0x36, 1}, 13031 {0x93, 0, 0}, 13032 {0x94, 0, 0}, 13033 {0x95, 0, 0}, 13034 {0x96, 0x87, 0}, 13035 {0x97, 0x11, 0}, 13036 {0x98, 0, 0}, 13037 {0x99, 0x33, 0}, 13038 {0x9A, 0x88, 0}, 13039 {0x9B, 0, 0}, 13040 {0x9C, 0x87, 0}, 13041 {0x9D, 0x11, 0}, 13042 {0x9E, 0, 0}, 13043 {0x9F, 0x33, 0}, 13044 {0xA0, 0x88, 0}, 13045 {0xA1, 0x20, 1}, 13046 {0xA2, 0x3f, 0}, 13047 {0xA3, 0x44, 0}, 13048 {0xA4, 0x8c, 0}, 13049 {0xA5, 0x6c, 0}, 13050 {0xA6, 0x22, 0}, 13051 {0xA7, 0xbe, 0}, 13052 {0xA8, 0x55, 0}, 13053 {0xAA, 0xc, 0}, 13054 {0xAB, 0xaa, 0}, 13055 {0xAC, 0x2, 0}, 13056 {0xAD, 0, 0}, 13057 {0xAE, 0x10, 0}, 13058 {0xAF, 0x1, 0}, 13059 {0xB0, 0, 0}, 13060 {0xB1, 0, 0}, 13061 {0xB2, 0x80, 0}, 13062 {0xB3, 0x60, 0}, 13063 {0xB4, 0x44, 0}, 13064 {0xB5, 0x55, 0}, 13065 {0xB6, 0x1, 0}, 13066 {0xB7, 0x55, 0}, 13067 {0xB8, 0x1, 0}, 13068 {0xB9, 0x5, 0}, 13069 {0xBA, 0x55, 0}, 13070 {0xBB, 0x55, 0}, 13071 {0xC1, 0, 0}, 13072 {0xC2, 0, 0}, 13073 {0xC3, 0, 0}, 13074 {0xC4, 0, 0}, 13075 {0xC5, 0, 0}, 13076 {0xC6, 0, 0}, 13077 {0xC7, 0, 0}, 13078 {0xC8, 0, 0}, 13079 {0xC9, 0x1, 1}, 13080 {0xCA, 0, 0}, 13081 {0xCB, 0, 0}, 13082 {0xCC, 0, 0}, 13083 {0xCD, 0, 0}, 13084 {0xCE, 0x5e, 0}, 13085 {0xCF, 0xc, 0}, 13086 {0xD0, 0xc, 0}, 13087 {0xD1, 0xc, 0}, 13088 {0xD2, 0, 0}, 13089 {0xD3, 0x2b, 0}, 13090 {0xD4, 0xc, 0}, 13091 {0xD5, 0, 0}, 13092 {0xD6, 0x70, 1}, 13093 {0xDB, 0x7, 0}, 13094 {0xDC, 0, 0}, 13095 {0xDD, 0, 0}, 13096 {0xDE, 0x88, 1}, 13097 {0xDF, 0, 0}, 13098 {0xE0, 0x1f, 0}, 13099 {0xE1, 0x20, 1}, 13100 {0xE2, 0x1, 0}, 13101 {0xE3, 0x30, 0}, 13102 {0xE4, 0x70, 0}, 13103 {0xE5, 0, 0}, 13104 {0xE6, 0, 0}, 13105 {0xE7, 0x33, 0}, 13106 {0xE8, 0xf, 1}, 13107 {0xE9, 0xf, 1}, 13108 {0xEA, 0, 0}, 13109 {0xEB, 0x11, 0}, 13110 {0xEE, 0, 0}, 13111 {0xEF, 0x7e, 0}, 13112 {0xF0, 0x3f, 0}, 13113 {0xF1, 0x7f, 0}, 13114 {0xF2, 0x78, 0}, 13115 {0xF3, 0x58, 1}, 13116 {0xF4, 0x88, 0}, 13117 {0xF5, 0x8, 0}, 13118 {0xF6, 0xf, 0}, 13119 {0xF7, 0xbc, 0}, 13120 {0xF8, 0x8, 0}, 13121 {0xF9, 0x60, 0}, 13122 {0xFA, 0x13, 1}, 13123 {0xFB, 0x70, 0}, 13124 {0xFC, 0, 0}, 13125 {0xFD, 0, 0}, 13126 {0xFE, 0, 0}, 13127 {0xFF, 0x33, 0}, 13128 {0x100, 0x13, 1}, 13129 {0x101, 0xf, 1}, 13130 {0x102, 0xee, 1}, 13131 {0x105, 0x3c, 0}, 13132 {0x106, 0x1, 1}, 13133 {0x107, 0xa, 0}, 13134 {0x108, 0x9d, 0}, 13135 {0x109, 0xa, 0}, 13136 {0x10A, 0, 0}, 13137 {0x10B, 0x40, 0}, 13138 {0x10C, 0x40, 0}, 13139 {0x10D, 0x88, 0}, 13140 {0x10E, 0x10, 0}, 13141 {0x10F, 0xf0, 0}, 13142 {0x110, 0x10, 0}, 13143 {0x111, 0xf0, 0}, 13144 {0x112, 0, 0}, 13145 {0x113, 0, 0}, 13146 {0x114, 0x10, 0}, 13147 {0x115, 0x55, 0}, 13148 {0x116, 0x3f, 1}, 13149 {0x117, 0x36, 1}, 13150 {0x118, 0, 0}, 13151 {0x119, 0, 0}, 13152 {0x11A, 0, 0}, 13153 {0x11B, 0x87, 0}, 13154 {0x11C, 0x11, 0}, 13155 {0x11D, 0, 0}, 13156 {0x11E, 0x33, 0}, 13157 {0x11F, 0x88, 0}, 13158 {0x120, 0, 0}, 13159 {0x121, 0x87, 0}, 13160 {0x122, 0x11, 0}, 13161 {0x123, 0, 0}, 13162 {0x124, 0x33, 0}, 13163 {0x125, 0x88, 0}, 13164 {0x126, 0x20, 1}, 13165 {0x127, 0x3f, 0}, 13166 {0x128, 0x44, 0}, 13167 {0x129, 0x8c, 0}, 13168 {0x12A, 0x6c, 0}, 13169 {0x12B, 0x22, 0}, 13170 {0x12C, 0xbe, 0}, 13171 {0x12D, 0x55, 0}, 13172 {0x12F, 0xc, 0}, 13173 {0x130, 0xaa, 0}, 13174 {0x131, 0x2, 0}, 13175 {0x132, 0, 0}, 13176 {0x133, 0x10, 0}, 13177 {0x134, 0x1, 0}, 13178 {0x135, 0, 0}, 13179 {0x136, 0, 0}, 13180 {0x137, 0x80, 0}, 13181 {0x138, 0x60, 0}, 13182 {0x139, 0x44, 0}, 13183 {0x13A, 0x55, 0}, 13184 {0x13B, 0x1, 0}, 13185 {0x13C, 0x55, 0}, 13186 {0x13D, 0x1, 0}, 13187 {0x13E, 0x5, 0}, 13188 {0x13F, 0x55, 0}, 13189 {0x140, 0x55, 0}, 13190 {0x146, 0, 0}, 13191 {0x147, 0, 0}, 13192 {0x148, 0, 0}, 13193 {0x149, 0, 0}, 13194 {0x14A, 0, 0}, 13195 {0x14B, 0, 0}, 13196 {0x14C, 0, 0}, 13197 {0x14D, 0, 0}, 13198 {0x14E, 0x1, 1}, 13199 {0x14F, 0, 0}, 13200 {0x150, 0, 0}, 13201 {0x151, 0, 0}, 13202 {0x154, 0xc, 0}, 13203 {0x155, 0xc, 0}, 13204 {0x156, 0xc, 0}, 13205 {0x157, 0, 0}, 13206 {0x158, 0x2b, 0}, 13207 {0x159, 0x84, 0}, 13208 {0x15A, 0x15, 0}, 13209 {0x15B, 0xf, 0}, 13210 {0x15C, 0, 0}, 13211 {0x15D, 0, 0}, 13212 {0x15E, 0, 1}, 13213 {0x15F, 0, 1}, 13214 {0x160, 0, 1}, 13215 {0x161, 0, 1}, 13216 {0x162, 0, 1}, 13217 {0x163, 0, 1}, 13218 {0x164, 0, 0}, 13219 {0x165, 0, 0}, 13220 {0x166, 0, 0}, 13221 {0x167, 0, 0}, 13222 {0x168, 0, 0}, 13223 {0x169, 0, 0}, 13224 {0x16A, 0, 1}, 13225 {0x16B, 0, 1}, 13226 {0x16C, 0, 1}, 13227 {0x16D, 0, 0}, 13228 {0x170, 0, 0}, 13229 {0x171, 0x77, 0}, 13230 {0x172, 0x77, 0}, 13231 {0x173, 0x77, 0}, 13232 {0x174, 0x77, 0}, 13233 {0x175, 0, 0}, 13234 {0x176, 0x3, 0}, 13235 {0x177, 0x37, 0}, 13236 {0x178, 0x3, 0}, 13237 {0x179, 0, 0}, 13238 {0x17A, 0x21, 0}, 13239 {0x17B, 0x21, 0}, 13240 {0x17C, 0, 0}, 13241 {0x17D, 0xaa, 0}, 13242 {0x17E, 0, 0}, 13243 {0x17F, 0xaa, 0}, 13244 {0x180, 0, 0}, 13245 {0x190, 0, 0}, 13246 {0x191, 0x77, 0}, 13247 {0x192, 0x77, 0}, 13248 {0x193, 0x77, 0}, 13249 {0x194, 0x77, 0}, 13250 {0x195, 0, 0}, 13251 {0x196, 0x3, 0}, 13252 {0x197, 0x37, 0}, 13253 {0x198, 0x3, 0}, 13254 {0x199, 0, 0}, 13255 {0x19A, 0x21, 0}, 13256 {0x19B, 0x21, 0}, 13257 {0x19C, 0, 0}, 13258 {0x19D, 0xaa, 0}, 13259 {0x19E, 0, 0}, 13260 {0x19F, 0xaa, 0}, 13261 {0x1A0, 0, 0}, 13262 {0x1A1, 0x2, 0}, 13263 {0x1A2, 0xf, 0}, 13264 {0x1A3, 0xf, 0}, 13265 {0x1A4, 0, 1}, 13266 {0x1A5, 0, 1}, 13267 {0x1A6, 0, 1}, 13268 {0x1A7, 0x2, 0}, 13269 {0x1A8, 0xf, 0}, 13270 {0x1A9, 0xf, 0}, 13271 {0x1AA, 0, 1}, 13272 {0x1AB, 0, 1}, 13273 {0x1AC, 0, 1}, 13274 {0x1AD, 0x84, 0}, 13275 {0x1AE, 0x60, 0}, 13276 {0x1AF, 0x47, 0}, 13277 {0x1B0, 0x47, 0}, 13278 {0x1B1, 0, 0}, 13279 {0x1B2, 0, 0}, 13280 {0x1B3, 0, 0}, 13281 {0x1B4, 0, 0}, 13282 {0x1B5, 0, 0}, 13283 {0x1B6, 0, 0}, 13284 {0x1B7, 0x5, 1}, 13285 {0x1B8, 0, 0}, 13286 {0x1B9, 0, 0}, 13287 {0x1BA, 0, 0}, 13288 {0x1BB, 0, 0}, 13289 {0x1BC, 0, 0}, 13290 {0x1BD, 0, 0}, 13291 {0x1BE, 0, 0}, 13292 {0x1BF, 0, 0}, 13293 {0x1C0, 0, 0}, 13294 {0x1C1, 0, 0}, 13295 {0x1C2, 0xa0, 1}, 13296 {0x1C3, 0, 0}, 13297 {0x1C4, 0, 0}, 13298 {0x1C5, 0, 0}, 13299 {0x1C6, 0, 0}, 13300 {0x1C7, 0, 0}, 13301 {0x1C8, 0, 0}, 13302 {0x1C9, 0, 0}, 13303 {0x1CA, 0, 0}, 13304 {0xFFFF, 0, 0} 13305}; 13306 13307static s16 nphy_def_lnagains[] = { -2, 10, 19, 25 }; 13308 13309static s32 nphy_lnagain_est0[] = { -315, 40370 }; 13310static s32 nphy_lnagain_est1[] = { -224, 23242 }; 13311 13312static const u16 tbl_iqcal_gainparams_nphy[2][NPHY_IQCAL_NUMGAINS][8] = { 13313 { 13314 {0x000, 0, 0, 2, 0x69, 0x69, 0x69, 0x69}, 13315 {0x700, 7, 0, 0, 0x69, 0x69, 0x69, 0x69}, 13316 {0x710, 7, 1, 0, 0x68, 0x68, 0x68, 0x68}, 13317 {0x720, 7, 2, 0, 0x67, 0x67, 0x67, 0x67}, 13318 {0x730, 7, 3, 0, 0x66, 0x66, 0x66, 0x66}, 13319 {0x740, 7, 4, 0, 0x65, 0x65, 0x65, 0x65}, 13320 {0x741, 7, 4, 1, 0x65, 0x65, 0x65, 0x65}, 13321 {0x742, 7, 4, 2, 0x65, 0x65, 0x65, 0x65}, 13322 {0x743, 7, 4, 3, 0x65, 0x65, 0x65, 0x65} 13323 }, 13324 { 13325 {0x000, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13326 {0x700, 7, 0, 0, 0x79, 0x79, 0x79, 0x79}, 13327 {0x710, 7, 1, 0, 0x79, 0x79, 0x79, 0x79}, 13328 {0x720, 7, 2, 0, 0x78, 0x78, 0x78, 0x78}, 13329 {0x730, 7, 3, 0, 0x78, 0x78, 0x78, 0x78}, 13330 {0x740, 7, 4, 0, 0x78, 0x78, 0x78, 0x78}, 13331 {0x741, 7, 4, 1, 0x78, 0x78, 0x78, 0x78}, 13332 {0x742, 7, 4, 2, 0x78, 0x78, 0x78, 0x78}, 13333 {0x743, 7, 4, 3, 0x78, 0x78, 0x78, 0x78} 13334 } 13335}; 13336 13337static const u32 nphy_tpc_txgain[] = { 13338 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42, 13339 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44, 13340 0x03c82a42, 0x03c82944, 0x03c82942, 0x03c82844, 13341 0x03c82842, 0x03c42b44, 0x03c42b42, 0x03c42a44, 13342 0x03c42a42, 0x03c42944, 0x03c42942, 0x03c42844, 13343 0x03c42842, 0x03c42744, 0x03c42742, 0x03c42644, 13344 0x03c42642, 0x03c42544, 0x03c42542, 0x03c42444, 13345 0x03c42442, 0x03c02b44, 0x03c02b42, 0x03c02a44, 13346 0x03c02a42, 0x03c02944, 0x03c02942, 0x03c02844, 13347 0x03c02842, 0x03c02744, 0x03c02742, 0x03b02b44, 13348 0x03b02b42, 0x03b02a44, 0x03b02a42, 0x03b02944, 13349 0x03b02942, 0x03b02844, 0x03b02842, 0x03b02744, 13350 0x03b02742, 0x03b02644, 0x03b02642, 0x03b02544, 13351 0x03b02542, 0x03a02b44, 0x03a02b42, 0x03a02a44, 13352 0x03a02a42, 0x03a02944, 0x03a02942, 0x03a02844, 13353 0x03a02842, 0x03a02744, 0x03a02742, 0x03902b44, 13354 0x03902b42, 0x03902a44, 0x03902a42, 0x03902944, 13355 0x03902942, 0x03902844, 0x03902842, 0x03902744, 13356 0x03902742, 0x03902644, 0x03902642, 0x03902544, 13357 0x03902542, 0x03802b44, 0x03802b42, 0x03802a44, 13358 0x03802a42, 0x03802944, 0x03802942, 0x03802844, 13359 0x03802842, 0x03802744, 0x03802742, 0x03802644, 13360 0x03802642, 0x03802544, 0x03802542, 0x03802444, 13361 0x03802442, 0x03802344, 0x03802342, 0x03802244, 13362 0x03802242, 0x03802144, 0x03802142, 0x03802044, 13363 0x03802042, 0x03801f44, 0x03801f42, 0x03801e44, 13364 0x03801e42, 0x03801d44, 0x03801d42, 0x03801c44, 13365 0x03801c42, 0x03801b44, 0x03801b42, 0x03801a44, 13366 0x03801a42, 0x03801944, 0x03801942, 0x03801844, 13367 0x03801842, 0x03801744, 0x03801742, 0x03801644, 13368 0x03801642, 0x03801544, 0x03801542, 0x03801444, 13369 0x03801442, 0x03801344, 0x03801342, 0x00002b00 13370}; 13371 13372static const u16 nphy_tpc_loscale[] = { 13373 256, 256, 271, 271, 287, 256, 256, 271, 13374 271, 287, 287, 304, 304, 256, 256, 271, 13375 271, 287, 287, 304, 304, 322, 322, 341, 13376 341, 362, 362, 383, 383, 256, 256, 271, 13377 271, 287, 287, 304, 304, 322, 322, 256, 13378 256, 271, 271, 287, 287, 304, 304, 322, 13379 322, 341, 341, 362, 362, 256, 256, 271, 13380 271, 287, 287, 304, 304, 322, 322, 256, 13381 256, 271, 271, 287, 287, 304, 304, 322, 13382 322, 341, 341, 362, 362, 256, 256, 271, 13383 271, 287, 287, 304, 304, 322, 322, 341, 13384 341, 362, 362, 383, 383, 406, 406, 430, 13385 430, 455, 455, 482, 482, 511, 511, 541, 13386 541, 573, 573, 607, 607, 643, 643, 681, 13387 681, 722, 722, 764, 764, 810, 810, 858, 13388 858, 908, 908, 962, 962, 1019, 1019, 256 13389}; 13390 13391static u32 nphy_tpc_txgain_ipa[] = { 13392 0x5ff7002d, 0x5ff7002b, 0x5ff7002a, 0x5ff70029, 13393 0x5ff70028, 0x5ff70027, 0x5ff70026, 0x5ff70025, 13394 0x5ef7002d, 0x5ef7002b, 0x5ef7002a, 0x5ef70029, 13395 0x5ef70028, 0x5ef70027, 0x5ef70026, 0x5ef70025, 13396 0x5df7002d, 0x5df7002b, 0x5df7002a, 0x5df70029, 13397 0x5df70028, 0x5df70027, 0x5df70026, 0x5df70025, 13398 0x5cf7002d, 0x5cf7002b, 0x5cf7002a, 0x5cf70029, 13399 0x5cf70028, 0x5cf70027, 0x5cf70026, 0x5cf70025, 13400 0x5bf7002d, 0x5bf7002b, 0x5bf7002a, 0x5bf70029, 13401 0x5bf70028, 0x5bf70027, 0x5bf70026, 0x5bf70025, 13402 0x5af7002d, 0x5af7002b, 0x5af7002a, 0x5af70029, 13403 0x5af70028, 0x5af70027, 0x5af70026, 0x5af70025, 13404 0x59f7002d, 0x59f7002b, 0x59f7002a, 0x59f70029, 13405 0x59f70028, 0x59f70027, 0x59f70026, 0x59f70025, 13406 0x58f7002d, 0x58f7002b, 0x58f7002a, 0x58f70029, 13407 0x58f70028, 0x58f70027, 0x58f70026, 0x58f70025, 13408 0x57f7002d, 0x57f7002b, 0x57f7002a, 0x57f70029, 13409 0x57f70028, 0x57f70027, 0x57f70026, 0x57f70025, 13410 0x56f7002d, 0x56f7002b, 0x56f7002a, 0x56f70029, 13411 0x56f70028, 0x56f70027, 0x56f70026, 0x56f70025, 13412 0x55f7002d, 0x55f7002b, 0x55f7002a, 0x55f70029, 13413 0x55f70028, 0x55f70027, 0x55f70026, 0x55f70025, 13414 0x54f7002d, 0x54f7002b, 0x54f7002a, 0x54f70029, 13415 0x54f70028, 0x54f70027, 0x54f70026, 0x54f70025, 13416 0x53f7002d, 0x53f7002b, 0x53f7002a, 0x53f70029, 13417 0x53f70028, 0x53f70027, 0x53f70026, 0x53f70025, 13418 0x52f7002d, 0x52f7002b, 0x52f7002a, 0x52f70029, 13419 0x52f70028, 0x52f70027, 0x52f70026, 0x52f70025, 13420 0x51f7002d, 0x51f7002b, 0x51f7002a, 0x51f70029, 13421 0x51f70028, 0x51f70027, 0x51f70026, 0x51f70025, 13422 0x50f7002d, 0x50f7002b, 0x50f7002a, 0x50f70029, 13423 0x50f70028, 0x50f70027, 0x50f70026, 0x50f70025 13424}; 13425 13426static u32 nphy_tpc_txgain_ipa_rev5[] = { 13427 0x1ff7002d, 0x1ff7002b, 0x1ff7002a, 0x1ff70029, 13428 0x1ff70028, 0x1ff70027, 0x1ff70026, 0x1ff70025, 13429 0x1ef7002d, 0x1ef7002b, 0x1ef7002a, 0x1ef70029, 13430 0x1ef70028, 0x1ef70027, 0x1ef70026, 0x1ef70025, 13431 0x1df7002d, 0x1df7002b, 0x1df7002a, 0x1df70029, 13432 0x1df70028, 0x1df70027, 0x1df70026, 0x1df70025, 13433 0x1cf7002d, 0x1cf7002b, 0x1cf7002a, 0x1cf70029, 13434 0x1cf70028, 0x1cf70027, 0x1cf70026, 0x1cf70025, 13435 0x1bf7002d, 0x1bf7002b, 0x1bf7002a, 0x1bf70029, 13436 0x1bf70028, 0x1bf70027, 0x1bf70026, 0x1bf70025, 13437 0x1af7002d, 0x1af7002b, 0x1af7002a, 0x1af70029, 13438 0x1af70028, 0x1af70027, 0x1af70026, 0x1af70025, 13439 0x19f7002d, 0x19f7002b, 0x19f7002a, 0x19f70029, 13440 0x19f70028, 0x19f70027, 0x19f70026, 0x19f70025, 13441 0x18f7002d, 0x18f7002b, 0x18f7002a, 0x18f70029, 13442 0x18f70028, 0x18f70027, 0x18f70026, 0x18f70025, 13443 0x17f7002d, 0x17f7002b, 0x17f7002a, 0x17f70029, 13444 0x17f70028, 0x17f70027, 0x17f70026, 0x17f70025, 13445 0x16f7002d, 0x16f7002b, 0x16f7002a, 0x16f70029, 13446 0x16f70028, 0x16f70027, 0x16f70026, 0x16f70025, 13447 0x15f7002d, 0x15f7002b, 0x15f7002a, 0x15f70029, 13448 0x15f70028, 0x15f70027, 0x15f70026, 0x15f70025, 13449 0x14f7002d, 0x14f7002b, 0x14f7002a, 0x14f70029, 13450 0x14f70028, 0x14f70027, 0x14f70026, 0x14f70025, 13451 0x13f7002d, 0x13f7002b, 0x13f7002a, 0x13f70029, 13452 0x13f70028, 0x13f70027, 0x13f70026, 0x13f70025, 13453 0x12f7002d, 0x12f7002b, 0x12f7002a, 0x12f70029, 13454 0x12f70028, 0x12f70027, 0x12f70026, 0x12f70025, 13455 0x11f7002d, 0x11f7002b, 0x11f7002a, 0x11f70029, 13456 0x11f70028, 0x11f70027, 0x11f70026, 0x11f70025, 13457 0x10f7002d, 0x10f7002b, 0x10f7002a, 0x10f70029, 13458 0x10f70028, 0x10f70027, 0x10f70026, 0x10f70025 13459}; 13460 13461static u32 nphy_tpc_txgain_ipa_rev6[] = { 13462 0x0ff7002d, 0x0ff7002b, 0x0ff7002a, 0x0ff70029, 13463 0x0ff70028, 0x0ff70027, 0x0ff70026, 0x0ff70025, 13464 0x0ef7002d, 0x0ef7002b, 0x0ef7002a, 0x0ef70029, 13465 0x0ef70028, 0x0ef70027, 0x0ef70026, 0x0ef70025, 13466 0x0df7002d, 0x0df7002b, 0x0df7002a, 0x0df70029, 13467 0x0df70028, 0x0df70027, 0x0df70026, 0x0df70025, 13468 0x0cf7002d, 0x0cf7002b, 0x0cf7002a, 0x0cf70029, 13469 0x0cf70028, 0x0cf70027, 0x0cf70026, 0x0cf70025, 13470 0x0bf7002d, 0x0bf7002b, 0x0bf7002a, 0x0bf70029, 13471 0x0bf70028, 0x0bf70027, 0x0bf70026, 0x0bf70025, 13472 0x0af7002d, 0x0af7002b, 0x0af7002a, 0x0af70029, 13473 0x0af70028, 0x0af70027, 0x0af70026, 0x0af70025, 13474 0x09f7002d, 0x09f7002b, 0x09f7002a, 0x09f70029, 13475 0x09f70028, 0x09f70027, 0x09f70026, 0x09f70025, 13476 0x08f7002d, 0x08f7002b, 0x08f7002a, 0x08f70029, 13477 0x08f70028, 0x08f70027, 0x08f70026, 0x08f70025, 13478 0x07f7002d, 0x07f7002b, 0x07f7002a, 0x07f70029, 13479 0x07f70028, 0x07f70027, 0x07f70026, 0x07f70025, 13480 0x06f7002d, 0x06f7002b, 0x06f7002a, 0x06f70029, 13481 0x06f70028, 0x06f70027, 0x06f70026, 0x06f70025, 13482 0x05f7002d, 0x05f7002b, 0x05f7002a, 0x05f70029, 13483 0x05f70028, 0x05f70027, 0x05f70026, 0x05f70025, 13484 0x04f7002d, 0x04f7002b, 0x04f7002a, 0x04f70029, 13485 0x04f70028, 0x04f70027, 0x04f70026, 0x04f70025, 13486 0x03f7002d, 0x03f7002b, 0x03f7002a, 0x03f70029, 13487 0x03f70028, 0x03f70027, 0x03f70026, 0x03f70025, 13488 0x02f7002d, 0x02f7002b, 0x02f7002a, 0x02f70029, 13489 0x02f70028, 0x02f70027, 0x02f70026, 0x02f70025, 13490 0x01f7002d, 0x01f7002b, 0x01f7002a, 0x01f70029, 13491 0x01f70028, 0x01f70027, 0x01f70026, 0x01f70025, 13492 0x00f7002d, 0x00f7002b, 0x00f7002a, 0x00f70029, 13493 0x00f70028, 0x00f70027, 0x00f70026, 0x00f70025 13494}; 13495 13496static u32 nphy_tpc_txgain_ipa_2g_2057rev3[] = { 13497 0x70ff0040, 0x70f7003e, 0x70ef003b, 0x70e70039, 13498 0x70df0037, 0x70d70036, 0x70cf0033, 0x70c70032, 13499 0x70bf0031, 0x70b7002f, 0x70af002e, 0x70a7002d, 13500 0x709f002d, 0x7097002c, 0x708f002c, 0x7087002c, 13501 0x707f002b, 0x7077002c, 0x706f002c, 0x7067002d, 13502 0x705f002e, 0x705f002b, 0x705f0029, 0x7057002a, 13503 0x70570028, 0x704f002a, 0x7047002c, 0x7047002a, 13504 0x70470028, 0x70470026, 0x70470024, 0x70470022, 13505 0x7047001f, 0x70370027, 0x70370024, 0x70370022, 13506 0x70370020, 0x7037001f, 0x7037001d, 0x7037001b, 13507 0x7037001a, 0x70370018, 0x70370017, 0x7027001e, 13508 0x7027001d, 0x7027001a, 0x701f0024, 0x701f0022, 13509 0x701f0020, 0x701f001f, 0x701f001d, 0x701f001b, 13510 0x701f001a, 0x701f0018, 0x701f0017, 0x701f0015, 13511 0x701f0014, 0x701f0013, 0x701f0012, 0x701f0011, 13512 0x70170019, 0x70170018, 0x70170016, 0x70170015, 13513 0x70170014, 0x70170013, 0x70170012, 0x70170010, 13514 0x70170010, 0x7017000f, 0x700f001d, 0x700f001b, 13515 0x700f001a, 0x700f0018, 0x700f0017, 0x700f0015, 13516 0x700f0015, 0x700f0013, 0x700f0013, 0x700f0011, 13517 0x700f0010, 0x700f0010, 0x700f000f, 0x700f000e, 13518 0x700f000d, 0x700f000c, 0x700f000b, 0x700f000b, 13519 0x700f000b, 0x700f000a, 0x700f0009, 0x700f0009, 13520 0x700f0009, 0x700f0008, 0x700f0007, 0x700f0007, 13521 0x700f0006, 0x700f0006, 0x700f0006, 0x700f0006, 13522 0x700f0005, 0x700f0005, 0x700f0005, 0x700f0004, 13523 0x700f0004, 0x700f0004, 0x700f0004, 0x700f0004, 13524 0x700f0004, 0x700f0003, 0x700f0003, 0x700f0003, 13525 0x700f0003, 0x700f0002, 0x700f0002, 0x700f0002, 13526 0x700f0002, 0x700f0002, 0x700f0002, 0x700f0001, 13527 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001, 13528 0x700f0001, 0x700f0001, 0x700f0001, 0x700f0001 13529}; 13530 13531static u32 nphy_tpc_txgain_ipa_2g_2057rev4n6[] = { 13532 0xf0ff0040, 0xf0f7003e, 0xf0ef003b, 0xf0e70039, 13533 0xf0df0037, 0xf0d70036, 0xf0cf0033, 0xf0c70032, 13534 0xf0bf0031, 0xf0b7002f, 0xf0af002e, 0xf0a7002d, 13535 0xf09f002d, 0xf097002c, 0xf08f002c, 0xf087002c, 13536 0xf07f002b, 0xf077002c, 0xf06f002c, 0xf067002d, 13537 0xf05f002e, 0xf05f002b, 0xf05f0029, 0xf057002a, 13538 0xf0570028, 0xf04f002a, 0xf047002c, 0xf047002a, 13539 0xf0470028, 0xf0470026, 0xf0470024, 0xf0470022, 13540 0xf047001f, 0xf0370027, 0xf0370024, 0xf0370022, 13541 0xf0370020, 0xf037001f, 0xf037001d, 0xf037001b, 13542 0xf037001a, 0xf0370018, 0xf0370017, 0xf027001e, 13543 0xf027001d, 0xf027001a, 0xf01f0024, 0xf01f0022, 13544 0xf01f0020, 0xf01f001f, 0xf01f001d, 0xf01f001b, 13545 0xf01f001a, 0xf01f0018, 0xf01f0017, 0xf01f0015, 13546 0xf01f0014, 0xf01f0013, 0xf01f0012, 0xf01f0011, 13547 0xf0170019, 0xf0170018, 0xf0170016, 0xf0170015, 13548 0xf0170014, 0xf0170013, 0xf0170012, 0xf0170010, 13549 0xf0170010, 0xf017000f, 0xf00f001d, 0xf00f001b, 13550 0xf00f001a, 0xf00f0018, 0xf00f0017, 0xf00f0015, 13551 0xf00f0015, 0xf00f0013, 0xf00f0013, 0xf00f0011, 13552 0xf00f0010, 0xf00f0010, 0xf00f000f, 0xf00f000e, 13553 0xf00f000d, 0xf00f000c, 0xf00f000b, 0xf00f000b, 13554 0xf00f000b, 0xf00f000a, 0xf00f0009, 0xf00f0009, 13555 0xf00f0009, 0xf00f0008, 0xf00f0007, 0xf00f0007, 13556 0xf00f0006, 0xf00f0006, 0xf00f0006, 0xf00f0006, 13557 0xf00f0005, 0xf00f0005, 0xf00f0005, 0xf00f0004, 13558 0xf00f0004, 0xf00f0004, 0xf00f0004, 0xf00f0004, 13559 0xf00f0004, 0xf00f0003, 0xf00f0003, 0xf00f0003, 13560 0xf00f0003, 0xf00f0002, 0xf00f0002, 0xf00f0002, 13561 0xf00f0002, 0xf00f0002, 0xf00f0002, 0xf00f0001, 13562 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001, 13563 0xf00f0001, 0xf00f0001, 0xf00f0001, 0xf00f0001 13564}; 13565 13566static u32 nphy_tpc_txgain_ipa_2g_2057rev5[] = { 13567 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13568 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13569 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13570 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13571 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13572 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13573 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13574 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13575 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13576 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13577 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13578 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13579 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13580 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13581 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13582 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13583 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13584 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13585 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13586 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13587 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13588 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13589 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13590 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13591 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13592 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13593 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13594 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13595 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13596 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13597 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13598 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13599}; 13600 13601static u32 nphy_tpc_txgain_ipa_2g_2057rev7[] = { 13602 0x30ff0031, 0x30e70031, 0x30e7002e, 0x30cf002e, 13603 0x30bf002e, 0x30af002e, 0x309f002f, 0x307f0033, 13604 0x307f0031, 0x307f002e, 0x3077002e, 0x306f002e, 13605 0x3067002e, 0x305f002f, 0x30570030, 0x3057002d, 13606 0x304f002e, 0x30470031, 0x3047002e, 0x3047002c, 13607 0x30470029, 0x303f002c, 0x303f0029, 0x3037002d, 13608 0x3037002a, 0x30370028, 0x302f002c, 0x302f002a, 13609 0x302f0028, 0x302f0026, 0x3027002c, 0x30270029, 13610 0x30270027, 0x30270025, 0x30270023, 0x301f002c, 13611 0x301f002a, 0x301f0028, 0x301f0025, 0x301f0024, 13612 0x301f0022, 0x301f001f, 0x3017002d, 0x3017002b, 13613 0x30170028, 0x30170026, 0x30170024, 0x30170022, 13614 0x30170020, 0x3017001e, 0x3017001d, 0x3017001b, 13615 0x3017001a, 0x30170018, 0x30170017, 0x30170015, 13616 0x300f002c, 0x300f0029, 0x300f0027, 0x300f0024, 13617 0x300f0022, 0x300f0021, 0x300f001f, 0x300f001d, 13618 0x300f001b, 0x300f001a, 0x300f0018, 0x300f0017, 13619 0x300f0016, 0x300f0015, 0x300f0115, 0x300f0215, 13620 0x300f0315, 0x300f0415, 0x300f0515, 0x300f0615, 13621 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13622 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13623 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13624 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13625 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13626 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13627 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13628 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13629 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13630 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13631 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13632 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715, 13633 0x300f0715, 0x300f0715, 0x300f0715, 0x300f0715 13634}; 13635 13636static u32 nphy_tpc_txgain_ipa_5g[] = { 13637 0x7ff70035, 0x7ff70033, 0x7ff70032, 0x7ff70031, 13638 0x7ff7002f, 0x7ff7002e, 0x7ff7002d, 0x7ff7002b, 13639 0x7ff7002a, 0x7ff70029, 0x7ff70028, 0x7ff70027, 13640 0x7ff70026, 0x7ff70024, 0x7ff70023, 0x7ff70022, 13641 0x7ef70028, 0x7ef70027, 0x7ef70026, 0x7ef70025, 13642 0x7ef70024, 0x7ef70023, 0x7df70028, 0x7df70027, 13643 0x7df70026, 0x7df70025, 0x7df70024, 0x7df70023, 13644 0x7df70022, 0x7cf70029, 0x7cf70028, 0x7cf70027, 13645 0x7cf70026, 0x7cf70025, 0x7cf70023, 0x7cf70022, 13646 0x7bf70029, 0x7bf70028, 0x7bf70026, 0x7bf70025, 13647 0x7bf70024, 0x7bf70023, 0x7bf70022, 0x7bf70021, 13648 0x7af70029, 0x7af70028, 0x7af70027, 0x7af70026, 13649 0x7af70025, 0x7af70024, 0x7af70023, 0x7af70022, 13650 0x79f70029, 0x79f70028, 0x79f70027, 0x79f70026, 13651 0x79f70025, 0x79f70024, 0x79f70023, 0x79f70022, 13652 0x78f70029, 0x78f70028, 0x78f70027, 0x78f70026, 13653 0x78f70025, 0x78f70024, 0x78f70023, 0x78f70022, 13654 0x77f70029, 0x77f70028, 0x77f70027, 0x77f70026, 13655 0x77f70025, 0x77f70024, 0x77f70023, 0x77f70022, 13656 0x76f70029, 0x76f70028, 0x76f70027, 0x76f70026, 13657 0x76f70024, 0x76f70023, 0x76f70022, 0x76f70021, 13658 0x75f70029, 0x75f70028, 0x75f70027, 0x75f70026, 13659 0x75f70025, 0x75f70024, 0x75f70023, 0x74f70029, 13660 0x74f70028, 0x74f70026, 0x74f70025, 0x74f70024, 13661 0x74f70023, 0x74f70022, 0x73f70029, 0x73f70027, 13662 0x73f70026, 0x73f70025, 0x73f70024, 0x73f70023, 13663 0x73f70022, 0x72f70028, 0x72f70027, 0x72f70026, 13664 0x72f70025, 0x72f70024, 0x72f70023, 0x72f70022, 13665 0x71f70028, 0x71f70027, 0x71f70026, 0x71f70025, 13666 0x71f70024, 0x71f70023, 0x70f70028, 0x70f70027, 13667 0x70f70026, 0x70f70024, 0x70f70023, 0x70f70022, 13668 0x70f70021, 0x70f70020, 0x70f70020, 0x70f7001f 13669}; 13670 13671static u32 nphy_tpc_txgain_ipa_5g_2057[] = { 13672 0x7f7f0044, 0x7f7f0040, 0x7f7f003c, 0x7f7f0039, 13673 0x7f7f0036, 0x7e7f003c, 0x7e7f0038, 0x7e7f0035, 13674 0x7d7f003c, 0x7d7f0039, 0x7d7f0036, 0x7d7f0033, 13675 0x7c7f003b, 0x7c7f0037, 0x7c7f0034, 0x7b7f003a, 13676 0x7b7f0036, 0x7b7f0033, 0x7a7f003c, 0x7a7f0039, 13677 0x7a7f0036, 0x7a7f0033, 0x797f003b, 0x797f0038, 13678 0x797f0035, 0x797f0032, 0x787f003b, 0x787f0038, 13679 0x787f0035, 0x787f0032, 0x777f003a, 0x777f0037, 13680 0x777f0034, 0x777f0031, 0x767f003a, 0x767f0036, 13681 0x767f0033, 0x767f0031, 0x757f003a, 0x757f0037, 13682 0x757f0034, 0x747f003c, 0x747f0039, 0x747f0036, 13683 0x747f0033, 0x737f003b, 0x737f0038, 0x737f0035, 13684 0x737f0032, 0x727f0039, 0x727f0036, 0x727f0033, 13685 0x727f0030, 0x717f003a, 0x717f0037, 0x717f0034, 13686 0x707f003b, 0x707f0038, 0x707f0035, 0x707f0032, 13687 0x707f002f, 0x707f002d, 0x707f002a, 0x707f0028, 13688 0x707f0025, 0x707f0023, 0x707f0021, 0x707f0020, 13689 0x707f001e, 0x707f001c, 0x707f001b, 0x707f0019, 13690 0x707f0018, 0x707f0016, 0x707f0015, 0x707f0014, 13691 0x707f0013, 0x707f0012, 0x707f0011, 0x707f0010, 13692 0x707f000f, 0x707f000e, 0x707f000d, 0x707f000d, 13693 0x707f000c, 0x707f000b, 0x707f000b, 0x707f000a, 13694 0x707f0009, 0x707f0009, 0x707f0008, 0x707f0008, 13695 0x707f0007, 0x707f0007, 0x707f0007, 0x707f0006, 13696 0x707f0006, 0x707f0006, 0x707f0005, 0x707f0005, 13697 0x707f0005, 0x707f0004, 0x707f0004, 0x707f0004, 13698 0x707f0004, 0x707f0004, 0x707f0003, 0x707f0003, 13699 0x707f0003, 0x707f0003, 0x707f0003, 0x707f0003, 13700 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13701 0x707f0002, 0x707f0002, 0x707f0002, 0x707f0002, 13702 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001, 13703 0x707f0001, 0x707f0001, 0x707f0001, 0x707f0001 13704}; 13705 13706static u32 nphy_tpc_txgain_ipa_5g_2057rev7[] = { 13707 0x6f7f0031, 0x6f7f002e, 0x6f7f002c, 0x6f7f002a, 13708 0x6f7f0027, 0x6e7f002e, 0x6e7f002c, 0x6e7f002a, 13709 0x6d7f0030, 0x6d7f002d, 0x6d7f002a, 0x6d7f0028, 13710 0x6c7f0030, 0x6c7f002d, 0x6c7f002b, 0x6b7f002e, 13711 0x6b7f002c, 0x6b7f002a, 0x6b7f0027, 0x6a7f002e, 13712 0x6a7f002c, 0x6a7f002a, 0x697f0030, 0x697f002e, 13713 0x697f002b, 0x697f0029, 0x687f002f, 0x687f002d, 13714 0x687f002a, 0x687f0027, 0x677f002f, 0x677f002d, 13715 0x677f002a, 0x667f0031, 0x667f002e, 0x667f002c, 13716 0x667f002a, 0x657f0030, 0x657f002e, 0x657f002b, 13717 0x657f0029, 0x647f0030, 0x647f002d, 0x647f002b, 13718 0x647f0029, 0x637f002f, 0x637f002d, 0x637f002a, 13719 0x627f0030, 0x627f002d, 0x627f002b, 0x627f0029, 13720 0x617f0030, 0x617f002e, 0x617f002b, 0x617f0029, 13721 0x607f002f, 0x607f002d, 0x607f002a, 0x607f0027, 13722 0x607f0026, 0x607f0023, 0x607f0021, 0x607f0020, 13723 0x607f001e, 0x607f001c, 0x607f001a, 0x607f0019, 13724 0x607f0018, 0x607f0016, 0x607f0015, 0x607f0014, 13725 0x607f0012, 0x607f0012, 0x607f0011, 0x607f000f, 13726 0x607f000f, 0x607f000e, 0x607f000d, 0x607f000c, 13727 0x607f000c, 0x607f000b, 0x607f000b, 0x607f000a, 13728 0x607f0009, 0x607f0009, 0x607f0008, 0x607f0008, 13729 0x607f0008, 0x607f0007, 0x607f0007, 0x607f0006, 13730 0x607f0006, 0x607f0005, 0x607f0005, 0x607f0005, 13731 0x607f0005, 0x607f0005, 0x607f0004, 0x607f0004, 13732 0x607f0004, 0x607f0004, 0x607f0003, 0x607f0003, 13733 0x607f0003, 0x607f0003, 0x607f0002, 0x607f0002, 13734 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13735 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13736 0x607f0002, 0x607f0002, 0x607f0002, 0x607f0002, 13737 0x607f0002, 0x607f0001, 0x607f0001, 0x607f0001, 13738 0x607f0001, 0x607f0001, 0x607f0001, 0x607f0001 13739}; 13740 13741static s8 nphy_papd_pga_gain_delta_ipa_2g[] = { 13742 -114, -108, -98, -91, -84, -78, -70, -62, 13743 -54, -46, -39, -31, -23, -15, -8, 0 13744}; 13745 13746static s8 nphy_papd_pga_gain_delta_ipa_5g[] = { 13747 -100, -95, -89, -83, -77, -70, -63, -56, 13748 -48, -41, -33, -25, -19, -12, -6, 0 13749}; 13750 13751static s16 nphy_papd_padgain_dlt_2g_2057rev3n4[] = { 13752 -159, -113, -86, -72, -62, -54, -48, -43, 13753 -39, -35, -31, -28, -25, -23, -20, -18, 13754 -17, -15, -13, -11, -10, -8, -7, -6, 13755 -5, -4, -3, -3, -2, -1, -1, 0 13756}; 13757 13758static s16 nphy_papd_padgain_dlt_2g_2057rev5[] = { 13759 -109, -109, -82, -68, -58, -50, -44, -39, 13760 -35, -31, -28, -26, -23, -21, -19, -17, 13761 -16, -14, -13, -11, -10, -9, -8, -7, 13762 -5, -5, -4, -3, -2, -1, -1, 0 13763}; 13764 13765static s16 nphy_papd_padgain_dlt_2g_2057rev7[] = { 13766 -122, -122, -95, -80, -69, -61, -54, -49, 13767 -43, -39, -35, -32, -28, -26, -23, -21, 13768 -18, -16, -15, -13, -11, -10, -8, -7, 13769 -6, -5, -4, -3, -2, -1, -1, 0 13770}; 13771 13772static s8 nphy_papd_pgagain_dlt_5g_2057[] = { 13773 -107, -101, -92, -85, -78, -71, -62, -55, 13774 -47, -39, -32, -24, -19, -12, -6, 0 13775}; 13776 13777static s8 nphy_papd_pgagain_dlt_5g_2057rev7[] = { 13778 -110, -104, -95, -88, -81, -74, -66, -58, 13779 -50, -44, -36, -28, -23, -15, -8, 0 13780}; 13781 13782static u8 pad_gain_codes_used_2057rev5[] = { 13783 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 13784 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 13785}; 13786 13787static u8 pad_gain_codes_used_2057rev7[] = { 13788 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 13789 5, 4, 3, 2, 1 13790}; 13791 13792static u8 pad_all_gain_codes_2057[] = { 13793 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 13794 21, 20, 19, 18, 17, 16, 15, 14, 13, 12, 13795 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 13796 1, 0 13797}; 13798 13799static u8 pga_all_gain_codes_2057[] = { 13800 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 13801}; 13802 13803static u32 nphy_papd_scaltbl[] = { 13804 0x0ae2002f, 0x0a3b0032, 0x09a70035, 0x09220038, 13805 0x0887003c, 0x081f003f, 0x07a20043, 0x07340047, 13806 0x06d2004b, 0x067a004f, 0x06170054, 0x05bf0059, 13807 0x0571005e, 0x051e0064, 0x04d3006a, 0x04910070, 13808 0x044c0077, 0x040f007e, 0x03d90085, 0x03a1008d, 13809 0x036f0095, 0x033d009e, 0x030b00a8, 0x02e000b2, 13810 0x02b900bc, 0x029200c7, 0x026d00d3, 0x024900e0, 13811 0x022900ed, 0x020a00fb, 0x01ec010a, 0x01d0011a, 13812 0x01b7012a, 0x019e013c, 0x0187014f, 0x01720162, 13813 0x015d0177, 0x0149018e, 0x013701a5, 0x012601be, 13814 0x011501d9, 0x010501f5, 0x00f70212, 0x00e90232, 13815 0x00dc0253, 0x00d00276, 0x00c4029c, 0x00b902c3, 13816 0x00af02ed, 0x00a5031a, 0x009c0349, 0x0093037a, 13817 0x008b03af, 0x008303e7, 0x007c0422, 0x00750461, 13818 0x006e04a3, 0x006804ea, 0x00620534, 0x005d0583, 13819 0x005805d7, 0x0053062f, 0x004e068d, 0x004a06f1 13820}; 13821 13822static u32 nphy_tpc_txgain_rev3[] = { 13823 0x1f410044, 0x1f410042, 0x1f410040, 0x1f41003e, 13824 0x1f41003c, 0x1f41003b, 0x1f410039, 0x1f410037, 13825 0x1e410044, 0x1e410042, 0x1e410040, 0x1e41003e, 13826 0x1e41003c, 0x1e41003b, 0x1e410039, 0x1e410037, 13827 0x1d410044, 0x1d410042, 0x1d410040, 0x1d41003e, 13828 0x1d41003c, 0x1d41003b, 0x1d410039, 0x1d410037, 13829 0x1c410044, 0x1c410042, 0x1c410040, 0x1c41003e, 13830 0x1c41003c, 0x1c41003b, 0x1c410039, 0x1c410037, 13831 0x1b410044, 0x1b410042, 0x1b410040, 0x1b41003e, 13832 0x1b41003c, 0x1b41003b, 0x1b410039, 0x1b410037, 13833 0x1a410044, 0x1a410042, 0x1a410040, 0x1a41003e, 13834 0x1a41003c, 0x1a41003b, 0x1a410039, 0x1a410037, 13835 0x19410044, 0x19410042, 0x19410040, 0x1941003e, 13836 0x1941003c, 0x1941003b, 0x19410039, 0x19410037, 13837 0x18410044, 0x18410042, 0x18410040, 0x1841003e, 13838 0x1841003c, 0x1841003b, 0x18410039, 0x18410037, 13839 0x17410044, 0x17410042, 0x17410040, 0x1741003e, 13840 0x1741003c, 0x1741003b, 0x17410039, 0x17410037, 13841 0x16410044, 0x16410042, 0x16410040, 0x1641003e, 13842 0x1641003c, 0x1641003b, 0x16410039, 0x16410037, 13843 0x15410044, 0x15410042, 0x15410040, 0x1541003e, 13844 0x1541003c, 0x1541003b, 0x15410039, 0x15410037, 13845 0x14410044, 0x14410042, 0x14410040, 0x1441003e, 13846 0x1441003c, 0x1441003b, 0x14410039, 0x14410037, 13847 0x13410044, 0x13410042, 0x13410040, 0x1341003e, 13848 0x1341003c, 0x1341003b, 0x13410039, 0x13410037, 13849 0x12410044, 0x12410042, 0x12410040, 0x1241003e, 13850 0x1241003c, 0x1241003b, 0x12410039, 0x12410037, 13851 0x11410044, 0x11410042, 0x11410040, 0x1141003e, 13852 0x1141003c, 0x1141003b, 0x11410039, 0x11410037, 13853 0x10410044, 0x10410042, 0x10410040, 0x1041003e, 13854 0x1041003c, 0x1041003b, 0x10410039, 0x10410037 13855}; 13856 13857static u32 nphy_tpc_txgain_HiPwrEPA[] = { 13858 0x0f410044, 0x0f410042, 0x0f410040, 0x0f41003e, 13859 0x0f41003c, 0x0f41003b, 0x0f410039, 0x0f410037, 13860 0x0e410044, 0x0e410042, 0x0e410040, 0x0e41003e, 13861 0x0e41003c, 0x0e41003b, 0x0e410039, 0x0e410037, 13862 0x0d410044, 0x0d410042, 0x0d410040, 0x0d41003e, 13863 0x0d41003c, 0x0d41003b, 0x0d410039, 0x0d410037, 13864 0x0c410044, 0x0c410042, 0x0c410040, 0x0c41003e, 13865 0x0c41003c, 0x0c41003b, 0x0c410039, 0x0c410037, 13866 0x0b410044, 0x0b410042, 0x0b410040, 0x0b41003e, 13867 0x0b41003c, 0x0b41003b, 0x0b410039, 0x0b410037, 13868 0x0a410044, 0x0a410042, 0x0a410040, 0x0a41003e, 13869 0x0a41003c, 0x0a41003b, 0x0a410039, 0x0a410037, 13870 0x09410044, 0x09410042, 0x09410040, 0x0941003e, 13871 0x0941003c, 0x0941003b, 0x09410039, 0x09410037, 13872 0x08410044, 0x08410042, 0x08410040, 0x0841003e, 13873 0x0841003c, 0x0841003b, 0x08410039, 0x08410037, 13874 0x07410044, 0x07410042, 0x07410040, 0x0741003e, 13875 0x0741003c, 0x0741003b, 0x07410039, 0x07410037, 13876 0x06410044, 0x06410042, 0x06410040, 0x0641003e, 13877 0x0641003c, 0x0641003b, 0x06410039, 0x06410037, 13878 0x05410044, 0x05410042, 0x05410040, 0x0541003e, 13879 0x0541003c, 0x0541003b, 0x05410039, 0x05410037, 13880 0x04410044, 0x04410042, 0x04410040, 0x0441003e, 13881 0x0441003c, 0x0441003b, 0x04410039, 0x04410037, 13882 0x03410044, 0x03410042, 0x03410040, 0x0341003e, 13883 0x0341003c, 0x0341003b, 0x03410039, 0x03410037, 13884 0x02410044, 0x02410042, 0x02410040, 0x0241003e, 13885 0x0241003c, 0x0241003b, 0x02410039, 0x02410037, 13886 0x01410044, 0x01410042, 0x01410040, 0x0141003e, 13887 0x0141003c, 0x0141003b, 0x01410039, 0x01410037, 13888 0x00410044, 0x00410042, 0x00410040, 0x0041003e, 13889 0x0041003c, 0x0041003b, 0x00410039, 0x00410037 13890}; 13891 13892static u32 nphy_tpc_txgain_epa_2057rev3[] = { 13893 0x80f90040, 0x80e10040, 0x80e1003c, 0x80c9003d, 13894 0x80b9003c, 0x80a9003d, 0x80a1003c, 0x8099003b, 13895 0x8091003b, 0x8089003a, 0x8081003a, 0x80790039, 13896 0x80710039, 0x8069003a, 0x8061003b, 0x8059003d, 13897 0x8051003f, 0x80490042, 0x8049003e, 0x8049003b, 13898 0x8041003e, 0x8041003b, 0x8039003e, 0x8039003b, 13899 0x80390038, 0x80390035, 0x8031003a, 0x80310036, 13900 0x80310033, 0x8029003a, 0x80290037, 0x80290034, 13901 0x80290031, 0x80210039, 0x80210036, 0x80210033, 13902 0x80210030, 0x8019003c, 0x80190039, 0x80190036, 13903 0x80190033, 0x80190030, 0x8019002d, 0x8019002b, 13904 0x80190028, 0x8011003a, 0x80110036, 0x80110033, 13905 0x80110030, 0x8011002e, 0x8011002b, 0x80110029, 13906 0x80110027, 0x80110024, 0x80110022, 0x80110020, 13907 0x8011001f, 0x8011001d, 0x8009003a, 0x80090037, 13908 0x80090034, 0x80090031, 0x8009002e, 0x8009002c, 13909 0x80090029, 0x80090027, 0x80090025, 0x80090023, 13910 0x80090021, 0x8009001f, 0x8009001d, 0x8009011d, 13911 0x8009021d, 0x8009031d, 0x8009041d, 0x8009051d, 13912 0x8009061d, 0x8009071d, 0x8009071d, 0x8009071d, 13913 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13914 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13915 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13916 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13917 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13918 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13919 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13920 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13921 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13922 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13923 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d, 13924 0x8009071d, 0x8009071d, 0x8009071d, 0x8009071d 13925}; 13926 13927static u32 nphy_tpc_txgain_epa_2057rev5[] = { 13928 0x10f90040, 0x10e10040, 0x10e1003c, 0x10c9003d, 13929 0x10b9003c, 0x10a9003d, 0x10a1003c, 0x1099003b, 13930 0x1091003b, 0x1089003a, 0x1081003a, 0x10790039, 13931 0x10710039, 0x1069003a, 0x1061003b, 0x1059003d, 13932 0x1051003f, 0x10490042, 0x1049003e, 0x1049003b, 13933 0x1041003e, 0x1041003b, 0x1039003e, 0x1039003b, 13934 0x10390038, 0x10390035, 0x1031003a, 0x10310036, 13935 0x10310033, 0x1029003a, 0x10290037, 0x10290034, 13936 0x10290031, 0x10210039, 0x10210036, 0x10210033, 13937 0x10210030, 0x1019003c, 0x10190039, 0x10190036, 13938 0x10190033, 0x10190030, 0x1019002d, 0x1019002b, 13939 0x10190028, 0x1011003a, 0x10110036, 0x10110033, 13940 0x10110030, 0x1011002e, 0x1011002b, 0x10110029, 13941 0x10110027, 0x10110024, 0x10110022, 0x10110020, 13942 0x1011001f, 0x1011001d, 0x1009003a, 0x10090037, 13943 0x10090034, 0x10090031, 0x1009002e, 0x1009002c, 13944 0x10090029, 0x10090027, 0x10090025, 0x10090023, 13945 0x10090021, 0x1009001f, 0x1009001d, 0x1009001b, 13946 0x1009001a, 0x10090018, 0x10090017, 0x10090016, 13947 0x10090015, 0x10090013, 0x10090012, 0x10090011, 13948 0x10090010, 0x1009000f, 0x1009000f, 0x1009000e, 13949 0x1009000d, 0x1009000c, 0x1009000c, 0x1009000b, 13950 0x1009000a, 0x1009000a, 0x10090009, 0x10090009, 13951 0x10090008, 0x10090008, 0x10090007, 0x10090007, 13952 0x10090007, 0x10090006, 0x10090006, 0x10090005, 13953 0x10090005, 0x10090005, 0x10090005, 0x10090004, 13954 0x10090004, 0x10090004, 0x10090004, 0x10090003, 13955 0x10090003, 0x10090003, 0x10090003, 0x10090003, 13956 0x10090003, 0x10090002, 0x10090002, 0x10090002, 13957 0x10090002, 0x10090002, 0x10090002, 0x10090002, 13958 0x10090002, 0x10090002, 0x10090001, 0x10090001, 13959 0x10090001, 0x10090001, 0x10090001, 0x10090001 13960}; 13961 13962static u32 nphy_tpc_5GHz_txgain_rev3[] = { 13963 0xcff70044, 0xcff70042, 0xcff70040, 0xcff7003e, 13964 0xcff7003c, 0xcff7003b, 0xcff70039, 0xcff70037, 13965 0xcef70044, 0xcef70042, 0xcef70040, 0xcef7003e, 13966 0xcef7003c, 0xcef7003b, 0xcef70039, 0xcef70037, 13967 0xcdf70044, 0xcdf70042, 0xcdf70040, 0xcdf7003e, 13968 0xcdf7003c, 0xcdf7003b, 0xcdf70039, 0xcdf70037, 13969 0xccf70044, 0xccf70042, 0xccf70040, 0xccf7003e, 13970 0xccf7003c, 0xccf7003b, 0xccf70039, 0xccf70037, 13971 0xcbf70044, 0xcbf70042, 0xcbf70040, 0xcbf7003e, 13972 0xcbf7003c, 0xcbf7003b, 0xcbf70039, 0xcbf70037, 13973 0xcaf70044, 0xcaf70042, 0xcaf70040, 0xcaf7003e, 13974 0xcaf7003c, 0xcaf7003b, 0xcaf70039, 0xcaf70037, 13975 0xc9f70044, 0xc9f70042, 0xc9f70040, 0xc9f7003e, 13976 0xc9f7003c, 0xc9f7003b, 0xc9f70039, 0xc9f70037, 13977 0xc8f70044, 0xc8f70042, 0xc8f70040, 0xc8f7003e, 13978 0xc8f7003c, 0xc8f7003b, 0xc8f70039, 0xc8f70037, 13979 0xc7f70044, 0xc7f70042, 0xc7f70040, 0xc7f7003e, 13980 0xc7f7003c, 0xc7f7003b, 0xc7f70039, 0xc7f70037, 13981 0xc6f70044, 0xc6f70042, 0xc6f70040, 0xc6f7003e, 13982 0xc6f7003c, 0xc6f7003b, 0xc6f70039, 0xc6f70037, 13983 0xc5f70044, 0xc5f70042, 0xc5f70040, 0xc5f7003e, 13984 0xc5f7003c, 0xc5f7003b, 0xc5f70039, 0xc5f70037, 13985 0xc4f70044, 0xc4f70042, 0xc4f70040, 0xc4f7003e, 13986 0xc4f7003c, 0xc4f7003b, 0xc4f70039, 0xc4f70037, 13987 0xc3f70044, 0xc3f70042, 0xc3f70040, 0xc3f7003e, 13988 0xc3f7003c, 0xc3f7003b, 0xc3f70039, 0xc3f70037, 13989 0xc2f70044, 0xc2f70042, 0xc2f70040, 0xc2f7003e, 13990 0xc2f7003c, 0xc2f7003b, 0xc2f70039, 0xc2f70037, 13991 0xc1f70044, 0xc1f70042, 0xc1f70040, 0xc1f7003e, 13992 0xc1f7003c, 0xc1f7003b, 0xc1f70039, 0xc1f70037, 13993 0xc0f70044, 0xc0f70042, 0xc0f70040, 0xc0f7003e, 13994 0xc0f7003c, 0xc0f7003b, 0xc0f70039, 0xc0f70037 13995}; 13996 13997static u32 nphy_tpc_5GHz_txgain_rev4[] = { 13998 0x2ff20044, 0x2ff20042, 0x2ff20040, 0x2ff2003e, 13999 0x2ff2003c, 0x2ff2003b, 0x2ff20039, 0x2ff20037, 14000 0x2ef20044, 0x2ef20042, 0x2ef20040, 0x2ef2003e, 14001 0x2ef2003c, 0x2ef2003b, 0x2ef20039, 0x2ef20037, 14002 0x2df20044, 0x2df20042, 0x2df20040, 0x2df2003e, 14003 0x2df2003c, 0x2df2003b, 0x2df20039, 0x2df20037, 14004 0x2cf20044, 0x2cf20042, 0x2cf20040, 0x2cf2003e, 14005 0x2cf2003c, 0x2cf2003b, 0x2cf20039, 0x2cf20037, 14006 0x2bf20044, 0x2bf20042, 0x2bf20040, 0x2bf2003e, 14007 0x2bf2003c, 0x2bf2003b, 0x2bf20039, 0x2bf20037, 14008 0x2af20044, 0x2af20042, 0x2af20040, 0x2af2003e, 14009 0x2af2003c, 0x2af2003b, 0x2af20039, 0x2af20037, 14010 0x29f20044, 0x29f20042, 0x29f20040, 0x29f2003e, 14011 0x29f2003c, 0x29f2003b, 0x29f20039, 0x29f20037, 14012 0x28f20044, 0x28f20042, 0x28f20040, 0x28f2003e, 14013 0x28f2003c, 0x28f2003b, 0x28f20039, 0x28f20037, 14014 0x27f20044, 0x27f20042, 0x27f20040, 0x27f2003e, 14015 0x27f2003c, 0x27f2003b, 0x27f20039, 0x27f20037, 14016 0x26f20044, 0x26f20042, 0x26f20040, 0x26f2003e, 14017 0x26f2003c, 0x26f2003b, 0x26f20039, 0x26f20037, 14018 0x25f20044, 0x25f20042, 0x25f20040, 0x25f2003e, 14019 0x25f2003c, 0x25f2003b, 0x25f20039, 0x25f20037, 14020 0x24f20044, 0x24f20042, 0x24f20040, 0x24f2003e, 14021 0x24f2003c, 0x24f2003b, 0x24f20039, 0x24f20038, 14022 0x23f20041, 0x23f20040, 0x23f2003f, 0x23f2003e, 14023 0x23f2003c, 0x23f2003b, 0x23f20039, 0x23f20037, 14024 0x22f20044, 0x22f20042, 0x22f20040, 0x22f2003e, 14025 0x22f2003c, 0x22f2003b, 0x22f20039, 0x22f20037, 14026 0x21f20044, 0x21f20042, 0x21f20040, 0x21f2003e, 14027 0x21f2003c, 0x21f2003b, 0x21f20039, 0x21f20037, 14028 0x20d20043, 0x20d20041, 0x20d2003e, 0x20d2003c, 14029 0x20d2003a, 0x20d20038, 0x20d20036, 0x20d20034 14030}; 14031 14032static u32 nphy_tpc_5GHz_txgain_rev5[] = { 14033 0x0f62004a, 0x0f620048, 0x0f620046, 0x0f620044, 14034 0x0f620042, 0x0f620040, 0x0f62003e, 0x0f62003c, 14035 0x0e620044, 0x0e620042, 0x0e620040, 0x0e62003e, 14036 0x0e62003c, 0x0e62003d, 0x0e62003b, 0x0e62003a, 14037 0x0d620043, 0x0d620041, 0x0d620040, 0x0d62003e, 14038 0x0d62003d, 0x0d62003c, 0x0d62003b, 0x0d62003a, 14039 0x0c620041, 0x0c620040, 0x0c62003f, 0x0c62003e, 14040 0x0c62003c, 0x0c62003b, 0x0c620039, 0x0c620037, 14041 0x0b620046, 0x0b620044, 0x0b620042, 0x0b620040, 14042 0x0b62003e, 0x0b62003c, 0x0b62003b, 0x0b62003a, 14043 0x0a620041, 0x0a620040, 0x0a62003e, 0x0a62003c, 14044 0x0a62003b, 0x0a62003a, 0x0a620039, 0x0a620038, 14045 0x0962003e, 0x0962003d, 0x0962003c, 0x0962003b, 14046 0x09620039, 0x09620037, 0x09620035, 0x09620033, 14047 0x08620044, 0x08620042, 0x08620040, 0x0862003e, 14048 0x0862003c, 0x0862003b, 0x0862003a, 0x08620039, 14049 0x07620043, 0x07620042, 0x07620040, 0x0762003f, 14050 0x0762003d, 0x0762003b, 0x0762003a, 0x07620039, 14051 0x0662003e, 0x0662003d, 0x0662003c, 0x0662003b, 14052 0x06620039, 0x06620037, 0x06620035, 0x06620033, 14053 0x05620046, 0x05620044, 0x05620042, 0x05620040, 14054 0x0562003e, 0x0562003c, 0x0562003b, 0x05620039, 14055 0x04620044, 0x04620042, 0x04620040, 0x0462003e, 14056 0x0462003c, 0x0462003b, 0x04620039, 0x04620038, 14057 0x0362003c, 0x0362003b, 0x0362003a, 0x03620039, 14058 0x03620038, 0x03620037, 0x03620035, 0x03620033, 14059 0x0262004c, 0x0262004a, 0x02620048, 0x02620047, 14060 0x02620046, 0x02620044, 0x02620043, 0x02620042, 14061 0x0162004a, 0x01620048, 0x01620046, 0x01620044, 14062 0x01620043, 0x01620042, 0x01620041, 0x01620040, 14063 0x00620042, 0x00620040, 0x0062003e, 0x0062003c, 14064 0x0062003b, 0x00620039, 0x00620037, 0x00620035 14065}; 14066 14067static u32 nphy_tpc_5GHz_txgain_HiPwrEPA[] = { 14068 0x2ff10044, 0x2ff10042, 0x2ff10040, 0x2ff1003e, 14069 0x2ff1003c, 0x2ff1003b, 0x2ff10039, 0x2ff10037, 14070 0x2ef10044, 0x2ef10042, 0x2ef10040, 0x2ef1003e, 14071 0x2ef1003c, 0x2ef1003b, 0x2ef10039, 0x2ef10037, 14072 0x2df10044, 0x2df10042, 0x2df10040, 0x2df1003e, 14073 0x2df1003c, 0x2df1003b, 0x2df10039, 0x2df10037, 14074 0x2cf10044, 0x2cf10042, 0x2cf10040, 0x2cf1003e, 14075 0x2cf1003c, 0x2cf1003b, 0x2cf10039, 0x2cf10037, 14076 0x2bf10044, 0x2bf10042, 0x2bf10040, 0x2bf1003e, 14077 0x2bf1003c, 0x2bf1003b, 0x2bf10039, 0x2bf10037, 14078 0x2af10044, 0x2af10042, 0x2af10040, 0x2af1003e, 14079 0x2af1003c, 0x2af1003b, 0x2af10039, 0x2af10037, 14080 0x29f10044, 0x29f10042, 0x29f10040, 0x29f1003e, 14081 0x29f1003c, 0x29f1003b, 0x29f10039, 0x29f10037, 14082 0x28f10044, 0x28f10042, 0x28f10040, 0x28f1003e, 14083 0x28f1003c, 0x28f1003b, 0x28f10039, 0x28f10037, 14084 0x27f10044, 0x27f10042, 0x27f10040, 0x27f1003e, 14085 0x27f1003c, 0x27f1003b, 0x27f10039, 0x27f10037, 14086 0x26f10044, 0x26f10042, 0x26f10040, 0x26f1003e, 14087 0x26f1003c, 0x26f1003b, 0x26f10039, 0x26f10037, 14088 0x25f10044, 0x25f10042, 0x25f10040, 0x25f1003e, 14089 0x25f1003c, 0x25f1003b, 0x25f10039, 0x25f10037, 14090 0x24f10044, 0x24f10042, 0x24f10040, 0x24f1003e, 14091 0x24f1003c, 0x24f1003b, 0x24f10039, 0x24f10038, 14092 0x23f10041, 0x23f10040, 0x23f1003f, 0x23f1003e, 14093 0x23f1003c, 0x23f1003b, 0x23f10039, 0x23f10037, 14094 0x22f10044, 0x22f10042, 0x22f10040, 0x22f1003e, 14095 0x22f1003c, 0x22f1003b, 0x22f10039, 0x22f10037, 14096 0x21f10044, 0x21f10042, 0x21f10040, 0x21f1003e, 14097 0x21f1003c, 0x21f1003b, 0x21f10039, 0x21f10037, 14098 0x20d10043, 0x20d10041, 0x20d1003e, 0x20d1003c, 14099 0x20d1003a, 0x20d10038, 0x20d10036, 0x20d10034 14100}; 14101 14102static u8 ant_sw_ctrl_tbl_rev8_2o3[] = { 0x14, 0x18 }; 14103static u8 ant_sw_ctrl_tbl_rev8[] = { 0x4, 0x8, 0x4, 0x8, 0x11, 0x12 }; 14104static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { 14105 0x09, 0x0a, 0x15, 0x16, 0x09, 0x0a 14106}; 14107static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { 14108 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 14109}; 14110 14111bool wlc_phy_bist_check_phy(struct brcms_phy_pub *pih) 14112{ 14113 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 14114 u32 phybist0, phybist1, phybist2, phybist3, phybist4; 14115 14116 if (NREV_GE(pi->pubpi.phy_rev, 16)) 14117 return true; 14118 14119 phybist0 = read_phy_reg(pi, 0x0e); 14120 phybist1 = read_phy_reg(pi, 0x0f); 14121 phybist2 = read_phy_reg(pi, 0xea); 14122 phybist3 = read_phy_reg(pi, 0xeb); 14123 phybist4 = read_phy_reg(pi, 0x156); 14124 14125 if ((phybist0 == 0) && (phybist1 == 0x4000) && (phybist2 == 0x1fe0) && 14126 (phybist3 == 0) && (phybist4 == 0)) 14127 return true; 14128 14129 return false; 14130} 14131 14132static void wlc_phy_bphy_init_nphy(struct brcms_phy *pi) 14133{ 14134 u16 addr, val; 14135 14136 val = 0x1e1f; 14137 for (addr = (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT); 14138 addr <= (NPHY_TO_BPHY_OFF + BPHY_RSSI_LUT_END); addr++) { 14139 write_phy_reg(pi, addr, val); 14140 if (addr == (NPHY_TO_BPHY_OFF + 0x97)) 14141 val = 0x3e3f; 14142 else 14143 val -= 0x0202; 14144 } 14145 14146 write_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_STEP, 0x668); 14147} 14148 14149void 14150wlc_phy_table_write_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14151 u32 width, const void *data) 14152{ 14153 struct phytbl_info tbl; 14154 14155 tbl.tbl_id = id; 14156 tbl.tbl_len = len; 14157 tbl.tbl_offset = offset; 14158 tbl.tbl_width = width; 14159 tbl.tbl_ptr = data; 14160 wlc_phy_write_table_nphy(pi, &tbl); 14161} 14162 14163void 14164wlc_phy_table_read_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, 14165 u32 width, void *data) 14166{ 14167 struct phytbl_info tbl; 14168 14169 tbl.tbl_id = id; 14170 tbl.tbl_len = len; 14171 tbl.tbl_offset = offset; 14172 tbl.tbl_width = width; 14173 tbl.tbl_ptr = data; 14174 wlc_phy_read_table_nphy(pi, &tbl); 14175} 14176 14177static void 14178wlc_phy_static_table_download_nphy(struct brcms_phy *pi) 14179{ 14180 uint idx; 14181 14182 if (NREV_GE(pi->pubpi.phy_rev, 16)) { 14183 for (idx = 0; idx < mimophytbl_info_sz_rev16; idx++) 14184 wlc_phy_write_table_nphy(pi, 14185 &mimophytbl_info_rev16[idx]); 14186 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14187 for (idx = 0; idx < mimophytbl_info_sz_rev7; idx++) 14188 wlc_phy_write_table_nphy(pi, 14189 &mimophytbl_info_rev7[idx]); 14190 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14191 for (idx = 0; idx < mimophytbl_info_sz_rev3; idx++) 14192 wlc_phy_write_table_nphy(pi, 14193 &mimophytbl_info_rev3[idx]); 14194 } else { 14195 for (idx = 0; idx < mimophytbl_info_sz_rev0; idx++) 14196 wlc_phy_write_table_nphy(pi, 14197 &mimophytbl_info_rev0[idx]); 14198 } 14199} 14200 14201static void wlc_phy_tbl_init_nphy(struct brcms_phy *pi) 14202{ 14203 uint idx = 0; 14204 u8 antswctrllut; 14205 14206 if (pi->phy_init_por) 14207 wlc_phy_static_table_download_nphy(pi); 14208 14209 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14210 14211 antswctrllut = CHSPEC_IS2G(pi->radio_chanspec) ? 14212 pi->srom_fem2g.antswctrllut : pi->srom_fem5g. 14213 antswctrllut; 14214 14215 switch (antswctrllut) { 14216 case 0: 14217 14218 break; 14219 14220 case 1: 14221 14222 if (pi->aa2g == 7) 14223 wlc_phy_table_write_nphy( 14224 pi, 14225 NPHY_TBL_ID_ANTSWCTRLLUT, 14226 2, 0x21, 8, 14227 &ant_sw_ctrl_tbl_rev8_2o3[0]); 14228 else 14229 wlc_phy_table_write_nphy( 14230 pi, 14231 NPHY_TBL_ID_ANTSWCTRLLUT, 14232 2, 0x21, 8, 14233 &ant_sw_ctrl_tbl_rev8 14234 [0]); 14235 14236 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14237 2, 0x25, 8, 14238 &ant_sw_ctrl_tbl_rev8[2]); 14239 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14240 2, 0x29, 8, 14241 &ant_sw_ctrl_tbl_rev8[4]); 14242 break; 14243 14244 case 2: 14245 14246 wlc_phy_table_write_nphy( 14247 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14248 2, 0x1, 8, 14249 &ant_sw_ctrl_tbl_rev8_2057v7_core0[0]); 14250 wlc_phy_table_write_nphy( 14251 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14252 2, 0x5, 8, 14253 &ant_sw_ctrl_tbl_rev8_2057v7_core0[2]); 14254 wlc_phy_table_write_nphy( 14255 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14256 2, 0x9, 8, 14257 &ant_sw_ctrl_tbl_rev8_2057v7_core0[4]); 14258 14259 wlc_phy_table_write_nphy( 14260 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14261 2, 0x21, 8, 14262 &ant_sw_ctrl_tbl_rev8_2057v7_core1[0]); 14263 wlc_phy_table_write_nphy( 14264 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14265 2, 0x25, 8, 14266 &ant_sw_ctrl_tbl_rev8_2057v7_core1[2]); 14267 wlc_phy_table_write_nphy( 14268 pi, NPHY_TBL_ID_ANTSWCTRLLUT, 14269 2, 0x29, 8, 14270 &ant_sw_ctrl_tbl_rev8_2057v7_core1[4]); 14271 break; 14272 14273 default: 14274 break; 14275 } 14276 14277 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14278 for (idx = 0; idx < mimophytbl_info_sz_rev3_volatile; idx++) { 14279 14280 if (idx == ANT_SWCTRL_TBL_REV3_IDX) { 14281 antswctrllut = 14282 CHSPEC_IS2G(pi->radio_chanspec) ? 14283 pi->srom_fem2g.antswctrllut : 14284 pi->srom_fem5g.antswctrllut; 14285 switch (antswctrllut) { 14286 case 0: 14287 wlc_phy_write_table_nphy( 14288 pi, 14289 &mimophytbl_info_rev3_volatile 14290 [idx]); 14291 break; 14292 case 1: 14293 wlc_phy_write_table_nphy( 14294 pi, 14295 &mimophytbl_info_rev3_volatile1 14296 [idx]); 14297 break; 14298 case 2: 14299 wlc_phy_write_table_nphy( 14300 pi, 14301 &mimophytbl_info_rev3_volatile2 14302 [idx]); 14303 break; 14304 case 3: 14305 wlc_phy_write_table_nphy( 14306 pi, 14307 &mimophytbl_info_rev3_volatile3 14308 [idx]); 14309 break; 14310 default: 14311 break; 14312 } 14313 } else { 14314 wlc_phy_write_table_nphy( 14315 pi, 14316 &mimophytbl_info_rev3_volatile[idx]); 14317 } 14318 } 14319 } else { 14320 for (idx = 0; idx < mimophytbl_info_sz_rev0_volatile; idx++) 14321 wlc_phy_write_table_nphy(pi, 14322 &mimophytbl_info_rev0_volatile 14323 [idx]); 14324 } 14325} 14326 14327static void 14328wlc_phy_write_txmacreg_nphy(struct brcms_phy *pi, u16 holdoff, u16 delay) 14329{ 14330 write_phy_reg(pi, 0x77, holdoff); 14331 write_phy_reg(pi, 0xb4, delay); 14332} 14333 14334void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs) 14335{ 14336 u16 holdoff, delay; 14337 14338 if (rifs) { 14339 14340 holdoff = 0x10; 14341 delay = 0x258; 14342 } else { 14343 14344 holdoff = 0x15; 14345 delay = 0x320; 14346 } 14347 14348 wlc_phy_write_txmacreg_nphy(pi, holdoff, delay); 14349 14350 if (pi->sh && (pi->sh->_rifs_phy != rifs)) 14351 pi->sh->_rifs_phy = rifs; 14352} 14353 14354static void wlc_phy_txpwrctrl_config_nphy(struct brcms_phy *pi) 14355{ 14356 14357 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 14358 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14359 pi->phy_5g_pwrgain = true; 14360 return; 14361 } 14362 14363 pi->nphy_txpwrctrl = PHY_TPC_HW_OFF; 14364 pi->phy_5g_pwrgain = false; 14365 14366 if ((pi->sh->boardflags2 & BFL2_TXPWRCTRL_EN) && 14367 NREV_GE(pi->pubpi.phy_rev, 2) && (pi->sh->sromrev >= 4)) 14368 pi->nphy_txpwrctrl = PHY_TPC_HW_ON; 14369 else if ((pi->sh->sromrev >= 4) 14370 && (pi->sh->boardflags2 & BFL2_5G_PWRGAIN)) 14371 pi->phy_5g_pwrgain = true; 14372} 14373 14374static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi) 14375{ 14376 u16 bw40po, cddpo, stbcpo, bwduppo; 14377 uint band_num; 14378 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14379 14380 if (pi->sh->sromrev >= 9) 14381 return; 14382 14383 bw40po = sprom->bw40po; 14384 pi->bw402gpo = bw40po & 0xf; 14385 pi->bw405gpo = (bw40po & 0xf0) >> 4; 14386 pi->bw405glpo = (bw40po & 0xf00) >> 8; 14387 pi->bw405ghpo = (bw40po & 0xf000) >> 12; 14388 14389 cddpo = sprom->cddpo; 14390 pi->cdd2gpo = cddpo & 0xf; 14391 pi->cdd5gpo = (cddpo & 0xf0) >> 4; 14392 pi->cdd5glpo = (cddpo & 0xf00) >> 8; 14393 pi->cdd5ghpo = (cddpo & 0xf000) >> 12; 14394 14395 stbcpo = sprom->stbcpo; 14396 pi->stbc2gpo = stbcpo & 0xf; 14397 pi->stbc5gpo = (stbcpo & 0xf0) >> 4; 14398 pi->stbc5glpo = (stbcpo & 0xf00) >> 8; 14399 pi->stbc5ghpo = (stbcpo & 0xf000) >> 12; 14400 14401 bwduppo = sprom->bwduppo; 14402 pi->bwdup2gpo = bwduppo & 0xf; 14403 pi->bwdup5gpo = (bwduppo & 0xf0) >> 4; 14404 pi->bwdup5glpo = (bwduppo & 0xf00) >> 8; 14405 pi->bwdup5ghpo = (bwduppo & 0xf000) >> 12; 14406 14407 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 14408 band_num++) { 14409 switch (band_num) { 14410 case 0: 14411 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_2g = 14412 sprom->core_pwr_info[0].maxpwr_2g; 14413 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_2g = 14414 sprom->core_pwr_info[1].maxpwr_2g; 14415 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_a1 = 14416 sprom->core_pwr_info[0].pa_2g[0]; 14417 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_a1 = 14418 sprom->core_pwr_info[1].pa_2g[0]; 14419 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b0 = 14420 sprom->core_pwr_info[0].pa_2g[1]; 14421 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b0 = 14422 sprom->core_pwr_info[1].pa_2g[1]; 14423 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_2g_b1 = 14424 sprom->core_pwr_info[0].pa_2g[2]; 14425 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_2g_b1 = 14426 sprom->core_pwr_info[1].pa_2g[2]; 14427 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_2g = 14428 sprom->core_pwr_info[0].itssi_2g; 14429 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_2g = 14430 sprom->core_pwr_info[1].itssi_2g; 14431 14432 pi->cck2gpo = sprom->cck2gpo; 14433 14434 pi->ofdm2gpo = sprom->ofdm2gpo; 14435 14436 pi->mcs2gpo[0] = sprom->mcs2gpo[0]; 14437 pi->mcs2gpo[1] = sprom->mcs2gpo[1]; 14438 pi->mcs2gpo[2] = sprom->mcs2gpo[2]; 14439 pi->mcs2gpo[3] = sprom->mcs2gpo[3]; 14440 pi->mcs2gpo[4] = sprom->mcs2gpo[4]; 14441 pi->mcs2gpo[5] = sprom->mcs2gpo[5]; 14442 pi->mcs2gpo[6] = sprom->mcs2gpo[6]; 14443 pi->mcs2gpo[7] = sprom->mcs2gpo[7]; 14444 break; 14445 case 1: 14446 14447 pi->nphy_pwrctrl_info[PHY_CORE_0].max_pwr_5gm = 14448 sprom->core_pwr_info[0].maxpwr_5g; 14449 pi->nphy_pwrctrl_info[PHY_CORE_1].max_pwr_5gm = 14450 sprom->core_pwr_info[1].maxpwr_5g; 14451 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_a1 = 14452 sprom->core_pwr_info[0].pa_5g[0]; 14453 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_a1 = 14454 sprom->core_pwr_info[1].pa_5g[0]; 14455 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b0 = 14456 sprom->core_pwr_info[0].pa_5g[1]; 14457 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b0 = 14458 sprom->core_pwr_info[1].pa_5g[1]; 14459 pi->nphy_pwrctrl_info[PHY_CORE_0].pwrdet_5gm_b1 = 14460 sprom->core_pwr_info[0].pa_5g[2]; 14461 pi->nphy_pwrctrl_info[PHY_CORE_1].pwrdet_5gm_b1 = 14462 sprom->core_pwr_info[1].pa_5g[2]; 14463 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_targ_5gm = 14464 sprom->core_pwr_info[0].itssi_5g; 14465 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_targ_5gm = 14466 sprom->core_pwr_info[1].itssi_5g; 14467 14468 pi->ofdm5gpo = sprom->ofdm5gpo; 14469 14470 pi->mcs5gpo[0] = sprom->mcs5gpo[0]; 14471 pi->mcs5gpo[1] = sprom->mcs5gpo[1]; 14472 pi->mcs5gpo[2] = sprom->mcs5gpo[2]; 14473 pi->mcs5gpo[3] = sprom->mcs5gpo[3]; 14474 pi->mcs5gpo[4] = sprom->mcs5gpo[4]; 14475 pi->mcs5gpo[5] = sprom->mcs5gpo[5]; 14476 pi->mcs5gpo[6] = sprom->mcs5gpo[6]; 14477 pi->mcs5gpo[7] = sprom->mcs5gpo[7]; 14478 break; 14479 case 2: 14480 14481 pi->nphy_pwrctrl_info[0].max_pwr_5gl = 14482 sprom->core_pwr_info[0].maxpwr_5gl; 14483 pi->nphy_pwrctrl_info[1].max_pwr_5gl = 14484 sprom->core_pwr_info[1].maxpwr_5gl; 14485 pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1 = 14486 sprom->core_pwr_info[0].pa_5gl[0]; 14487 pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1 = 14488 sprom->core_pwr_info[1].pa_5gl[0]; 14489 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0 = 14490 sprom->core_pwr_info[0].pa_5gl[1]; 14491 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0 = 14492 sprom->core_pwr_info[1].pa_5gl[1]; 14493 pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1 = 14494 sprom->core_pwr_info[0].pa_5gl[2]; 14495 pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1 = 14496 sprom->core_pwr_info[1].pa_5gl[2]; 14497 pi->nphy_pwrctrl_info[0].idle_targ_5gl = 0; 14498 pi->nphy_pwrctrl_info[1].idle_targ_5gl = 0; 14499 14500 pi->ofdm5glpo = sprom->ofdm5glpo; 14501 14502 pi->mcs5glpo[0] = sprom->mcs5glpo[0]; 14503 pi->mcs5glpo[1] = sprom->mcs5glpo[1]; 14504 pi->mcs5glpo[2] = sprom->mcs5glpo[2]; 14505 pi->mcs5glpo[3] = sprom->mcs5glpo[3]; 14506 pi->mcs5glpo[4] = sprom->mcs5glpo[4]; 14507 pi->mcs5glpo[5] = sprom->mcs5glpo[5]; 14508 pi->mcs5glpo[6] = sprom->mcs5glpo[6]; 14509 pi->mcs5glpo[7] = sprom->mcs5glpo[7]; 14510 break; 14511 case 3: 14512 14513 pi->nphy_pwrctrl_info[0].max_pwr_5gh = 14514 sprom->core_pwr_info[0].maxpwr_5gh; 14515 pi->nphy_pwrctrl_info[1].max_pwr_5gh = 14516 sprom->core_pwr_info[1].maxpwr_5gh; 14517 pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1 = 14518 sprom->core_pwr_info[0].pa_5gh[0]; 14519 pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1 = 14520 sprom->core_pwr_info[1].pa_5gh[0]; 14521 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0 = 14522 sprom->core_pwr_info[0].pa_5gh[1]; 14523 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0 = 14524 sprom->core_pwr_info[1].pa_5gh[1]; 14525 pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1 = 14526 sprom->core_pwr_info[0].pa_5gh[2]; 14527 pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1 = 14528 sprom->core_pwr_info[1].pa_5gh[2]; 14529 pi->nphy_pwrctrl_info[0].idle_targ_5gh = 0; 14530 pi->nphy_pwrctrl_info[1].idle_targ_5gh = 0; 14531 14532 pi->ofdm5ghpo = sprom->ofdm5ghpo; 14533 14534 pi->mcs5ghpo[0] = sprom->mcs5ghpo[0]; 14535 pi->mcs5ghpo[1] = sprom->mcs5ghpo[1]; 14536 pi->mcs5ghpo[2] = sprom->mcs5ghpo[2]; 14537 pi->mcs5ghpo[3] = sprom->mcs5ghpo[3]; 14538 pi->mcs5ghpo[4] = sprom->mcs5ghpo[4]; 14539 pi->mcs5ghpo[5] = sprom->mcs5ghpo[5]; 14540 pi->mcs5ghpo[6] = sprom->mcs5ghpo[6]; 14541 pi->mcs5ghpo[7] = sprom->mcs5ghpo[7]; 14542 break; 14543 } 14544 } 14545 14546 wlc_phy_txpwr_apply_nphy(pi); 14547} 14548 14549static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi) 14550{ 14551 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; 14552 14553 pi->antswitch = sprom->antswitch; 14554 pi->aa2g = sprom->ant_available_bg; 14555 pi->aa5g = sprom->ant_available_a; 14556 14557 pi->srom_fem2g.tssipos = sprom->fem.ghz2.tssipos; 14558 pi->srom_fem2g.extpagain = sprom->fem.ghz2.extpa_gain; 14559 pi->srom_fem2g.pdetrange = sprom->fem.ghz2.pdet_range; 14560 pi->srom_fem2g.triso = sprom->fem.ghz2.tr_iso; 14561 pi->srom_fem2g.antswctrllut = sprom->fem.ghz2.antswlut; 14562 14563 pi->srom_fem5g.tssipos = sprom->fem.ghz5.tssipos; 14564 pi->srom_fem5g.extpagain = sprom->fem.ghz5.extpa_gain; 14565 pi->srom_fem5g.pdetrange = sprom->fem.ghz5.pdet_range; 14566 pi->srom_fem5g.triso = sprom->fem.ghz5.tr_iso; 14567 if (sprom->fem.ghz5.antswlut) 14568 pi->srom_fem5g.antswctrllut = sprom->fem.ghz5.antswlut; 14569 else 14570 pi->srom_fem5g.antswctrllut = sprom->fem.ghz2.antswlut; 14571 14572 wlc_phy_txpower_ipa_upd(pi); 14573 14574 pi->phy_txcore_disable_temp = sprom->tempthresh; 14575 if (pi->phy_txcore_disable_temp == 0) 14576 pi->phy_txcore_disable_temp = PHY_CHAIN_TX_DISABLE_TEMP; 14577 14578 pi->phy_tempsense_offset = sprom->tempoffset; 14579 if (pi->phy_tempsense_offset != 0) { 14580 if (pi->phy_tempsense_offset > 14581 (NPHY_SROM_TEMPSHIFT + NPHY_SROM_MAXTEMPOFFSET)) 14582 pi->phy_tempsense_offset = NPHY_SROM_MAXTEMPOFFSET; 14583 else if (pi->phy_tempsense_offset < (NPHY_SROM_TEMPSHIFT + 14584 NPHY_SROM_MINTEMPOFFSET)) 14585 pi->phy_tempsense_offset = NPHY_SROM_MINTEMPOFFSET; 14586 else 14587 pi->phy_tempsense_offset -= NPHY_SROM_TEMPSHIFT; 14588 } 14589 14590 pi->phy_txcore_enable_temp = 14591 pi->phy_txcore_disable_temp - PHY_HYSTERESIS_DELTATEMP; 14592 14593 pi->phycal_tempdelta = sprom->phycal_tempdelta; 14594 if (pi->phycal_tempdelta > NPHY_CAL_MAXTEMPDELTA) 14595 pi->phycal_tempdelta = 0; 14596 14597 wlc_phy_txpwr_srom_read_ppr_nphy(pi); 14598 14599 return true; 14600} 14601 14602bool wlc_phy_attach_nphy(struct brcms_phy *pi) 14603{ 14604 uint i; 14605 14606 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 6)) 14607 pi->phyhang_avoid = true; 14608 14609 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14610 pi->nphy_gband_spurwar_en = true; 14611 if (pi->sh->boardflags2 & BFL2_SPUR_WAR) 14612 pi->nphy_aband_spurwar_en = true; 14613 } 14614 if (NREV_GE(pi->pubpi.phy_rev, 6) && NREV_LT(pi->pubpi.phy_rev, 7)) { 14615 if (pi->sh->boardflags2 & BFL2_2G_SPUR_WAR) 14616 pi->nphy_gband_spurwar2_en = true; 14617 } 14618 14619 pi->n_preamble_override = AUTO; 14620 if (NREV_IS(pi->pubpi.phy_rev, 3) || NREV_IS(pi->pubpi.phy_rev, 4)) 14621 pi->n_preamble_override = BRCMS_N_PREAMBLE_MIXEDMODE; 14622 14623 pi->nphy_txrx_chain = AUTO; 14624 pi->phy_scraminit = AUTO; 14625 14626 pi->nphy_rxcalparams = 0x010100B5; 14627 14628 pi->nphy_perical = PHY_PERICAL_MPHASE; 14629 pi->mphase_cal_phase_id = MPHASE_CAL_STATE_IDLE; 14630 pi->mphase_txcal_numcmds = MPHASE_TXCAL_NUMCMDS; 14631 14632 pi->nphy_gain_boost = true; 14633 pi->nphy_elna_gain_config = false; 14634 pi->radio_is_on = false; 14635 14636 for (i = 0; i < pi->pubpi.phy_corenum; i++) 14637 pi->nphy_txpwrindex[i].index = AUTO; 14638 14639 wlc_phy_txpwrctrl_config_nphy(pi); 14640 if (pi->nphy_txpwrctrl == PHY_TPC_HW_ON) 14641 pi->hwpwrctrl_capable = true; 14642 14643 pi->pi_fptr.init = wlc_phy_init_nphy; 14644 pi->pi_fptr.calinit = wlc_phy_cal_init_nphy; 14645 pi->pi_fptr.chanset = wlc_phy_chanspec_set_nphy; 14646 pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_nphy; 14647 14648 if (!wlc_phy_txpwr_srom_read_nphy(pi)) 14649 return false; 14650 14651 return true; 14652} 14653 14654static s32 get_rf_pwr_offset(struct brcms_phy *pi, s16 pga_gn, s16 pad_gn) 14655{ 14656 s32 rfpwr_offset = 0; 14657 14658 if (CHSPEC_IS2G(pi->radio_chanspec)) { 14659 if ((pi->pubpi.radiorev == 3) || 14660 (pi->pubpi.radiorev == 4) || 14661 (pi->pubpi.radiorev == 6)) 14662 rfpwr_offset = (s16) 14663 nphy_papd_padgain_dlt_2g_2057rev3n4 14664 [pad_gn]; 14665 else if (pi->pubpi.radiorev == 5) 14666 rfpwr_offset = (s16) 14667 nphy_papd_padgain_dlt_2g_2057rev5 14668 [pad_gn]; 14669 else if ((pi->pubpi.radiorev == 7) 14670 || (pi->pubpi.radiorev == 14671 8)) 14672 rfpwr_offset = (s16) 14673 nphy_papd_padgain_dlt_2g_2057rev7 14674 [pad_gn]; 14675 } else { 14676 if ((pi->pubpi.radiorev == 3) || 14677 (pi->pubpi.radiorev == 4) || 14678 (pi->pubpi.radiorev == 6)) 14679 rfpwr_offset = (s16) 14680 nphy_papd_pgagain_dlt_5g_2057 14681 [pga_gn]; 14682 else if ((pi->pubpi.radiorev == 7) 14683 || (pi->pubpi.radiorev == 14684 8)) 14685 rfpwr_offset = (s16) 14686 nphy_papd_pgagain_dlt_5g_2057rev7 14687 [pga_gn]; 14688 } 14689 return rfpwr_offset; 14690} 14691 14692static void wlc_phy_update_mimoconfig_nphy(struct brcms_phy *pi, s32 preamble) 14693{ 14694 bool gf_preamble = false; 14695 u16 val; 14696 14697 if (preamble == BRCMS_N_PREAMBLE_GF) 14698 gf_preamble = true; 14699 14700 val = read_phy_reg(pi, 0xed); 14701 14702 val |= RX_GF_MM_AUTO; 14703 val &= ~RX_GF_OR_MM; 14704 if (gf_preamble) 14705 val |= RX_GF_OR_MM; 14706 14707 write_phy_reg(pi, 0xed, val); 14708} 14709 14710static void wlc_phy_ipa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 14711{ 14712 int j, type; 14713 u16 addr_offset[] = { 0x186, 0x195, 0x2c5}; 14714 14715 for (type = 0; type < 3; type++) { 14716 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14717 write_phy_reg(pi, addr_offset[type] + j, 14718 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 14719 } 14720 14721 if (pi->bw == WL_CHANSPEC_BW_40) { 14722 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14723 write_phy_reg(pi, 0x186 + j, 14724 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14725 } else { 14726 if (CHSPEC_IS5G(pi->radio_chanspec)) { 14727 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14728 write_phy_reg(pi, 0x186 + j, 14729 NPHY_IPA_REV4_txdigi_filtcoeffs[5][j]); 14730 } 14731 14732 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 14733 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14734 write_phy_reg(pi, 0x2c5 + j, 14735 NPHY_IPA_REV4_txdigi_filtcoeffs[6][j]); 14736 } 14737 } 14738} 14739 14740static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi) 14741{ 14742 int j; 14743 14744 if (pi->bw == WL_CHANSPEC_BW_40) { 14745 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14746 write_phy_reg(pi, 0x195 + j, 14747 NPHY_IPA_REV4_txdigi_filtcoeffs[4][j]); 14748 } else { 14749 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 14750 write_phy_reg(pi, 0x186 + j, 14751 NPHY_IPA_REV4_txdigi_filtcoeffs[3][j]); 14752 } 14753} 14754 14755static void 14756wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events, 14757 const u8 *dlys, u8 len) 14758{ 14759 u32 t1_offset, t2_offset; 14760 u8 ctr; 14761 u8 end_event = 14762 NREV_GE(pi->pubpi.phy_rev, 14763 3) ? NPHY_REV3_RFSEQ_CMD_END : NPHY_RFSEQ_CMD_END; 14764 u8 end_dly = 1; 14765 14766 if (pi->phyhang_avoid) 14767 wlc_phy_stay_in_carriersearch_nphy(pi, true); 14768 14769 t1_offset = cmd << 4; 14770 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t1_offset, 8, 14771 events); 14772 t2_offset = t1_offset + 0x080; 14773 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, len, t2_offset, 8, 14774 dlys); 14775 14776 for (ctr = len; ctr < 16; ctr++) { 14777 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14778 t1_offset + ctr, 8, &end_event); 14779 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14780 t2_offset + ctr, 8, &end_dly); 14781 } 14782 14783 if (pi->phyhang_avoid) 14784 wlc_phy_stay_in_carriersearch_nphy(pi, false); 14785} 14786 14787static u16 wlc_phy_read_lpf_bw_ctl_nphy(struct brcms_phy *pi, u16 offset) 14788{ 14789 u16 lpf_bw_ctl_val = 0; 14790 u16 rx2tx_lpf_rc_lut_offset = 0; 14791 14792 if (offset == 0) { 14793 if (CHSPEC_IS40(pi->radio_chanspec)) 14794 rx2tx_lpf_rc_lut_offset = 0x159; 14795 else 14796 rx2tx_lpf_rc_lut_offset = 0x154; 14797 } else { 14798 rx2tx_lpf_rc_lut_offset = offset; 14799 } 14800 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 14801 (u32) rx2tx_lpf_rc_lut_offset, 16, 14802 &lpf_bw_ctl_val); 14803 14804 lpf_bw_ctl_val = lpf_bw_ctl_val & 0x7; 14805 14806 return lpf_bw_ctl_val; 14807} 14808 14809static void 14810wlc_phy_rfctrl_override_nphy_rev7(struct brcms_phy *pi, u16 field, u16 value, 14811 u8 core_mask, u8 off, u8 override_id) 14812{ 14813 u8 core_num; 14814 u16 addr = 0, en_addr = 0, val_addr = 0, en_mask = 0, val_mask = 0; 14815 u8 val_shift = 0; 14816 14817 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 14818 en_mask = field; 14819 for (core_num = 0; core_num < 2; core_num++) { 14820 if (override_id == NPHY_REV7_RFCTRLOVERRIDE_ID0) { 14821 14822 switch (field) { 14823 case (0x1 << 2): 14824 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14825 val_addr = (core_num == 0) ? 0x7a : 14826 0x7d; 14827 val_mask = (0x1 << 1); 14828 val_shift = 1; 14829 break; 14830 case (0x1 << 3): 14831 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14832 val_addr = (core_num == 0) ? 0x7a : 14833 0x7d; 14834 val_mask = (0x1 << 2); 14835 val_shift = 2; 14836 break; 14837 case (0x1 << 4): 14838 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14839 val_addr = (core_num == 0) ? 0x7a : 14840 0x7d; 14841 val_mask = (0x1 << 4); 14842 val_shift = 4; 14843 break; 14844 case (0x1 << 5): 14845 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14846 val_addr = (core_num == 0) ? 0x7a : 14847 0x7d; 14848 val_mask = (0x1 << 5); 14849 val_shift = 5; 14850 break; 14851 case (0x1 << 6): 14852 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14853 val_addr = (core_num == 0) ? 0x7a : 14854 0x7d; 14855 val_mask = (0x1 << 6); 14856 val_shift = 6; 14857 break; 14858 case (0x1 << 7): 14859 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14860 val_addr = (core_num == 0) ? 0x7a : 14861 0x7d; 14862 val_mask = (0x1 << 7); 14863 val_shift = 7; 14864 break; 14865 case (0x1 << 10): 14866 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14867 val_addr = (core_num == 0) ? 0xf8 : 14868 0xfa; 14869 val_mask = (0x7 << 4); 14870 val_shift = 4; 14871 break; 14872 case (0x1 << 11): 14873 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14874 val_addr = (core_num == 0) ? 0x7b : 14875 0x7e; 14876 val_mask = (0xffff << 0); 14877 val_shift = 0; 14878 break; 14879 case (0x1 << 12): 14880 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14881 val_addr = (core_num == 0) ? 0x7c : 14882 0x7f; 14883 val_mask = (0xffff << 0); 14884 val_shift = 0; 14885 break; 14886 case (0x3 << 13): 14887 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14888 val_addr = (core_num == 0) ? 0x348 : 14889 0x349; 14890 val_mask = (0xff << 0); 14891 val_shift = 0; 14892 break; 14893 case (0x1 << 13): 14894 en_addr = (core_num == 0) ? 0xe7 : 0xec; 14895 val_addr = (core_num == 0) ? 0x348 : 14896 0x349; 14897 val_mask = (0xf << 0); 14898 val_shift = 0; 14899 break; 14900 default: 14901 addr = 0xffff; 14902 break; 14903 } 14904 } else if (override_id == 14905 NPHY_REV7_RFCTRLOVERRIDE_ID1) { 14906 14907 switch (field) { 14908 case (0x1 << 1): 14909 en_addr = (core_num == 0) ? 0x342 : 14910 0x343; 14911 val_addr = (core_num == 0) ? 0x340 : 14912 0x341; 14913 val_mask = (0x1 << 1); 14914 val_shift = 1; 14915 break; 14916 case (0x1 << 3): 14917 en_addr = (core_num == 0) ? 0x342 : 14918 0x343; 14919 val_addr = (core_num == 0) ? 0x340 : 14920 0x341; 14921 val_mask = (0x1 << 3); 14922 val_shift = 3; 14923 break; 14924 case (0x1 << 5): 14925 en_addr = (core_num == 0) ? 0x342 : 14926 0x343; 14927 val_addr = (core_num == 0) ? 0x340 : 14928 0x341; 14929 val_mask = (0x1 << 5); 14930 val_shift = 5; 14931 break; 14932 case (0x1 << 4): 14933 en_addr = (core_num == 0) ? 0x342 : 14934 0x343; 14935 val_addr = (core_num == 0) ? 0x340 : 14936 0x341; 14937 val_mask = (0x1 << 4); 14938 val_shift = 4; 14939 break; 14940 case (0x1 << 2): 14941 14942 en_addr = (core_num == 0) ? 0x342 : 14943 0x343; 14944 val_addr = (core_num == 0) ? 0x340 : 14945 0x341; 14946 val_mask = (0x1 << 2); 14947 val_shift = 2; 14948 break; 14949 case (0x1 << 7): 14950 14951 en_addr = (core_num == 0) ? 0x342 : 14952 0x343; 14953 val_addr = (core_num == 0) ? 0x340 : 14954 0x341; 14955 val_mask = (0x7 << 8); 14956 val_shift = 8; 14957 break; 14958 case (0x1 << 11): 14959 en_addr = (core_num == 0) ? 0x342 : 14960 0x343; 14961 val_addr = (core_num == 0) ? 0x340 : 14962 0x341; 14963 val_mask = (0x1 << 14); 14964 val_shift = 14; 14965 break; 14966 case (0x1 << 10): 14967 en_addr = (core_num == 0) ? 0x342 : 14968 0x343; 14969 val_addr = (core_num == 0) ? 0x340 : 14970 0x341; 14971 val_mask = (0x1 << 13); 14972 val_shift = 13; 14973 break; 14974 case (0x1 << 9): 14975 en_addr = (core_num == 0) ? 0x342 : 14976 0x343; 14977 val_addr = (core_num == 0) ? 0x340 : 14978 0x341; 14979 val_mask = (0x1 << 12); 14980 val_shift = 12; 14981 break; 14982 case (0x1 << 8): 14983 en_addr = (core_num == 0) ? 0x342 : 14984 0x343; 14985 val_addr = (core_num == 0) ? 0x340 : 14986 0x341; 14987 val_mask = (0x1 << 11); 14988 val_shift = 11; 14989 break; 14990 case (0x1 << 6): 14991 en_addr = (core_num == 0) ? 0x342 : 14992 0x343; 14993 val_addr = (core_num == 0) ? 0x340 : 14994 0x341; 14995 val_mask = (0x1 << 6); 14996 val_shift = 6; 14997 break; 14998 case (0x1 << 0): 14999 en_addr = (core_num == 0) ? 0x342 : 15000 0x343; 15001 val_addr = (core_num == 0) ? 0x340 : 15002 0x341; 15003 val_mask = (0x1 << 0); 15004 val_shift = 0; 15005 break; 15006 default: 15007 addr = 0xffff; 15008 break; 15009 } 15010 } else if (override_id == 15011 NPHY_REV7_RFCTRLOVERRIDE_ID2) { 15012 15013 switch (field) { 15014 case (0x1 << 3): 15015 en_addr = (core_num == 0) ? 0x346 : 15016 0x347; 15017 val_addr = (core_num == 0) ? 0x344 : 15018 0x345; 15019 val_mask = (0x1 << 3); 15020 val_shift = 3; 15021 break; 15022 case (0x1 << 1): 15023 en_addr = (core_num == 0) ? 0x346 : 15024 0x347; 15025 val_addr = (core_num == 0) ? 0x344 : 15026 0x345; 15027 val_mask = (0x1 << 1); 15028 val_shift = 1; 15029 break; 15030 case (0x1 << 0): 15031 en_addr = (core_num == 0) ? 0x346 : 15032 0x347; 15033 val_addr = (core_num == 0) ? 0x344 : 15034 0x345; 15035 val_mask = (0x1 << 0); 15036 val_shift = 0; 15037 break; 15038 case (0x1 << 2): 15039 en_addr = (core_num == 0) ? 0x346 : 15040 0x347; 15041 val_addr = (core_num == 0) ? 0x344 : 15042 0x345; 15043 val_mask = (0x1 << 2); 15044 val_shift = 2; 15045 break; 15046 case (0x1 << 4): 15047 en_addr = (core_num == 0) ? 0x346 : 15048 0x347; 15049 val_addr = (core_num == 0) ? 0x344 : 15050 0x345; 15051 val_mask = (0x1 << 4); 15052 val_shift = 4; 15053 break; 15054 default: 15055 addr = 0xffff; 15056 break; 15057 } 15058 } 15059 15060 if (off) { 15061 and_phy_reg(pi, en_addr, ~en_mask); 15062 and_phy_reg(pi, val_addr, ~val_mask); 15063 } else { 15064 15065 if ((core_mask == 0) 15066 || (core_mask & (1 << core_num))) { 15067 or_phy_reg(pi, en_addr, en_mask); 15068 15069 if (addr != 0xffff) 15070 mod_phy_reg(pi, val_addr, 15071 val_mask, 15072 (value << 15073 val_shift)); 15074 } 15075 } 15076 } 15077 } 15078} 15079 15080static void wlc_phy_adjust_lnagaintbl_nphy(struct brcms_phy *pi) 15081{ 15082 uint core; 15083 int ctr; 15084 s16 gain_delta[2]; 15085 u8 curr_channel; 15086 u16 minmax_gain[2]; 15087 u16 regval[4]; 15088 15089 if (pi->phyhang_avoid) 15090 wlc_phy_stay_in_carriersearch_nphy(pi, true); 15091 15092 if (pi->nphy_gain_boost) { 15093 if ((CHSPEC_IS2G(pi->radio_chanspec))) { 15094 15095 gain_delta[0] = 6; 15096 gain_delta[1] = 6; 15097 } else { 15098 15099 curr_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 15100 gain_delta[0] = 15101 (s16) 15102 PHY_HW_ROUND(((nphy_lnagain_est0[0] * 15103 curr_channel) + 15104 nphy_lnagain_est0[1]), 13); 15105 gain_delta[1] = 15106 (s16) 15107 PHY_HW_ROUND(((nphy_lnagain_est1[0] * 15108 curr_channel) + 15109 nphy_lnagain_est1[1]), 13); 15110 } 15111 } else { 15112 15113 gain_delta[0] = 0; 15114 gain_delta[1] = 0; 15115 } 15116 15117 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 15118 if (pi->nphy_elna_gain_config) { 15119 15120 regval[0] = nphy_def_lnagains[2] + gain_delta[core]; 15121 regval[1] = nphy_def_lnagains[3] + gain_delta[core]; 15122 regval[2] = nphy_def_lnagains[3] + gain_delta[core]; 15123 regval[3] = nphy_def_lnagains[3] + gain_delta[core]; 15124 } else { 15125 for (ctr = 0; ctr < 4; ctr++) 15126 regval[ctr] = 15127 nphy_def_lnagains[ctr] + 15128 gain_delta[core]; 15129 } 15130 wlc_phy_table_write_nphy(pi, core, 4, 8, 16, regval); 15131 15132 minmax_gain[core] = 15133 (u16) (nphy_def_lnagains[2] + gain_delta[core] + 4); 15134 } 15135 15136 mod_phy_reg(pi, 0x1e, (0xff << 0), (minmax_gain[0] << 0)); 15137 mod_phy_reg(pi, 0x34, (0xff << 0), (minmax_gain[1] << 0)); 15138 15139 if (pi->phyhang_avoid) 15140 wlc_phy_stay_in_carriersearch_nphy(pi, false); 15141} 15142 15143static void 15144wlc_phy_war_force_trsw_to_R_cliplo_nphy(struct brcms_phy *pi, u8 core) 15145{ 15146 if (core == PHY_CORE_0) { 15147 write_phy_reg(pi, 0x38, 0x4); 15148 if (CHSPEC_IS2G(pi->radio_chanspec)) 15149 write_phy_reg(pi, 0x37, 0x0060); 15150 else 15151 write_phy_reg(pi, 0x37, 0x1080); 15152 } else if (core == PHY_CORE_1) { 15153 write_phy_reg(pi, 0x2ae, 0x4); 15154 if (CHSPEC_IS2G(pi->radio_chanspec)) 15155 write_phy_reg(pi, 0x2ad, 0x0060); 15156 else 15157 write_phy_reg(pi, 0x2ad, 0x1080); 15158 } 15159} 15160 15161static void wlc_phy_war_txchain_upd_nphy(struct brcms_phy *pi, u8 txchain) 15162{ 15163 u8 txchain0, txchain1; 15164 15165 txchain0 = txchain & 0x1; 15166 txchain1 = (txchain & 0x2) >> 1; 15167 if (!txchain0) 15168 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 15169 15170 if (!txchain1) 15171 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 15172} 15173 15174static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi) 15175{ 15176 s8 lna1_gain_db[] = { 8, 13, 17, 22 }; 15177 s8 lna2_gain_db[] = { -2, 7, 11, 15 }; 15178 s8 tia_gain_db[] = { -4, -1, 2, 5, 5, 5, 5, 5, 5, 5 }; 15179 s8 tia_gainbits[] = { 15180 0x0, 0x01, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15181 15182 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15183 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15184 15185 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15186 15187 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3c << 0)); 15188 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3c << 0)); 15189 15190 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x8, 8, 15191 lna1_gain_db); 15192 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x8, 8, 15193 lna1_gain_db); 15194 15195 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 8, 15196 lna2_gain_db); 15197 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 8, 15198 lna2_gain_db); 15199 15200 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15201 tia_gain_db); 15202 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15203 tia_gain_db); 15204 15205 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15206 tia_gainbits); 15207 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15208 tia_gainbits); 15209 15210 write_phy_reg(pi, 0x37, 0x74); 15211 write_phy_reg(pi, 0x2ad, 0x74); 15212 write_phy_reg(pi, 0x38, 0x18); 15213 write_phy_reg(pi, 0x2ae, 0x18); 15214 15215 write_phy_reg(pi, 0x2b, 0xe8); 15216 write_phy_reg(pi, 0x41, 0xe8); 15217 15218 if (CHSPEC_IS20(pi->radio_chanspec)) { 15219 15220 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x12 << 0)); 15221 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x12 << 0)); 15222 } else { 15223 15224 mod_phy_reg(pi, 0x300, (0x3f << 0), (0x10 << 0)); 15225 mod_phy_reg(pi, 0x301, (0x3f << 0), (0x10 << 0)); 15226 } 15227} 15228 15229static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi) 15230{ 15231 u16 currband; 15232 static const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 }; 15233 const s8 *lna1_gain_db = NULL; 15234 const s8 *lna1_gain_db_2 = NULL; 15235 const s8 *lna2_gain_db = NULL; 15236 static const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 }; 15237 const s8 *tia_gain_db; 15238 static const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 }; 15239 const s8 *tia_gainbits; 15240 static const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f }; 15241 const u16 *rfseq_init_gain; 15242 u16 init_gaincode; 15243 u16 clip1hi_gaincode; 15244 u16 clip1md_gaincode = 0; 15245 u16 clip1md_gaincode_B; 15246 u16 clip1lo_gaincode; 15247 u16 clip1lo_gaincode_B; 15248 u8 crsminl_th = 0; 15249 u8 crsminu_th; 15250 u16 nbclip_th = 0; 15251 u8 w1clip_th; 15252 u16 freq; 15253 s8 nvar_baseline_offset0 = 0, nvar_baseline_offset1 = 0; 15254 u8 chg_nbclip_th = 0; 15255 15256 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15257 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15258 15259 currband = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15260 if (currband == 0) { 15261 15262 lna1_gain_db = lna1G_gain_db_rev7; 15263 15264 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15265 lna1_gain_db); 15266 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15267 lna1_gain_db); 15268 15269 mod_phy_reg(pi, 0x283, (0xff << 0), (0x40 << 0)); 15270 15271 if (CHSPEC_IS40(pi->radio_chanspec)) { 15272 mod_phy_reg(pi, 0x280, (0xff << 0), (0x3e << 0)); 15273 mod_phy_reg(pi, 0x283, (0xff << 0), (0x3e << 0)); 15274 } 15275 15276 mod_phy_reg(pi, 0x289, (0xff << 0), (0x46 << 0)); 15277 15278 if (CHSPEC_IS20(pi->radio_chanspec)) { 15279 mod_phy_reg(pi, 0x300, (0x3f << 0), (13 << 0)); 15280 mod_phy_reg(pi, 0x301, (0x3f << 0), (13 << 0)); 15281 } 15282 } else { 15283 15284 init_gaincode = 0x9e; 15285 clip1hi_gaincode = 0x9e; 15286 clip1md_gaincode_B = 0x24; 15287 clip1lo_gaincode = 0x8a; 15288 clip1lo_gaincode_B = 8; 15289 rfseq_init_gain = rfseqA_init_gain_rev7; 15290 15291 tia_gain_db = tiaA_gain_db_rev7; 15292 tia_gainbits = tiaA_gainbits_rev7; 15293 15294 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 15295 if (CHSPEC_IS20(pi->radio_chanspec)) { 15296 15297 w1clip_th = 25; 15298 clip1md_gaincode = 0x82; 15299 15300 if ((freq <= 5080) || (freq == 5825)) { 15301 15302 static const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 }; 15303 static const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25}; 15304 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15305 15306 crsminu_th = 0x3e; 15307 lna1_gain_db = lna1A_gain_db_rev7; 15308 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15309 lna2_gain_db = lna2A_gain_db_rev7; 15310 } else if ((freq >= 5500) && (freq <= 5700)) { 15311 15312 static const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 }; 15313 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15314 static const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 }; 15315 15316 crsminu_th = 0x45; 15317 clip1md_gaincode_B = 0x14; 15318 nbclip_th = 0xff; 15319 chg_nbclip_th = 1; 15320 lna1_gain_db = lna1A_gain_db_rev7; 15321 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15322 lna2_gain_db = lna2A_gain_db_rev7; 15323 } else { 15324 15325 static const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 }; 15326 static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26}; 15327 static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 }; 15328 15329 crsminu_th = 0x41; 15330 lna1_gain_db = lna1A_gain_db_rev7; 15331 lna1_gain_db_2 = lna1A_gain_db_2_rev7; 15332 lna2_gain_db = lna2A_gain_db_rev7; 15333 } 15334 15335 if (freq <= 4920) { 15336 nvar_baseline_offset0 = 5; 15337 nvar_baseline_offset1 = 5; 15338 } else if ((freq > 4920) && (freq <= 5320)) { 15339 nvar_baseline_offset0 = 3; 15340 nvar_baseline_offset1 = 5; 15341 } else if ((freq > 5320) && (freq <= 5700)) { 15342 nvar_baseline_offset0 = 3; 15343 nvar_baseline_offset1 = 2; 15344 } else { 15345 nvar_baseline_offset0 = 4; 15346 nvar_baseline_offset1 = 0; 15347 } 15348 } else { 15349 15350 crsminu_th = 0x3a; 15351 crsminl_th = 0x3a; 15352 w1clip_th = 20; 15353 15354 if ((freq >= 4920) && (freq <= 5320)) { 15355 nvar_baseline_offset0 = 4; 15356 nvar_baseline_offset1 = 5; 15357 } else if ((freq > 5320) && (freq <= 5550)) { 15358 nvar_baseline_offset0 = 4; 15359 nvar_baseline_offset1 = 2; 15360 } else { 15361 nvar_baseline_offset0 = 5; 15362 nvar_baseline_offset1 = 3; 15363 } 15364 } 15365 15366 write_phy_reg(pi, 0x20, init_gaincode); 15367 write_phy_reg(pi, 0x2a7, init_gaincode); 15368 15369 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15370 pi->pubpi.phy_corenum, 0x106, 16, 15371 rfseq_init_gain); 15372 15373 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15374 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15375 15376 write_phy_reg(pi, 0x36, clip1md_gaincode_B); 15377 write_phy_reg(pi, 0x2ac, clip1md_gaincode_B); 15378 15379 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15380 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15381 write_phy_reg(pi, 0x38, clip1lo_gaincode_B); 15382 write_phy_reg(pi, 0x2ae, clip1lo_gaincode_B); 15383 15384 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 8, 15385 tia_gain_db); 15386 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 8, 15387 tia_gain_db); 15388 15389 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 8, 15390 tia_gainbits); 15391 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 8, 15392 tia_gainbits); 15393 15394 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15395 15396 if (chg_nbclip_th == 1) { 15397 write_phy_reg(pi, 0x2b, nbclip_th); 15398 write_phy_reg(pi, 0x41, nbclip_th); 15399 } 15400 15401 mod_phy_reg(pi, 0x300, (0x3f << 0), (w1clip_th << 0)); 15402 mod_phy_reg(pi, 0x301, (0x3f << 0), (w1clip_th << 0)); 15403 15404 mod_phy_reg(pi, 0x2e4, 15405 (0x3f << 0), (nvar_baseline_offset0 << 0)); 15406 15407 mod_phy_reg(pi, 0x2e4, 15408 (0x3f << 6), (nvar_baseline_offset1 << 6)); 15409 15410 if (CHSPEC_IS20(pi->radio_chanspec)) { 15411 15412 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 8, 15413 lna1_gain_db); 15414 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 8, 15415 lna1_gain_db_2); 15416 15417 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15418 8, lna2_gain_db); 15419 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15420 8, lna2_gain_db); 15421 15422 write_phy_reg(pi, 0x24, clip1md_gaincode); 15423 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15424 } else { 15425 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15426 } 15427 } 15428} 15429 15430static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi) 15431{ 15432 u16 w1th, hpf_code, currband; 15433 int ctr; 15434 u8 rfseq_updategainu_events[] = { 15435 NPHY_RFSEQ_CMD_RX_GAIN, 15436 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 15437 NPHY_RFSEQ_CMD_SET_HPF_BW 15438 }; 15439 static const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 }; 15440 static const s8 lna1G_gain_db[] = { 7, 11, 16, 23 }; 15441 static const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 }; 15442 static const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 }; 15443 static const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 }; 15444 static const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 }; 15445 static const s8 lna1A_gain_db[] = { 7, 11, 17, 23 }; 15446 static const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 }; 15447 static const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 }; 15448 static const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 }; 15449 const s8 *lna1_gain_db = NULL; 15450 static const s8 lna2G_gain_db[] = { -5, 6, 10, 14 }; 15451 static const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 }; 15452 static const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 }; 15453 static const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 }; 15454 static const s8 lna2A_gain_db[] = { -6, 2, 6, 10 }; 15455 static const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 }; 15456 static const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 }; 15457 static const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 }; 15458 const s8 *lna2_gain_db = NULL; 15459 static const s8 tiaG_gain_db[] = { 15460 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A }; 15461 static const s8 tiaA_gain_db[] = { 15462 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 }; 15463 static const s8 tiaA_gain_db_rev4[] = { 15464 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15465 static const s8 tiaA_gain_db_rev5[] = { 15466 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15467 static const s8 tiaA_gain_db_rev6[] = { 15468 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d }; 15469 const s8 *tia_gain_db; 15470 static const s8 tiaG_gainbits[] = { 15471 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 }; 15472 static const s8 tiaA_gainbits[] = { 15473 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 }; 15474 static const s8 tiaA_gainbits_rev4[] = { 15475 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15476 static const s8 tiaA_gainbits_rev5[] = { 15477 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15478 static const s8 tiaA_gainbits_rev6[] = { 15479 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 }; 15480 const s8 *tia_gainbits; 15481 static const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 }; 15482 static const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 }; 15483 static const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f }; 15484 static const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f }; 15485 static const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f }; 15486 static const u16 rfseqG_init_gain_rev5_elna[] = { 15487 0x013f, 0x013f, 0x013f, 0x013f }; 15488 static const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f }; 15489 static const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f }; 15490 static const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f }; 15491 static const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f }; 15492 static const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f }; 15493 static const u16 rfseqA_init_gain_rev4_elna[] = { 15494 0x314f, 0x314f, 0x314f, 0x314f }; 15495 static const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f }; 15496 static const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f }; 15497 const u16 *rfseq_init_gain; 15498 u16 initG_gaincode = 0x627e; 15499 u16 initG_gaincode_rev4 = 0x527e; 15500 u16 initG_gaincode_rev5 = 0x427e; 15501 u16 initG_gaincode_rev5_elna = 0x027e; 15502 u16 initG_gaincode_rev6 = 0x527e; 15503 u16 initG_gaincode_rev6_224B0 = 0x427e; 15504 u16 initG_gaincode_rev6_elna = 0x127e; 15505 u16 initA_gaincode = 0x52de; 15506 u16 initA_gaincode_rev4 = 0x629e; 15507 u16 initA_gaincode_rev4_elna = 0x329e; 15508 u16 initA_gaincode_rev5 = 0x729e; 15509 u16 initA_gaincode_rev6 = 0x729e; 15510 u16 init_gaincode; 15511 u16 clip1hiG_gaincode = 0x107e; 15512 u16 clip1hiG_gaincode_rev4 = 0x007e; 15513 u16 clip1hiG_gaincode_rev5 = 0x1076; 15514 u16 clip1hiG_gaincode_rev6 = 0x007e; 15515 u16 clip1hiA_gaincode = 0x00de; 15516 u16 clip1hiA_gaincode_rev4 = 0x029e; 15517 u16 clip1hiA_gaincode_rev5 = 0x029e; 15518 u16 clip1hiA_gaincode_rev6 = 0x029e; 15519 u16 clip1hi_gaincode; 15520 u16 clip1mdG_gaincode = 0x0066; 15521 u16 clip1mdA_gaincode = 0x00ca; 15522 u16 clip1mdA_gaincode_rev4 = 0x1084; 15523 u16 clip1mdA_gaincode_rev5 = 0x2084; 15524 u16 clip1mdA_gaincode_rev6 = 0x2084; 15525 u16 clip1md_gaincode = 0; 15526 u16 clip1loG_gaincode = 0x0074; 15527 static const u16 clip1loG_gaincode_rev5[] = { 15528 0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c 15529 }; 15530 static const u16 clip1loG_gaincode_rev6[] = { 15531 0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e 15532 }; 15533 u16 clip1loG_gaincode_rev6_224B0 = 0x1074; 15534 u16 clip1loA_gaincode = 0x00cc; 15535 u16 clip1loA_gaincode_rev4 = 0x0086; 15536 u16 clip1loA_gaincode_rev5 = 0x2086; 15537 u16 clip1loA_gaincode_rev6 = 0x2086; 15538 u16 clip1lo_gaincode; 15539 u8 crsminG_th = 0x18; 15540 u8 crsminG_th_rev5 = 0x18; 15541 u8 crsminG_th_rev6 = 0x18; 15542 u8 crsminA_th = 0x1e; 15543 u8 crsminA_th_rev4 = 0x24; 15544 u8 crsminA_th_rev5 = 0x24; 15545 u8 crsminA_th_rev6 = 0x24; 15546 u8 crsmin_th; 15547 u8 crsminlG_th = 0x18; 15548 u8 crsminlG_th_rev5 = 0x18; 15549 u8 crsminlG_th_rev6 = 0x18; 15550 u8 crsminlA_th = 0x1e; 15551 u8 crsminlA_th_rev4 = 0x24; 15552 u8 crsminlA_th_rev5 = 0x24; 15553 u8 crsminlA_th_rev6 = 0x24; 15554 u8 crsminl_th = 0; 15555 u8 crsminuG_th = 0x18; 15556 u8 crsminuG_th_rev5 = 0x18; 15557 u8 crsminuG_th_rev6 = 0x18; 15558 u8 crsminuA_th = 0x1e; 15559 u8 crsminuA_th_rev4 = 0x24; 15560 u8 crsminuA_th_rev5 = 0x24; 15561 u8 crsminuA_th_rev6 = 0x24; 15562 u8 crsminuA_th_rev6_224B0 = 0x2d; 15563 u8 crsminu_th; 15564 u16 nbclipG_th = 0x20d; 15565 u16 nbclipG_th_rev4 = 0x1a1; 15566 u16 nbclipG_th_rev5 = 0x1d0; 15567 u16 nbclipG_th_rev6 = 0x1d0; 15568 u16 nbclipA_th = 0x1a1; 15569 u16 nbclipA_th_rev4 = 0x107; 15570 u16 nbclipA_th_rev5 = 0x0a9; 15571 u16 nbclipA_th_rev6 = 0x0f0; 15572 u16 nbclip_th = 0; 15573 u8 w1clipG_th = 5; 15574 u8 w1clipG_th_rev5 = 9; 15575 u8 w1clipG_th_rev6 = 5; 15576 u8 w1clipA_th = 25, w1clip_th; 15577 u8 rssi_gain_default = 0x50; 15578 u8 rssiG_gain_rev6_224B0 = 0x50; 15579 u8 rssiA_gain_rev5 = 0x90; 15580 u8 rssiA_gain_rev6 = 0x90; 15581 u8 rssi_gain; 15582 u16 regval[21]; 15583 u8 triso; 15584 15585 triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? pi->srom_fem5g.triso : 15586 pi->srom_fem2g.triso; 15587 15588 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 15589 if (pi->pubpi.radiorev == 5) { 15590 wlc_phy_workarounds_nphy_gainctrl_2057_rev5(pi); 15591 } else if (pi->pubpi.radiorev == 7) { 15592 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15593 15594 mod_phy_reg(pi, 0x283, (0xff << 0), (0x44 << 0)); 15595 mod_phy_reg(pi, 0x280, (0xff << 0), (0x44 << 0)); 15596 15597 } else if ((pi->pubpi.radiorev == 3) 15598 || (pi->pubpi.radiorev == 8)) { 15599 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15600 15601 if (pi->pubpi.radiorev == 8) { 15602 mod_phy_reg(pi, 0x283, 15603 (0xff << 0), (0x44 << 0)); 15604 mod_phy_reg(pi, 0x280, 15605 (0xff << 0), (0x44 << 0)); 15606 } 15607 } else { 15608 wlc_phy_workarounds_nphy_gainctrl_2057_rev6(pi); 15609 } 15610 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 15611 15612 mod_phy_reg(pi, 0xa0, (0x1 << 6), (1 << 6)); 15613 15614 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15615 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15616 15617 currband = 15618 read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 15619 if (currband == 0) { 15620 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15621 if (pi->pubpi.radiorev == 11) { 15622 lna1_gain_db = lna1G_gain_db_rev6_224B0; 15623 lna2_gain_db = lna2G_gain_db_rev6_224B0; 15624 rfseq_init_gain = 15625 rfseqG_init_gain_rev6_224B0; 15626 init_gaincode = 15627 initG_gaincode_rev6_224B0; 15628 clip1hi_gaincode = 15629 clip1hiG_gaincode_rev6; 15630 clip1lo_gaincode = 15631 clip1loG_gaincode_rev6_224B0; 15632 nbclip_th = nbclipG_th_rev6; 15633 w1clip_th = w1clipG_th_rev6; 15634 crsmin_th = crsminG_th_rev6; 15635 crsminl_th = crsminlG_th_rev6; 15636 crsminu_th = crsminuG_th_rev6; 15637 rssi_gain = rssiG_gain_rev6_224B0; 15638 } else { 15639 lna1_gain_db = lna1G_gain_db_rev6; 15640 lna2_gain_db = lna2G_gain_db_rev6; 15641 if (pi->sh->boardflags & BFL_EXTLNA) { 15642 15643 rfseq_init_gain = 15644 rfseqG_init_gain_rev6_elna; 15645 init_gaincode = 15646 initG_gaincode_rev6_elna; 15647 } else { 15648 rfseq_init_gain = 15649 rfseqG_init_gain_rev6; 15650 init_gaincode = 15651 initG_gaincode_rev6; 15652 } 15653 clip1hi_gaincode = 15654 clip1hiG_gaincode_rev6; 15655 switch (triso) { 15656 case 0: 15657 clip1lo_gaincode = 15658 clip1loG_gaincode_rev6 15659 [0]; 15660 break; 15661 case 1: 15662 clip1lo_gaincode = 15663 clip1loG_gaincode_rev6 15664 [1]; 15665 break; 15666 case 2: 15667 clip1lo_gaincode = 15668 clip1loG_gaincode_rev6 15669 [2]; 15670 break; 15671 case 3: 15672 default: 15673 15674 clip1lo_gaincode = 15675 clip1loG_gaincode_rev6 15676 [3]; 15677 break; 15678 case 4: 15679 clip1lo_gaincode = 15680 clip1loG_gaincode_rev6 15681 [4]; 15682 break; 15683 case 5: 15684 clip1lo_gaincode = 15685 clip1loG_gaincode_rev6 15686 [5]; 15687 break; 15688 case 6: 15689 clip1lo_gaincode = 15690 clip1loG_gaincode_rev6 15691 [6]; 15692 break; 15693 case 7: 15694 clip1lo_gaincode = 15695 clip1loG_gaincode_rev6 15696 [7]; 15697 break; 15698 } 15699 nbclip_th = nbclipG_th_rev6; 15700 w1clip_th = w1clipG_th_rev6; 15701 crsmin_th = crsminG_th_rev6; 15702 crsminl_th = crsminlG_th_rev6; 15703 crsminu_th = crsminuG_th_rev6; 15704 rssi_gain = rssi_gain_default; 15705 } 15706 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15707 lna1_gain_db = lna1G_gain_db_rev5; 15708 lna2_gain_db = lna2G_gain_db_rev5; 15709 if (pi->sh->boardflags & BFL_EXTLNA) { 15710 15711 rfseq_init_gain = 15712 rfseqG_init_gain_rev5_elna; 15713 init_gaincode = 15714 initG_gaincode_rev5_elna; 15715 } else { 15716 rfseq_init_gain = rfseqG_init_gain_rev5; 15717 init_gaincode = initG_gaincode_rev5; 15718 } 15719 clip1hi_gaincode = clip1hiG_gaincode_rev5; 15720 switch (triso) { 15721 case 0: 15722 clip1lo_gaincode = 15723 clip1loG_gaincode_rev5[0]; 15724 break; 15725 case 1: 15726 clip1lo_gaincode = 15727 clip1loG_gaincode_rev5[1]; 15728 break; 15729 case 2: 15730 clip1lo_gaincode = 15731 clip1loG_gaincode_rev5[2]; 15732 break; 15733 case 3: 15734 15735 clip1lo_gaincode = 15736 clip1loG_gaincode_rev5[3]; 15737 break; 15738 case 4: 15739 clip1lo_gaincode = 15740 clip1loG_gaincode_rev5[4]; 15741 break; 15742 case 5: 15743 clip1lo_gaincode = 15744 clip1loG_gaincode_rev5[5]; 15745 break; 15746 case 6: 15747 clip1lo_gaincode = 15748 clip1loG_gaincode_rev5[6]; 15749 break; 15750 case 7: 15751 clip1lo_gaincode = 15752 clip1loG_gaincode_rev5[7]; 15753 break; 15754 default: 15755 clip1lo_gaincode = 15756 clip1loG_gaincode_rev5[3]; 15757 break; 15758 } 15759 nbclip_th = nbclipG_th_rev5; 15760 w1clip_th = w1clipG_th_rev5; 15761 crsmin_th = crsminG_th_rev5; 15762 crsminl_th = crsminlG_th_rev5; 15763 crsminu_th = crsminuG_th_rev5; 15764 rssi_gain = rssi_gain_default; 15765 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15766 lna1_gain_db = lna1G_gain_db_rev4; 15767 lna2_gain_db = lna2G_gain_db; 15768 rfseq_init_gain = rfseqG_init_gain_rev4; 15769 init_gaincode = initG_gaincode_rev4; 15770 clip1hi_gaincode = clip1hiG_gaincode_rev4; 15771 clip1lo_gaincode = clip1loG_gaincode; 15772 nbclip_th = nbclipG_th_rev4; 15773 w1clip_th = w1clipG_th; 15774 crsmin_th = crsminG_th; 15775 crsminl_th = crsminlG_th; 15776 crsminu_th = crsminuG_th; 15777 rssi_gain = rssi_gain_default; 15778 } else { 15779 lna1_gain_db = lna1G_gain_db; 15780 lna2_gain_db = lna2G_gain_db; 15781 rfseq_init_gain = rfseqG_init_gain; 15782 init_gaincode = initG_gaincode; 15783 clip1hi_gaincode = clip1hiG_gaincode; 15784 clip1lo_gaincode = clip1loG_gaincode; 15785 nbclip_th = nbclipG_th; 15786 w1clip_th = w1clipG_th; 15787 crsmin_th = crsminG_th; 15788 crsminl_th = crsminlG_th; 15789 crsminu_th = crsminuG_th; 15790 rssi_gain = rssi_gain_default; 15791 } 15792 tia_gain_db = tiaG_gain_db; 15793 tia_gainbits = tiaG_gainbits; 15794 clip1md_gaincode = clip1mdG_gaincode; 15795 } else { 15796 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 15797 lna1_gain_db = lna1A_gain_db_rev6; 15798 lna2_gain_db = lna2A_gain_db_rev6; 15799 tia_gain_db = tiaA_gain_db_rev6; 15800 tia_gainbits = tiaA_gainbits_rev6; 15801 rfseq_init_gain = rfseqA_init_gain_rev6; 15802 init_gaincode = initA_gaincode_rev6; 15803 clip1hi_gaincode = clip1hiA_gaincode_rev6; 15804 clip1md_gaincode = clip1mdA_gaincode_rev6; 15805 clip1lo_gaincode = clip1loA_gaincode_rev6; 15806 crsmin_th = crsminA_th_rev6; 15807 crsminl_th = crsminlA_th_rev6; 15808 if ((pi->pubpi.radiorev == 11) && 15809 (CHSPEC_IS40(pi->radio_chanspec) == 0)) 15810 crsminu_th = crsminuA_th_rev6_224B0; 15811 else 15812 crsminu_th = crsminuA_th_rev6; 15813 15814 nbclip_th = nbclipA_th_rev6; 15815 rssi_gain = rssiA_gain_rev6; 15816 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 15817 lna1_gain_db = lna1A_gain_db_rev5; 15818 lna2_gain_db = lna2A_gain_db_rev5; 15819 tia_gain_db = tiaA_gain_db_rev5; 15820 tia_gainbits = tiaA_gainbits_rev5; 15821 rfseq_init_gain = rfseqA_init_gain_rev5; 15822 init_gaincode = initA_gaincode_rev5; 15823 clip1hi_gaincode = clip1hiA_gaincode_rev5; 15824 clip1md_gaincode = clip1mdA_gaincode_rev5; 15825 clip1lo_gaincode = clip1loA_gaincode_rev5; 15826 crsmin_th = crsminA_th_rev5; 15827 crsminl_th = crsminlA_th_rev5; 15828 crsminu_th = crsminuA_th_rev5; 15829 nbclip_th = nbclipA_th_rev5; 15830 rssi_gain = rssiA_gain_rev5; 15831 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 15832 lna1_gain_db = lna1A_gain_db_rev4; 15833 lna2_gain_db = lna2A_gain_db_rev4; 15834 tia_gain_db = tiaA_gain_db_rev4; 15835 tia_gainbits = tiaA_gainbits_rev4; 15836 if (pi->sh->boardflags & BFL_EXTLNA_5GHz) { 15837 15838 rfseq_init_gain = 15839 rfseqA_init_gain_rev4_elna; 15840 init_gaincode = 15841 initA_gaincode_rev4_elna; 15842 } else { 15843 rfseq_init_gain = rfseqA_init_gain_rev4; 15844 init_gaincode = initA_gaincode_rev4; 15845 } 15846 clip1hi_gaincode = clip1hiA_gaincode_rev4; 15847 clip1md_gaincode = clip1mdA_gaincode_rev4; 15848 clip1lo_gaincode = clip1loA_gaincode_rev4; 15849 crsmin_th = crsminA_th_rev4; 15850 crsminl_th = crsminlA_th_rev4; 15851 crsminu_th = crsminuA_th_rev4; 15852 nbclip_th = nbclipA_th_rev4; 15853 rssi_gain = rssi_gain_default; 15854 } else { 15855 lna1_gain_db = lna1A_gain_db; 15856 lna2_gain_db = lna2A_gain_db; 15857 tia_gain_db = tiaA_gain_db; 15858 tia_gainbits = tiaA_gainbits; 15859 rfseq_init_gain = rfseqA_init_gain; 15860 init_gaincode = initA_gaincode; 15861 clip1hi_gaincode = clip1hiA_gaincode; 15862 clip1md_gaincode = clip1mdA_gaincode; 15863 clip1lo_gaincode = clip1loA_gaincode; 15864 crsmin_th = crsminA_th; 15865 crsminl_th = crsminlA_th; 15866 crsminu_th = crsminuA_th; 15867 nbclip_th = nbclipA_th; 15868 rssi_gain = rssi_gain_default; 15869 } 15870 w1clip_th = w1clipA_th; 15871 } 15872 15873 write_radio_reg(pi, 15874 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15875 RADIO_2056_RX0), 0x17); 15876 write_radio_reg(pi, 15877 (RADIO_2056_RX_BIASPOLE_LNAG1_IDAC | 15878 RADIO_2056_RX1), 0x17); 15879 15880 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX0), 15881 0xf0); 15882 write_radio_reg(pi, (RADIO_2056_RX_LNAG2_IDAC | RADIO_2056_RX1), 15883 0xf0); 15884 15885 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX0), 15886 0x0); 15887 write_radio_reg(pi, (RADIO_2056_RX_RSSI_POLE | RADIO_2056_RX1), 15888 0x0); 15889 15890 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX0), 15891 rssi_gain); 15892 write_radio_reg(pi, (RADIO_2056_RX_RSSI_GAIN | RADIO_2056_RX1), 15893 rssi_gain); 15894 15895 write_radio_reg(pi, 15896 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15897 RADIO_2056_RX0), 0x17); 15898 write_radio_reg(pi, 15899 (RADIO_2056_RX_BIASPOLE_LNAA1_IDAC | 15900 RADIO_2056_RX1), 0x17); 15901 15902 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX0), 15903 0xFF); 15904 write_radio_reg(pi, (RADIO_2056_RX_LNAA2_IDAC | RADIO_2056_RX1), 15905 0xFF); 15906 15907 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 8, 15908 8, lna1_gain_db); 15909 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 8, 15910 8, lna1_gain_db); 15911 15912 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 4, 0x10, 15913 8, lna2_gain_db); 15914 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 4, 0x10, 15915 8, lna2_gain_db); 15916 15917 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 10, 0x20, 15918 8, tia_gain_db); 15919 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 10, 0x20, 15920 8, tia_gain_db); 15921 15922 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 10, 0x20, 15923 8, tia_gainbits); 15924 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 10, 0x20, 15925 8, tia_gainbits); 15926 15927 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN1, 6, 0x40, 15928 8, &lpf_gain_db); 15929 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAIN2, 6, 0x40, 15930 8, &lpf_gain_db); 15931 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS1, 6, 0x40, 15932 8, &lpf_gainbits); 15933 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_GAINBITS2, 6, 0x40, 15934 8, &lpf_gainbits); 15935 15936 write_phy_reg(pi, 0x20, init_gaincode); 15937 write_phy_reg(pi, 0x2a7, init_gaincode); 15938 15939 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 15940 pi->pubpi.phy_corenum, 0x106, 16, 15941 rfseq_init_gain); 15942 15943 write_phy_reg(pi, 0x22, clip1hi_gaincode); 15944 write_phy_reg(pi, 0x2a9, clip1hi_gaincode); 15945 15946 write_phy_reg(pi, 0x24, clip1md_gaincode); 15947 write_phy_reg(pi, 0x2ab, clip1md_gaincode); 15948 15949 write_phy_reg(pi, 0x37, clip1lo_gaincode); 15950 write_phy_reg(pi, 0x2ad, clip1lo_gaincode); 15951 15952 mod_phy_reg(pi, 0x27d, (0xff << 0), (crsmin_th << 0)); 15953 mod_phy_reg(pi, 0x280, (0xff << 0), (crsminl_th << 0)); 15954 mod_phy_reg(pi, 0x283, (0xff << 0), (crsminu_th << 0)); 15955 15956 write_phy_reg(pi, 0x2b, nbclip_th); 15957 write_phy_reg(pi, 0x41, nbclip_th); 15958 15959 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1clip_th << 0)); 15960 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1clip_th << 0)); 15961 15962 write_phy_reg(pi, 0x150, 0x809c); 15963 15964 } else { 15965 15966 mod_phy_reg(pi, 0x1c, (0x1 << 13), (1 << 13)); 15967 mod_phy_reg(pi, 0x32, (0x1 << 13), (1 << 13)); 15968 15969 write_phy_reg(pi, 0x2b, 0x84); 15970 write_phy_reg(pi, 0x41, 0x84); 15971 15972 if (CHSPEC_IS20(pi->radio_chanspec)) { 15973 write_phy_reg(pi, 0x6b, 0x2b); 15974 write_phy_reg(pi, 0x6c, 0x2b); 15975 write_phy_reg(pi, 0x6d, 0x9); 15976 write_phy_reg(pi, 0x6e, 0x9); 15977 } 15978 15979 w1th = NPHY_RSSICAL_W1_TARGET - 4; 15980 mod_phy_reg(pi, 0x27, (0x3f << 0), (w1th << 0)); 15981 mod_phy_reg(pi, 0x3d, (0x3f << 0), (w1th << 0)); 15982 15983 if (CHSPEC_IS20(pi->radio_chanspec)) { 15984 mod_phy_reg(pi, 0x1c, (0x1f << 0), (0x1 << 0)); 15985 mod_phy_reg(pi, 0x32, (0x1f << 0), (0x1 << 0)); 15986 15987 mod_phy_reg(pi, 0x1d, (0x1f << 0), (0x1 << 0)); 15988 mod_phy_reg(pi, 0x33, (0x1f << 0), (0x1 << 0)); 15989 } 15990 15991 write_phy_reg(pi, 0x150, 0x809c); 15992 15993 if (pi->nphy_gain_boost) 15994 if ((CHSPEC_IS2G(pi->radio_chanspec)) && 15995 (CHSPEC_IS40(pi->radio_chanspec))) 15996 hpf_code = 4; 15997 else 15998 hpf_code = 5; 15999 else if (CHSPEC_IS40(pi->radio_chanspec)) 16000 hpf_code = 6; 16001 else 16002 hpf_code = 7; 16003 16004 mod_phy_reg(pi, 0x20, (0x1f << 7), (hpf_code << 7)); 16005 mod_phy_reg(pi, 0x36, (0x1f << 7), (hpf_code << 7)); 16006 16007 for (ctr = 0; ctr < 4; ctr++) 16008 regval[ctr] = (hpf_code << 8) | 0x7c; 16009 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16010 16011 wlc_phy_adjust_lnagaintbl_nphy(pi); 16012 16013 if (pi->nphy_elna_gain_config) { 16014 regval[0] = 0; 16015 regval[1] = 1; 16016 regval[2] = 1; 16017 regval[3] = 1; 16018 wlc_phy_table_write_nphy(pi, 2, 4, 8, 16, regval); 16019 wlc_phy_table_write_nphy(pi, 3, 4, 8, 16, regval); 16020 16021 for (ctr = 0; ctr < 4; ctr++) 16022 regval[ctr] = (hpf_code << 8) | 0x74; 16023 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); 16024 } 16025 16026 if (NREV_IS(pi->pubpi.phy_rev, 2)) { 16027 for (ctr = 0; ctr < 21; ctr++) 16028 regval[ctr] = 3 * ctr; 16029 wlc_phy_table_write_nphy(pi, 0, 21, 32, 16, regval); 16030 wlc_phy_table_write_nphy(pi, 1, 21, 32, 16, regval); 16031 16032 for (ctr = 0; ctr < 21; ctr++) 16033 regval[ctr] = (u16) ctr; 16034 wlc_phy_table_write_nphy(pi, 2, 21, 32, 16, regval); 16035 wlc_phy_table_write_nphy(pi, 3, 21, 32, 16, regval); 16036 } 16037 16038 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_UPDATEGAINU, 16039 rfseq_updategainu_events, 16040 rfseq_updategainu_dlys, 16041 ARRAY_SIZE(rfseq_updategainu_events)); 16042 16043 mod_phy_reg(pi, 0x153, (0xff << 8), (90 << 8)); 16044 16045 if (CHSPEC_IS2G(pi->radio_chanspec)) 16046 mod_phy_reg(pi, 16047 (NPHY_TO_BPHY_OFF + BPHY_OPTIONAL_MODES), 16048 0x7f, 0x4); 16049 } 16050} 16051 16052static void wlc_phy_workarounds_nphy_rev7(struct brcms_phy *pi) 16053{ 16054 static const u8 rfseq_rx2tx_events_rev3_ipa[] = { 16055 NPHY_REV3_RFSEQ_CMD_NOP, 16056 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16057 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16058 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16059 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16060 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16061 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, 16062 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16063 NPHY_REV3_RFSEQ_CMD_END 16064 }; 16065 static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = 16066 { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; 16067 static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f }; 16068 u32 leg_data_weights; 16069 u8 chan_freq_range = 0; 16070 static const u16 dac_control = 0x0002; 16071 u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 }; 16072 u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 }; 16073 u16 aux_adc_gain_rev7[] = { 0x02, 0x02, 0x02, 0x02 }; 16074 s32 min_nvar_val = 0x18d; 16075 s32 min_nvar_offset_6mbps = 20; 16076 u8 pdetrange; 16077 u16 afectrl_adc_ctrl1_rev7 = 0x20; 16078 u16 afectrl_adc_ctrl2_rev7 = 0x0; 16079 u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77; 16080 u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77; 16081 u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77; 16082 static const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 }; 16083 static const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16084 static const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 }; 16085 u16 ipalvlshift_3p3_war_en = 0; 16086 u16 rccal_bcap_val, rccal_scap_val; 16087 u16 rccal_tx20_11b_bcap = 0; 16088 u16 rccal_tx20_11b_scap = 0; 16089 u16 rccal_tx20_11n_bcap = 0; 16090 u16 rccal_tx20_11n_scap = 0; 16091 u16 rccal_tx40_11n_bcap = 0; 16092 u16 rccal_tx40_11n_scap = 0; 16093 u16 rx2tx_lpf_rc_lut_tx20_11b = 0; 16094 u16 rx2tx_lpf_rc_lut_tx20_11n = 0; 16095 u16 rx2tx_lpf_rc_lut_tx40_11n = 0; 16096 u16 tx_lpf_bw_ofdm_20mhz = 0; 16097 u16 tx_lpf_bw_ofdm_40mhz = 0; 16098 u16 tx_lpf_bw_11b = 0; 16099 u16 ipa2g_mainbias, ipa2g_casconv, ipa2g_biasfilt; 16100 u16 txgm_idac_bleed = 0; 16101 bool rccal_ovrd = false; 16102 u16 freq; 16103 int coreNum; 16104 16105 16106 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 16107 mod_phy_reg(pi, 0x221, (0x1 << 4), (1 << 4)); 16108 16109 mod_phy_reg(pi, 0x160, (0x7f << 0), (32 << 0)); 16110 mod_phy_reg(pi, 0x160, (0x7f << 8), (39 << 8)); 16111 mod_phy_reg(pi, 0x161, (0x7f << 0), (46 << 0)); 16112 mod_phy_reg(pi, 0x161, (0x7f << 8), (51 << 8)); 16113 mod_phy_reg(pi, 0x162, (0x7f << 0), (55 << 0)); 16114 mod_phy_reg(pi, 0x162, (0x7f << 8), (58 << 8)); 16115 mod_phy_reg(pi, 0x163, (0x7f << 0), (60 << 0)); 16116 mod_phy_reg(pi, 0x163, (0x7f << 8), (62 << 8)); 16117 mod_phy_reg(pi, 0x164, (0x7f << 0), (62 << 0)); 16118 mod_phy_reg(pi, 0x164, (0x7f << 8), (63 << 8)); 16119 mod_phy_reg(pi, 0x165, (0x7f << 0), (63 << 0)); 16120 mod_phy_reg(pi, 0x165, (0x7f << 8), (64 << 8)); 16121 mod_phy_reg(pi, 0x166, (0x7f << 0), (64 << 0)); 16122 mod_phy_reg(pi, 0x166, (0x7f << 8), (64 << 8)); 16123 mod_phy_reg(pi, 0x167, (0x7f << 0), (64 << 0)); 16124 mod_phy_reg(pi, 0x167, (0x7f << 8), (64 << 8)); 16125 } 16126 16127 if (NREV_LE(pi->pubpi.phy_rev, 8)) { 16128 write_phy_reg(pi, 0x23f, 0x1b0); 16129 write_phy_reg(pi, 0x240, 0x1b0); 16130 } 16131 16132 if (NREV_GE(pi->pubpi.phy_rev, 8)) 16133 mod_phy_reg(pi, 0xbd, (0xff << 0), (114 << 0)); 16134 16135 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16136 &dac_control); 16137 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16138 &dac_control); 16139 16140 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16141 1, 0, 32, &leg_data_weights); 16142 leg_data_weights = leg_data_weights & 0xffffff; 16143 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16144 1, 0, 32, &leg_data_weights); 16145 16146 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 16147 2, 0x15e, 16, rfseq_rx2tx_dacbufpu_rev7); 16148 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x16e, 16, 16149 rfseq_rx2tx_dacbufpu_rev7); 16150 16151 if (PHY_IPA(pi)) 16152 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16153 rfseq_rx2tx_events_rev3_ipa, 16154 rfseq_rx2tx_dlys_rev3_ipa, 16155 ARRAY_SIZE 16156 (rfseq_rx2tx_events_rev3_ipa)); 16157 16158 mod_phy_reg(pi, 0x299, (0x3 << 14), (0x1 << 14)); 16159 mod_phy_reg(pi, 0x29d, (0x3 << 14), (0x1 << 14)); 16160 16161 tx_lpf_bw_ofdm_20mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x154); 16162 tx_lpf_bw_ofdm_40mhz = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x159); 16163 tx_lpf_bw_11b = wlc_phy_read_lpf_bw_ctl_nphy(pi, 0x152); 16164 16165 if (PHY_IPA(pi)) { 16166 16167 if (((pi->pubpi.radiorev == 5) 16168 && (CHSPEC_IS40(pi->radio_chanspec) == 1)) 16169 || (pi->pubpi.radiorev == 7) 16170 || (pi->pubpi.radiorev == 8)) { 16171 16172 rccal_bcap_val = 16173 read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL); 16174 rccal_scap_val = 16175 read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL); 16176 16177 rccal_tx20_11b_bcap = rccal_bcap_val; 16178 rccal_tx20_11b_scap = rccal_scap_val; 16179 16180 if ((pi->pubpi.radiorev == 5) && 16181 (CHSPEC_IS40(pi->radio_chanspec) == 1)) { 16182 16183 rccal_tx20_11n_bcap = rccal_bcap_val; 16184 rccal_tx20_11n_scap = rccal_scap_val; 16185 rccal_tx40_11n_bcap = 0xc; 16186 rccal_tx40_11n_scap = 0xc; 16187 16188 rccal_ovrd = true; 16189 16190 } else if ((pi->pubpi.radiorev == 7) 16191 || (pi->pubpi.radiorev == 8)) { 16192 16193 tx_lpf_bw_ofdm_20mhz = 4; 16194 tx_lpf_bw_11b = 1; 16195 16196 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16197 rccal_tx20_11n_bcap = 0xc; 16198 rccal_tx20_11n_scap = 0xc; 16199 rccal_tx40_11n_bcap = 0xa; 16200 rccal_tx40_11n_scap = 0xa; 16201 } else { 16202 rccal_tx20_11n_bcap = 0x14; 16203 rccal_tx20_11n_scap = 0x14; 16204 rccal_tx40_11n_bcap = 0xf; 16205 rccal_tx40_11n_scap = 0xf; 16206 } 16207 16208 rccal_ovrd = true; 16209 } 16210 } 16211 16212 } else { 16213 16214 if (pi->pubpi.radiorev == 5) { 16215 16216 tx_lpf_bw_ofdm_20mhz = 1; 16217 tx_lpf_bw_ofdm_40mhz = 3; 16218 16219 rccal_bcap_val = 16220 read_radio_reg(pi, RADIO_2057_RCCAL_BCAP_VAL); 16221 rccal_scap_val = 16222 read_radio_reg(pi, RADIO_2057_RCCAL_SCAP_VAL); 16223 16224 rccal_tx20_11b_bcap = rccal_bcap_val; 16225 rccal_tx20_11b_scap = rccal_scap_val; 16226 16227 rccal_tx20_11n_bcap = 0x13; 16228 rccal_tx20_11n_scap = 0x11; 16229 rccal_tx40_11n_bcap = 0x13; 16230 rccal_tx40_11n_scap = 0x11; 16231 16232 rccal_ovrd = true; 16233 } 16234 } 16235 16236 if (rccal_ovrd) { 16237 16238 rx2tx_lpf_rc_lut_tx20_11b = 16239 (rccal_tx20_11b_bcap << 8) | 16240 (rccal_tx20_11b_scap << 3) | tx_lpf_bw_11b; 16241 rx2tx_lpf_rc_lut_tx20_11n = 16242 (rccal_tx20_11n_bcap << 8) | 16243 (rccal_tx20_11n_scap << 3) | tx_lpf_bw_ofdm_20mhz; 16244 rx2tx_lpf_rc_lut_tx40_11n = 16245 (rccal_tx40_11n_bcap << 8) | 16246 (rccal_tx40_11n_scap << 3) | tx_lpf_bw_ofdm_40mhz; 16247 16248 for (coreNum = 0; coreNum <= 1; coreNum++) { 16249 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16250 0x152 + coreNum * 0x10, 16, 16251 &rx2tx_lpf_rc_lut_tx20_11b); 16252 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16253 0x153 + coreNum * 0x10, 16, 16254 &rx2tx_lpf_rc_lut_tx20_11n); 16255 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16256 0x154 + coreNum * 0x10, 16, 16257 &rx2tx_lpf_rc_lut_tx20_11n); 16258 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16259 0x155 + coreNum * 0x10, 16, 16260 &rx2tx_lpf_rc_lut_tx40_11n); 16261 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16262 0x156 + coreNum * 0x10, 16, 16263 &rx2tx_lpf_rc_lut_tx40_11n); 16264 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16265 0x157 + coreNum * 0x10, 16, 16266 &rx2tx_lpf_rc_lut_tx40_11n); 16267 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16268 0x158 + coreNum * 0x10, 16, 16269 &rx2tx_lpf_rc_lut_tx40_11n); 16270 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 16271 0x159 + coreNum * 0x10, 16, 16272 &rx2tx_lpf_rc_lut_tx40_11n); 16273 } 16274 16275 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 1, 0x3, 0, 16276 NPHY_REV7_RFCTRLOVERRIDE_ID2); 16277 } 16278 16279 write_phy_reg(pi, 0x32f, 0x3); 16280 16281 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 16282 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 0, 16283 NPHY_REV7_RFCTRLOVERRIDE_ID0); 16284 16285 if ((pi->pubpi.radiorev == 3) || (pi->pubpi.radiorev == 4) || 16286 (pi->pubpi.radiorev == 6)) { 16287 if ((pi->sh->sromrev >= 8) 16288 && (pi->sh->boardflags2 & BFL2_IPALVLSHIFT_3P3)) 16289 ipalvlshift_3p3_war_en = 1; 16290 16291 if (ipalvlshift_3p3_war_en) { 16292 write_radio_reg(pi, RADIO_2057_GPAIO_CONFIG, 0x5); 16293 write_radio_reg(pi, RADIO_2057_GPAIO_SEL1, 0x30); 16294 write_radio_reg(pi, RADIO_2057_GPAIO_SEL0, 0x0); 16295 or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE0, 0x1); 16296 or_radio_reg(pi, RADIO_2057_RXTXBIAS_CONFIG_CORE1, 0x1); 16297 16298 ipa2g_mainbias = 0x1f; 16299 16300 ipa2g_casconv = 0x6f; 16301 16302 ipa2g_biasfilt = 0xaa; 16303 } else { 16304 16305 ipa2g_mainbias = 0x2b; 16306 16307 ipa2g_casconv = 0x7f; 16308 16309 ipa2g_biasfilt = 0xee; 16310 } 16311 16312 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16313 for (coreNum = 0; coreNum <= 1; coreNum++) { 16314 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16315 coreNum, IPA2G_IMAIN, 16316 ipa2g_mainbias); 16317 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16318 coreNum, IPA2G_CASCONV, 16319 ipa2g_casconv); 16320 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16321 coreNum, 16322 IPA2G_BIAS_FILTER, 16323 ipa2g_biasfilt); 16324 } 16325 } 16326 } 16327 16328 if (PHY_IPA(pi)) { 16329 if (CHSPEC_IS2G(pi->radio_chanspec)) { 16330 if ((pi->pubpi.radiorev == 3) 16331 || (pi->pubpi.radiorev == 4) 16332 || (pi->pubpi.radiorev == 6)) 16333 txgm_idac_bleed = 0x7f; 16334 16335 for (coreNum = 0; coreNum <= 1; coreNum++) { 16336 if (txgm_idac_bleed != 0) 16337 WRITE_RADIO_REG4(pi, RADIO_2057, 16338 CORE, coreNum, 16339 TXGM_IDAC_BLEED, 16340 txgm_idac_bleed); 16341 } 16342 16343 if (pi->pubpi.radiorev == 5) { 16344 for (coreNum = 0; coreNum <= 1; coreNum++) { 16345 WRITE_RADIO_REG4(pi, RADIO_2057, 16346 CORE, coreNum, 16347 IPA2G_CASCONV, 16348 0x13); 16349 WRITE_RADIO_REG4(pi, RADIO_2057, 16350 CORE, coreNum, 16351 IPA2G_IMAIN, 16352 0x1f); 16353 WRITE_RADIO_REG4(pi, RADIO_2057, 16354 CORE, coreNum, 16355 IPA2G_BIAS_FILTER, 16356 0xee); 16357 WRITE_RADIO_REG4(pi, RADIO_2057, 16358 CORE, coreNum, 16359 PAD2G_IDACS, 16360 0x8a); 16361 WRITE_RADIO_REG4(pi, RADIO_2057, 16362 CORE, coreNum, 16363 PAD_BIAS_FILTER_BWS, 16364 0x3e); 16365 } 16366 } else if ((pi->pubpi.radiorev == 7) || 16367 (pi->pubpi.radiorev == 8)) { 16368 16369 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16370 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16371 0, IPA2G_IMAIN, 0x14); 16372 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16373 1, IPA2G_IMAIN, 0x12); 16374 } else { 16375 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16376 0, IPA2G_IMAIN, 0x16); 16377 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16378 1, IPA2G_IMAIN, 0x16); 16379 } 16380 } 16381 16382 } else { 16383 freq = 16384 CHAN5G_FREQ(CHSPEC_CHANNEL 16385 (pi->radio_chanspec)); 16386 if (((freq >= 5180) && (freq <= 5230)) 16387 || ((freq >= 5745) && (freq <= 5805))) { 16388 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16389 0, IPA5G_BIAS_FILTER, 0xff); 16390 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, 16391 1, IPA5G_BIAS_FILTER, 0xff); 16392 } 16393 } 16394 } else { 16395 16396 if (pi->pubpi.radiorev != 5) { 16397 for (coreNum = 0; coreNum <= 1; coreNum++) { 16398 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16399 TXMIX2G_TUNE_BOOST_PU, 0x61); 16400 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16401 TXGM_IDAC_BLEED, 0x70); 16402 } 16403 } 16404 } 16405 16406 if (pi->pubpi.radiorev == 4) { 16407 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16, 16408 &afectrl_adc_ctrl1_rev7); 16409 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16, 16410 &afectrl_adc_ctrl1_rev7); 16411 16412 for (coreNum = 0; coreNum <= 1; coreNum++) { 16413 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16414 AFE_VCM_CAL_MASTER, 0x0); 16415 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16416 AFE_SET_VCM_I, 0x3f); 16417 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 16418 AFE_SET_VCM_Q, 0x3f); 16419 } 16420 } else { 16421 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 16422 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 16423 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 16424 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 16425 16426 mod_phy_reg(pi, 0xa6, (0x1 << 0), 0); 16427 mod_phy_reg(pi, 0x8f, (0x1 << 0), (0x1 << 0)); 16428 mod_phy_reg(pi, 0xa7, (0x1 << 0), 0); 16429 mod_phy_reg(pi, 0xa5, (0x1 << 0), (0x1 << 0)); 16430 16431 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x05, 16, 16432 &afectrl_adc_ctrl2_rev7); 16433 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x15, 16, 16434 &afectrl_adc_ctrl2_rev7); 16435 16436 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 16437 mod_phy_reg(pi, 0x8f, (0x1 << 2), 0); 16438 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 16439 mod_phy_reg(pi, 0xa5, (0x1 << 2), 0); 16440 } 16441 16442 write_phy_reg(pi, 0x6a, 0x2); 16443 16444 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 256, 32, 16445 &min_nvar_offset_6mbps); 16446 16447 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x138, 16, 16448 &rfseq_pktgn_lpf_hpc_rev7); 16449 16450 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x141, 16, 16451 &rfseq_pktgn_lpf_h_hpc_rev7); 16452 16453 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 3, 0x133, 16, 16454 &rfseq_htpktgn_lpf_hpc_rev7); 16455 16456 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x146, 16, 16457 &rfseq_cckpktgn_lpf_hpc_rev7); 16458 16459 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x123, 16, 16460 &rfseq_tx2rx_lpf_h_hpc_rev7); 16461 16462 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 1, 0x12A, 16, 16463 &rfseq_rx2tx_lpf_h_hpc_rev7); 16464 16465 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16466 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16467 32, &min_nvar_val); 16468 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16469 127, 32, &min_nvar_val); 16470 } else { 16471 min_nvar_val = noise_var_tbl_rev7[3]; 16472 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16473 32, &min_nvar_val); 16474 16475 min_nvar_val = noise_var_tbl_rev7[127]; 16476 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16477 127, 32, &min_nvar_val); 16478 } 16479 16480 wlc_phy_workarounds_nphy_gainctrl(pi); 16481 16482 pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16483 pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange; 16484 16485 if (pdetrange == 0) { 16486 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16487 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16488 aux_adc_vmid_rev7_core0[3] = 0x70; 16489 aux_adc_vmid_rev7_core1[3] = 0x70; 16490 aux_adc_gain_rev7[3] = 2; 16491 } else { 16492 aux_adc_vmid_rev7_core0[3] = 0x80; 16493 aux_adc_vmid_rev7_core1[3] = 0x80; 16494 aux_adc_gain_rev7[3] = 3; 16495 } 16496 } else if (pdetrange == 1) { 16497 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16498 aux_adc_vmid_rev7_core0[3] = 0x7c; 16499 aux_adc_vmid_rev7_core1[3] = 0x7c; 16500 aux_adc_gain_rev7[3] = 2; 16501 } else { 16502 aux_adc_vmid_rev7_core0[3] = 0x8c; 16503 aux_adc_vmid_rev7_core1[3] = 0x8c; 16504 aux_adc_gain_rev7[3] = 1; 16505 } 16506 } else if (pdetrange == 2) { 16507 if (pi->pubpi.radioid == BCM2057_ID) { 16508 if ((pi->pubpi.radiorev == 5) 16509 || (pi->pubpi.radiorev == 7) 16510 || (pi->pubpi.radiorev == 8)) { 16511 if (chan_freq_range == 16512 WL_CHAN_FREQ_RANGE_2G) { 16513 aux_adc_vmid_rev7_core0[3] = 0x8c; 16514 aux_adc_vmid_rev7_core1[3] = 0x8c; 16515 aux_adc_gain_rev7[3] = 0; 16516 } else { 16517 aux_adc_vmid_rev7_core0[3] = 0x96; 16518 aux_adc_vmid_rev7_core1[3] = 0x96; 16519 aux_adc_gain_rev7[3] = 0; 16520 } 16521 } 16522 } 16523 16524 } else if (pdetrange == 3) { 16525 if (chan_freq_range == WL_CHAN_FREQ_RANGE_2G) { 16526 aux_adc_vmid_rev7_core0[3] = 0x89; 16527 aux_adc_vmid_rev7_core1[3] = 0x89; 16528 aux_adc_gain_rev7[3] = 0; 16529 } 16530 16531 } else if (pdetrange == 5) { 16532 16533 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16534 aux_adc_vmid_rev7_core0[3] = 0x80; 16535 aux_adc_vmid_rev7_core1[3] = 0x80; 16536 aux_adc_gain_rev7[3] = 3; 16537 } else { 16538 aux_adc_vmid_rev7_core0[3] = 0x70; 16539 aux_adc_vmid_rev7_core1[3] = 0x70; 16540 aux_adc_gain_rev7[3] = 2; 16541 } 16542 } 16543 16544 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x08, 16, 16545 &aux_adc_vmid_rev7_core0); 16546 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x18, 16, 16547 &aux_adc_vmid_rev7_core1); 16548 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x0c, 16, 16549 &aux_adc_gain_rev7); 16550 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 0x1c, 16, 16551 &aux_adc_gain_rev7); 16552} 16553 16554static void wlc_phy_workarounds_nphy_rev3(struct brcms_phy *pi) 16555{ 16556 static const u8 rfseq_tx2rx_events_rev3[] = { 16557 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16558 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16559 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16560 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16561 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16562 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16563 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16564 NPHY_REV3_RFSEQ_CMD_END 16565 }; 16566 static const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 }; 16567 u8 rfseq_rx2tx_events_rev3[] = { 16568 NPHY_REV3_RFSEQ_CMD_NOP, 16569 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16570 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16571 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16572 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16573 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16574 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16575 NPHY_REV3_RFSEQ_CMD_EXT_PA, 16576 NPHY_REV3_RFSEQ_CMD_END 16577 }; 16578 u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 }; 16579 static const u8 rfseq_rx2tx_events_rev3_ipa[] = { 16580 NPHY_REV3_RFSEQ_CMD_NOP, 16581 NPHY_REV3_RFSEQ_CMD_RXG_FBW, 16582 NPHY_REV3_RFSEQ_CMD_TR_SWITCH, 16583 NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS, 16584 NPHY_REV3_RFSEQ_CMD_RXPD_TXPD, 16585 NPHY_REV3_RFSEQ_CMD_TX_GAIN, 16586 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS, 16587 NPHY_REV3_RFSEQ_CMD_INT_PA_PU, 16588 NPHY_REV3_RFSEQ_CMD_END 16589 }; 16590 static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = 16591 { 8, 6, 6, 4, 4, 16, 43, 1, 1 }; 16592 s16 alpha0, alpha1, alpha2; 16593 s16 beta0, beta1, beta2; 16594 u32 leg_data_weights, ht_data_weights, nss1_data_weights, 16595 stbc_data_weights; 16596 u8 chan_freq_range = 0; 16597 static const u16 dac_control = 0x0002; 16598 u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16599 u16 aux_adc_vmid_rev3[] = { 0xa2, 0xb4, 0xb4, 0x89 }; 16600 u16 *aux_adc_vmid; 16601 u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 }; 16602 u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 }; 16603 u16 *aux_adc_gain; 16604 static const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 }; 16605 static const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 }; 16606 s32 min_nvar_val = 0x18d; 16607 u8 pdetrange; 16608 u8 triso; 16609 16610 write_phy_reg(pi, 0x23f, 0x1f8); 16611 write_phy_reg(pi, 0x240, 0x1f8); 16612 16613 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16614 1, 0, 32, &leg_data_weights); 16615 leg_data_weights = leg_data_weights & 0xffffff; 16616 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16617 1, 0, 32, &leg_data_weights); 16618 16619 alpha0 = 293; 16620 alpha1 = 435; 16621 alpha2 = 261; 16622 beta0 = 366; 16623 beta1 = 205; 16624 beta2 = 32; 16625 write_phy_reg(pi, 0x145, alpha0); 16626 write_phy_reg(pi, 0x146, alpha1); 16627 write_phy_reg(pi, 0x147, alpha2); 16628 write_phy_reg(pi, 0x148, beta0); 16629 write_phy_reg(pi, 0x149, beta1); 16630 write_phy_reg(pi, 0x14a, beta2); 16631 16632 write_phy_reg(pi, 0x38, 0xC); 16633 write_phy_reg(pi, 0x2ae, 0xC); 16634 16635 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, 16636 rfseq_tx2rx_events_rev3, 16637 rfseq_tx2rx_dlys_rev3, 16638 ARRAY_SIZE(rfseq_tx2rx_events_rev3)); 16639 16640 if (PHY_IPA(pi)) 16641 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16642 rfseq_rx2tx_events_rev3_ipa, 16643 rfseq_rx2tx_dlys_rev3_ipa, 16644 ARRAY_SIZE (rfseq_rx2tx_events_rev3_ipa)); 16645 16646 if ((pi->sh->hw_phyrxchain != 0x3) && 16647 (pi->sh->hw_phyrxchain != pi->sh->hw_phytxchain)) { 16648 16649 if (PHY_IPA(pi)) { 16650 rfseq_rx2tx_dlys_rev3[5] = 59; 16651 rfseq_rx2tx_dlys_rev3[6] = 1; 16652 rfseq_rx2tx_events_rev3[7] = NPHY_REV3_RFSEQ_CMD_END; 16653 } 16654 16655 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, 16656 rfseq_rx2tx_events_rev3, 16657 rfseq_rx2tx_dlys_rev3, 16658 ARRAY_SIZE (rfseq_rx2tx_events_rev3)); 16659 } 16660 16661 if (CHSPEC_IS2G(pi->radio_chanspec)) 16662 write_phy_reg(pi, 0x6a, 0x2); 16663 else 16664 write_phy_reg(pi, 0x6a, 0x9c40); 16665 16666 mod_phy_reg(pi, 0x294, (0xf << 8), (7 << 8)); 16667 16668 if (CHSPEC_IS40(pi->radio_chanspec) == 0) { 16669 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16670 32, &min_nvar_val); 16671 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16672 127, 32, &min_nvar_val); 16673 } else { 16674 min_nvar_val = noise_var_tbl_rev3[3]; 16675 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 3, 16676 32, &min_nvar_val); 16677 16678 min_nvar_val = noise_var_tbl_rev3[127]; 16679 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 16680 127, 32, &min_nvar_val); 16681 } 16682 16683 wlc_phy_workarounds_nphy_gainctrl(pi); 16684 16685 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x00, 16, 16686 &dac_control); 16687 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x10, 16, 16688 &dac_control); 16689 16690 pdetrange = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16691 pi->srom_fem5g.pdetrange : pi->srom_fem2g.pdetrange; 16692 16693 if (pdetrange == 0) { 16694 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 16695 aux_adc_vmid = aux_adc_vmid_rev4; 16696 aux_adc_gain = aux_adc_gain_rev4; 16697 } else { 16698 aux_adc_vmid = aux_adc_vmid_rev3; 16699 aux_adc_gain = aux_adc_gain_rev3; 16700 } 16701 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16702 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16703 switch (chan_freq_range) { 16704 case WL_CHAN_FREQ_RANGE_5GL: 16705 aux_adc_vmid[3] = 0x89; 16706 aux_adc_gain[3] = 0; 16707 break; 16708 case WL_CHAN_FREQ_RANGE_5GM: 16709 aux_adc_vmid[3] = 0x89; 16710 aux_adc_gain[3] = 0; 16711 break; 16712 case WL_CHAN_FREQ_RANGE_5GH: 16713 aux_adc_vmid[3] = 0x89; 16714 aux_adc_gain[3] = 0; 16715 break; 16716 default: 16717 break; 16718 } 16719 } 16720 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16721 0x08, 16, aux_adc_vmid); 16722 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16723 0x18, 16, aux_adc_vmid); 16724 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16725 0x0c, 16, aux_adc_gain); 16726 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16727 0x1c, 16, aux_adc_gain); 16728 } else if (pdetrange == 1) { 16729 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16730 0x08, 16, sk_adc_vmid); 16731 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16732 0x18, 16, sk_adc_vmid); 16733 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16734 0x0c, 16, sk_adc_gain); 16735 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16736 0x1c, 16, sk_adc_gain); 16737 } else if (pdetrange == 2) { 16738 16739 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x74 }; 16740 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x04 }; 16741 16742 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 16743 chan_freq_range = 16744 wlc_phy_get_chan_freq_range_nphy(pi, 0); 16745 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16746 bcm_adc_vmid[3] = 0x8e; 16747 bcm_adc_gain[3] = 0x03; 16748 } else { 16749 bcm_adc_vmid[3] = 0x94; 16750 bcm_adc_gain[3] = 0x03; 16751 } 16752 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 16753 bcm_adc_vmid[3] = 0x84; 16754 bcm_adc_gain[3] = 0x02; 16755 } 16756 16757 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16758 0x08, 16, bcm_adc_vmid); 16759 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16760 0x18, 16, bcm_adc_vmid); 16761 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16762 0x0c, 16, bcm_adc_gain); 16763 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16764 0x1c, 16, bcm_adc_gain); 16765 } else if (pdetrange == 3) { 16766 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16767 if ((NREV_GE(pi->pubpi.phy_rev, 4)) && 16768 (chan_freq_range == WL_CHAN_FREQ_RANGE_2G)) { 16769 u16 auxadc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x270 }; 16770 u16 auxadc_gain[] = { 0x02, 0x02, 0x02, 0x00 }; 16771 16772 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16773 0x08, 16, auxadc_vmid); 16774 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16775 0x18, 16, auxadc_vmid); 16776 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16777 0x0c, 16, auxadc_gain); 16778 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16779 0x1c, 16, auxadc_gain); 16780 } 16781 } else if ((pdetrange == 4) || (pdetrange == 5)) { 16782 u16 bcm_adc_vmid[] = { 0xa2, 0xb4, 0xb4, 0x0 }; 16783 u16 bcm_adc_gain[] = { 0x02, 0x02, 0x02, 0x0 }; 16784 u16 Vmid[2], Av[2]; 16785 16786 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 16787 if (chan_freq_range != WL_CHAN_FREQ_RANGE_2G) { 16788 Vmid[0] = (pdetrange == 4) ? 0x8e : 0x89; 16789 Vmid[1] = (pdetrange == 4) ? 0x96 : 0x89; 16790 Av[0] = (pdetrange == 4) ? 2 : 0; 16791 Av[1] = (pdetrange == 4) ? 2 : 0; 16792 } else { 16793 Vmid[0] = (pdetrange == 4) ? 0x89 : 0x74; 16794 Vmid[1] = (pdetrange == 4) ? 0x8b : 0x70; 16795 Av[0] = (pdetrange == 4) ? 2 : 0; 16796 Av[1] = (pdetrange == 4) ? 2 : 0; 16797 } 16798 16799 bcm_adc_vmid[3] = Vmid[0]; 16800 bcm_adc_gain[3] = Av[0]; 16801 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16802 0x08, 16, bcm_adc_vmid); 16803 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16804 0x0c, 16, bcm_adc_gain); 16805 16806 bcm_adc_vmid[3] = Vmid[1]; 16807 bcm_adc_gain[3] = Av[1]; 16808 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16809 0x18, 16, bcm_adc_vmid); 16810 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 4, 16811 0x1c, 16, bcm_adc_gain); 16812 } 16813 16814 write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX0), 0x0); 16815 write_radio_reg(pi, (RADIO_2056_RX_MIXA_MAST_BIAS | RADIO_2056_RX1), 0x0); 16816 16817 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX0), 0x6); 16818 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_MAIN | RADIO_2056_RX1), 0x6); 16819 16820 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX0), 0x7); 16821 write_radio_reg(pi, (RADIO_2056_RX_MIXA_BIAS_AUX | RADIO_2056_RX1), 0x7); 16822 16823 write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX0), 0x88); 16824 write_radio_reg(pi, (RADIO_2056_RX_MIXA_LOB_BIAS | RADIO_2056_RX1), 0x88); 16825 16826 write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX0), 0x0); 16827 write_radio_reg(pi, (RADIO_2056_RX_MIXA_CMFB_IDAC | RADIO_2056_RX1), 0x0); 16828 16829 write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX0), 0x0); 16830 write_radio_reg(pi, (RADIO_2056_RX_MIXG_CMFB_IDAC | RADIO_2056_RX1), 0x0); 16831 16832 triso = (CHSPEC_IS5G(pi->radio_chanspec)) ? 16833 pi->srom_fem5g.triso : pi->srom_fem2g.triso; 16834 if (triso == 7) { 16835 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_0); 16836 wlc_phy_war_force_trsw_to_R_cliplo_nphy(pi, PHY_CORE_1); 16837 } 16838 16839 wlc_phy_war_txchain_upd_nphy(pi, pi->sh->hw_phytxchain); 16840 16841 if (((pi->sh->boardflags2 & BFL2_APLL_WAR) && 16842 (CHSPEC_IS5G(pi->radio_chanspec))) || 16843 (((pi->sh->boardflags2 & BFL2_GPLL_WAR) || 16844 (pi->sh->boardflags2 & BFL2_GPLL_WAR2)) && 16845 (CHSPEC_IS2G(pi->radio_chanspec)))) { 16846 nss1_data_weights = 0x00088888; 16847 ht_data_weights = 0x00088888; 16848 stbc_data_weights = 0x00088888; 16849 } else { 16850 nss1_data_weights = 0x88888888; 16851 ht_data_weights = 0x88888888; 16852 stbc_data_weights = 0x88888888; 16853 } 16854 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16855 1, 1, 32, &nss1_data_weights); 16856 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16857 1, 2, 32, &ht_data_weights); 16858 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL, 16859 1, 3, 32, &stbc_data_weights); 16860 16861 if (NREV_IS(pi->pubpi.phy_rev, 4)) { 16862 if (CHSPEC_IS5G(pi->radio_chanspec)) { 16863 write_radio_reg(pi, 16864 RADIO_2056_TX_GMBB_IDAC | 16865 RADIO_2056_TX0, 0x70); 16866 write_radio_reg(pi, 16867 RADIO_2056_TX_GMBB_IDAC | 16868 RADIO_2056_TX1, 0x70); 16869 } 16870 } 16871 16872 if (!pi->edcrs_threshold_lock) { 16873 write_phy_reg(pi, 0x224, 0x3eb); 16874 write_phy_reg(pi, 0x225, 0x3eb); 16875 write_phy_reg(pi, 0x226, 0x341); 16876 write_phy_reg(pi, 0x227, 0x341); 16877 write_phy_reg(pi, 0x228, 0x42b); 16878 write_phy_reg(pi, 0x229, 0x42b); 16879 write_phy_reg(pi, 0x22a, 0x381); 16880 write_phy_reg(pi, 0x22b, 0x381); 16881 write_phy_reg(pi, 0x22c, 0x42b); 16882 write_phy_reg(pi, 0x22d, 0x42b); 16883 write_phy_reg(pi, 0x22e, 0x381); 16884 write_phy_reg(pi, 0x22f, 0x381); 16885 } 16886 16887 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 16888 16889 if (pi->sh->boardflags2 & BFL2_SINGLEANT_CCK) 16890 wlapi_bmac_mhf(pi->sh->physhim, MHF4, 16891 MHF4_BPHY_TXCORE0, 16892 MHF4_BPHY_TXCORE0, BRCM_BAND_ALL); 16893 } 16894} 16895 16896static void wlc_phy_workarounds_nphy_rev1(struct brcms_phy *pi) 16897{ 16898 static const u8 rfseq_rx2tx_events[] = { 16899 NPHY_RFSEQ_CMD_NOP, 16900 NPHY_RFSEQ_CMD_RXG_FBW, 16901 NPHY_RFSEQ_CMD_TR_SWITCH, 16902 NPHY_RFSEQ_CMD_CLR_HIQ_DIS, 16903 NPHY_RFSEQ_CMD_RXPD_TXPD, 16904 NPHY_RFSEQ_CMD_TX_GAIN, 16905 NPHY_RFSEQ_CMD_EXT_PA 16906 }; 16907 u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 }; 16908 static const u8 rfseq_tx2rx_events[] = { 16909 NPHY_RFSEQ_CMD_NOP, 16910 NPHY_RFSEQ_CMD_EXT_PA, 16911 NPHY_RFSEQ_CMD_TX_GAIN, 16912 NPHY_RFSEQ_CMD_RXPD_TXPD, 16913 NPHY_RFSEQ_CMD_TR_SWITCH, 16914 NPHY_RFSEQ_CMD_RXG_FBW, 16915 NPHY_RFSEQ_CMD_CLR_HIQ_DIS 16916 }; 16917 static const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 }; 16918 s16 alpha0, alpha1, alpha2; 16919 s16 beta0, beta1, beta2; 16920 u16 regval; 16921 16922 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD || 16923 (pi->sh->boardtype == 0x8b)) { 16924 uint i; 16925 u8 war_dlys[] = { 1, 6, 6, 2, 4, 20, 1 }; 16926 for (i = 0; i < ARRAY_SIZE(rfseq_rx2tx_dlys); i++) 16927 rfseq_rx2tx_dlys[i] = war_dlys[i]; 16928 } 16929 16930 if (CHSPEC_IS5G(pi->radio_chanspec) && pi->phy_5g_pwrgain) { 16931 and_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0xf7); 16932 and_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0xf7); 16933 } else { 16934 or_radio_reg(pi, RADIO_2055_CORE1_TX_RF_SPARE, 0x8); 16935 or_radio_reg(pi, RADIO_2055_CORE2_TX_RF_SPARE, 0x8); 16936 } 16937 16938 regval = 0x000a; 16939 wlc_phy_table_write_nphy(pi, 8, 1, 0, 16, ®val); 16940 wlc_phy_table_write_nphy(pi, 8, 1, 0x10, 16, ®val); 16941 16942 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 16943 regval = 0xcdaa; 16944 wlc_phy_table_write_nphy(pi, 8, 1, 0x02, 16, ®val); 16945 wlc_phy_table_write_nphy(pi, 8, 1, 0x12, 16, ®val); 16946 } 16947 16948 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 16949 regval = 0x0000; 16950 wlc_phy_table_write_nphy(pi, 8, 1, 0x08, 16, ®val); 16951 wlc_phy_table_write_nphy(pi, 8, 1, 0x18, 16, ®val); 16952 16953 regval = 0x7aab; 16954 wlc_phy_table_write_nphy(pi, 8, 1, 0x07, 16, ®val); 16955 wlc_phy_table_write_nphy(pi, 8, 1, 0x17, 16, ®val); 16956 16957 regval = 0x0800; 16958 wlc_phy_table_write_nphy(pi, 8, 1, 0x06, 16, ®val); 16959 wlc_phy_table_write_nphy(pi, 8, 1, 0x16, 16, ®val); 16960 } 16961 16962 write_phy_reg(pi, 0xf8, 0x02d8); 16963 write_phy_reg(pi, 0xf9, 0x0301); 16964 write_phy_reg(pi, 0xfa, 0x02d8); 16965 write_phy_reg(pi, 0xfb, 0x0301); 16966 16967 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX, rfseq_rx2tx_events, 16968 rfseq_rx2tx_dlys, 16969 ARRAY_SIZE(rfseq_rx2tx_events)); 16970 16971 wlc_phy_set_rfseq_nphy(pi, NPHY_RFSEQ_TX2RX, rfseq_tx2rx_events, 16972 rfseq_tx2rx_dlys, 16973 ARRAY_SIZE(rfseq_tx2rx_events)); 16974 16975 wlc_phy_workarounds_nphy_gainctrl(pi); 16976 16977 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 16978 16979 if (read_phy_reg(pi, 0xa0) & NPHY_MLenable) 16980 wlapi_bmac_mhf(pi->sh->physhim, MHF3, 16981 MHF3_NPHY_MLADV_WAR, 16982 MHF3_NPHY_MLADV_WAR, BRCM_BAND_ALL); 16983 16984 } else if (NREV_IS(pi->pubpi.phy_rev, 2)) { 16985 write_phy_reg(pi, 0x1e3, 0x0); 16986 write_phy_reg(pi, 0x1e4, 0x0); 16987 } 16988 16989 if (NREV_LT(pi->pubpi.phy_rev, 2)) 16990 mod_phy_reg(pi, 0x90, (0x1 << 7), 0); 16991 16992 alpha0 = 293; 16993 alpha1 = 435; 16994 alpha2 = 261; 16995 beta0 = 366; 16996 beta1 = 205; 16997 beta2 = 32; 16998 write_phy_reg(pi, 0x145, alpha0); 16999 write_phy_reg(pi, 0x146, alpha1); 17000 write_phy_reg(pi, 0x147, alpha2); 17001 write_phy_reg(pi, 0x148, beta0); 17002 write_phy_reg(pi, 0x149, beta1); 17003 write_phy_reg(pi, 0x14a, beta2); 17004 17005 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17006 mod_phy_reg(pi, 0x142, (0xf << 12), 0); 17007 17008 write_phy_reg(pi, 0x192, 0xb5); 17009 write_phy_reg(pi, 0x193, 0xa4); 17010 write_phy_reg(pi, 0x194, 0x0); 17011 } 17012 17013 if (NREV_IS(pi->pubpi.phy_rev, 2)) 17014 mod_phy_reg(pi, 0x221, 17015 NPHY_FORCESIG_DECODEGATEDCLKS, 17016 NPHY_FORCESIG_DECODEGATEDCLKS); 17017} 17018 17019static void wlc_phy_workarounds_nphy(struct brcms_phy *pi) 17020{ 17021 if (CHSPEC_IS5G(pi->radio_chanspec)) 17022 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 0); 17023 else 17024 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_cck_en, 1); 17025 17026 if (pi->phyhang_avoid) 17027 wlc_phy_stay_in_carriersearch_nphy(pi, true); 17028 17029 or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); 17030 17031 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17032 wlc_phy_workarounds_nphy_rev7(pi); 17033 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17034 wlc_phy_workarounds_nphy_rev3(pi); 17035 else 17036 wlc_phy_workarounds_nphy_rev1(pi); 17037 17038 if (pi->phyhang_avoid) 17039 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17040} 17041 17042static void wlc_phy_extpa_set_tx_digi_filts_nphy(struct brcms_phy *pi) 17043{ 17044 int j, type = 2; 17045 u16 addr_offset = 0x2c5; 17046 17047 for (j = 0; j < NPHY_NUM_DIG_FILT_COEFFS; j++) 17048 write_phy_reg(pi, addr_offset + j, 17049 NPHY_IPA_REV4_txdigi_filtcoeffs[type][j]); 17050} 17051 17052static void wlc_phy_clip_det_nphy(struct brcms_phy *pi, u8 write, u16 *vals) 17053{ 17054 17055 if (write == 0) { 17056 vals[0] = read_phy_reg(pi, 0x2c); 17057 vals[1] = read_phy_reg(pi, 0x42); 17058 } else { 17059 write_phy_reg(pi, 0x2c, vals[0]); 17060 write_phy_reg(pi, 0x42, vals[1]); 17061 } 17062} 17063 17064static void wlc_phy_ipa_internal_tssi_setup_nphy(struct brcms_phy *pi) 17065{ 17066 u8 core; 17067 17068 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17069 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17070 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17071 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17072 TX_SSI_MASTER, 0x5); 17073 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17074 TX_SSI_MUX, 0xe); 17075 17076 if (pi->pubpi.radiorev != 5) 17077 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17078 core, TSSIA, 0); 17079 17080 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17081 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17082 core, TSSIG, 0x1); 17083 else 17084 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 17085 core, TSSIG, 0x31); 17086 } else { 17087 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17088 TX_SSI_MASTER, 0x9); 17089 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17090 TX_SSI_MUX, 0xc); 17091 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 17092 TSSIG, 0); 17093 17094 if (pi->pubpi.radiorev != 5) { 17095 if (!NREV_IS(pi->pubpi.phy_rev, 7)) 17096 WRITE_RADIO_REG3(pi, RADIO_2057, 17097 TX, core, 17098 TSSIA, 0x1); 17099 else 17100 WRITE_RADIO_REG3(pi, RADIO_2057, 17101 TX, core, 17102 TSSIA, 0x31); 17103 } 17104 } 17105 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 17106 0); 17107 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 17108 0); 17109 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 17110 0x3); 17111 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 17112 0x0); 17113 } 17114 } else { 17115 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR31, 17116 (CHSPEC_IS2G(pi->radio_chanspec)) ? 0x128 : 17117 0x80); 17118 WRITE_RADIO_SYN(pi, RADIO_2056, RESERVED_ADDR30, 0x0); 17119 WRITE_RADIO_SYN(pi, RADIO_2056, GPIO_MASTER1, 0x29); 17120 17121 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 17122 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_VCM_HG, 17123 0x0); 17124 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, IQCAL_IDAC, 17125 0x0); 17126 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_VCM, 17127 0x3); 17128 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TX_AMP_DET, 17129 0x0); 17130 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC1, 17131 0x8); 17132 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC2, 17133 0x0); 17134 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, TSSI_MISC3, 17135 0x0); 17136 17137 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17138 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17139 TX_SSI_MASTER, 0x5); 17140 17141 if (pi->pubpi.radiorev != 5) 17142 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17143 core, TSSIA, 0x0); 17144 if (NREV_GE(pi->pubpi.phy_rev, 5)) 17145 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17146 core, TSSIG, 0x31); 17147 else 17148 WRITE_RADIO_REG2(pi, RADIO_2056, TX, 17149 core, TSSIG, 0x11); 17150 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17151 TX_SSI_MUX, 0xe); 17152 } else { 17153 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17154 TX_SSI_MASTER, 0x9); 17155 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17156 TSSIA, 0x31); 17157 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17158 TSSIG, 0x0); 17159 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 17160 TX_SSI_MUX, 0xc); 17161 } 17162 } 17163 } 17164} 17165 17166static void 17167wlc_phy_rfctrl_override_nphy(struct brcms_phy *pi, u16 field, u16 value, 17168 u8 core_mask, u8 off) 17169{ 17170 u8 core_num; 17171 u16 addr = 0, mask = 0, en_addr = 0, val_addr = 0, en_mask = 17172 0, val_mask = 0; 17173 u8 shift = 0, val_shift = 0; 17174 17175 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 17176 17177 en_mask = field; 17178 for (core_num = 0; core_num < 2; core_num++) { 17179 17180 switch (field) { 17181 case (0x1 << 1): 17182 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17183 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17184 val_mask = (0x1 << 0); 17185 val_shift = 0; 17186 break; 17187 case (0x1 << 2): 17188 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17189 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17190 val_mask = (0x1 << 1); 17191 val_shift = 1; 17192 break; 17193 case (0x1 << 3): 17194 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17195 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17196 val_mask = (0x1 << 2); 17197 val_shift = 2; 17198 break; 17199 case (0x1 << 4): 17200 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17201 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17202 val_mask = (0x1 << 4); 17203 val_shift = 4; 17204 break; 17205 case (0x1 << 5): 17206 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17207 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17208 val_mask = (0x1 << 5); 17209 val_shift = 5; 17210 break; 17211 case (0x1 << 6): 17212 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17213 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17214 val_mask = (0x1 << 6); 17215 val_shift = 6; 17216 break; 17217 case (0x1 << 7): 17218 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17219 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17220 val_mask = (0x1 << 7); 17221 val_shift = 7; 17222 break; 17223 case (0x1 << 8): 17224 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17225 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17226 val_mask = (0x7 << 8); 17227 val_shift = 8; 17228 break; 17229 case (0x1 << 11): 17230 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17231 val_addr = (core_num == 0) ? 0x7a : 0x7d; 17232 val_mask = (0x7 << 13); 17233 val_shift = 13; 17234 break; 17235 17236 case (0x1 << 9): 17237 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17238 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17239 val_mask = (0x7 << 0); 17240 val_shift = 0; 17241 break; 17242 17243 case (0x1 << 10): 17244 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17245 val_addr = (core_num == 0) ? 0xf8 : 0xfa; 17246 val_mask = (0x7 << 4); 17247 val_shift = 4; 17248 break; 17249 17250 case (0x1 << 12): 17251 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17252 val_addr = (core_num == 0) ? 0x7b : 0x7e; 17253 val_mask = (0xffff << 0); 17254 val_shift = 0; 17255 break; 17256 case (0x1 << 13): 17257 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17258 val_addr = (core_num == 0) ? 0x7c : 0x7f; 17259 val_mask = (0xffff << 0); 17260 val_shift = 0; 17261 break; 17262 case (0x1 << 14): 17263 en_addr = (core_num == 0) ? 0xe7 : 0xec; 17264 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17265 val_mask = (0x3 << 6); 17266 val_shift = 6; 17267 break; 17268 case (0x1 << 0): 17269 en_addr = (core_num == 0) ? 0xe5 : 0xe6; 17270 val_addr = (core_num == 0) ? 0xf9 : 0xfb; 17271 val_mask = (0x1 << 15); 17272 val_shift = 15; 17273 break; 17274 default: 17275 addr = 0xffff; 17276 break; 17277 } 17278 17279 if (off) { 17280 and_phy_reg(pi, en_addr, ~en_mask); 17281 and_phy_reg(pi, val_addr, ~val_mask); 17282 } else { 17283 17284 if ((core_mask == 0) 17285 || (core_mask & (1 << core_num))) { 17286 or_phy_reg(pi, en_addr, en_mask); 17287 17288 if (addr != 0xffff) 17289 mod_phy_reg(pi, val_addr, 17290 val_mask, 17291 (value << 17292 val_shift)); 17293 } 17294 } 17295 } 17296 } else { 17297 17298 if (off) { 17299 and_phy_reg(pi, 0xec, ~field); 17300 value = 0x0; 17301 } else { 17302 or_phy_reg(pi, 0xec, field); 17303 } 17304 17305 for (core_num = 0; core_num < 2; core_num++) { 17306 17307 switch (field) { 17308 case (0x1 << 1): 17309 case (0x1 << 9): 17310 case (0x1 << 12): 17311 case (0x1 << 13): 17312 case (0x1 << 14): 17313 addr = 0x78; 17314 17315 core_mask = 0x1; 17316 break; 17317 case (0x1 << 2): 17318 case (0x1 << 3): 17319 case (0x1 << 4): 17320 case (0x1 << 5): 17321 case (0x1 << 6): 17322 case (0x1 << 7): 17323 case (0x1 << 8): 17324 addr = (core_num == 0) ? 0x7a : 0x7d; 17325 break; 17326 case (0x1 << 10): 17327 addr = (core_num == 0) ? 0x7b : 0x7e; 17328 break; 17329 case (0x1 << 11): 17330 addr = (core_num == 0) ? 0x7c : 0x7f; 17331 break; 17332 default: 17333 addr = 0xffff; 17334 } 17335 17336 switch (field) { 17337 case (0x1 << 1): 17338 mask = (0x7 << 3); 17339 shift = 3; 17340 break; 17341 case (0x1 << 9): 17342 mask = (0x1 << 2); 17343 shift = 2; 17344 break; 17345 case (0x1 << 12): 17346 mask = (0x1 << 8); 17347 shift = 8; 17348 break; 17349 case (0x1 << 13): 17350 mask = (0x1 << 9); 17351 shift = 9; 17352 break; 17353 case (0x1 << 14): 17354 mask = (0xf << 12); 17355 shift = 12; 17356 break; 17357 case (0x1 << 2): 17358 mask = (0x1 << 0); 17359 shift = 0; 17360 break; 17361 case (0x1 << 3): 17362 mask = (0x1 << 1); 17363 shift = 1; 17364 break; 17365 case (0x1 << 4): 17366 mask = (0x1 << 2); 17367 shift = 2; 17368 break; 17369 case (0x1 << 5): 17370 mask = (0x3 << 4); 17371 shift = 4; 17372 break; 17373 case (0x1 << 6): 17374 mask = (0x3 << 6); 17375 shift = 6; 17376 break; 17377 case (0x1 << 7): 17378 mask = (0x1 << 8); 17379 shift = 8; 17380 break; 17381 case (0x1 << 8): 17382 mask = (0x1 << 9); 17383 shift = 9; 17384 break; 17385 case (0x1 << 10): 17386 mask = 0x1fff; 17387 shift = 0x0; 17388 break; 17389 case (0x1 << 11): 17390 mask = 0x1fff; 17391 shift = 0x0; 17392 break; 17393 default: 17394 mask = 0x0; 17395 shift = 0x0; 17396 break; 17397 } 17398 17399 if ((addr != 0xffff) && (core_mask & (1 << core_num))) 17400 mod_phy_reg(pi, addr, mask, (value << shift)); 17401 } 17402 17403 or_phy_reg(pi, 0xec, (0x1 << 0)); 17404 or_phy_reg(pi, 0x78, (0x1 << 0)); 17405 udelay(1); 17406 and_phy_reg(pi, 0xec, ~(0x1 << 0)); 17407 } 17408} 17409 17410static void wlc_phy_txpwrctrl_idle_tssi_nphy(struct brcms_phy *pi) 17411{ 17412 s32 rssi_buf[4]; 17413 s32 int_val; 17414 17415 if (SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi) || PHY_MUTED(pi)) 17416 17417 return; 17418 17419 if (PHY_IPA(pi)) 17420 wlc_phy_ipa_internal_tssi_setup_nphy(pi); 17421 17422 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17423 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17424 0, 0x3, 0, 17425 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17426 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17427 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 0); 17428 17429 wlc_phy_stopplayback_nphy(pi); 17430 17431 wlc_phy_tx_tone_nphy(pi, 4000, 0, 0, 0, false); 17432 17433 udelay(20); 17434 int_val = 17435 wlc_phy_poll_rssi_nphy(pi, (u8) NPHY_RSSI_SEL_TSSI_2G, rssi_buf, 17436 1); 17437 wlc_phy_stopplayback_nphy(pi); 17438 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, 0); 17439 17440 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17441 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 17442 0, 0x3, 1, 17443 NPHY_REV7_RFCTRLOVERRIDE_ID0); 17444 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 17445 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 3, 1); 17446 17447 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17448 17449 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17450 (u8) ((int_val >> 24) & 0xff); 17451 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17452 (u8) ((int_val >> 24) & 0xff); 17453 17454 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17455 (u8) ((int_val >> 8) & 0xff); 17456 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17457 (u8) ((int_val >> 8) & 0xff); 17458 } else { 17459 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_2g = 17460 (u8) ((int_val >> 24) & 0xff); 17461 17462 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_2g = 17463 (u8) ((int_val >> 8) & 0xff); 17464 17465 pi->nphy_pwrctrl_info[PHY_CORE_0].idle_tssi_5g = 17466 (u8) ((int_val >> 16) & 0xff); 17467 pi->nphy_pwrctrl_info[PHY_CORE_1].idle_tssi_5g = 17468 (u8) ((int_val) & 0xff); 17469 } 17470 17471} 17472 17473static void wlc_phy_txpwr_limit_to_tbl_nphy(struct brcms_phy *pi) 17474{ 17475 u8 idx, idx2, i, delta_ind; 17476 17477 for (idx = TXP_FIRST_CCK; idx <= TXP_LAST_CCK; idx++) 17478 pi->adj_pwr_tbl_nphy[idx] = pi->tx_power_offset[idx]; 17479 17480 for (i = 0; i < 4; i++) { 17481 idx2 = 0; 17482 17483 delta_ind = 0; 17484 17485 switch (i) { 17486 case 0: 17487 17488 if (CHSPEC_IS40(pi->radio_chanspec) 17489 && NPHY_IS_SROM_REINTERPRET) { 17490 idx = TXP_FIRST_MCS_40_SISO; 17491 } else { 17492 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17493 TXP_FIRST_OFDM_40_SISO : TXP_FIRST_OFDM; 17494 delta_ind = 1; 17495 } 17496 break; 17497 17498 case 1: 17499 17500 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17501 TXP_FIRST_MCS_40_CDD : TXP_FIRST_MCS_20_CDD; 17502 break; 17503 17504 case 2: 17505 17506 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17507 TXP_FIRST_MCS_40_STBC : TXP_FIRST_MCS_20_STBC; 17508 break; 17509 17510 case 3: 17511 17512 idx = (CHSPEC_IS40(pi->radio_chanspec)) ? 17513 TXP_FIRST_MCS_40_SDM : TXP_FIRST_MCS_20_SDM; 17514 break; 17515 } 17516 17517 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17518 pi->tx_power_offset[idx]; 17519 idx = idx + delta_ind; 17520 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17521 pi->tx_power_offset[idx]; 17522 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17523 pi->tx_power_offset[idx]; 17524 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17525 pi->tx_power_offset[idx++]; 17526 17527 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17528 pi->tx_power_offset[idx++]; 17529 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17530 pi->tx_power_offset[idx]; 17531 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17532 pi->tx_power_offset[idx]; 17533 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17534 pi->tx_power_offset[idx++]; 17535 17536 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17537 pi->tx_power_offset[idx++]; 17538 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17539 pi->tx_power_offset[idx]; 17540 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17541 pi->tx_power_offset[idx]; 17542 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17543 pi->tx_power_offset[idx++]; 17544 17545 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17546 pi->tx_power_offset[idx]; 17547 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17548 pi->tx_power_offset[idx++]; 17549 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17550 pi->tx_power_offset[idx]; 17551 idx = idx + 1 - delta_ind; 17552 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17553 pi->tx_power_offset[idx]; 17554 17555 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17556 pi->tx_power_offset[idx]; 17557 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17558 pi->tx_power_offset[idx]; 17559 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17560 pi->tx_power_offset[idx]; 17561 pi->adj_pwr_tbl_nphy[4 + 4 * (idx2++) + i] = 17562 pi->tx_power_offset[idx]; 17563 } 17564} 17565 17566static void wlc_phy_txpwrctrl_pwr_setup_nphy(struct brcms_phy *pi) 17567{ 17568 u32 idx; 17569 s16 a1[2], b0[2], b1[2]; 17570 s8 target_pwr_qtrdbm[2]; 17571 s32 num, den, pwr_est; 17572 u8 chan_freq_range; 17573 u8 idle_tssi[2]; 17574 u32 tbl_id, tbl_len, tbl_offset; 17575 u32 regval[64]; 17576 u8 core; 17577 17578 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17579 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17580 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17581 udelay(1); 17582 } 17583 17584 if (pi->phyhang_avoid) 17585 wlc_phy_stay_in_carriersearch_nphy(pi, true); 17586 17587 or_phy_reg(pi, 0x122, (0x1 << 0)); 17588 17589 if (NREV_GE(pi->pubpi.phy_rev, 3)) 17590 and_phy_reg(pi, 0x1e7, (u16) (~(0x1 << 15))); 17591 else 17592 or_phy_reg(pi, 0x1e7, (0x1 << 15)); 17593 17594 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17595 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17596 17597 if (pi->sh->sromrev < 4) { 17598 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17599 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17600 a1[0] = -424; 17601 a1[1] = -424; 17602 b0[0] = 5612; 17603 b0[1] = 5612; 17604 b1[1] = -1393; 17605 b1[0] = -1393; 17606 } else { 17607 17608 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 17609 switch (chan_freq_range) { 17610 case WL_CHAN_FREQ_RANGE_2G: 17611 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17612 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17613 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_a1; 17614 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_a1; 17615 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b0; 17616 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b0; 17617 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_2g_b1; 17618 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_2g_b1; 17619 break; 17620 case WL_CHAN_FREQ_RANGE_5GL: 17621 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17622 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17623 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_a1; 17624 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_a1; 17625 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b0; 17626 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b0; 17627 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gl_b1; 17628 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gl_b1; 17629 break; 17630 case WL_CHAN_FREQ_RANGE_5GM: 17631 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17632 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17633 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_a1; 17634 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_a1; 17635 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b0; 17636 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b0; 17637 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gm_b1; 17638 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gm_b1; 17639 break; 17640 case WL_CHAN_FREQ_RANGE_5GH: 17641 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_5g; 17642 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_5g; 17643 a1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_a1; 17644 a1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_a1; 17645 b0[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b0; 17646 b0[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b0; 17647 b1[0] = pi->nphy_pwrctrl_info[0].pwrdet_5gh_b1; 17648 b1[1] = pi->nphy_pwrctrl_info[1].pwrdet_5gh_b1; 17649 break; 17650 default: 17651 idle_tssi[0] = pi->nphy_pwrctrl_info[0].idle_tssi_2g; 17652 idle_tssi[1] = pi->nphy_pwrctrl_info[1].idle_tssi_2g; 17653 a1[0] = -424; 17654 a1[1] = -424; 17655 b0[0] = 5612; 17656 b0[1] = 5612; 17657 b1[1] = -1393; 17658 b1[0] = -1393; 17659 break; 17660 } 17661 } 17662 17663 /* use the provided transmit power */ 17664 target_pwr_qtrdbm[0] = (s8) pi->tx_power_max; 17665 target_pwr_qtrdbm[1] = (s8) pi->tx_power_max; 17666 17667 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 17668 if (pi->srom_fem2g.tssipos) 17669 or_phy_reg(pi, 0x1e9, (0x1 << 14)); 17670 17671 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17672 for (core = 0; core <= 1; core++) { 17673 if (PHY_IPA(pi)) { 17674 if (CHSPEC_IS2G(pi->radio_chanspec)) 17675 WRITE_RADIO_REG3(pi, RADIO_2057, 17676 TX, core, 17677 TX_SSI_MUX, 17678 0xe); 17679 else 17680 WRITE_RADIO_REG3(pi, RADIO_2057, 17681 TX, core, 17682 TX_SSI_MUX, 17683 0xc); 17684 } 17685 } 17686 } else { 17687 if (PHY_IPA(pi)) { 17688 17689 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17690 RADIO_2056_TX0, 17691 (CHSPEC_IS5G 17692 (pi->radio_chanspec)) ? 17693 0xc : 0xe); 17694 write_radio_reg(pi, 17695 RADIO_2056_TX_TX_SSI_MUX | 17696 RADIO_2056_TX1, 17697 (CHSPEC_IS5G 17698 (pi->radio_chanspec)) ? 17699 0xc : 0xe); 17700 } else { 17701 17702 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17703 RADIO_2056_TX0, 0x11); 17704 write_radio_reg(pi, RADIO_2056_TX_TX_SSI_MUX | 17705 RADIO_2056_TX1, 0x11); 17706 } 17707 } 17708 } 17709 17710 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 17711 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 17712 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 17713 udelay(1); 17714 } 17715 17716 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17717 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17718 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17719 else 17720 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 17721 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17722 17723 if (NREV_GE(pi->pubpi.phy_rev, 7)) 17724 mod_phy_reg(pi, 0x222, (0xff << 0), 17725 (NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 << 0)); 17726 else if (NREV_GT(pi->pubpi.phy_rev, 1)) 17727 mod_phy_reg(pi, 0x222, (0xff << 0), 17728 (NPHY_TxPwrCtrlCmd_pwrIndex_init << 0)); 17729 17730 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 17731 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 17732 17733 write_phy_reg(pi, 0x1e8, (0x3 << 8) | (240 << 0)); 17734 17735 write_phy_reg(pi, 0x1e9, 17736 (1 << 15) | (idle_tssi[0] << 0) | (idle_tssi[1] << 8)); 17737 17738 write_phy_reg(pi, 0x1ea, 17739 (target_pwr_qtrdbm[0] << 0) | 17740 (target_pwr_qtrdbm[1] << 8)); 17741 17742 tbl_len = 64; 17743 tbl_offset = 0; 17744 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 17745 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 17746 17747 for (idx = 0; idx < tbl_len; idx++) { 17748 num = 8 * 17749 (16 * b0[tbl_id - 26] + b1[tbl_id - 26] * idx); 17750 den = 32768 + a1[tbl_id - 26] * idx; 17751 pwr_est = max(DIV_ROUND_CLOSEST(4 * num, den), -8); 17752 if (NREV_LT(pi->pubpi.phy_rev, 3)) { 17753 if (idx <= 17754 (uint) (31 - idle_tssi[tbl_id - 26] + 1)) 17755 pwr_est = 17756 max(pwr_est, 17757 target_pwr_qtrdbm 17758 [tbl_id - 26] + 1); 17759 } 17760 regval[idx] = (u32) pwr_est; 17761 } 17762 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 17763 regval); 17764 } 17765 17766 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 17767 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 8, 17768 pi->adj_pwr_tbl_nphy); 17769 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 8, 17770 pi->adj_pwr_tbl_nphy); 17771 17772 if (pi->phyhang_avoid) 17773 wlc_phy_stay_in_carriersearch_nphy(pi, false); 17774} 17775 17776static u32 *wlc_phy_get_ipa_gaintbl_nphy(struct brcms_phy *pi) 17777{ 17778 u32 *tx_pwrctrl_tbl = NULL; 17779 17780 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17781 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17782 if ((pi->pubpi.radiorev == 4) 17783 || (pi->pubpi.radiorev == 6)) 17784 tx_pwrctrl_tbl = 17785 nphy_tpc_txgain_ipa_2g_2057rev4n6; 17786 else if (pi->pubpi.radiorev == 3) 17787 tx_pwrctrl_tbl = 17788 nphy_tpc_txgain_ipa_2g_2057rev3; 17789 else if (pi->pubpi.radiorev == 5) 17790 tx_pwrctrl_tbl = 17791 nphy_tpc_txgain_ipa_2g_2057rev5; 17792 else if ((pi->pubpi.radiorev == 7) 17793 || (pi->pubpi.radiorev == 8)) 17794 tx_pwrctrl_tbl = 17795 nphy_tpc_txgain_ipa_2g_2057rev7; 17796 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 17797 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6; 17798 if (pi->sh->chip == BCMA_CHIP_ID_BCM47162) 17799 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17800 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 17801 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; 17802 } else { 17803 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa; 17804 } 17805 } else { 17806 17807 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17808 if ((pi->pubpi.radiorev == 3) || 17809 (pi->pubpi.radiorev == 4) || 17810 (pi->pubpi.radiorev == 6)) 17811 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g_2057; 17812 else if ((pi->pubpi.radiorev == 7) 17813 || (pi->pubpi.radiorev == 8)) 17814 tx_pwrctrl_tbl = 17815 nphy_tpc_txgain_ipa_5g_2057rev7; 17816 } else { 17817 tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_5g; 17818 } 17819 } 17820 17821 return tx_pwrctrl_tbl; 17822} 17823 17824static void wlc_phy_restore_rssical_nphy(struct brcms_phy *pi) 17825{ 17826 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17827 if (pi->nphy_rssical_chanspec_2G == 0) 17828 return; 17829 17830 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17831 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17832 RADIO_2057_VCM_MASK, 17833 pi->rssical_cache. 17834 rssical_radio_regs_2G[0]); 17835 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17836 RADIO_2057_VCM_MASK, 17837 pi->rssical_cache. 17838 rssical_radio_regs_2G[1]); 17839 } else { 17840 mod_radio_reg(pi, 17841 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17842 RADIO_2056_VCM_MASK, 17843 pi->rssical_cache. 17844 rssical_radio_regs_2G[0]); 17845 mod_radio_reg(pi, 17846 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17847 RADIO_2056_VCM_MASK, 17848 pi->rssical_cache. 17849 rssical_radio_regs_2G[1]); 17850 } 17851 17852 write_phy_reg(pi, 0x1a6, 17853 pi->rssical_cache.rssical_phyregs_2G[0]); 17854 write_phy_reg(pi, 0x1ac, 17855 pi->rssical_cache.rssical_phyregs_2G[1]); 17856 write_phy_reg(pi, 0x1b2, 17857 pi->rssical_cache.rssical_phyregs_2G[2]); 17858 write_phy_reg(pi, 0x1b8, 17859 pi->rssical_cache.rssical_phyregs_2G[3]); 17860 write_phy_reg(pi, 0x1a4, 17861 pi->rssical_cache.rssical_phyregs_2G[4]); 17862 write_phy_reg(pi, 0x1aa, 17863 pi->rssical_cache.rssical_phyregs_2G[5]); 17864 write_phy_reg(pi, 0x1b0, 17865 pi->rssical_cache.rssical_phyregs_2G[6]); 17866 write_phy_reg(pi, 0x1b6, 17867 pi->rssical_cache.rssical_phyregs_2G[7]); 17868 write_phy_reg(pi, 0x1a5, 17869 pi->rssical_cache.rssical_phyregs_2G[8]); 17870 write_phy_reg(pi, 0x1ab, 17871 pi->rssical_cache.rssical_phyregs_2G[9]); 17872 write_phy_reg(pi, 0x1b1, 17873 pi->rssical_cache.rssical_phyregs_2G[10]); 17874 write_phy_reg(pi, 0x1b7, 17875 pi->rssical_cache.rssical_phyregs_2G[11]); 17876 17877 } else { 17878 if (pi->nphy_rssical_chanspec_5G == 0) 17879 return; 17880 17881 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17882 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0, 17883 RADIO_2057_VCM_MASK, 17884 pi->rssical_cache. 17885 rssical_radio_regs_5G[0]); 17886 mod_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1, 17887 RADIO_2057_VCM_MASK, 17888 pi->rssical_cache. 17889 rssical_radio_regs_5G[1]); 17890 } else { 17891 mod_radio_reg(pi, 17892 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX0, 17893 RADIO_2056_VCM_MASK, 17894 pi->rssical_cache. 17895 rssical_radio_regs_5G[0]); 17896 mod_radio_reg(pi, 17897 RADIO_2056_RX_RSSI_MISC | RADIO_2056_RX1, 17898 RADIO_2056_VCM_MASK, 17899 pi->rssical_cache. 17900 rssical_radio_regs_5G[1]); 17901 } 17902 17903 write_phy_reg(pi, 0x1a6, 17904 pi->rssical_cache.rssical_phyregs_5G[0]); 17905 write_phy_reg(pi, 0x1ac, 17906 pi->rssical_cache.rssical_phyregs_5G[1]); 17907 write_phy_reg(pi, 0x1b2, 17908 pi->rssical_cache.rssical_phyregs_5G[2]); 17909 write_phy_reg(pi, 0x1b8, 17910 pi->rssical_cache.rssical_phyregs_5G[3]); 17911 write_phy_reg(pi, 0x1a4, 17912 pi->rssical_cache.rssical_phyregs_5G[4]); 17913 write_phy_reg(pi, 0x1aa, 17914 pi->rssical_cache.rssical_phyregs_5G[5]); 17915 write_phy_reg(pi, 0x1b0, 17916 pi->rssical_cache.rssical_phyregs_5G[6]); 17917 write_phy_reg(pi, 0x1b6, 17918 pi->rssical_cache.rssical_phyregs_5G[7]); 17919 write_phy_reg(pi, 0x1a5, 17920 pi->rssical_cache.rssical_phyregs_5G[8]); 17921 write_phy_reg(pi, 0x1ab, 17922 pi->rssical_cache.rssical_phyregs_5G[9]); 17923 write_phy_reg(pi, 0x1b1, 17924 pi->rssical_cache.rssical_phyregs_5G[10]); 17925 write_phy_reg(pi, 0x1b7, 17926 pi->rssical_cache.rssical_phyregs_5G[11]); 17927 } 17928} 17929 17930static void wlc_phy_internal_cal_txgain_nphy(struct brcms_phy *pi) 17931{ 17932 u16 txcal_gain[2]; 17933 17934 pi->nphy_txcal_pwr_idx[0] = pi->nphy_cal_orig_pwr_idx[0]; 17935 pi->nphy_txcal_pwr_idx[1] = pi->nphy_cal_orig_pwr_idx[0]; 17936 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 17937 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 17938 17939 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 17940 txcal_gain); 17941 17942 if (CHSPEC_IS2G(pi->radio_chanspec)) { 17943 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F40; 17944 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F40; 17945 } else { 17946 txcal_gain[0] = (txcal_gain[0] & 0xF000) | 0x0F60; 17947 txcal_gain[1] = (txcal_gain[1] & 0xF000) | 0x0F60; 17948 } 17949 17950 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 17951 txcal_gain); 17952} 17953 17954static void wlc_phy_precal_txgain_nphy(struct brcms_phy *pi) 17955{ 17956 bool save_bbmult = false; 17957 u8 txcal_index_2057_rev5n7 = 0; 17958 u8 txcal_index_2057_rev3n4n6 = 10; 17959 17960 if (pi->use_int_tx_iqlo_cal_nphy) { 17961 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 17962 if ((pi->pubpi.radiorev == 3) || 17963 (pi->pubpi.radiorev == 4) || 17964 (pi->pubpi.radiorev == 6)) { 17965 17966 pi->nphy_txcal_pwr_idx[0] = 17967 txcal_index_2057_rev3n4n6; 17968 pi->nphy_txcal_pwr_idx[1] = 17969 txcal_index_2057_rev3n4n6; 17970 wlc_phy_txpwr_index_nphy( 17971 pi, 3, 17972 txcal_index_2057_rev3n4n6, 17973 false); 17974 } else { 17975 17976 pi->nphy_txcal_pwr_idx[0] = 17977 txcal_index_2057_rev5n7; 17978 pi->nphy_txcal_pwr_idx[1] = 17979 txcal_index_2057_rev5n7; 17980 wlc_phy_txpwr_index_nphy( 17981 pi, 3, 17982 txcal_index_2057_rev5n7, 17983 false); 17984 } 17985 save_bbmult = true; 17986 17987 } else if (NREV_LT(pi->pubpi.phy_rev, 5)) { 17988 wlc_phy_cal_txgainctrl_nphy(pi, 11, false); 17989 if (pi->sh->hw_phytxchain != 3) { 17990 pi->nphy_txcal_pwr_idx[1] = 17991 pi->nphy_txcal_pwr_idx[0]; 17992 wlc_phy_txpwr_index_nphy(pi, 3, 17993 pi-> 17994 nphy_txcal_pwr_idx[0], 17995 true); 17996 save_bbmult = true; 17997 } 17998 17999 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 18000 if (PHY_IPA(pi)) { 18001 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18002 wlc_phy_cal_txgainctrl_nphy(pi, 12, 18003 false); 18004 } else { 18005 pi->nphy_txcal_pwr_idx[0] = 80; 18006 pi->nphy_txcal_pwr_idx[1] = 80; 18007 wlc_phy_txpwr_index_nphy(pi, 3, 80, 18008 false); 18009 save_bbmult = true; 18010 } 18011 } else { 18012 wlc_phy_internal_cal_txgain_nphy(pi); 18013 save_bbmult = true; 18014 } 18015 18016 } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { 18017 if (PHY_IPA(pi)) { 18018 if (CHSPEC_IS2G(pi->radio_chanspec)) 18019 wlc_phy_cal_txgainctrl_nphy(pi, 12, 18020 false); 18021 else 18022 wlc_phy_cal_txgainctrl_nphy(pi, 14, 18023 false); 18024 } else { 18025 wlc_phy_internal_cal_txgain_nphy(pi); 18026 save_bbmult = true; 18027 } 18028 } 18029 18030 } else { 18031 wlc_phy_cal_txgainctrl_nphy(pi, 10, false); 18032 } 18033 18034 if (save_bbmult) 18035 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 18036 &pi->nphy_txcal_bbmult); 18037} 18038 18039static void 18040wlc_phy_rfctrlintc_override_nphy(struct brcms_phy *pi, u8 field, u16 value, 18041 u8 core_code) 18042{ 18043 u16 mask; 18044 u16 val; 18045 u8 core; 18046 18047 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18048 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18049 if (core_code == RADIO_MIMO_CORESEL_CORE1 18050 && core == PHY_CORE_1) 18051 continue; 18052 else if (core_code == RADIO_MIMO_CORESEL_CORE2 18053 && core == PHY_CORE_0) 18054 continue; 18055 18056 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 18057 18058 mask = (0x1 << 10); 18059 val = 1 << 10; 18060 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18061 0x92, mask, val); 18062 } 18063 18064 if (field == NPHY_RfctrlIntc_override_OFF) { 18065 18066 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x91 : 18067 0x92, 0); 18068 18069 wlc_phy_force_rfseq_nphy(pi, 18070 NPHY_RFSEQ_RESET2RX); 18071 } else if (field == NPHY_RfctrlIntc_override_TRSW) { 18072 18073 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18074 18075 mask = (0x1 << 6) | (0x1 << 7); 18076 18077 val = value << 6; 18078 mod_phy_reg(pi, 18079 (core == 18080 PHY_CORE_0) ? 0x91 : 0x92, 18081 mask, val); 18082 18083 or_phy_reg(pi, 18084 (core == 18085 PHY_CORE_0) ? 0x91 : 0x92, 18086 (0x1 << 10)); 18087 18088 and_phy_reg(pi, 0x2ff, (u16) 18089 ~(0x3 << 14)); 18090 or_phy_reg(pi, 0x2ff, (0x1 << 13)); 18091 or_phy_reg(pi, 0x2ff, (0x1 << 0)); 18092 } else { 18093 18094 mask = (0x1 << 6) | 18095 (0x1 << 7) | 18096 (0x1 << 8) | (0x1 << 9); 18097 val = value << 6; 18098 mod_phy_reg(pi, 18099 (core == 18100 PHY_CORE_0) ? 0x91 : 0x92, 18101 mask, val); 18102 18103 mask = (0x1 << 0); 18104 val = 1 << 0; 18105 mod_phy_reg(pi, 18106 (core == 18107 PHY_CORE_0) ? 0xe7 : 0xec, 18108 mask, val); 18109 18110 mask = (core == PHY_CORE_0) ? 18111 (0x1 << 0) : (0x1 << 1); 18112 val = 1 << ((core == PHY_CORE_0) ? 18113 0 : 1); 18114 mod_phy_reg(pi, 0x78, mask, val); 18115 18116 SPINWAIT(((read_phy_reg(pi, 0x78) & val) 18117 != 0), 10000); 18118 if (WARN(read_phy_reg(pi, 0x78) & val, 18119 "HW error: override failed")) 18120 return; 18121 18122 mask = (0x1 << 0); 18123 val = 0 << 0; 18124 mod_phy_reg(pi, 18125 (core == 18126 PHY_CORE_0) ? 0xe7 : 0xec, 18127 mask, val); 18128 } 18129 } else if (field == NPHY_RfctrlIntc_override_PA) { 18130 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18131 18132 mask = (0x1 << 4) | (0x1 << 5); 18133 18134 if (CHSPEC_IS5G(pi->radio_chanspec)) 18135 val = value << 5; 18136 else 18137 val = value << 4; 18138 18139 mod_phy_reg(pi, 18140 (core == 18141 PHY_CORE_0) ? 0x91 : 0x92, 18142 mask, val); 18143 18144 or_phy_reg(pi, 18145 (core == 18146 PHY_CORE_0) ? 0x91 : 0x92, 18147 (0x1 << 12)); 18148 } else { 18149 18150 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18151 mask = (0x1 << 5); 18152 val = value << 5; 18153 } else { 18154 mask = (0x1 << 4); 18155 val = value << 4; 18156 } 18157 mod_phy_reg(pi, 18158 (core == 18159 PHY_CORE_0) ? 0x91 : 0x92, 18160 mask, val); 18161 } 18162 } else if (field == 18163 NPHY_RfctrlIntc_override_EXT_LNA_PU) { 18164 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18165 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18166 18167 mask = (0x1 << 0); 18168 val = value << 0; 18169 mod_phy_reg(pi, 18170 (core == 18171 PHY_CORE_0) ? 0x91 18172 : 0x92, mask, val); 18173 18174 mask = (0x1 << 2); 18175 mod_phy_reg(pi, 18176 (core == 18177 PHY_CORE_0) ? 0x91 18178 : 0x92, mask, 0); 18179 } else { 18180 18181 mask = (0x1 << 2); 18182 val = value << 2; 18183 mod_phy_reg(pi, 18184 (core == 18185 PHY_CORE_0) ? 0x91 18186 : 0x92, mask, val); 18187 18188 mask = (0x1 << 0); 18189 mod_phy_reg(pi, 18190 (core == 18191 PHY_CORE_0) ? 0x91 18192 : 0x92, mask, 0); 18193 } 18194 18195 mask = (0x1 << 11); 18196 val = 1 << 11; 18197 mod_phy_reg(pi, 18198 (core == 18199 PHY_CORE_0) ? 0x91 : 0x92, 18200 mask, val); 18201 } else { 18202 18203 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18204 mask = (0x1 << 0); 18205 val = value << 0; 18206 } else { 18207 mask = (0x1 << 2); 18208 val = value << 2; 18209 } 18210 mod_phy_reg(pi, 18211 (core == 18212 PHY_CORE_0) ? 0x91 : 0x92, 18213 mask, val); 18214 } 18215 } else if (field == 18216 NPHY_RfctrlIntc_override_EXT_LNA_GAIN) { 18217 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18218 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18219 18220 mask = (0x1 << 1); 18221 val = value << 1; 18222 mod_phy_reg(pi, 18223 (core == 18224 PHY_CORE_0) ? 0x91 18225 : 0x92, mask, val); 18226 18227 mask = (0x1 << 3); 18228 mod_phy_reg(pi, 18229 (core == 18230 PHY_CORE_0) ? 0x91 18231 : 0x92, mask, 0); 18232 } else { 18233 18234 mask = (0x1 << 3); 18235 val = value << 3; 18236 mod_phy_reg(pi, 18237 (core == 18238 PHY_CORE_0) ? 0x91 18239 : 0x92, mask, val); 18240 18241 mask = (0x1 << 1); 18242 mod_phy_reg(pi, 18243 (core == 18244 PHY_CORE_0) ? 0x91 18245 : 0x92, mask, 0); 18246 } 18247 18248 mask = (0x1 << 11); 18249 val = 1 << 11; 18250 mod_phy_reg(pi, 18251 (core == 18252 PHY_CORE_0) ? 0x91 : 0x92, 18253 mask, val); 18254 } else { 18255 18256 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18257 mask = (0x1 << 1); 18258 val = value << 1; 18259 } else { 18260 mask = (0x1 << 3); 18261 val = value << 3; 18262 } 18263 mod_phy_reg(pi, 18264 (core == 18265 PHY_CORE_0) ? 0x91 : 0x92, 18266 mask, val); 18267 } 18268 } 18269 } 18270 } 18271} 18272 18273void 18274wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi, s32 dBm_targetpower, 18275 bool debug) 18276{ 18277 int gainctrl_loopidx; 18278 uint core; 18279 u16 m0m1, curr_m0m1; 18280 s32 delta_power; 18281 s32 txpwrindex; 18282 s32 qdBm_power[2]; 18283 u16 orig_BBConfig; 18284 u16 phy_saveregs[4]; 18285 u32 freq_test; 18286 u16 ampl_test = 250; 18287 uint stepsize; 18288 bool phyhang_avoid_state = false; 18289 18290 if (NREV_GE(pi->pubpi.phy_rev, 7)) 18291 stepsize = 2; 18292 else 18293 stepsize = 1; 18294 18295 if (CHSPEC_IS40(pi->radio_chanspec)) 18296 freq_test = 5000; 18297 else 18298 freq_test = 2500; 18299 18300 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_cal_orig_pwr_idx[0], true); 18301 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_cal_orig_pwr_idx[1], true); 18302 18303 if (pi->phyhang_avoid) 18304 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18305 18306 phyhang_avoid_state = pi->phyhang_avoid; 18307 pi->phyhang_avoid = false; 18308 18309 phy_saveregs[0] = read_phy_reg(pi, 0x91); 18310 phy_saveregs[1] = read_phy_reg(pi, 0x92); 18311 phy_saveregs[2] = read_phy_reg(pi, 0xe7); 18312 phy_saveregs[3] = read_phy_reg(pi, 0xec); 18313 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 1, 18314 RADIO_MIMO_CORESEL_CORE1 | 18315 RADIO_MIMO_CORESEL_CORE2); 18316 18317 if (!debug) { 18318 wlc_phy_rfctrlintc_override_nphy(pi, 18319 NPHY_RfctrlIntc_override_TRSW, 18320 0x2, RADIO_MIMO_CORESEL_CORE1); 18321 wlc_phy_rfctrlintc_override_nphy(pi, 18322 NPHY_RfctrlIntc_override_TRSW, 18323 0x8, RADIO_MIMO_CORESEL_CORE2); 18324 } else { 18325 wlc_phy_rfctrlintc_override_nphy(pi, 18326 NPHY_RfctrlIntc_override_TRSW, 18327 0x1, RADIO_MIMO_CORESEL_CORE1); 18328 wlc_phy_rfctrlintc_override_nphy(pi, 18329 NPHY_RfctrlIntc_override_TRSW, 18330 0x7, RADIO_MIMO_CORESEL_CORE2); 18331 } 18332 18333 orig_BBConfig = read_phy_reg(pi, 0x01); 18334 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 18335 18336 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 18337 18338 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 18339 txpwrindex = (s32) pi->nphy_cal_orig_pwr_idx[core]; 18340 18341 for (gainctrl_loopidx = 0; gainctrl_loopidx < 2; 18342 gainctrl_loopidx++) { 18343 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18344 false); 18345 18346 if (core == PHY_CORE_0) 18347 curr_m0m1 = m0m1 & 0xff00; 18348 else 18349 curr_m0m1 = m0m1 & 0x00ff; 18350 18351 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &curr_m0m1); 18352 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &curr_m0m1); 18353 18354 udelay(50); 18355 18356 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18357 NPHY_CAL_TSSISAMPS); 18358 18359 pi->nphy_bb_mult_save = 0; 18360 wlc_phy_stopplayback_nphy(pi); 18361 18362 delta_power = (dBm_targetpower * 4) - qdBm_power[core]; 18363 18364 txpwrindex -= stepsize * delta_power; 18365 if (txpwrindex < 0) 18366 txpwrindex = 0; 18367 else if (txpwrindex > 127) 18368 txpwrindex = 127; 18369 18370 if (CHSPEC_IS5G(pi->radio_chanspec)) { 18371 if (NREV_IS(pi->pubpi.phy_rev, 4) && 18372 (pi->srom_fem5g.extpagain == 3)) { 18373 if (txpwrindex < 30) 18374 txpwrindex = 30; 18375 } 18376 } else { 18377 if (NREV_GE(pi->pubpi.phy_rev, 5) && 18378 (pi->srom_fem2g.extpagain == 3)) { 18379 if (txpwrindex < 50) 18380 txpwrindex = 50; 18381 } 18382 } 18383 18384 wlc_phy_txpwr_index_nphy(pi, (1 << core), 18385 (u8) txpwrindex, true); 18386 } 18387 18388 pi->nphy_txcal_pwr_idx[core] = (u8) txpwrindex; 18389 18390 if (debug) { 18391 u16 radio_gain; 18392 u16 dbg_m0m1; 18393 18394 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18395 18396 wlc_phy_tx_tone_nphy(pi, freq_test, ampl_test, 0, 0, 18397 false); 18398 18399 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &dbg_m0m1); 18400 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &dbg_m0m1); 18401 18402 udelay(100); 18403 18404 wlc_phy_est_tonepwr_nphy(pi, qdBm_power, 18405 NPHY_CAL_TSSISAMPS); 18406 18407 wlc_phy_table_read_nphy(pi, 7, 1, (0x110 + core), 16, 18408 &radio_gain); 18409 18410 mdelay(4000); 18411 pi->nphy_bb_mult_save = 0; 18412 wlc_phy_stopplayback_nphy(pi); 18413 } 18414 } 18415 18416 wlc_phy_txpwr_index_nphy(pi, 1, pi->nphy_txcal_pwr_idx[0], true); 18417 wlc_phy_txpwr_index_nphy(pi, 2, pi->nphy_txcal_pwr_idx[1], true); 18418 18419 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &pi->nphy_txcal_bbmult); 18420 18421 write_phy_reg(pi, 0x01, orig_BBConfig); 18422 18423 write_phy_reg(pi, 0x91, phy_saveregs[0]); 18424 write_phy_reg(pi, 0x92, phy_saveregs[1]); 18425 write_phy_reg(pi, 0xe7, phy_saveregs[2]); 18426 write_phy_reg(pi, 0xec, phy_saveregs[3]); 18427 18428 pi->phyhang_avoid = phyhang_avoid_state; 18429 18430 if (pi->phyhang_avoid) 18431 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18432} 18433 18434static void wlc_phy_savecal_nphy(struct brcms_phy *pi) 18435{ 18436 void *tbl_ptr; 18437 int coreNum; 18438 u16 *txcal_radio_regs = NULL; 18439 18440 if (pi->phyhang_avoid) 18441 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18442 18443 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18444 18445 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18446 &pi->calibration_cache. 18447 rxcal_coeffs_2G); 18448 18449 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18450 txcal_radio_regs = 18451 pi->calibration_cache.txcal_radio_regs_2G; 18452 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18453 18454 pi->calibration_cache.txcal_radio_regs_2G[0] = 18455 read_radio_reg(pi, 18456 RADIO_2056_TX_LOFT_FINE_I | 18457 RADIO_2056_TX0); 18458 pi->calibration_cache.txcal_radio_regs_2G[1] = 18459 read_radio_reg(pi, 18460 RADIO_2056_TX_LOFT_FINE_Q | 18461 RADIO_2056_TX0); 18462 pi->calibration_cache.txcal_radio_regs_2G[2] = 18463 read_radio_reg(pi, 18464 RADIO_2056_TX_LOFT_FINE_I | 18465 RADIO_2056_TX1); 18466 pi->calibration_cache.txcal_radio_regs_2G[3] = 18467 read_radio_reg(pi, 18468 RADIO_2056_TX_LOFT_FINE_Q | 18469 RADIO_2056_TX1); 18470 18471 pi->calibration_cache.txcal_radio_regs_2G[4] = 18472 read_radio_reg(pi, 18473 RADIO_2056_TX_LOFT_COARSE_I | 18474 RADIO_2056_TX0); 18475 pi->calibration_cache.txcal_radio_regs_2G[5] = 18476 read_radio_reg(pi, 18477 RADIO_2056_TX_LOFT_COARSE_Q | 18478 RADIO_2056_TX0); 18479 pi->calibration_cache.txcal_radio_regs_2G[6] = 18480 read_radio_reg(pi, 18481 RADIO_2056_TX_LOFT_COARSE_I | 18482 RADIO_2056_TX1); 18483 pi->calibration_cache.txcal_radio_regs_2G[7] = 18484 read_radio_reg(pi, 18485 RADIO_2056_TX_LOFT_COARSE_Q | 18486 RADIO_2056_TX1); 18487 } else { 18488 pi->calibration_cache.txcal_radio_regs_2G[0] = 18489 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18490 pi->calibration_cache.txcal_radio_regs_2G[1] = 18491 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18492 pi->calibration_cache.txcal_radio_regs_2G[2] = 18493 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18494 pi->calibration_cache.txcal_radio_regs_2G[3] = 18495 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18496 } 18497 18498 pi->nphy_iqcal_chanspec_2G = pi->radio_chanspec; 18499 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18500 } else { 18501 18502 wlc_phy_rx_iq_coeffs_nphy(pi, 0, 18503 &pi->calibration_cache. 18504 rxcal_coeffs_5G); 18505 18506 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18507 txcal_radio_regs = 18508 pi->calibration_cache.txcal_radio_regs_5G; 18509 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18510 18511 pi->calibration_cache.txcal_radio_regs_5G[0] = 18512 read_radio_reg(pi, 18513 RADIO_2056_TX_LOFT_FINE_I | 18514 RADIO_2056_TX0); 18515 pi->calibration_cache.txcal_radio_regs_5G[1] = 18516 read_radio_reg(pi, 18517 RADIO_2056_TX_LOFT_FINE_Q | 18518 RADIO_2056_TX0); 18519 pi->calibration_cache.txcal_radio_regs_5G[2] = 18520 read_radio_reg(pi, 18521 RADIO_2056_TX_LOFT_FINE_I | 18522 RADIO_2056_TX1); 18523 pi->calibration_cache.txcal_radio_regs_5G[3] = 18524 read_radio_reg(pi, 18525 RADIO_2056_TX_LOFT_FINE_Q | 18526 RADIO_2056_TX1); 18527 18528 pi->calibration_cache.txcal_radio_regs_5G[4] = 18529 read_radio_reg(pi, 18530 RADIO_2056_TX_LOFT_COARSE_I | 18531 RADIO_2056_TX0); 18532 pi->calibration_cache.txcal_radio_regs_5G[5] = 18533 read_radio_reg(pi, 18534 RADIO_2056_TX_LOFT_COARSE_Q | 18535 RADIO_2056_TX0); 18536 pi->calibration_cache.txcal_radio_regs_5G[6] = 18537 read_radio_reg(pi, 18538 RADIO_2056_TX_LOFT_COARSE_I | 18539 RADIO_2056_TX1); 18540 pi->calibration_cache.txcal_radio_regs_5G[7] = 18541 read_radio_reg(pi, 18542 RADIO_2056_TX_LOFT_COARSE_Q | 18543 RADIO_2056_TX1); 18544 } else { 18545 pi->calibration_cache.txcal_radio_regs_5G[0] = 18546 read_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL); 18547 pi->calibration_cache.txcal_radio_regs_5G[1] = 18548 read_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL); 18549 pi->calibration_cache.txcal_radio_regs_5G[2] = 18550 read_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM); 18551 pi->calibration_cache.txcal_radio_regs_5G[3] = 18552 read_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM); 18553 } 18554 18555 pi->nphy_iqcal_chanspec_5G = pi->radio_chanspec; 18556 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18557 } 18558 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18559 for (coreNum = 0; coreNum <= 1; coreNum++) { 18560 18561 txcal_radio_regs[2 * coreNum] = 18562 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18563 LOFT_FINE_I); 18564 txcal_radio_regs[2 * coreNum + 1] = 18565 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18566 LOFT_FINE_Q); 18567 18568 txcal_radio_regs[2 * coreNum + 4] = 18569 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18570 LOFT_COARSE_I); 18571 txcal_radio_regs[2 * coreNum + 5] = 18572 READ_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18573 LOFT_COARSE_Q); 18574 } 18575 } 18576 18577 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 8, 80, 16, tbl_ptr); 18578 18579 if (pi->phyhang_avoid) 18580 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18581} 18582 18583static void wlc_phy_tx_iq_war_nphy(struct brcms_phy *pi) 18584{ 18585 struct nphy_iq_comp tx_comp; 18586 18587 wlc_phy_table_read_nphy(pi, 15, 4, 0x50, 16, &tx_comp); 18588 18589 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ, tx_comp.a0); 18590 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 2, tx_comp.b0); 18591 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 4, tx_comp.a1); 18592 wlapi_bmac_write_shm(pi->sh->physhim, M_20IN40_IQ + 6, tx_comp.b1); 18593} 18594 18595static void wlc_phy_restorecal_nphy(struct brcms_phy *pi) 18596{ 18597 u16 *loft_comp; 18598 u16 txcal_coeffs_bphy[4]; 18599 u16 *tbl_ptr; 18600 int coreNum; 18601 u16 *txcal_radio_regs = NULL; 18602 18603 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18604 if (pi->nphy_iqcal_chanspec_2G == 0) 18605 return; 18606 18607 tbl_ptr = pi->calibration_cache.txcal_coeffs_2G; 18608 loft_comp = &pi->calibration_cache.txcal_coeffs_2G[5]; 18609 } else { 18610 if (pi->nphy_iqcal_chanspec_5G == 0) 18611 return; 18612 18613 tbl_ptr = pi->calibration_cache.txcal_coeffs_5G; 18614 loft_comp = &pi->calibration_cache.txcal_coeffs_5G[5]; 18615 } 18616 18617 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 16, tbl_ptr); 18618 18619 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18620 txcal_coeffs_bphy[0] = tbl_ptr[0]; 18621 txcal_coeffs_bphy[1] = tbl_ptr[1]; 18622 txcal_coeffs_bphy[2] = tbl_ptr[2]; 18623 txcal_coeffs_bphy[3] = tbl_ptr[3]; 18624 } else { 18625 txcal_coeffs_bphy[0] = 0; 18626 txcal_coeffs_bphy[1] = 0; 18627 txcal_coeffs_bphy[2] = 0; 18628 txcal_coeffs_bphy[3] = 0; 18629 } 18630 18631 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 16, 18632 txcal_coeffs_bphy); 18633 18634 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 16, loft_comp); 18635 18636 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 16, loft_comp); 18637 18638 if (NREV_LT(pi->pubpi.phy_rev, 2)) 18639 wlc_phy_tx_iq_war_nphy(pi); 18640 18641 if (CHSPEC_IS2G(pi->radio_chanspec)) { 18642 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18643 txcal_radio_regs = 18644 pi->calibration_cache.txcal_radio_regs_2G; 18645 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18646 18647 write_radio_reg(pi, 18648 RADIO_2056_TX_LOFT_FINE_I | 18649 RADIO_2056_TX0, 18650 pi->calibration_cache. 18651 txcal_radio_regs_2G[0]); 18652 write_radio_reg(pi, 18653 RADIO_2056_TX_LOFT_FINE_Q | 18654 RADIO_2056_TX0, 18655 pi->calibration_cache. 18656 txcal_radio_regs_2G[1]); 18657 write_radio_reg(pi, 18658 RADIO_2056_TX_LOFT_FINE_I | 18659 RADIO_2056_TX1, 18660 pi->calibration_cache. 18661 txcal_radio_regs_2G[2]); 18662 write_radio_reg(pi, 18663 RADIO_2056_TX_LOFT_FINE_Q | 18664 RADIO_2056_TX1, 18665 pi->calibration_cache. 18666 txcal_radio_regs_2G[3]); 18667 18668 write_radio_reg(pi, 18669 RADIO_2056_TX_LOFT_COARSE_I | 18670 RADIO_2056_TX0, 18671 pi->calibration_cache. 18672 txcal_radio_regs_2G[4]); 18673 write_radio_reg(pi, 18674 RADIO_2056_TX_LOFT_COARSE_Q | 18675 RADIO_2056_TX0, 18676 pi->calibration_cache. 18677 txcal_radio_regs_2G[5]); 18678 write_radio_reg(pi, 18679 RADIO_2056_TX_LOFT_COARSE_I | 18680 RADIO_2056_TX1, 18681 pi->calibration_cache. 18682 txcal_radio_regs_2G[6]); 18683 write_radio_reg(pi, 18684 RADIO_2056_TX_LOFT_COARSE_Q | 18685 RADIO_2056_TX1, 18686 pi->calibration_cache. 18687 txcal_radio_regs_2G[7]); 18688 } else { 18689 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18690 pi->calibration_cache. 18691 txcal_radio_regs_2G[0]); 18692 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18693 pi->calibration_cache. 18694 txcal_radio_regs_2G[1]); 18695 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18696 pi->calibration_cache. 18697 txcal_radio_regs_2G[2]); 18698 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18699 pi->calibration_cache. 18700 txcal_radio_regs_2G[3]); 18701 } 18702 18703 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18704 &pi->calibration_cache. 18705 rxcal_coeffs_2G); 18706 } else { 18707 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18708 txcal_radio_regs = 18709 pi->calibration_cache.txcal_radio_regs_5G; 18710 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18711 18712 write_radio_reg(pi, 18713 RADIO_2056_TX_LOFT_FINE_I | 18714 RADIO_2056_TX0, 18715 pi->calibration_cache. 18716 txcal_radio_regs_5G[0]); 18717 write_radio_reg(pi, 18718 RADIO_2056_TX_LOFT_FINE_Q | 18719 RADIO_2056_TX0, 18720 pi->calibration_cache. 18721 txcal_radio_regs_5G[1]); 18722 write_radio_reg(pi, 18723 RADIO_2056_TX_LOFT_FINE_I | 18724 RADIO_2056_TX1, 18725 pi->calibration_cache. 18726 txcal_radio_regs_5G[2]); 18727 write_radio_reg(pi, 18728 RADIO_2056_TX_LOFT_FINE_Q | 18729 RADIO_2056_TX1, 18730 pi->calibration_cache. 18731 txcal_radio_regs_5G[3]); 18732 18733 write_radio_reg(pi, 18734 RADIO_2056_TX_LOFT_COARSE_I | 18735 RADIO_2056_TX0, 18736 pi->calibration_cache. 18737 txcal_radio_regs_5G[4]); 18738 write_radio_reg(pi, 18739 RADIO_2056_TX_LOFT_COARSE_Q | 18740 RADIO_2056_TX0, 18741 pi->calibration_cache. 18742 txcal_radio_regs_5G[5]); 18743 write_radio_reg(pi, 18744 RADIO_2056_TX_LOFT_COARSE_I | 18745 RADIO_2056_TX1, 18746 pi->calibration_cache. 18747 txcal_radio_regs_5G[6]); 18748 write_radio_reg(pi, 18749 RADIO_2056_TX_LOFT_COARSE_Q | 18750 RADIO_2056_TX1, 18751 pi->calibration_cache. 18752 txcal_radio_regs_5G[7]); 18753 } else { 18754 write_radio_reg(pi, RADIO_2055_CORE1_TX_VOS_CNCL, 18755 pi->calibration_cache. 18756 txcal_radio_regs_5G[0]); 18757 write_radio_reg(pi, RADIO_2055_CORE2_TX_VOS_CNCL, 18758 pi->calibration_cache. 18759 txcal_radio_regs_5G[1]); 18760 write_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 18761 pi->calibration_cache. 18762 txcal_radio_regs_5G[2]); 18763 write_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 18764 pi->calibration_cache. 18765 txcal_radio_regs_5G[3]); 18766 } 18767 18768 wlc_phy_rx_iq_coeffs_nphy(pi, 1, 18769 &pi->calibration_cache. 18770 rxcal_coeffs_5G); 18771 } 18772 18773 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 18774 for (coreNum = 0; coreNum <= 1; coreNum++) { 18775 18776 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18777 LOFT_FINE_I, 18778 txcal_radio_regs[2 * coreNum]); 18779 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18780 LOFT_FINE_Q, 18781 txcal_radio_regs[2 * coreNum + 1]); 18782 18783 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18784 LOFT_COARSE_I, 18785 txcal_radio_regs[2 * coreNum + 4]); 18786 WRITE_RADIO_REG3(pi, RADIO_2057, TX, coreNum, 18787 LOFT_COARSE_Q, 18788 txcal_radio_regs[2 * coreNum + 5]); 18789 } 18790 } 18791} 18792 18793static void wlc_phy_txpwrctrl_coeff_setup_nphy(struct brcms_phy *pi) 18794{ 18795 u32 idx; 18796 u16 iqloCalbuf[7]; 18797 u32 iqcomp, locomp, curr_locomp; 18798 s8 locomp_i, locomp_q; 18799 s8 curr_locomp_i, curr_locomp_q; 18800 u32 tbl_id, tbl_len, tbl_offset; 18801 u32 regval[128]; 18802 18803 if (pi->phyhang_avoid) 18804 wlc_phy_stay_in_carriersearch_nphy(pi, true); 18805 18806 wlc_phy_table_read_nphy(pi, 15, 7, 80, 16, iqloCalbuf); 18807 18808 tbl_len = 128; 18809 tbl_offset = 320; 18810 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18811 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18812 iqcomp = 18813 (tbl_id == 18814 26) ? (((u32) (iqloCalbuf[0] & 0x3ff)) << 10) | 18815 (iqloCalbuf[1] & 0x3ff) 18816 : (((u32) (iqloCalbuf[2] & 0x3ff)) << 10) | 18817 (iqloCalbuf[3] & 0x3ff); 18818 18819 for (idx = 0; idx < tbl_len; idx++) 18820 regval[idx] = iqcomp; 18821 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18822 regval); 18823 } 18824 18825 tbl_offset = 448; 18826 for (tbl_id = NPHY_TBL_ID_CORE1TXPWRCTL; 18827 tbl_id <= NPHY_TBL_ID_CORE2TXPWRCTL; tbl_id++) { 18828 18829 locomp = 18830 (u32) ((tbl_id == 26) ? iqloCalbuf[5] : iqloCalbuf[6]); 18831 locomp_i = (s8) ((locomp >> 8) & 0xff); 18832 locomp_q = (s8) ((locomp) & 0xff); 18833 for (idx = 0; idx < tbl_len; idx++) { 18834 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18835 curr_locomp_i = locomp_i; 18836 curr_locomp_q = locomp_q; 18837 } else { 18838 curr_locomp_i = (s8) ((locomp_i * 18839 nphy_tpc_loscale[idx] + 18840 128) >> 8); 18841 curr_locomp_q = 18842 (s8) ((locomp_q * 18843 nphy_tpc_loscale[idx] + 18844 128) >> 8); 18845 } 18846 curr_locomp = (u32) ((curr_locomp_i & 0xff) << 8); 18847 curr_locomp |= (u32) (curr_locomp_q & 0xff); 18848 regval[idx] = curr_locomp; 18849 } 18850 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, 18851 regval); 18852 } 18853 18854 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 18855 18856 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX1, 0xFFFF); 18857 wlapi_bmac_write_shm(pi->sh->physhim, M_CURR_IDX2, 0xFFFF); 18858 } 18859 18860 if (pi->phyhang_avoid) 18861 wlc_phy_stay_in_carriersearch_nphy(pi, false); 18862} 18863 18864static void wlc_phy_txlpfbw_nphy(struct brcms_phy *pi) 18865{ 18866 u8 tx_lpf_bw = 0; 18867 18868 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 18869 if (CHSPEC_IS40(pi->radio_chanspec)) 18870 tx_lpf_bw = 3; 18871 else 18872 tx_lpf_bw = 1; 18873 18874 if (PHY_IPA(pi)) { 18875 if (CHSPEC_IS40(pi->radio_chanspec)) 18876 tx_lpf_bw = 5; 18877 else 18878 tx_lpf_bw = 4; 18879 } 18880 18881 write_phy_reg(pi, 0xe8, 18882 (tx_lpf_bw << 0) | 18883 (tx_lpf_bw << 3) | 18884 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18885 18886 if (PHY_IPA(pi)) { 18887 18888 if (CHSPEC_IS40(pi->radio_chanspec)) 18889 tx_lpf_bw = 4; 18890 else 18891 tx_lpf_bw = 1; 18892 18893 write_phy_reg(pi, 0xe9, 18894 (tx_lpf_bw << 0) | 18895 (tx_lpf_bw << 3) | 18896 (tx_lpf_bw << 6) | (tx_lpf_bw << 9)); 18897 } 18898 } 18899} 18900 18901static void 18902wlc_phy_adjust_rx_analpfbw_nphy(struct brcms_phy *pi, u16 reduction_factr) 18903{ 18904 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { 18905 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 18906 CHSPEC_IS40(pi->radio_chanspec)) { 18907 if (!pi->nphy_anarxlpf_adjusted) { 18908 write_radio_reg(pi, 18909 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 18910 RADIO_2056_RX0), 18911 ((pi->nphy_rccal_value + 18912 reduction_factr) | 0x80)); 18913 18914 pi->nphy_anarxlpf_adjusted = true; 18915 } 18916 } else { 18917 if (pi->nphy_anarxlpf_adjusted) { 18918 write_radio_reg(pi, 18919 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 18920 RADIO_2056_RX0), 18921 (pi->nphy_rccal_value | 0x80)); 18922 18923 pi->nphy_anarxlpf_adjusted = false; 18924 } 18925 } 18926 } 18927} 18928 18929static void 18930wlc_phy_adjust_min_noisevar_nphy(struct brcms_phy *pi, int ntones, 18931 int *tone_id_buf, u32 *noise_var_buf) 18932{ 18933 int i; 18934 u32 offset; 18935 int tone_id; 18936 int tbllen = 18937 CHSPEC_IS40(pi->radio_chanspec) ? 18938 NPHY_NOISEVAR_TBLLEN40 : NPHY_NOISEVAR_TBLLEN20; 18939 18940 if (pi->nphy_noisevars_adjusted) { 18941 for (i = 0; i < pi->nphy_saved_noisevars.bufcount; i++) { 18942 tone_id = pi->nphy_saved_noisevars.tone_id[i]; 18943 offset = (tone_id >= 0) ? 18944 ((tone_id * 18945 2) + 1) : (tbllen + (tone_id * 2) + 1); 18946 wlc_phy_table_write_nphy( 18947 pi, NPHY_TBL_ID_NOISEVAR, 1, 18948 offset, 32, 18949 &pi->nphy_saved_noisevars.min_noise_vars[i]); 18950 } 18951 18952 pi->nphy_saved_noisevars.bufcount = 0; 18953 pi->nphy_noisevars_adjusted = false; 18954 } 18955 18956 if ((noise_var_buf != NULL) && (tone_id_buf != NULL)) { 18957 pi->nphy_saved_noisevars.bufcount = 0; 18958 18959 for (i = 0; i < ntones; i++) { 18960 tone_id = tone_id_buf[i]; 18961 offset = (tone_id >= 0) ? 18962 ((tone_id * 2) + 1) : 18963 (tbllen + (tone_id * 2) + 1); 18964 pi->nphy_saved_noisevars.tone_id[i] = tone_id; 18965 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 18966 offset, 32, 18967 &pi->nphy_saved_noisevars. 18968 min_noise_vars[i]); 18969 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_NOISEVAR, 1, 18970 offset, 32, &noise_var_buf[i]); 18971 pi->nphy_saved_noisevars.bufcount++; 18972 } 18973 18974 pi->nphy_noisevars_adjusted = true; 18975 } 18976} 18977 18978static void wlc_phy_adjust_crsminpwr_nphy(struct brcms_phy *pi, u8 minpwr) 18979{ 18980 u16 regval; 18981 18982 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 18983 if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && 18984 CHSPEC_IS40(pi->radio_chanspec)) { 18985 if (!pi->nphy_crsminpwr_adjusted) { 18986 regval = read_phy_reg(pi, 0x27d); 18987 pi->nphy_crsminpwr[0] = regval & 0xff; 18988 regval &= 0xff00; 18989 regval |= (u16) minpwr; 18990 write_phy_reg(pi, 0x27d, regval); 18991 18992 regval = read_phy_reg(pi, 0x280); 18993 pi->nphy_crsminpwr[1] = regval & 0xff; 18994 regval &= 0xff00; 18995 regval |= (u16) minpwr; 18996 write_phy_reg(pi, 0x280, regval); 18997 18998 regval = read_phy_reg(pi, 0x283); 18999 pi->nphy_crsminpwr[2] = regval & 0xff; 19000 regval &= 0xff00; 19001 regval |= (u16) minpwr; 19002 write_phy_reg(pi, 0x283, regval); 19003 19004 pi->nphy_crsminpwr_adjusted = true; 19005 } 19006 } else { 19007 if (pi->nphy_crsminpwr_adjusted) { 19008 regval = read_phy_reg(pi, 0x27d); 19009 regval &= 0xff00; 19010 regval |= pi->nphy_crsminpwr[0]; 19011 write_phy_reg(pi, 0x27d, regval); 19012 19013 regval = read_phy_reg(pi, 0x280); 19014 regval &= 0xff00; 19015 regval |= pi->nphy_crsminpwr[1]; 19016 write_phy_reg(pi, 0x280, regval); 19017 19018 regval = read_phy_reg(pi, 0x283); 19019 regval &= 0xff00; 19020 regval |= pi->nphy_crsminpwr[2]; 19021 write_phy_reg(pi, 0x283, regval); 19022 19023 pi->nphy_crsminpwr_adjusted = false; 19024 } 19025 } 19026 } 19027} 19028 19029static void wlc_phy_spurwar_nphy(struct brcms_phy *pi) 19030{ 19031 u16 cur_channel = 0; 19032 int nphy_adj_tone_id_buf[] = { 57, 58 }; 19033 u32 nphy_adj_noise_var_buf[] = { 0x3ff, 0x3ff }; 19034 bool isAdjustNoiseVar = false; 19035 uint numTonesAdjust = 0; 19036 19037 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19038 if (pi->phyhang_avoid) 19039 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19040 19041 cur_channel = CHSPEC_CHANNEL(pi->radio_chanspec); 19042 19043 if (pi->nphy_gband_spurwar_en) { 19044 19045 wlc_phy_adjust_rx_analpfbw_nphy( 19046 pi, 19047 NPHY_ANARXLPFBW_REDUCTIONFACT); 19048 19049 if (CHSPEC_IS2G(pi->radio_chanspec)) { 19050 if ((cur_channel == 11) 19051 && CHSPEC_IS40(pi->radio_chanspec)) 19052 wlc_phy_adjust_min_noisevar_nphy( 19053 pi, 2, 19054 nphy_adj_tone_id_buf, 19055 nphy_adj_noise_var_buf); 19056 else 19057 wlc_phy_adjust_min_noisevar_nphy(pi, 0, 19058 NULL, 19059 NULL); 19060 } 19061 19062 wlc_phy_adjust_crsminpwr_nphy(pi, 19063 NPHY_ADJUSTED_MINCRSPOWER); 19064 } 19065 19066 if ((pi->nphy_gband_spurwar2_en) 19067 && CHSPEC_IS2G(pi->radio_chanspec)) { 19068 19069 if (CHSPEC_IS40(pi->radio_chanspec)) { 19070 switch (cur_channel) { 19071 case 3: 19072 nphy_adj_tone_id_buf[0] = 57; 19073 nphy_adj_tone_id_buf[1] = 58; 19074 nphy_adj_noise_var_buf[0] = 0x22f; 19075 nphy_adj_noise_var_buf[1] = 0x25f; 19076 isAdjustNoiseVar = true; 19077 break; 19078 case 4: 19079 nphy_adj_tone_id_buf[0] = 41; 19080 nphy_adj_tone_id_buf[1] = 42; 19081 nphy_adj_noise_var_buf[0] = 0x22f; 19082 nphy_adj_noise_var_buf[1] = 0x25f; 19083 isAdjustNoiseVar = true; 19084 break; 19085 case 5: 19086 nphy_adj_tone_id_buf[0] = 25; 19087 nphy_adj_tone_id_buf[1] = 26; 19088 nphy_adj_noise_var_buf[0] = 0x24f; 19089 nphy_adj_noise_var_buf[1] = 0x25f; 19090 isAdjustNoiseVar = true; 19091 break; 19092 case 6: 19093 nphy_adj_tone_id_buf[0] = 9; 19094 nphy_adj_tone_id_buf[1] = 10; 19095 nphy_adj_noise_var_buf[0] = 0x22f; 19096 nphy_adj_noise_var_buf[1] = 0x24f; 19097 isAdjustNoiseVar = true; 19098 break; 19099 case 7: 19100 nphy_adj_tone_id_buf[0] = 121; 19101 nphy_adj_tone_id_buf[1] = 122; 19102 nphy_adj_noise_var_buf[0] = 0x18f; 19103 nphy_adj_noise_var_buf[1] = 0x24f; 19104 isAdjustNoiseVar = true; 19105 break; 19106 case 8: 19107 nphy_adj_tone_id_buf[0] = 105; 19108 nphy_adj_tone_id_buf[1] = 106; 19109 nphy_adj_noise_var_buf[0] = 0x22f; 19110 nphy_adj_noise_var_buf[1] = 0x25f; 19111 isAdjustNoiseVar = true; 19112 break; 19113 case 9: 19114 nphy_adj_tone_id_buf[0] = 89; 19115 nphy_adj_tone_id_buf[1] = 90; 19116 nphy_adj_noise_var_buf[0] = 0x22f; 19117 nphy_adj_noise_var_buf[1] = 0x24f; 19118 isAdjustNoiseVar = true; 19119 break; 19120 case 10: 19121 nphy_adj_tone_id_buf[0] = 73; 19122 nphy_adj_tone_id_buf[1] = 74; 19123 nphy_adj_noise_var_buf[0] = 0x22f; 19124 nphy_adj_noise_var_buf[1] = 0x24f; 19125 isAdjustNoiseVar = true; 19126 break; 19127 default: 19128 isAdjustNoiseVar = false; 19129 break; 19130 } 19131 } 19132 19133 if (isAdjustNoiseVar) { 19134 numTonesAdjust = ARRAY_SIZE(nphy_adj_tone_id_buf); 19135 19136 wlc_phy_adjust_min_noisevar_nphy( 19137 pi, 19138 numTonesAdjust, 19139 nphy_adj_tone_id_buf, 19140 nphy_adj_noise_var_buf); 19141 } else { 19142 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19143 NULL); 19144 } 19145 } 19146 19147 if ((pi->nphy_aband_spurwar_en) && 19148 (CHSPEC_IS5G(pi->radio_chanspec))) { 19149 switch (cur_channel) { 19150 case 54: 19151 nphy_adj_tone_id_buf[0] = 32; 19152 nphy_adj_noise_var_buf[0] = 0x25f; 19153 break; 19154 case 38: 19155 case 102: 19156 case 118: 19157 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) && 19158 (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 19159 nphy_adj_tone_id_buf[0] = 32; 19160 nphy_adj_noise_var_buf[0] = 0x21f; 19161 } else { 19162 nphy_adj_tone_id_buf[0] = 0; 19163 nphy_adj_noise_var_buf[0] = 0x0; 19164 } 19165 break; 19166 case 134: 19167 nphy_adj_tone_id_buf[0] = 32; 19168 nphy_adj_noise_var_buf[0] = 0x21f; 19169 break; 19170 case 151: 19171 nphy_adj_tone_id_buf[0] = 16; 19172 nphy_adj_noise_var_buf[0] = 0x23f; 19173 break; 19174 case 153: 19175 case 161: 19176 nphy_adj_tone_id_buf[0] = 48; 19177 nphy_adj_noise_var_buf[0] = 0x23f; 19178 break; 19179 default: 19180 nphy_adj_tone_id_buf[0] = 0; 19181 nphy_adj_noise_var_buf[0] = 0x0; 19182 break; 19183 } 19184 19185 if (nphy_adj_tone_id_buf[0] 19186 && nphy_adj_noise_var_buf[0]) 19187 wlc_phy_adjust_min_noisevar_nphy( 19188 pi, 1, 19189 nphy_adj_tone_id_buf, 19190 nphy_adj_noise_var_buf); 19191 else 19192 wlc_phy_adjust_min_noisevar_nphy(pi, 0, NULL, 19193 NULL); 19194 } 19195 19196 if (pi->phyhang_avoid) 19197 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19198 } 19199} 19200 19201void wlc_phy_init_nphy(struct brcms_phy *pi) 19202{ 19203 u16 val; 19204 u16 clip1_ths[2]; 19205 struct nphy_txgains target_gain; 19206 u8 tx_pwr_ctrl_state; 19207 bool do_nphy_cal = false; 19208 uint core; 19209 u32 d11_clk_ctl_st; 19210 bool do_rssi_cal = false; 19211 19212 core = 0; 19213 19214 if (!(pi->measure_hold & PHY_HOLD_FOR_SCAN)) 19215 pi->measure_hold |= PHY_HOLD_FOR_NOT_ASSOC; 19216 19217 if ((ISNPHY(pi)) && (NREV_GE(pi->pubpi.phy_rev, 5)) && 19218 ((pi->sh->chippkg == BCMA_PKG_ID_BCM4717) || 19219 (pi->sh->chippkg == BCMA_PKG_ID_BCM4718))) { 19220 if ((pi->sh->boardflags & BFL_EXTLNA) && 19221 (CHSPEC_IS2G(pi->radio_chanspec))) 19222 bcma_cc_set32(&pi->d11core->bus->drv_cc, 19223 BCMA_CC_CHIPCTL, 0x40); 19224 } 19225 19226 if ((!PHY_IPA(pi)) && (pi->sh->chip == BCMA_CHIP_ID_BCM5357)) 19227 bcma_chipco_chipctl_maskset(&pi->d11core->bus->drv_cc, 1, 19228 ~CCTRL5357_EXTPA, CCTRL5357_EXTPA); 19229 19230 if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) && 19231 CHSPEC_IS40(pi->radio_chanspec)) { 19232 19233 d11_clk_ctl_st = bcma_read32(pi->d11core, 19234 D11REGOFFS(clk_ctl_st)); 19235 bcma_mask32(pi->d11core, D11REGOFFS(clk_ctl_st), 19236 ~(CCS_FORCEHT | CCS_HTAREQ)); 19237 19238 bcma_write32(pi->d11core, D11REGOFFS(clk_ctl_st), 19239 d11_clk_ctl_st); 19240 } 19241 19242 pi->use_int_tx_iqlo_cal_nphy = 19243 (PHY_IPA(pi) || 19244 (NREV_GE(pi->pubpi.phy_rev, 7) || 19245 (NREV_GE(pi->pubpi.phy_rev, 5) 19246 && pi->sh->boardflags2 & BFL2_INTERNDET_TXIQCAL))); 19247 19248 pi->internal_tx_iqlo_cal_tapoff_intpa_nphy = false; 19249 19250 pi->nphy_deaf_count = 0; 19251 19252 wlc_phy_tbl_init_nphy(pi); 19253 19254 pi->nphy_crsminpwr_adjusted = false; 19255 pi->nphy_noisevars_adjusted = false; 19256 19257 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19258 write_phy_reg(pi, 0xe7, 0); 19259 write_phy_reg(pi, 0xec, 0); 19260 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19261 write_phy_reg(pi, 0x342, 0); 19262 write_phy_reg(pi, 0x343, 0); 19263 write_phy_reg(pi, 0x346, 0); 19264 write_phy_reg(pi, 0x347, 0); 19265 } 19266 write_phy_reg(pi, 0xe5, 0); 19267 write_phy_reg(pi, 0xe6, 0); 19268 } else { 19269 write_phy_reg(pi, 0xec, 0); 19270 } 19271 19272 write_phy_reg(pi, 0x91, 0); 19273 write_phy_reg(pi, 0x92, 0); 19274 if (NREV_LT(pi->pubpi.phy_rev, 6)) { 19275 write_phy_reg(pi, 0x93, 0); 19276 write_phy_reg(pi, 0x94, 0); 19277 } 19278 19279 and_phy_reg(pi, 0xa1, ~3); 19280 19281 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19282 write_phy_reg(pi, 0x8f, 0); 19283 write_phy_reg(pi, 0xa5, 0); 19284 } else { 19285 write_phy_reg(pi, 0xa5, 0); 19286 } 19287 19288 if (NREV_IS(pi->pubpi.phy_rev, 2)) 19289 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 19290 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 19291 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 19292 19293 write_phy_reg(pi, 0x203, 32); 19294 write_phy_reg(pi, 0x201, 32); 19295 19296 if (pi->sh->boardflags2 & BFL2_SKWRKFEM_BRD) 19297 write_phy_reg(pi, 0x20d, 160); 19298 else 19299 write_phy_reg(pi, 0x20d, 184); 19300 19301 write_phy_reg(pi, 0x13a, 200); 19302 19303 write_phy_reg(pi, 0x70, 80); 19304 19305 write_phy_reg(pi, 0x1ff, 48); 19306 19307 if (NREV_LT(pi->pubpi.phy_rev, 8)) 19308 wlc_phy_update_mimoconfig_nphy(pi, pi->n_preamble_override); 19309 19310 wlc_phy_stf_chain_upd_nphy(pi); 19311 19312 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 19313 write_phy_reg(pi, 0x180, 0xaa8); 19314 write_phy_reg(pi, 0x181, 0x9a4); 19315 } 19316 19317 if (PHY_IPA(pi)) { 19318 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 19319 19320 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 19321 0x29b, (0x1 << 0), (1) << 0); 19322 19323 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x298 : 19324 0x29c, (0x1ff << 7), 19325 (pi->nphy_papd_epsilon_offset[core]) << 7); 19326 19327 } 19328 19329 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 19330 } else if (NREV_GE(pi->pubpi.phy_rev, 5)) { 19331 wlc_phy_extpa_set_tx_digi_filts_nphy(pi); 19332 } 19333 19334 wlc_phy_workarounds_nphy(pi); 19335 19336 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19337 19338 val = read_phy_reg(pi, 0x01); 19339 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19340 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19341 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19342 19343 wlapi_bmac_macphyclk_set(pi->sh->physhim, ON); 19344 19345 wlc_phy_pa_override_nphy(pi, OFF); 19346 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 19347 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19348 wlc_phy_pa_override_nphy(pi, ON); 19349 19350 wlc_phy_classifier_nphy(pi, 0, 0); 19351 wlc_phy_clip_det_nphy(pi, 0, clip1_ths); 19352 19353 if (CHSPEC_IS2G(pi->radio_chanspec)) 19354 wlc_phy_bphy_init_nphy(pi); 19355 19356 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 19357 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 19358 19359 wlc_phy_txpwr_fixpower_nphy(pi); 19360 19361 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 19362 19363 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 19364 19365 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19366 u32 *tx_pwrctrl_tbl = NULL; 19367 u16 idx; 19368 s16 pga_gn = 0; 19369 s16 pad_gn = 0; 19370 s32 rfpwr_offset; 19371 19372 if (PHY_IPA(pi)) { 19373 tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); 19374 } else { 19375 if (CHSPEC_IS5G(pi->radio_chanspec)) { 19376 if (NREV_IS(pi->pubpi.phy_rev, 3)) 19377 tx_pwrctrl_tbl = 19378 nphy_tpc_5GHz_txgain_rev3; 19379 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 19380 tx_pwrctrl_tbl = 19381 (pi->srom_fem5g.extpagain == 19382 3) ? 19383 nphy_tpc_5GHz_txgain_HiPwrEPA : 19384 nphy_tpc_5GHz_txgain_rev4; 19385 else 19386 tx_pwrctrl_tbl = 19387 nphy_tpc_5GHz_txgain_rev5; 19388 } else { 19389 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19390 if (pi->pubpi.radiorev == 5) 19391 tx_pwrctrl_tbl = 19392 nphy_tpc_txgain_epa_2057rev5; 19393 else if (pi->pubpi.radiorev == 3) 19394 tx_pwrctrl_tbl = 19395 nphy_tpc_txgain_epa_2057rev3; 19396 } else { 19397 if (NREV_GE(pi->pubpi.phy_rev, 5) && 19398 (pi->srom_fem2g.extpagain == 3)) 19399 tx_pwrctrl_tbl = 19400 nphy_tpc_txgain_HiPwrEPA; 19401 else 19402 tx_pwrctrl_tbl = 19403 nphy_tpc_txgain_rev3; 19404 } 19405 } 19406 } 19407 19408 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19409 192, 32, tx_pwrctrl_tbl); 19410 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19411 192, 32, tx_pwrctrl_tbl); 19412 19413 pi->nphy_gmval = (u16) ((*tx_pwrctrl_tbl >> 16) & 0x7000); 19414 19415 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19416 19417 for (idx = 0; idx < 128; idx++) { 19418 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19419 pad_gn = (tx_pwrctrl_tbl[idx] >> 19) & 0x1f; 19420 rfpwr_offset = get_rf_pwr_offset(pi, pga_gn, 19421 pad_gn); 19422 wlc_phy_table_write_nphy( 19423 pi, 19424 NPHY_TBL_ID_CORE1TXPWRCTL, 19425 1, 576 + idx, 32, 19426 &rfpwr_offset); 19427 wlc_phy_table_write_nphy( 19428 pi, 19429 NPHY_TBL_ID_CORE2TXPWRCTL, 19430 1, 576 + idx, 32, 19431 &rfpwr_offset); 19432 } 19433 } else { 19434 19435 for (idx = 0; idx < 128; idx++) { 19436 pga_gn = (tx_pwrctrl_tbl[idx] >> 24) & 0xf; 19437 if (CHSPEC_IS2G(pi->radio_chanspec)) 19438 rfpwr_offset = (s16) 19439 nphy_papd_pga_gain_delta_ipa_2g 19440 [pga_gn]; 19441 else 19442 rfpwr_offset = (s16) 19443 nphy_papd_pga_gain_delta_ipa_5g 19444 [pga_gn]; 19445 19446 wlc_phy_table_write_nphy( 19447 pi, 19448 NPHY_TBL_ID_CORE1TXPWRCTL, 19449 1, 576 + idx, 32, 19450 &rfpwr_offset); 19451 wlc_phy_table_write_nphy( 19452 pi, 19453 NPHY_TBL_ID_CORE2TXPWRCTL, 19454 1, 576 + idx, 32, 19455 &rfpwr_offset); 19456 } 19457 19458 } 19459 } else { 19460 19461 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 128, 19462 192, 32, nphy_tpc_txgain); 19463 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 128, 19464 192, 32, nphy_tpc_txgain); 19465 } 19466 19467 if (pi->sh->phyrxchain != 0x3) 19468 wlc_phy_rxcore_setstate_nphy((struct brcms_phy_pub *) pi, 19469 pi->sh->phyrxchain); 19470 19471 if (PHY_PERICAL_MPHASE_PENDING(pi)) 19472 wlc_phy_cal_perical_mphase_restart(pi); 19473 19474 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19475 do_rssi_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19476 (pi->nphy_rssical_chanspec_2G == 0) : 19477 (pi->nphy_rssical_chanspec_5G == 0); 19478 19479 if (do_rssi_cal) 19480 wlc_phy_rssi_cal_nphy(pi); 19481 else 19482 wlc_phy_restore_rssical_nphy(pi); 19483 } else { 19484 wlc_phy_rssi_cal_nphy(pi); 19485 } 19486 19487 if (!SCAN_RM_IN_PROGRESS(pi)) 19488 do_nphy_cal = (CHSPEC_IS2G(pi->radio_chanspec)) ? 19489 (pi->nphy_iqcal_chanspec_2G == 0) : 19490 (pi->nphy_iqcal_chanspec_5G == 0); 19491 19492 if (!pi->do_initcal) 19493 do_nphy_cal = false; 19494 19495 if (do_nphy_cal) { 19496 19497 target_gain = wlc_phy_get_tx_gain_nphy(pi); 19498 19499 if (pi->antsel_type == ANTSEL_2x3) 19500 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, 19501 true); 19502 19503 if (pi->nphy_perical != PHY_PERICAL_MPHASE) { 19504 wlc_phy_rssi_cal_nphy(pi); 19505 19506 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19507 pi->nphy_cal_orig_pwr_idx[0] = 19508 pi->nphy_txpwrindex[PHY_CORE_0] 19509 . 19510 index_internal; 19511 pi->nphy_cal_orig_pwr_idx[1] = 19512 pi->nphy_txpwrindex[PHY_CORE_1] 19513 . 19514 index_internal; 19515 19516 wlc_phy_precal_txgain_nphy(pi); 19517 target_gain = 19518 wlc_phy_get_tx_gain_nphy(pi); 19519 } 19520 19521 if (wlc_phy_cal_txiqlo_nphy 19522 (pi, target_gain, true, 19523 false) == 0) { 19524 if (wlc_phy_cal_rxiq_nphy 19525 (pi, target_gain, 2, 19526 false) == 0) 19527 wlc_phy_savecal_nphy(pi); 19528 19529 } 19530 } else if (pi->mphase_cal_phase_id == 19531 MPHASE_CAL_STATE_IDLE) { 19532 wlc_phy_cal_perical((struct brcms_phy_pub *) pi, 19533 PHY_PERICAL_PHYINIT); 19534 } 19535 } else { 19536 wlc_phy_restorecal_nphy(pi); 19537 } 19538 19539 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 19540 19541 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 19542 19543 wlc_phy_nphy_tkip_rifs_war(pi, pi->sh->_rifs_phy); 19544 19545 if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LE(pi->pubpi.phy_rev, 6)) 19546 19547 write_phy_reg(pi, 0x70, 50); 19548 19549 wlc_phy_txlpfbw_nphy(pi); 19550 19551 wlc_phy_spurwar_nphy(pi); 19552 19553} 19554 19555static void wlc_phy_resetcca_nphy(struct brcms_phy *pi) 19556{ 19557 u16 val; 19558 19559 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 19560 19561 val = read_phy_reg(pi, 0x01); 19562 write_phy_reg(pi, 0x01, val | BBCFG_RESETCCA); 19563 udelay(1); 19564 write_phy_reg(pi, 0x01, val & (~BBCFG_RESETCCA)); 19565 19566 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 19567 19568 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19569} 19570 19571void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en) 19572{ 19573 u16 rfctrlintc_override_val; 19574 19575 if (!en) { 19576 19577 pi->rfctrlIntc1_save = read_phy_reg(pi, 0x91); 19578 pi->rfctrlIntc2_save = read_phy_reg(pi, 0x92); 19579 19580 if (NREV_GE(pi->pubpi.phy_rev, 7)) 19581 rfctrlintc_override_val = 0x1480; 19582 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 19583 rfctrlintc_override_val = 19584 CHSPEC_IS5G(pi->radio_chanspec) ? 0x600 : 0x480; 19585 else 19586 rfctrlintc_override_val = 19587 CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 19588 19589 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 19590 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 19591 } else { 19592 write_phy_reg(pi, 0x91, pi->rfctrlIntc1_save); 19593 write_phy_reg(pi, 0x92, pi->rfctrlIntc2_save); 19594 } 19595 19596} 19597 19598void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi) 19599{ 19600 19601 u16 txrx_chain = 19602 (NPHY_RfseqCoreActv_TxRxChain0 | NPHY_RfseqCoreActv_TxRxChain1); 19603 bool CoreActv_override = false; 19604 19605 if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN0) { 19606 txrx_chain = NPHY_RfseqCoreActv_TxRxChain0; 19607 CoreActv_override = true; 19608 19609 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19610 and_phy_reg(pi, 0xa0, ~0x20); 19611 } else if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN1) { 19612 txrx_chain = NPHY_RfseqCoreActv_TxRxChain1; 19613 CoreActv_override = true; 19614 19615 if (NREV_LE(pi->pubpi.phy_rev, 2)) 19616 or_phy_reg(pi, 0xa0, 0x20); 19617 } 19618 19619 mod_phy_reg(pi, 0xa2, ((0xf << 0) | (0xf << 4)), txrx_chain); 19620 19621 if (CoreActv_override) { 19622 pi->nphy_perical = PHY_PERICAL_DISABLE; 19623 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 19624 } else { 19625 pi->nphy_perical = PHY_PERICAL_MPHASE; 19626 and_phy_reg(pi, 0xa1, ~NPHY_RfseqMode_CoreActv_override); 19627 } 19628} 19629 19630void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih, u8 rxcore_bitmask) 19631{ 19632 u16 regval; 19633 u16 tbl_buf[16]; 19634 uint i; 19635 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19636 u16 tbl_opcode; 19637 bool suspend; 19638 19639 pi->sh->phyrxchain = rxcore_bitmask; 19640 19641 if (!pi->sh->clk) 19642 return; 19643 19644 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 19645 MCTL_EN_MAC)); 19646 if (!suspend) 19647 wlapi_suspend_mac_and_wait(pi->sh->physhim); 19648 19649 if (pi->phyhang_avoid) 19650 wlc_phy_stay_in_carriersearch_nphy(pi, true); 19651 19652 regval = read_phy_reg(pi, 0xa2); 19653 regval &= ~(0xf << 4); 19654 regval |= ((u16) (rxcore_bitmask & 0x3)) << 4; 19655 write_phy_reg(pi, 0xa2, regval); 19656 19657 if ((rxcore_bitmask & 0x3) != 0x3) { 19658 19659 write_phy_reg(pi, 0x20e, 1); 19660 19661 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19662 if (pi->rx2tx_biasentry == -1) { 19663 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 19664 ARRAY_SIZE(tbl_buf), 80, 19665 16, tbl_buf); 19666 19667 for (i = 0; i < ARRAY_SIZE(tbl_buf); i++) { 19668 if (tbl_buf[i] == 19669 NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS) { 19670 pi->rx2tx_biasentry = (u8) i; 19671 tbl_opcode = 19672 NPHY_REV3_RFSEQ_CMD_NOP; 19673 wlc_phy_table_write_nphy( 19674 pi, 19675 NPHY_TBL_ID_RFSEQ, 19676 1, i, 19677 16, 19678 &tbl_opcode); 19679 break; 19680 } else if (tbl_buf[i] == 19681 NPHY_REV3_RFSEQ_CMD_END) 19682 break; 19683 } 19684 } 19685 } 19686 } else { 19687 19688 write_phy_reg(pi, 0x20e, 30); 19689 19690 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 19691 if (pi->rx2tx_biasentry != -1) { 19692 tbl_opcode = NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS; 19693 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 19694 1, pi->rx2tx_biasentry, 19695 16, &tbl_opcode); 19696 pi->rx2tx_biasentry = -1; 19697 } 19698 } 19699 } 19700 19701 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 19702 19703 if (pi->phyhang_avoid) 19704 wlc_phy_stay_in_carriersearch_nphy(pi, false); 19705 19706 if (!suspend) 19707 wlapi_enable_mac(pi->sh->physhim); 19708} 19709 19710u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih) 19711{ 19712 u16 regval, rxen_bits; 19713 struct brcms_phy *pi = container_of(pih, struct brcms_phy, pubpi_ro); 19714 19715 regval = read_phy_reg(pi, 0xa2); 19716 rxen_bits = (regval >> 4) & 0xf; 19717 19718 return (u8) rxen_bits; 19719} 19720 19721bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pi) 19722{ 19723 return PHY_IPA(pi); 19724} 19725 19726void wlc_phy_cal_init_nphy(struct brcms_phy *pi) 19727{ 19728} 19729 19730static void wlc_phy_radio_preinit_205x(struct brcms_phy *pi) 19731{ 19732 19733 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 19734 and_phy_reg(pi, 0x78, RFCC_OE_POR_FORCE); 19735 19736 or_phy_reg(pi, 0x78, ~RFCC_OE_POR_FORCE); 19737 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU); 19738 19739} 19740 19741static void wlc_phy_radio_init_2057(struct brcms_phy *pi) 19742{ 19743 struct radio_20xx_regs *regs_2057_ptr = NULL; 19744 19745 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 19746 regs_2057_ptr = regs_2057_rev4; 19747 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 19748 || NREV_IS(pi->pubpi.phy_rev, 9)) { 19749 switch (pi->pubpi.radiorev) { 19750 case 5: 19751 19752 if (NREV_IS(pi->pubpi.phy_rev, 8)) 19753 regs_2057_ptr = regs_2057_rev5; 19754 else if (NREV_IS(pi->pubpi.phy_rev, 9)) 19755 regs_2057_ptr = regs_2057_rev5v1; 19756 break; 19757 19758 case 7: 19759 19760 regs_2057_ptr = regs_2057_rev7; 19761 break; 19762 19763 case 8: 19764 19765 regs_2057_ptr = regs_2057_rev8; 19766 break; 19767 19768 default: 19769 break; 19770 } 19771 } 19772 19773 wlc_phy_init_radio_regs_allbands(pi, regs_2057_ptr); 19774} 19775 19776static u16 wlc_phy_radio205x_rcal(struct brcms_phy *pi) 19777{ 19778 u16 rcal_reg = 0; 19779 int i; 19780 19781 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 19782 19783 if (pi->pubpi.radiorev == 5) { 19784 19785 and_phy_reg(pi, 0x342, ~(0x1 << 1)); 19786 19787 udelay(10); 19788 19789 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x1); 19790 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19791 0x1); 19792 } 19793 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x1); 19794 19795 udelay(10); 19796 19797 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x3, 0x3); 19798 19799 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19800 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS); 19801 if (rcal_reg & 0x1) 19802 break; 19803 19804 udelay(100); 19805 } 19806 19807 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19808 "HW error: radio calib2")) 19809 return 0; 19810 19811 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x2, 0x0); 19812 19813 rcal_reg = read_radio_reg(pi, RADIO_2057_RCAL_STATUS) & 0x3e; 19814 19815 mod_radio_reg(pi, RADIO_2057_RCAL_CONFIG, 0x1, 0x0); 19816 if (pi->pubpi.radiorev == 5) { 19817 19818 mod_radio_reg(pi, RADIO_2057_IQTEST_SEL_PU, 0x1, 0x0); 19819 mod_radio_reg(pi, RADIO_2057v7_IQTEST_SEL_PU2, 0x2, 19820 0x0); 19821 } 19822 19823 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 19824 19825 mod_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x3c, 19826 rcal_reg); 19827 mod_radio_reg(pi, RADIO_2057_BANDGAP_RCAL_TRIM, 0xf0, 19828 rcal_reg << 2); 19829 } 19830 19831 } else if (NREV_IS(pi->pubpi.phy_rev, 3)) { 19832 u16 savereg; 19833 19834 savereg = 19835 read_radio_reg( 19836 pi, 19837 RADIO_2056_SYN_PLL_MAST2 | 19838 RADIO_2056_SYN); 19839 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19840 savereg | 0x7); 19841 udelay(10); 19842 19843 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19844 0x1); 19845 udelay(10); 19846 19847 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19848 0x9); 19849 19850 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19851 rcal_reg = read_radio_reg( 19852 pi, 19853 RADIO_2056_SYN_RCAL_CODE_OUT | 19854 RADIO_2056_SYN); 19855 if (rcal_reg & 0x80) 19856 break; 19857 19858 udelay(100); 19859 } 19860 19861 if (WARN(i == MAX_205x_RCAL_WAITLOOPS, 19862 "HW error: radio calib3")) 19863 return 0; 19864 19865 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19866 0x1); 19867 19868 rcal_reg = 19869 read_radio_reg(pi, 19870 RADIO_2056_SYN_RCAL_CODE_OUT | 19871 RADIO_2056_SYN); 19872 19873 write_radio_reg(pi, RADIO_2056_SYN_RCAL_MASTER | RADIO_2056_SYN, 19874 0x0); 19875 19876 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2 | RADIO_2056_SYN, 19877 savereg); 19878 19879 return rcal_reg & 0x1f; 19880 } 19881 return rcal_reg & 0x3e; 19882} 19883 19884static u16 wlc_phy_radio2057_rccal(struct brcms_phy *pi) 19885{ 19886 u16 rccal_valid; 19887 int i; 19888 bool chip43226_6362A0; 19889 19890 chip43226_6362A0 = ((pi->pubpi.radiorev == 3) 19891 || (pi->pubpi.radiorev == 4) 19892 || (pi->pubpi.radiorev == 6)); 19893 19894 rccal_valid = 0; 19895 if (chip43226_6362A0) { 19896 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x61); 19897 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xc0); 19898 } else { 19899 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x61); 19900 19901 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xe9); 19902 } 19903 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19904 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19905 19906 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19907 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19908 if (rccal_valid & 0x2) 19909 break; 19910 19911 udelay(500); 19912 } 19913 19914 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19915 19916 rccal_valid = 0; 19917 if (chip43226_6362A0) { 19918 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x69); 19919 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 19920 } else { 19921 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x69); 19922 19923 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xd5); 19924 } 19925 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19926 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19927 19928 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19929 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19930 if (rccal_valid & 0x2) 19931 break; 19932 19933 udelay(500); 19934 } 19935 19936 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19937 19938 rccal_valid = 0; 19939 if (chip43226_6362A0) { 19940 write_radio_reg(pi, RADIO_2057_RCCAL_MASTER, 0x73); 19941 19942 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x28); 19943 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0xb0); 19944 } else { 19945 write_radio_reg(pi, RADIO_2057v7_RCCAL_MASTER, 0x73); 19946 write_radio_reg(pi, RADIO_2057_RCCAL_X1, 0x6e); 19947 write_radio_reg(pi, RADIO_2057_RCCAL_TRC0, 0x99); 19948 } 19949 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x55); 19950 19951 for (i = 0; i < MAX_205x_RCAL_WAITLOOPS; i++) { 19952 rccal_valid = read_radio_reg(pi, RADIO_2057_RCCAL_DONE_OSCCAP); 19953 if (rccal_valid & 0x2) 19954 break; 19955 19956 udelay(500); 19957 } 19958 19959 if (WARN(!(rccal_valid & 0x2), "HW error: radio calib4")) 19960 return 0; 19961 19962 write_radio_reg(pi, RADIO_2057_RCCAL_START_R1_Q1_P1, 0x15); 19963 19964 return rccal_valid; 19965} 19966 19967static void wlc_phy_radio_postinit_2057(struct brcms_phy *pi) 19968{ 19969 19970 mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1); 19971 19972 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78); 19973 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80); 19974 mdelay(2); 19975 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x0); 19976 mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x0); 19977 19978 if (pi->phy_init_por) { 19979 wlc_phy_radio205x_rcal(pi); 19980 wlc_phy_radio2057_rccal(pi); 19981 } 19982 19983 mod_radio_reg(pi, RADIO_2057_RFPLL_MASTER, 0x8, 0x0); 19984} 19985 19986static void wlc_phy_radio_init_2056(struct brcms_phy *pi) 19987{ 19988 const struct radio_regs *regs_SYN_2056_ptr = NULL; 19989 const struct radio_regs *regs_TX_2056_ptr = NULL; 19990 const struct radio_regs *regs_RX_2056_ptr = NULL; 19991 19992 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 19993 regs_SYN_2056_ptr = regs_SYN_2056; 19994 regs_TX_2056_ptr = regs_TX_2056; 19995 regs_RX_2056_ptr = regs_RX_2056; 19996 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 19997 regs_SYN_2056_ptr = regs_SYN_2056_A1; 19998 regs_TX_2056_ptr = regs_TX_2056_A1; 19999 regs_RX_2056_ptr = regs_RX_2056_A1; 20000 } else { 20001 switch (pi->pubpi.radiorev) { 20002 case 5: 20003 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 20004 regs_TX_2056_ptr = regs_TX_2056_rev5; 20005 regs_RX_2056_ptr = regs_RX_2056_rev5; 20006 break; 20007 20008 case 6: 20009 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20010 regs_TX_2056_ptr = regs_TX_2056_rev6; 20011 regs_RX_2056_ptr = regs_RX_2056_rev6; 20012 break; 20013 20014 case 7: 20015 case 9: 20016 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20017 regs_TX_2056_ptr = regs_TX_2056_rev7; 20018 regs_RX_2056_ptr = regs_RX_2056_rev7; 20019 break; 20020 20021 case 8: 20022 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20023 regs_TX_2056_ptr = regs_TX_2056_rev8; 20024 regs_RX_2056_ptr = regs_RX_2056_rev8; 20025 break; 20026 20027 case 11: 20028 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20029 regs_TX_2056_ptr = regs_TX_2056_rev11; 20030 regs_RX_2056_ptr = regs_RX_2056_rev11; 20031 break; 20032 20033 default: 20034 return; 20035 } 20036 } 20037 20038 wlc_phy_init_radio_regs(pi, regs_SYN_2056_ptr, (u16) RADIO_2056_SYN); 20039 20040 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX0); 20041 20042 wlc_phy_init_radio_regs(pi, regs_TX_2056_ptr, (u16) RADIO_2056_TX1); 20043 20044 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX0); 20045 20046 wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX1); 20047} 20048 20049static void wlc_phy_radio_postinit_2056(struct brcms_phy *pi) 20050{ 20051 mod_radio_reg(pi, RADIO_2056_SYN_COM_CTRL, 0xb, 0xb); 20052 20053 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x2); 20054 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x2); 20055 udelay(1000); 20056 mod_radio_reg(pi, RADIO_2056_SYN_COM_RESET, 0x2, 0x0); 20057 20058 if ((pi->sh->boardflags2 & BFL2_LEGACY) 20059 || (pi->sh->boardflags2 & BFL2_XTALBUFOUTEN)) 20060 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xf4, 0x0); 20061 else 20062 mod_radio_reg(pi, RADIO_2056_SYN_PLL_MAST2, 0xfc, 0x0); 20063 20064 mod_radio_reg(pi, RADIO_2056_SYN_RCCAL_CTRL0, 0x1, 0x0); 20065 20066 if (pi->phy_init_por) 20067 wlc_phy_radio205x_rcal(pi); 20068} 20069 20070static void wlc_phy_radio_preinit_2055(struct brcms_phy *pi) 20071{ 20072 20073 and_phy_reg(pi, 0x78, ~RFCC_POR_FORCE); 20074 or_phy_reg(pi, 0x78, RFCC_CHIP0_PU | RFCC_OE_POR_FORCE); 20075 20076 or_phy_reg(pi, 0x78, RFCC_POR_FORCE); 20077} 20078 20079static void wlc_phy_radio_init_2055(struct brcms_phy *pi) 20080{ 20081 wlc_phy_init_radio_regs(pi, regs_2055, RADIO_DEFAULT_CORE); 20082} 20083 20084static void wlc_phy_radio_postinit_2055(struct brcms_phy *pi) 20085{ 20086 20087 and_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 20088 ~(RADIO_2055_JTAGCTRL_MASK | RADIO_2055_JTAGSYNC_MASK)); 20089 20090 if (((pi->sh->sromrev >= 4) 20091 && !(pi->sh->boardflags2 & BFL2_RXBB_INT_REG_DIS)) 20092 || ((pi->sh->sromrev < 4))) { 20093 and_radio_reg(pi, RADIO_2055_CORE1_RXBB_REGULATOR, 0x7F); 20094 and_radio_reg(pi, RADIO_2055_CORE2_RXBB_REGULATOR, 0x7F); 20095 } 20096 20097 mod_radio_reg(pi, RADIO_2055_RRCCAL_N_OPT_SEL, 0x3F, 0x2C); 20098 write_radio_reg(pi, RADIO_2055_CAL_MISC, 0x3C); 20099 20100 and_radio_reg(pi, RADIO_2055_CAL_MISC, 20101 ~(RADIO_2055_RRCAL_START | RADIO_2055_RRCAL_RST_N)); 20102 20103 or_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, RADIO_2055_CAL_LPO_ENABLE); 20104 20105 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_RST_N); 20106 20107 udelay(1000); 20108 20109 or_radio_reg(pi, RADIO_2055_CAL_MISC, RADIO_2055_RRCAL_START); 20110 20111 SPINWAIT(((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20112 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE), 2000); 20113 20114 if (WARN((read_radio_reg(pi, RADIO_2055_CAL_COUNTER_OUT2) & 20115 RADIO_2055_RCAL_DONE) != RADIO_2055_RCAL_DONE, 20116 "HW error: radio calibration1\n")) 20117 return; 20118 20119 and_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, 20120 ~(RADIO_2055_CAL_LPO_ENABLE)); 20121 20122 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); 20123 20124 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_LPF, 9); 20125 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_LPF, 9); 20126 20127 write_radio_reg(pi, RADIO_2055_CORE1_RXBB_MIDAC_HIPAS, 0x83); 20128 write_radio_reg(pi, RADIO_2055_CORE2_RXBB_MIDAC_HIPAS, 0x83); 20129 20130 mod_radio_reg(pi, RADIO_2055_CORE1_LNA_GAINBST, 20131 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20132 mod_radio_reg(pi, RADIO_2055_CORE2_LNA_GAINBST, 20133 RADIO_2055_GAINBST_VAL_MASK, RADIO_2055_GAINBST_CODE); 20134 if (pi->nphy_gain_boost) { 20135 and_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20136 ~(RADIO_2055_GAINBST_DISABLE)); 20137 and_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20138 ~(RADIO_2055_GAINBST_DISABLE)); 20139 } else { 20140 or_radio_reg(pi, RADIO_2055_CORE1_RXRF_SPC1, 20141 RADIO_2055_GAINBST_DISABLE); 20142 or_radio_reg(pi, RADIO_2055_CORE2_RXRF_SPC1, 20143 RADIO_2055_GAINBST_DISABLE); 20144 } 20145 20146 udelay(2); 20147} 20148 20149void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on) 20150{ 20151 if (on) { 20152 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20153 if (!pi->radio_is_on) { 20154 wlc_phy_radio_preinit_205x(pi); 20155 wlc_phy_radio_init_2057(pi); 20156 wlc_phy_radio_postinit_2057(pi); 20157 } 20158 20159 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20160 pi->radio_chanspec); 20161 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20162 wlc_phy_radio_preinit_205x(pi); 20163 wlc_phy_radio_init_2056(pi); 20164 wlc_phy_radio_postinit_2056(pi); 20165 20166 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, 20167 pi->radio_chanspec); 20168 } else { 20169 wlc_phy_radio_preinit_2055(pi); 20170 wlc_phy_radio_init_2055(pi); 20171 wlc_phy_radio_postinit_2055(pi); 20172 } 20173 20174 pi->radio_is_on = true; 20175 20176 } else { 20177 20178 if (NREV_GE(pi->pubpi.phy_rev, 3) 20179 && NREV_LT(pi->pubpi.phy_rev, 7)) { 20180 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20181 mod_radio_reg(pi, RADIO_2056_SYN_COM_PU, 0x2, 0x0); 20182 20183 write_radio_reg(pi, 20184 RADIO_2056_TX_PADA_BOOST_TUNE | 20185 RADIO_2056_TX0, 0); 20186 write_radio_reg(pi, 20187 RADIO_2056_TX_PADG_BOOST_TUNE | 20188 RADIO_2056_TX0, 0); 20189 write_radio_reg(pi, 20190 RADIO_2056_TX_PGAA_BOOST_TUNE | 20191 RADIO_2056_TX0, 0); 20192 write_radio_reg(pi, 20193 RADIO_2056_TX_PGAG_BOOST_TUNE | 20194 RADIO_2056_TX0, 0); 20195 mod_radio_reg(pi, 20196 RADIO_2056_TX_MIXA_BOOST_TUNE | 20197 RADIO_2056_TX0, 0xf0, 0); 20198 write_radio_reg(pi, 20199 RADIO_2056_TX_MIXG_BOOST_TUNE | 20200 RADIO_2056_TX0, 0); 20201 20202 write_radio_reg(pi, 20203 RADIO_2056_TX_PADA_BOOST_TUNE | 20204 RADIO_2056_TX1, 0); 20205 write_radio_reg(pi, 20206 RADIO_2056_TX_PADG_BOOST_TUNE | 20207 RADIO_2056_TX1, 0); 20208 write_radio_reg(pi, 20209 RADIO_2056_TX_PGAA_BOOST_TUNE | 20210 RADIO_2056_TX1, 0); 20211 write_radio_reg(pi, 20212 RADIO_2056_TX_PGAG_BOOST_TUNE | 20213 RADIO_2056_TX1, 0); 20214 mod_radio_reg(pi, 20215 RADIO_2056_TX_MIXA_BOOST_TUNE | 20216 RADIO_2056_TX1, 0xf0, 0); 20217 write_radio_reg(pi, 20218 RADIO_2056_TX_MIXG_BOOST_TUNE | 20219 RADIO_2056_TX1, 0); 20220 20221 pi->radio_is_on = false; 20222 } 20223 20224 if (NREV_GE(pi->pubpi.phy_rev, 8)) { 20225 and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); 20226 pi->radio_is_on = false; 20227 } 20228 20229 } 20230} 20231 20232static bool 20233wlc_phy_chan2freq_nphy(struct brcms_phy *pi, uint channel, int *f, 20234 const struct chan_info_nphy_radio2057 **t0, 20235 const struct chan_info_nphy_radio205x **t1, 20236 const struct chan_info_nphy_radio2057_rev5 **t2, 20237 const struct chan_info_nphy_2055 **t3) 20238{ 20239 uint i; 20240 const struct chan_info_nphy_radio2057 *chan_info_tbl_p_0 = NULL; 20241 const struct chan_info_nphy_radio205x *chan_info_tbl_p_1 = NULL; 20242 const struct chan_info_nphy_radio2057_rev5 *chan_info_tbl_p_2 = NULL; 20243 u32 tbl_len = 0; 20244 20245 int freq = 0; 20246 20247 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20248 20249 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 20250 20251 chan_info_tbl_p_0 = chan_info_nphyrev7_2057_rev4; 20252 tbl_len = ARRAY_SIZE(chan_info_nphyrev7_2057_rev4); 20253 20254 } else if (NREV_IS(pi->pubpi.phy_rev, 8) 20255 || NREV_IS(pi->pubpi.phy_rev, 9)) { 20256 switch (pi->pubpi.radiorev) { 20257 20258 case 5: 20259 20260 if (pi->pubpi.radiover == 0x0) { 20261 20262 chan_info_tbl_p_2 = 20263 chan_info_nphyrev8_2057_rev5; 20264 tbl_len = ARRAY_SIZE( 20265 chan_info_nphyrev8_2057_rev5); 20266 20267 } else if (pi->pubpi.radiover == 0x1) { 20268 20269 chan_info_tbl_p_2 = 20270 chan_info_nphyrev9_2057_rev5v1; 20271 tbl_len = ARRAY_SIZE( 20272 chan_info_nphyrev9_2057_rev5v1); 20273 20274 } 20275 break; 20276 20277 case 7: 20278 chan_info_tbl_p_0 = 20279 chan_info_nphyrev8_2057_rev7; 20280 tbl_len = ARRAY_SIZE( 20281 chan_info_nphyrev8_2057_rev7); 20282 break; 20283 20284 case 8: 20285 chan_info_tbl_p_0 = 20286 chan_info_nphyrev8_2057_rev8; 20287 tbl_len = ARRAY_SIZE( 20288 chan_info_nphyrev8_2057_rev8); 20289 break; 20290 20291 default: 20292 break; 20293 } 20294 } else if (NREV_IS(pi->pubpi.phy_rev, 16)) { 20295 20296 chan_info_tbl_p_0 = chan_info_nphyrev8_2057_rev8; 20297 tbl_len = ARRAY_SIZE(chan_info_nphyrev8_2057_rev8); 20298 } else { 20299 goto fail; 20300 } 20301 20302 for (i = 0; i < tbl_len; i++) { 20303 if (pi->pubpi.radiorev == 5) { 20304 20305 if (chan_info_tbl_p_2[i].chan == channel) 20306 break; 20307 } else { 20308 20309 if (chan_info_tbl_p_0[i].chan == channel) 20310 break; 20311 } 20312 } 20313 20314 if (i >= tbl_len) 20315 goto fail; 20316 20317 if (pi->pubpi.radiorev == 5) { 20318 *t2 = &chan_info_tbl_p_2[i]; 20319 freq = chan_info_tbl_p_2[i].freq; 20320 } else { 20321 *t0 = &chan_info_tbl_p_0[i]; 20322 freq = chan_info_tbl_p_0[i].freq; 20323 } 20324 20325 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20326 if (NREV_IS(pi->pubpi.phy_rev, 3)) { 20327 chan_info_tbl_p_1 = chan_info_nphyrev3_2056; 20328 tbl_len = ARRAY_SIZE(chan_info_nphyrev3_2056); 20329 } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { 20330 chan_info_tbl_p_1 = chan_info_nphyrev4_2056_A1; 20331 tbl_len = ARRAY_SIZE(chan_info_nphyrev4_2056_A1); 20332 } else if (NREV_IS(pi->pubpi.phy_rev, 5) 20333 || NREV_IS(pi->pubpi.phy_rev, 6)) { 20334 switch (pi->pubpi.radiorev) { 20335 case 5: 20336 chan_info_tbl_p_1 = chan_info_nphyrev5_2056v5; 20337 tbl_len = ARRAY_SIZE(chan_info_nphyrev5_2056v5); 20338 break; 20339 case 6: 20340 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v6; 20341 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v6); 20342 break; 20343 case 7: 20344 case 9: 20345 chan_info_tbl_p_1 = chan_info_nphyrev5n6_2056v7; 20346 tbl_len = 20347 ARRAY_SIZE(chan_info_nphyrev5n6_2056v7); 20348 break; 20349 case 8: 20350 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v8; 20351 tbl_len = ARRAY_SIZE(chan_info_nphyrev6_2056v8); 20352 break; 20353 case 11: 20354 chan_info_tbl_p_1 = chan_info_nphyrev6_2056v11; 20355 tbl_len = ARRAY_SIZE( 20356 chan_info_nphyrev6_2056v11); 20357 break; 20358 default: 20359 break; 20360 } 20361 } 20362 20363 for (i = 0; i < tbl_len; i++) { 20364 if (chan_info_tbl_p_1[i].chan == channel) 20365 break; 20366 } 20367 20368 if (i >= tbl_len) 20369 goto fail; 20370 20371 *t1 = &chan_info_tbl_p_1[i]; 20372 freq = chan_info_tbl_p_1[i].freq; 20373 20374 } else { 20375 for (i = 0; i < ARRAY_SIZE(chan_info_nphy_2055); i++) 20376 if (chan_info_nphy_2055[i].chan == channel) 20377 break; 20378 20379 if (i >= ARRAY_SIZE(chan_info_nphy_2055)) 20380 goto fail; 20381 20382 *t3 = &chan_info_nphy_2055[i]; 20383 freq = chan_info_nphy_2055[i].freq; 20384 } 20385 20386 *f = freq; 20387 return true; 20388 20389fail: 20390 *f = WL_CHAN_FREQ_RANGE_2G; 20391 return false; 20392} 20393 20394u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint channel) 20395{ 20396 int freq; 20397 const struct chan_info_nphy_radio2057 *t0 = NULL; 20398 const struct chan_info_nphy_radio205x *t1 = NULL; 20399 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 20400 const struct chan_info_nphy_2055 *t3 = NULL; 20401 20402 if (channel == 0) 20403 channel = CHSPEC_CHANNEL(pi->radio_chanspec); 20404 20405 wlc_phy_chan2freq_nphy(pi, channel, &freq, &t0, &t1, &t2, &t3); 20406 20407 if (CHSPEC_IS2G(pi->radio_chanspec)) 20408 return WL_CHAN_FREQ_RANGE_2G; 20409 20410 if ((freq >= BASE_LOW_5G_CHAN) && (freq < BASE_MID_5G_CHAN)) 20411 return WL_CHAN_FREQ_RANGE_5GL; 20412 else if ((freq >= BASE_MID_5G_CHAN) && (freq < BASE_HIGH_5G_CHAN)) 20413 return WL_CHAN_FREQ_RANGE_5GM; 20414 else 20415 return WL_CHAN_FREQ_RANGE_5GH; 20416} 20417 20418static void 20419wlc_phy_chanspec_radio2055_setup(struct brcms_phy *pi, 20420 const struct chan_info_nphy_2055 *ci) 20421{ 20422 20423 write_radio_reg(pi, RADIO_2055_PLL_REF, ci->RF_pll_ref); 20424 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD0, ci->RF_rf_pll_mod0); 20425 write_radio_reg(pi, RADIO_2055_RF_PLL_MOD1, ci->RF_rf_pll_mod1); 20426 write_radio_reg(pi, RADIO_2055_VCO_CAP_TAIL, ci->RF_vco_cap_tail); 20427 20428 BRCMS_PHY_WAR_PR51571(pi); 20429 20430 write_radio_reg(pi, RADIO_2055_VCO_CAL1, ci->RF_vco_cal1); 20431 write_radio_reg(pi, RADIO_2055_VCO_CAL2, ci->RF_vco_cal2); 20432 write_radio_reg(pi, RADIO_2055_PLL_LF_C1, ci->RF_pll_lf_c1); 20433 write_radio_reg(pi, RADIO_2055_PLL_LF_R1, ci->RF_pll_lf_r1); 20434 20435 BRCMS_PHY_WAR_PR51571(pi); 20436 20437 write_radio_reg(pi, RADIO_2055_PLL_LF_C2, ci->RF_pll_lf_c2); 20438 write_radio_reg(pi, RADIO_2055_LGBUF_CEN_BUF, ci->RF_lgbuf_cen_buf); 20439 write_radio_reg(pi, RADIO_2055_LGEN_TUNE1, ci->RF_lgen_tune1); 20440 write_radio_reg(pi, RADIO_2055_LGEN_TUNE2, ci->RF_lgen_tune2); 20441 20442 BRCMS_PHY_WAR_PR51571(pi); 20443 20444 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_A_TUNE, 20445 ci->RF_core1_lgbuf_a_tune); 20446 write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_G_TUNE, 20447 ci->RF_core1_lgbuf_g_tune); 20448 write_radio_reg(pi, RADIO_2055_CORE1_RXRF_REG1, ci->RF_core1_rxrf_reg1); 20449 write_radio_reg(pi, RADIO_2055_CORE1_TX_PGA_PAD_TN, 20450 ci->RF_core1_tx_pga_pad_tn); 20451 20452 BRCMS_PHY_WAR_PR51571(pi); 20453 20454 write_radio_reg(pi, RADIO_2055_CORE1_TX_MX_BGTRIM, 20455 ci->RF_core1_tx_mx_bgtrim); 20456 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_A_TUNE, 20457 ci->RF_core2_lgbuf_a_tune); 20458 write_radio_reg(pi, RADIO_2055_CORE2_LGBUF_G_TUNE, 20459 ci->RF_core2_lgbuf_g_tune); 20460 write_radio_reg(pi, RADIO_2055_CORE2_RXRF_REG1, ci->RF_core2_rxrf_reg1); 20461 20462 BRCMS_PHY_WAR_PR51571(pi); 20463 20464 write_radio_reg(pi, RADIO_2055_CORE2_TX_PGA_PAD_TN, 20465 ci->RF_core2_tx_pga_pad_tn); 20466 write_radio_reg(pi, RADIO_2055_CORE2_TX_MX_BGTRIM, 20467 ci->RF_core2_tx_mx_bgtrim); 20468 20469 udelay(50); 20470 20471 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x05); 20472 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x45); 20473 20474 BRCMS_PHY_WAR_PR51571(pi); 20475 20476 write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x65); 20477 20478 udelay(300); 20479} 20480 20481static void 20482wlc_phy_chanspec_radio2056_setup(struct brcms_phy *pi, 20483 const struct chan_info_nphy_radio205x *ci) 20484{ 20485 const struct radio_regs *regs_SYN_2056_ptr = NULL; 20486 20487 write_radio_reg(pi, 20488 RADIO_2056_SYN_PLL_VCOCAL1 | RADIO_2056_SYN, 20489 ci->RF_SYN_pll_vcocal1); 20490 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL2 | RADIO_2056_SYN, 20491 ci->RF_SYN_pll_vcocal2); 20492 write_radio_reg(pi, RADIO_2056_SYN_PLL_REFDIV | RADIO_2056_SYN, 20493 ci->RF_SYN_pll_refdiv); 20494 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD2 | RADIO_2056_SYN, 20495 ci->RF_SYN_pll_mmd2); 20496 write_radio_reg(pi, RADIO_2056_SYN_PLL_MMD1 | RADIO_2056_SYN, 20497 ci->RF_SYN_pll_mmd1); 20498 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20499 ci->RF_SYN_pll_loopfilter1); 20500 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20501 ci->RF_SYN_pll_loopfilter2); 20502 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER3 | RADIO_2056_SYN, 20503 ci->RF_SYN_pll_loopfilter3); 20504 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20505 ci->RF_SYN_pll_loopfilter4); 20506 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER5 | RADIO_2056_SYN, 20507 ci->RF_SYN_pll_loopfilter5); 20508 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR27 | RADIO_2056_SYN, 20509 ci->RF_SYN_reserved_addr27); 20510 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR28 | RADIO_2056_SYN, 20511 ci->RF_SYN_reserved_addr28); 20512 write_radio_reg(pi, RADIO_2056_SYN_RESERVED_ADDR29 | RADIO_2056_SYN, 20513 ci->RF_SYN_reserved_addr29); 20514 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_VCOBUF1 | RADIO_2056_SYN, 20515 ci->RF_SYN_logen_VCOBUF1); 20516 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_MIXER2 | RADIO_2056_SYN, 20517 ci->RF_SYN_logen_MIXER2); 20518 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF3 | RADIO_2056_SYN, 20519 ci->RF_SYN_logen_BUF3); 20520 write_radio_reg(pi, RADIO_2056_SYN_LOGEN_BUF4 | RADIO_2056_SYN, 20521 ci->RF_SYN_logen_BUF4); 20522 20523 write_radio_reg(pi, 20524 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX0, 20525 ci->RF_RX0_lnaa_tune); 20526 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX0, 20527 ci->RF_RX0_lnag_tune); 20528 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX0, 20529 ci->RF_TX0_intpaa_boost_tune); 20530 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX0, 20531 ci->RF_TX0_intpag_boost_tune); 20532 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX0, 20533 ci->RF_TX0_pada_boost_tune); 20534 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX0, 20535 ci->RF_TX0_padg_boost_tune); 20536 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX0, 20537 ci->RF_TX0_pgaa_boost_tune); 20538 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX0, 20539 ci->RF_TX0_pgag_boost_tune); 20540 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX0, 20541 ci->RF_TX0_mixa_boost_tune); 20542 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX0, 20543 ci->RF_TX0_mixg_boost_tune); 20544 20545 write_radio_reg(pi, 20546 RADIO_2056_RX_LNAA_TUNE | RADIO_2056_RX1, 20547 ci->RF_RX1_lnaa_tune); 20548 write_radio_reg(pi, RADIO_2056_RX_LNAG_TUNE | RADIO_2056_RX1, 20549 ci->RF_RX1_lnag_tune); 20550 write_radio_reg(pi, RADIO_2056_TX_INTPAA_BOOST_TUNE | RADIO_2056_TX1, 20551 ci->RF_TX1_intpaa_boost_tune); 20552 write_radio_reg(pi, RADIO_2056_TX_INTPAG_BOOST_TUNE | RADIO_2056_TX1, 20553 ci->RF_TX1_intpag_boost_tune); 20554 write_radio_reg(pi, RADIO_2056_TX_PADA_BOOST_TUNE | RADIO_2056_TX1, 20555 ci->RF_TX1_pada_boost_tune); 20556 write_radio_reg(pi, RADIO_2056_TX_PADG_BOOST_TUNE | RADIO_2056_TX1, 20557 ci->RF_TX1_padg_boost_tune); 20558 write_radio_reg(pi, RADIO_2056_TX_PGAA_BOOST_TUNE | RADIO_2056_TX1, 20559 ci->RF_TX1_pgaa_boost_tune); 20560 write_radio_reg(pi, RADIO_2056_TX_PGAG_BOOST_TUNE | RADIO_2056_TX1, 20561 ci->RF_TX1_pgag_boost_tune); 20562 write_radio_reg(pi, RADIO_2056_TX_MIXA_BOOST_TUNE | RADIO_2056_TX1, 20563 ci->RF_TX1_mixa_boost_tune); 20564 write_radio_reg(pi, RADIO_2056_TX_MIXG_BOOST_TUNE | RADIO_2056_TX1, 20565 ci->RF_TX1_mixg_boost_tune); 20566 20567 if (NREV_IS(pi->pubpi.phy_rev, 3)) 20568 regs_SYN_2056_ptr = regs_SYN_2056; 20569 else if (NREV_IS(pi->pubpi.phy_rev, 4)) 20570 regs_SYN_2056_ptr = regs_SYN_2056_A1; 20571 else { 20572 switch (pi->pubpi.radiorev) { 20573 case 5: 20574 regs_SYN_2056_ptr = regs_SYN_2056_rev5; 20575 break; 20576 case 6: 20577 regs_SYN_2056_ptr = regs_SYN_2056_rev6; 20578 break; 20579 case 7: 20580 case 9: 20581 regs_SYN_2056_ptr = regs_SYN_2056_rev7; 20582 break; 20583 case 8: 20584 regs_SYN_2056_ptr = regs_SYN_2056_rev8; 20585 break; 20586 case 11: 20587 regs_SYN_2056_ptr = regs_SYN_2056_rev11; 20588 break; 20589 } 20590 } 20591 if (CHSPEC_IS2G(pi->radio_chanspec)) 20592 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20593 RADIO_2056_SYN, 20594 (u16) regs_SYN_2056_ptr[0x49 - 2].init_g); 20595 else 20596 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20597 RADIO_2056_SYN, 20598 (u16) regs_SYN_2056_ptr[0x49 - 2].init_a); 20599 20600 if (pi->sh->boardflags2 & BFL2_GPLL_WAR) { 20601 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20602 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20603 RADIO_2056_SYN, 0x1f); 20604 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20605 RADIO_2056_SYN, 0x1f); 20606 20607 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20608 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20609 write_radio_reg(pi, 20610 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20611 RADIO_2056_SYN, 0x14); 20612 write_radio_reg(pi, 20613 RADIO_2056_SYN_PLL_CP2 | 20614 RADIO_2056_SYN, 0x00); 20615 } else { 20616 write_radio_reg(pi, 20617 RADIO_2056_SYN_PLL_LOOPFILTER4 | 20618 RADIO_2056_SYN, 0xb); 20619 write_radio_reg(pi, 20620 RADIO_2056_SYN_PLL_CP2 | 20621 RADIO_2056_SYN, 0x14); 20622 } 20623 } 20624 } 20625 20626 if ((pi->sh->boardflags2 & BFL2_GPLL_WAR2) && 20627 (CHSPEC_IS2G(pi->radio_chanspec))) { 20628 write_radio_reg(pi, 20629 RADIO_2056_SYN_PLL_LOOPFILTER1 | RADIO_2056_SYN, 20630 0x1f); 20631 write_radio_reg(pi, 20632 RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 20633 0x1f); 20634 write_radio_reg(pi, 20635 RADIO_2056_SYN_PLL_LOOPFILTER4 | RADIO_2056_SYN, 20636 0xb); 20637 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | RADIO_2056_SYN, 20638 0x20); 20639 } 20640 20641 if (pi->sh->boardflags2 & BFL2_APLL_WAR) { 20642 if (CHSPEC_IS5G(pi->radio_chanspec)) { 20643 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER1 | 20644 RADIO_2056_SYN, 0x1f); 20645 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | 20646 RADIO_2056_SYN, 0x1f); 20647 write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER4 | 20648 RADIO_2056_SYN, 0x5); 20649 write_radio_reg(pi, RADIO_2056_SYN_PLL_CP2 | 20650 RADIO_2056_SYN, 0xc); 20651 } 20652 } 20653 20654 if (PHY_IPA(pi) && CHSPEC_IS2G(pi->radio_chanspec)) { 20655 u16 pag_boost_tune; 20656 u16 padg_boost_tune; 20657 u16 pgag_boost_tune; 20658 u16 mixg_boost_tune; 20659 u16 bias, cascbias; 20660 uint core; 20661 20662 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20663 20664 if (NREV_GE(pi->pubpi.phy_rev, 5)) { 20665 20666 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20667 PADG_IDAC, 0xcc); 20668 20669 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 20670 (pi->sh->chip == BCMA_CHIP_ID_BCM47162)) { 20671 bias = 0x40; 20672 cascbias = 0x45; 20673 pag_boost_tune = 0x5; 20674 pgag_boost_tune = 0x33; 20675 padg_boost_tune = 0x77; 20676 mixg_boost_tune = 0x55; 20677 } else { 20678 bias = 0x25; 20679 cascbias = 0x20; 20680 20681 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20682 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20683 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) { 20684 bias = 0x2a; 20685 cascbias = 0x38; 20686 } 20687 20688 pag_boost_tune = 0x4; 20689 pgag_boost_tune = 0x03; 20690 padg_boost_tune = 0x77; 20691 mixg_boost_tune = 0x65; 20692 } 20693 20694 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20695 INTPAG_IMAIN_STAT, bias); 20696 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20697 INTPAG_IAUX_STAT, bias); 20698 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20699 INTPAG_CASCBIAS, cascbias); 20700 20701 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20702 INTPAG_BOOST_TUNE, 20703 pag_boost_tune); 20704 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20705 PGAG_BOOST_TUNE, 20706 pgag_boost_tune); 20707 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20708 PADG_BOOST_TUNE, 20709 padg_boost_tune); 20710 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20711 MIXG_BOOST_TUNE, 20712 mixg_boost_tune); 20713 } else { 20714 20715 bias = (pi->bw == WL_CHANSPEC_BW_40) ? 20716 0x40 : 0x20; 20717 20718 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20719 INTPAG_IMAIN_STAT, bias); 20720 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20721 INTPAG_IAUX_STAT, bias); 20722 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20723 INTPAG_CASCBIAS, 0x30); 20724 } 20725 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, PA_SPARE1, 20726 0xee); 20727 } 20728 } 20729 20730 if (PHY_IPA(pi) && NREV_IS(pi->pubpi.phy_rev, 6) 20731 && CHSPEC_IS5G(pi->radio_chanspec)) { 20732 u16 paa_boost_tune; 20733 u16 pada_boost_tune; 20734 u16 pgaa_boost_tune; 20735 u16 mixa_boost_tune; 20736 u16 freq, pabias, cascbias; 20737 uint core; 20738 20739 freq = CHAN5G_FREQ(CHSPEC_CHANNEL(pi->radio_chanspec)); 20740 20741 if (freq < 5150) { 20742 20743 paa_boost_tune = 0xa; 20744 pada_boost_tune = 0x77; 20745 pgaa_boost_tune = 0xf; 20746 mixa_boost_tune = 0xf; 20747 } else if (freq < 5340) { 20748 20749 paa_boost_tune = 0x8; 20750 pada_boost_tune = 0x77; 20751 pgaa_boost_tune = 0xfb; 20752 mixa_boost_tune = 0xf; 20753 } else if (freq < 5650) { 20754 20755 paa_boost_tune = 0x0; 20756 pada_boost_tune = 0x77; 20757 pgaa_boost_tune = 0xb; 20758 mixa_boost_tune = 0xf; 20759 } else { 20760 20761 paa_boost_tune = 0x0; 20762 pada_boost_tune = 0x77; 20763 if (freq != 5825) 20764 pgaa_boost_tune = -(int)(freq - 18) / 36 + 168; 20765 else 20766 pgaa_boost_tune = 6; 20767 20768 mixa_boost_tune = 0xf; 20769 } 20770 20771 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 20772 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20773 INTPAA_BOOST_TUNE, paa_boost_tune); 20774 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20775 PADA_BOOST_TUNE, pada_boost_tune); 20776 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20777 PGAA_BOOST_TUNE, pgaa_boost_tune); 20778 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20779 MIXA_BOOST_TUNE, mixa_boost_tune); 20780 20781 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20782 TXSPARE1, 0x30); 20783 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20784 PA_SPARE2, 0xee); 20785 20786 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20787 PADA_CASCBIAS, 0x3); 20788 20789 cascbias = 0x30; 20790 20791 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224 || 20792 pi->sh->chip == BCMA_CHIP_ID_BCM43225) && 20793 pi->sh->chippkg == BCMA_PKG_ID_BCM43224_FAB_SMIC) 20794 cascbias = 0x35; 20795 20796 pabias = (pi->phy_pabias == 0) ? 0x30 : pi->phy_pabias; 20797 20798 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20799 INTPAA_IAUX_STAT, pabias); 20800 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20801 INTPAA_IMAIN_STAT, pabias); 20802 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 20803 INTPAA_CASCBIAS, cascbias); 20804 } 20805 } 20806 20807 udelay(50); 20808 20809 wlc_phy_radio205x_vcocal_nphy(pi); 20810} 20811 20812void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi) 20813{ 20814 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 20815 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x0); 20816 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 0x0); 20817 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x04, 20818 (1 << 2)); 20819 mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x01); 20820 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 20821 write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL12, 0x0); 20822 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20823 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x18); 20824 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x38); 20825 write_radio_reg(pi, RADIO_2056_SYN_PLL_MAST3, 0x39); 20826 } 20827 20828 udelay(300); 20829} 20830 20831static void 20832wlc_phy_chanspec_radio2057_setup( 20833 struct brcms_phy *pi, 20834 const struct chan_info_nphy_radio2057 *ci, 20835 const struct chan_info_nphy_radio2057_rev5 * 20836 ci2) 20837{ 20838 int coreNum; 20839 u16 txmix2g_tune_boost_pu = 0; 20840 u16 pad2g_tune_pus = 0; 20841 20842 if (pi->pubpi.radiorev == 5) { 20843 20844 write_radio_reg(pi, 20845 RADIO_2057_VCOCAL_COUNTVAL0, 20846 ci2->RF_vcocal_countval0); 20847 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20848 ci2->RF_vcocal_countval1); 20849 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20850 ci2->RF_rfpll_refmaster_sparextalsize); 20851 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20852 ci2->RF_rfpll_loopfilter_r1); 20853 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20854 ci2->RF_rfpll_loopfilter_c2); 20855 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20856 ci2->RF_rfpll_loopfilter_c1); 20857 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 20858 ci2->RF_cp_kpd_idac); 20859 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci2->RF_rfpll_mmd0); 20860 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci2->RF_rfpll_mmd1); 20861 write_radio_reg(pi, 20862 RADIO_2057_VCOBUF_TUNE, ci2->RF_vcobuf_tune); 20863 write_radio_reg(pi, 20864 RADIO_2057_LOGEN_MX2G_TUNE, 20865 ci2->RF_logen_mx2g_tune); 20866 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 20867 ci2->RF_logen_indbuf2g_tune); 20868 20869 write_radio_reg(pi, 20870 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 20871 ci2->RF_txmix2g_tune_boost_pu_core0); 20872 write_radio_reg(pi, 20873 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 20874 ci2->RF_pad2g_tune_pus_core0); 20875 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 20876 ci2->RF_lna2g_tune_core0); 20877 20878 write_radio_reg(pi, 20879 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 20880 ci2->RF_txmix2g_tune_boost_pu_core1); 20881 write_radio_reg(pi, 20882 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 20883 ci2->RF_pad2g_tune_pus_core1); 20884 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 20885 ci2->RF_lna2g_tune_core1); 20886 20887 } else { 20888 20889 write_radio_reg(pi, 20890 RADIO_2057_VCOCAL_COUNTVAL0, 20891 ci->RF_vcocal_countval0); 20892 write_radio_reg(pi, RADIO_2057_VCOCAL_COUNTVAL1, 20893 ci->RF_vcocal_countval1); 20894 write_radio_reg(pi, RADIO_2057_RFPLL_REFMASTER_SPAREXTALSIZE, 20895 ci->RF_rfpll_refmaster_sparextalsize); 20896 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20897 ci->RF_rfpll_loopfilter_r1); 20898 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20899 ci->RF_rfpll_loopfilter_c2); 20900 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20901 ci->RF_rfpll_loopfilter_c1); 20902 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, ci->RF_cp_kpd_idac); 20903 write_radio_reg(pi, RADIO_2057_RFPLL_MMD0, ci->RF_rfpll_mmd0); 20904 write_radio_reg(pi, RADIO_2057_RFPLL_MMD1, ci->RF_rfpll_mmd1); 20905 write_radio_reg(pi, RADIO_2057_VCOBUF_TUNE, ci->RF_vcobuf_tune); 20906 write_radio_reg(pi, 20907 RADIO_2057_LOGEN_MX2G_TUNE, 20908 ci->RF_logen_mx2g_tune); 20909 write_radio_reg(pi, RADIO_2057_LOGEN_MX5G_TUNE, 20910 ci->RF_logen_mx5g_tune); 20911 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF2G_TUNE, 20912 ci->RF_logen_indbuf2g_tune); 20913 write_radio_reg(pi, RADIO_2057_LOGEN_INDBUF5G_TUNE, 20914 ci->RF_logen_indbuf5g_tune); 20915 20916 write_radio_reg(pi, 20917 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 20918 ci->RF_txmix2g_tune_boost_pu_core0); 20919 write_radio_reg(pi, 20920 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 20921 ci->RF_pad2g_tune_pus_core0); 20922 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE0, 20923 ci->RF_pga_boost_tune_core0); 20924 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE0, 20925 ci->RF_txmix5g_boost_tune_core0); 20926 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE0, 20927 ci->RF_pad5g_tune_misc_pus_core0); 20928 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE0, 20929 ci->RF_lna2g_tune_core0); 20930 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE0, 20931 ci->RF_lna5g_tune_core0); 20932 20933 write_radio_reg(pi, 20934 RADIO_2057_TXMIX2G_TUNE_BOOST_PU_CORE1, 20935 ci->RF_txmix2g_tune_boost_pu_core1); 20936 write_radio_reg(pi, 20937 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 20938 ci->RF_pad2g_tune_pus_core1); 20939 write_radio_reg(pi, RADIO_2057_PGA_BOOST_TUNE_CORE1, 20940 ci->RF_pga_boost_tune_core1); 20941 write_radio_reg(pi, RADIO_2057_TXMIX5G_BOOST_TUNE_CORE1, 20942 ci->RF_txmix5g_boost_tune_core1); 20943 write_radio_reg(pi, RADIO_2057_PAD5G_TUNE_MISC_PUS_CORE1, 20944 ci->RF_pad5g_tune_misc_pus_core1); 20945 write_radio_reg(pi, RADIO_2057_LNA2G_TUNE_CORE1, 20946 ci->RF_lna2g_tune_core1); 20947 write_radio_reg(pi, RADIO_2057_LNA5G_TUNE_CORE1, 20948 ci->RF_lna5g_tune_core1); 20949 } 20950 20951 if ((pi->pubpi.radiorev <= 4) || (pi->pubpi.radiorev == 6)) { 20952 20953 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20954 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20955 0x3f); 20956 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20957 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20958 0x8); 20959 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20960 0x8); 20961 } else { 20962 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20963 0x1f); 20964 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20965 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20966 0x8); 20967 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20968 0x8); 20969 } 20970 } else if ((pi->pubpi.radiorev == 5) || (pi->pubpi.radiorev == 7) || 20971 (pi->pubpi.radiorev == 8)) { 20972 20973 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20974 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20975 0x1b); 20976 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x30); 20977 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20978 0xa); 20979 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20980 0xa); 20981 } else { 20982 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_R1, 20983 0x1f); 20984 write_radio_reg(pi, RADIO_2057_CP_KPD_IDAC, 0x3f); 20985 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C1, 20986 0x8); 20987 write_radio_reg(pi, RADIO_2057_RFPLL_LOOPFILTER_C2, 20988 0x8); 20989 } 20990 20991 } 20992 20993 if (CHSPEC_IS2G(pi->radio_chanspec)) { 20994 if (PHY_IPA(pi)) { 20995 if (pi->pubpi.radiorev == 3) 20996 txmix2g_tune_boost_pu = 0x6b; 20997 20998 if (pi->pubpi.radiorev == 5) 20999 pad2g_tune_pus = 0x73; 21000 21001 } else { 21002 if (pi->pubpi.radiorev != 5) { 21003 pad2g_tune_pus = 0x3; 21004 21005 txmix2g_tune_boost_pu = 0x61; 21006 } 21007 } 21008 21009 for (coreNum = 0; coreNum <= 1; coreNum++) { 21010 21011 if (txmix2g_tune_boost_pu != 0) 21012 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21013 TXMIX2G_TUNE_BOOST_PU, 21014 txmix2g_tune_boost_pu); 21015 21016 if (pad2g_tune_pus != 0) 21017 WRITE_RADIO_REG4(pi, RADIO_2057, CORE, coreNum, 21018 PAD2G_TUNE_PUS, 21019 pad2g_tune_pus); 21020 } 21021 } 21022 21023 udelay(50); 21024 21025 wlc_phy_radio205x_vcocal_nphy(pi); 21026} 21027 21028static void 21029wlc_phy_chanspec_nphy_setup(struct brcms_phy *pi, u16 chanspec, 21030 const struct nphy_sfo_cfg *ci) 21031{ 21032 u16 val; 21033 21034 val = read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand; 21035 if (CHSPEC_IS5G(chanspec) && !val) { 21036 21037 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21038 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21039 (val | MAC_PHY_FORCE_CLK)); 21040 21041 or_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21042 (BBCFG_RESETCCA | BBCFG_RESETRX)); 21043 21044 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21045 21046 or_phy_reg(pi, 0x09, NPHY_BandControl_currentBand); 21047 } else if (!CHSPEC_IS5G(chanspec) && val) { 21048 21049 and_phy_reg(pi, 0x09, ~NPHY_BandControl_currentBand); 21050 21051 val = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); 21052 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 21053 (val | MAC_PHY_FORCE_CLK)); 21054 21055 and_phy_reg(pi, (NPHY_TO_BPHY_OFF + BPHY_BB_CONFIG), 21056 (u16) (~(BBCFG_RESETCCA | BBCFG_RESETRX))); 21057 21058 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), val); 21059 } 21060 21061 write_phy_reg(pi, 0x1ce, ci->PHY_BW1a); 21062 write_phy_reg(pi, 0x1cf, ci->PHY_BW2); 21063 write_phy_reg(pi, 0x1d0, ci->PHY_BW3); 21064 21065 write_phy_reg(pi, 0x1d1, ci->PHY_BW4); 21066 write_phy_reg(pi, 0x1d2, ci->PHY_BW5); 21067 write_phy_reg(pi, 0x1d3, ci->PHY_BW6); 21068 21069 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { 21070 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 0); 21071 21072 or_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, 0x800); 21073 } else { 21074 wlc_phy_classifier_nphy(pi, NPHY_ClassifierCtrl_ofdm_en, 21075 NPHY_ClassifierCtrl_ofdm_en); 21076 21077 if (CHSPEC_IS2G(chanspec)) 21078 and_phy_reg(pi, NPHY_TO_BPHY_OFF + BPHY_TEST, ~0x840); 21079 } 21080 21081 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) 21082 wlc_phy_txpwr_fixpower_nphy(pi); 21083 21084 if (NREV_LT(pi->pubpi.phy_rev, 3)) 21085 wlc_phy_adjust_lnagaintbl_nphy(pi); 21086 21087 wlc_phy_txlpfbw_nphy(pi); 21088 21089 if (NREV_GE(pi->pubpi.phy_rev, 3) 21090 && (pi->phy_spuravoid != SPURAVOID_DISABLE)) { 21091 u8 spuravoid = 0; 21092 21093 val = CHSPEC_CHANNEL(chanspec); 21094 if (!CHSPEC_IS40(pi->radio_chanspec)) { 21095 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21096 if ((val == 13) || (val == 14) || (val == 153)) 21097 spuravoid = 1; 21098 } else if (((val >= 5) && (val <= 8)) || (val == 13) 21099 || (val == 14)) { 21100 spuravoid = 1; 21101 } 21102 } else if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21103 if (val == 54) 21104 spuravoid = 1; 21105 } else if (pi->nphy_aband_spurwar_en && 21106 ((val == 38) || (val == 102) || (val == 118))) { 21107 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) 21108 && (pi->sh->chippkg == BCMA_PKG_ID_BCM4717)) { 21109 spuravoid = 0; 21110 } else { 21111 spuravoid = 1; 21112 } 21113 } 21114 21115 if (pi->phy_spuravoid == SPURAVOID_FORCEON) 21116 spuravoid = 1; 21117 21118 if ((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21119 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21120 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21121 spuravoid); 21122 } else { 21123 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); 21124 bcma_pmu_spuravoid_pllupdate(&pi->d11core->bus->drv_cc, 21125 spuravoid); 21126 wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); 21127 } 21128 21129 if ((pi->sh->chip == BCMA_CHIP_ID_BCM43224) || 21130 (pi->sh->chip == BCMA_CHIP_ID_BCM43225)) { 21131 if (spuravoid == 1) { 21132 bcma_write16(pi->d11core, 21133 D11REGOFFS(tsf_clk_frac_l), 21134 0x5341); 21135 bcma_write16(pi->d11core, 21136 D11REGOFFS(tsf_clk_frac_h), 0x8); 21137 } else { 21138 bcma_write16(pi->d11core, 21139 D11REGOFFS(tsf_clk_frac_l), 21140 0x8889); 21141 bcma_write16(pi->d11core, 21142 D11REGOFFS(tsf_clk_frac_h), 0x8); 21143 } 21144 } 21145 21146 if (!((pi->sh->chip == BCMA_CHIP_ID_BCM4716) || 21147 (pi->sh->chip == BCMA_CHIP_ID_BCM47162))) 21148 wlapi_bmac_core_phypll_reset(pi->sh->physhim); 21149 21150 mod_phy_reg(pi, 0x01, (0x1 << 15), 21151 ((spuravoid > 0) ? (0x1 << 15) : 0)); 21152 21153 wlc_phy_resetcca_nphy(pi); 21154 21155 pi->phy_isspuravoid = (spuravoid > 0); 21156 } 21157 21158 if (NREV_LT(pi->pubpi.phy_rev, 7)) 21159 write_phy_reg(pi, 0x17e, 0x3830); 21160 21161 wlc_phy_spurwar_nphy(pi); 21162} 21163 21164void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, u16 chanspec) 21165{ 21166 int freq; 21167 const struct chan_info_nphy_radio2057 *t0 = NULL; 21168 const struct chan_info_nphy_radio205x *t1 = NULL; 21169 const struct chan_info_nphy_radio2057_rev5 *t2 = NULL; 21170 const struct chan_info_nphy_2055 *t3 = NULL; 21171 21172 if (!wlc_phy_chan2freq_nphy 21173 (pi, CHSPEC_CHANNEL(chanspec), &freq, &t0, &t1, &t2, &t3)) 21174 return; 21175 21176 wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec); 21177 21178 if (CHSPEC_BW(chanspec) != pi->bw) 21179 wlapi_bmac_bw_set(pi->sh->physhim, CHSPEC_BW(chanspec)); 21180 21181 if (CHSPEC_IS40(chanspec)) { 21182 if (CHSPEC_SB_UPPER(chanspec)) { 21183 or_phy_reg(pi, 0xa0, BPHY_BAND_SEL_UP20); 21184 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21185 or_phy_reg(pi, 0x310, PRIM_SEL_UP20); 21186 } else { 21187 and_phy_reg(pi, 0xa0, ~BPHY_BAND_SEL_UP20); 21188 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21189 and_phy_reg(pi, 0x310, 21190 (~PRIM_SEL_UP20 & 0xffff)); 21191 } 21192 } 21193 21194 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21195 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21196 21197 if ((pi->pubpi.radiorev <= 4) 21198 || (pi->pubpi.radiorev == 6)) { 21199 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE0, 21200 0x2, 21201 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21202 : 0)); 21203 mod_radio_reg(pi, RADIO_2057_TIA_CONFIG_CORE1, 21204 0x2, 21205 (CHSPEC_IS5G(chanspec) ? (1 << 1) 21206 : 0)); 21207 } 21208 21209 wlc_phy_chanspec_radio2057_setup(pi, t0, t2); 21210 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21211 (pi->pubpi.radiorev == 5) ? 21212 (const struct nphy_sfo_cfg *)&(t2->PHY_BW1a) : 21213 (const struct nphy_sfo_cfg *)&(t0->PHY_BW1a)); 21214 21215 } else { 21216 21217 mod_radio_reg(pi, 21218 RADIO_2056_SYN_COM_CTRL | RADIO_2056_SYN, 21219 0x4, 21220 (CHSPEC_IS5G(chanspec) ? (0x1 << 2) : 0)); 21221 wlc_phy_chanspec_radio2056_setup(pi, t1); 21222 21223 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21224 (const struct nphy_sfo_cfg *) &(t1->PHY_BW1a)); 21225 } 21226 21227 } else { 21228 21229 mod_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, 0x70, 21230 (CHSPEC_IS5G(chanspec) ? (0x02 << 4) 21231 : (0x05 << 4))); 21232 21233 wlc_phy_chanspec_radio2055_setup(pi, t3); 21234 wlc_phy_chanspec_nphy_setup(pi, chanspec, 21235 (const struct nphy_sfo_cfg *) 21236 &(t3->PHY_BW1a)); 21237 } 21238 21239} 21240 21241void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init) 21242{ 21243 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); 21244 u16 mask = 0xfc00; 21245 u32 mc = 0; 21246 21247 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21248 return; 21249 21250 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21251 u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; 21252 21253 if (!lut_init) 21254 return; 21255 21256 if (pi->srom_fem2g.antswctrllut == 0) { 21257 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21258 1, 0x02, 16, &v0); 21259 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21260 1, 0x03, 16, &v1); 21261 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21262 1, 0x08, 16, &v2); 21263 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21264 1, 0x0C, 16, &v3); 21265 } 21266 21267 if (pi->srom_fem5g.antswctrllut == 0) { 21268 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21269 1, 0x12, 16, &v0); 21270 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21271 1, 0x13, 16, &v1); 21272 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21273 1, 0x18, 16, &v2); 21274 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_ANTSWCTRLLUT, 21275 1, 0x1C, 16, &v3); 21276 } 21277 } else { 21278 21279 write_phy_reg(pi, 0xc8, 0x0); 21280 write_phy_reg(pi, 0xc9, 0x0); 21281 21282 bcma_chipco_gpio_control(&pi->d11core->bus->drv_cc, mask, mask); 21283 21284 mc = bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 21285 mc &= ~MCTL_GPOUT_SEL_MASK; 21286 bcma_write32(pi->d11core, D11REGOFFS(maccontrol), mc); 21287 21288 bcma_set16(pi->d11core, D11REGOFFS(psm_gpio_oe), mask); 21289 21290 bcma_mask16(pi->d11core, D11REGOFFS(psm_gpio_out), ~mask); 21291 21292 if (lut_init) { 21293 write_phy_reg(pi, 0xf8, 0x02d8); 21294 write_phy_reg(pi, 0xf9, 0x0301); 21295 write_phy_reg(pi, 0xfa, 0x02d8); 21296 write_phy_reg(pi, 0xfb, 0x0301); 21297 } 21298 } 21299} 21300 21301u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val) 21302{ 21303 u16 curr_ctl, new_ctl; 21304 bool suspended = false; 21305 21306 if (D11REV_IS(pi->sh->corerev, 16)) { 21307 suspended = (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 21308 MCTL_EN_MAC) ? false : true; 21309 if (!suspended) 21310 wlapi_suspend_mac_and_wait(pi->sh->physhim); 21311 } 21312 21313 curr_ctl = read_phy_reg(pi, 0xb0) & (0x7 << 0); 21314 21315 new_ctl = (curr_ctl & (~mask)) | (val & mask); 21316 21317 mod_phy_reg(pi, 0xb0, (0x7 << 0), new_ctl); 21318 21319 if (D11REV_IS(pi->sh->corerev, 16) && !suspended) 21320 wlapi_enable_mac(pi->sh->physhim); 21321 21322 return new_ctl; 21323} 21324 21325void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd) 21326{ 21327 u16 trigger_mask, status_mask; 21328 u16 orig_RfseqCoreActv; 21329 21330 switch (cmd) { 21331 case NPHY_RFSEQ_RX2TX: 21332 trigger_mask = NPHY_RfseqTrigger_rx2tx; 21333 status_mask = NPHY_RfseqStatus_rx2tx; 21334 break; 21335 case NPHY_RFSEQ_TX2RX: 21336 trigger_mask = NPHY_RfseqTrigger_tx2rx; 21337 status_mask = NPHY_RfseqStatus_tx2rx; 21338 break; 21339 case NPHY_RFSEQ_RESET2RX: 21340 trigger_mask = NPHY_RfseqTrigger_reset2rx; 21341 status_mask = NPHY_RfseqStatus_reset2rx; 21342 break; 21343 case NPHY_RFSEQ_UPDATEGAINH: 21344 trigger_mask = NPHY_RfseqTrigger_updategainh; 21345 status_mask = NPHY_RfseqStatus_updategainh; 21346 break; 21347 case NPHY_RFSEQ_UPDATEGAINL: 21348 trigger_mask = NPHY_RfseqTrigger_updategainl; 21349 status_mask = NPHY_RfseqStatus_updategainl; 21350 break; 21351 case NPHY_RFSEQ_UPDATEGAINU: 21352 trigger_mask = NPHY_RfseqTrigger_updategainu; 21353 status_mask = NPHY_RfseqStatus_updategainu; 21354 break; 21355 default: 21356 return; 21357 } 21358 21359 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 21360 or_phy_reg(pi, 0xa1, 21361 (NPHY_RfseqMode_CoreActv_override | 21362 NPHY_RfseqMode_Trigger_override)); 21363 or_phy_reg(pi, 0xa3, trigger_mask); 21364 SPINWAIT((read_phy_reg(pi, 0xa4) & status_mask), 200000); 21365 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 21366 WARN(read_phy_reg(pi, 0xa4) & status_mask, "HW error in rf"); 21367} 21368 21369static void 21370wlc_phy_rfctrl_override_1tomany_nphy(struct brcms_phy *pi, u16 cmd, u16 value, 21371 u8 core_mask, u8 off) 21372{ 21373 u16 rfmxgain = 0, lpfgain = 0; 21374 u16 tgain = 0; 21375 21376 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21377 21378 switch (cmd) { 21379 case NPHY_REV7_RfctrlOverride_cmd_rxrf_pu: 21380 wlc_phy_rfctrl_override_nphy_rev7( 21381 pi, (0x1 << 5), 21382 value, core_mask, off, 21383 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21384 wlc_phy_rfctrl_override_nphy_rev7( 21385 pi, (0x1 << 4), value, 21386 core_mask, off, 21387 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21388 wlc_phy_rfctrl_override_nphy_rev7( 21389 pi, (0x1 << 3), value, 21390 core_mask, off, 21391 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21392 break; 21393 case NPHY_REV7_RfctrlOverride_cmd_rx_pu: 21394 wlc_phy_rfctrl_override_nphy_rev7( 21395 pi, (0x1 << 2), 21396 value, core_mask, off, 21397 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21398 wlc_phy_rfctrl_override_nphy_rev7( 21399 pi, (0x1 << 1), value, 21400 core_mask, off, 21401 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21402 wlc_phy_rfctrl_override_nphy_rev7( 21403 pi, (0x1 << 0), value, 21404 core_mask, off, 21405 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21406 wlc_phy_rfctrl_override_nphy_rev7( 21407 pi, (0x1 << 1), value, 21408 core_mask, off, 21409 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21410 wlc_phy_rfctrl_override_nphy_rev7( 21411 pi, (0x1 << 11), 0, 21412 core_mask, off, 21413 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21414 break; 21415 case NPHY_REV7_RfctrlOverride_cmd_tx_pu: 21416 wlc_phy_rfctrl_override_nphy_rev7( 21417 pi, (0x1 << 2), 21418 value, core_mask, off, 21419 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21420 wlc_phy_rfctrl_override_nphy_rev7( 21421 pi, (0x1 << 1), value, 21422 core_mask, off, 21423 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21424 wlc_phy_rfctrl_override_nphy_rev7( 21425 pi, (0x1 << 0), value, 21426 core_mask, off, 21427 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21428 wlc_phy_rfctrl_override_nphy_rev7( 21429 pi, (0x1 << 2), value, 21430 core_mask, off, 21431 NPHY_REV7_RFCTRLOVERRIDE_ID2); 21432 wlc_phy_rfctrl_override_nphy_rev7( 21433 pi, (0x1 << 11), 1, 21434 core_mask, off, 21435 NPHY_REV7_RFCTRLOVERRIDE_ID1); 21436 break; 21437 case NPHY_REV7_RfctrlOverride_cmd_rxgain: 21438 rfmxgain = value & 0x000ff; 21439 lpfgain = value & 0x0ff00; 21440 lpfgain = lpfgain >> 8; 21441 21442 wlc_phy_rfctrl_override_nphy_rev7( 21443 pi, (0x1 << 11), 21444 rfmxgain, core_mask, 21445 off, 21446 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21447 wlc_phy_rfctrl_override_nphy_rev7( 21448 pi, (0x3 << 13), 21449 lpfgain, core_mask, 21450 off, 21451 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21452 break; 21453 case NPHY_REV7_RfctrlOverride_cmd_txgain: 21454 tgain = value & 0x7fff; 21455 lpfgain = value & 0x8000; 21456 lpfgain = lpfgain >> 14; 21457 21458 wlc_phy_rfctrl_override_nphy_rev7( 21459 pi, (0x1 << 12), 21460 tgain, core_mask, off, 21461 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21462 wlc_phy_rfctrl_override_nphy_rev7( 21463 pi, (0x1 << 13), 21464 lpfgain, core_mask, 21465 off, 21466 NPHY_REV7_RFCTRLOVERRIDE_ID0); 21467 break; 21468 } 21469 } 21470} 21471 21472static void 21473wlc_phy_scale_offset_rssi_nphy(struct brcms_phy *pi, u16 scale, s8 offset, 21474 u8 coresel, u8 rail, u8 rssi_type) 21475{ 21476 u16 valuetostuff; 21477 21478 offset = (offset > NPHY_RSSICAL_MAXREAD) ? 21479 NPHY_RSSICAL_MAXREAD : offset; 21480 offset = (offset < (-NPHY_RSSICAL_MAXREAD - 1)) ? 21481 -NPHY_RSSICAL_MAXREAD - 1 : offset; 21482 21483 valuetostuff = ((scale & 0x3f) << 8) | (offset & 0x3f); 21484 21485 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21486 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21487 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21488 write_phy_reg(pi, 0x1a6, valuetostuff); 21489 21490 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21491 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21492 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21493 write_phy_reg(pi, 0x1ac, valuetostuff); 21494 21495 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21496 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21497 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_NB)) 21498 write_phy_reg(pi, 0x1b2, valuetostuff); 21499 21500 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21501 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21502 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_NB)) 21503 write_phy_reg(pi, 0x1b8, valuetostuff); 21504 21505 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21506 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21507 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21508 write_phy_reg(pi, 0x1a4, valuetostuff); 21509 21510 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21511 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21512 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21513 write_phy_reg(pi, 0x1aa, valuetostuff); 21514 21515 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21516 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21517 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W1)) 21518 write_phy_reg(pi, 0x1b0, valuetostuff); 21519 21520 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21521 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21522 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W1)) 21523 write_phy_reg(pi, 0x1b6, valuetostuff); 21524 21525 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21526 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21527 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21528 write_phy_reg(pi, 0x1a5, valuetostuff); 21529 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21530 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21531 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21532 write_phy_reg(pi, 0x1ab, valuetostuff); 21533 21534 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21535 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21536 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_W2)) 21537 write_phy_reg(pi, 0x1b1, valuetostuff); 21538 21539 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21540 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21541 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_W2)) 21542 write_phy_reg(pi, 0x1b7, valuetostuff); 21543 21544 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21545 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21546 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21547 write_phy_reg(pi, 0x1a7, valuetostuff); 21548 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21549 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21550 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21551 write_phy_reg(pi, 0x1ad, valuetostuff); 21552 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21553 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21554 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21555 write_phy_reg(pi, 0x1b3, valuetostuff); 21556 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21557 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21558 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_TBD)) 21559 write_phy_reg(pi, 0x1b9, valuetostuff); 21560 21561 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21562 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21563 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21564 write_phy_reg(pi, 0x1a8, valuetostuff); 21565 21566 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21567 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21568 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21569 write_phy_reg(pi, 0x1ae, valuetostuff); 21570 21571 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21572 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21573 (rail == NPHY_RAIL_I) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21574 write_phy_reg(pi, 0x1b4, valuetostuff); 21575 21576 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21577 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21578 (rail == NPHY_RAIL_Q) && (rssi_type == NPHY_RSSI_SEL_IQ)) 21579 write_phy_reg(pi, 0x1ba, valuetostuff); 21580 21581 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21582 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21583 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21584 write_phy_reg(pi, 0x1a9, valuetostuff); 21585 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21586 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21587 (rssi_type == NPHY_RSSI_SEL_TSSI_2G)) 21588 write_phy_reg(pi, 0x1b5, valuetostuff); 21589 21590 if (((coresel == RADIO_MIMO_CORESEL_CORE1) || 21591 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21592 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21593 write_phy_reg(pi, 0x1af, valuetostuff); 21594 21595 if (((coresel == RADIO_MIMO_CORESEL_CORE2) || 21596 (coresel == RADIO_MIMO_CORESEL_ALLRX)) && 21597 (rssi_type == NPHY_RSSI_SEL_TSSI_5G)) 21598 write_phy_reg(pi, 0x1bb, valuetostuff); 21599} 21600 21601static void brcms_phy_wr_tx_mux(struct brcms_phy *pi, u8 core) 21602{ 21603 if (PHY_IPA(pi)) { 21604 if (NREV_GE(pi->pubpi.phy_rev, 7)) 21605 write_radio_reg(pi, 21606 ((core == PHY_CORE_0) ? 21607 RADIO_2057_TX0_TX_SSI_MUX : 21608 RADIO_2057_TX1_TX_SSI_MUX), 21609 (CHSPEC_IS5G(pi->radio_chanspec) ? 21610 0xc : 0xe)); 21611 else 21612 write_radio_reg(pi, 21613 RADIO_2056_TX_TX_SSI_MUX | 21614 ((core == PHY_CORE_0) ? 21615 RADIO_2056_TX0 : RADIO_2056_TX1), 21616 (CHSPEC_IS5G(pi->radio_chanspec) ? 21617 0xc : 0xe)); 21618 } else { 21619 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21620 write_radio_reg(pi, 21621 ((core == PHY_CORE_0) ? 21622 RADIO_2057_TX0_TX_SSI_MUX : 21623 RADIO_2057_TX1_TX_SSI_MUX), 21624 0x11); 21625 21626 if (pi->pubpi.radioid == BCM2057_ID) 21627 write_radio_reg(pi, 21628 RADIO_2057_IQTEST_SEL_PU, 0x1); 21629 21630 } else { 21631 write_radio_reg(pi, 21632 RADIO_2056_TX_TX_SSI_MUX | 21633 ((core == PHY_CORE_0) ? 21634 RADIO_2056_TX0 : RADIO_2056_TX1), 21635 0x11); 21636 } 21637 } 21638} 21639 21640void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core_code, u8 rssi_type) 21641{ 21642 u16 mask, val; 21643 u16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, 21644 startseq; 21645 u16 rfctrlovr_rssi_val, rfctrlovr_rxen_val, rfctrlovr_coresel_val, 21646 rfctrlovr_trigger_val; 21647 u16 afectrlovr_rssi_mask, rfctrlcmd_mask, rfctrlovr_mask; 21648 u16 rfctrlcmd_val, rfctrlovr_val; 21649 u8 core; 21650 21651 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21652 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21653 mod_phy_reg(pi, 0x8f, (0x1 << 9), 0); 21654 mod_phy_reg(pi, 0xa5, (0x1 << 9), 0); 21655 21656 mod_phy_reg(pi, 0xa6, (0x3 << 8), 0); 21657 mod_phy_reg(pi, 0xa7, (0x3 << 8), 0); 21658 21659 mod_phy_reg(pi, 0xe5, (0x1 << 5), 0); 21660 mod_phy_reg(pi, 0xe6, (0x1 << 5), 0); 21661 21662 mask = (0x1 << 2) | 21663 (0x1 << 3) | (0x1 << 4) | (0x1 << 5); 21664 mod_phy_reg(pi, 0xf9, mask, 0); 21665 mod_phy_reg(pi, 0xfb, mask, 0); 21666 21667 } else { 21668 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 21669 if (core_code == RADIO_MIMO_CORESEL_CORE1 21670 && core == PHY_CORE_1) 21671 continue; 21672 else if (core_code == RADIO_MIMO_CORESEL_CORE2 21673 && core == PHY_CORE_0) 21674 continue; 21675 21676 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21677 0x8f : 0xa5, (0x1 << 9), 1 << 9); 21678 21679 if (rssi_type == NPHY_RSSI_SEL_W1 || 21680 rssi_type == NPHY_RSSI_SEL_W2 || 21681 rssi_type == NPHY_RSSI_SEL_NB) { 21682 mod_phy_reg(pi, 21683 (core == 21684 PHY_CORE_0) ? 0xa6 : 0xa7, 21685 (0x3 << 8), 0); 21686 21687 mask = (0x1 << 2) | 21688 (0x1 << 3) | 21689 (0x1 << 4) | (0x1 << 5); 21690 mod_phy_reg(pi, 21691 (core == 21692 PHY_CORE_0) ? 0xf9 : 0xfb, 21693 mask, 0); 21694 21695 if (rssi_type == NPHY_RSSI_SEL_W1) { 21696 if (CHSPEC_IS5G( 21697 pi->radio_chanspec)) { 21698 mask = (0x1 << 2); 21699 val = 1 << 2; 21700 } else { 21701 mask = (0x1 << 3); 21702 val = 1 << 3; 21703 } 21704 } else if (rssi_type == 21705 NPHY_RSSI_SEL_W2) { 21706 mask = (0x1 << 4); 21707 val = 1 << 4; 21708 } else { 21709 mask = (0x1 << 5); 21710 val = 1 << 5; 21711 } 21712 mod_phy_reg(pi, 21713 (core == 21714 PHY_CORE_0) ? 0xf9 : 0xfb, 21715 mask, val); 21716 21717 mask = (0x1 << 5); 21718 val = 1 << 5; 21719 mod_phy_reg(pi, (core == PHY_CORE_0) ? 21720 0xe5 : 0xe6, mask, val); 21721 } else { 21722 if (rssi_type == NPHY_RSSI_SEL_TBD) { 21723 mask = (0x3 << 8); 21724 val = 1 << 8; 21725 mod_phy_reg(pi, 21726 (core == 21727 PHY_CORE_0) ? 0xa6 21728 : 0xa7, mask, val); 21729 mask = (0x3 << 10); 21730 val = 1 << 10; 21731 mod_phy_reg(pi, 21732 (core == 21733 PHY_CORE_0) ? 0xa6 21734 : 0xa7, mask, val); 21735 } else if (rssi_type == 21736 NPHY_RSSI_SEL_IQ) { 21737 mask = (0x3 << 8); 21738 val = 2 << 8; 21739 mod_phy_reg(pi, 21740 (core == 21741 PHY_CORE_0) ? 0xa6 21742 : 0xa7, mask, val); 21743 mask = (0x3 << 10); 21744 val = 2 << 10; 21745 mod_phy_reg(pi, 21746 (core == 21747 PHY_CORE_0) ? 0xa6 21748 : 0xa7, mask, val); 21749 } else { 21750 mask = (0x3 << 8); 21751 val = 3 << 8; 21752 mod_phy_reg(pi, 21753 (core == 21754 PHY_CORE_0) ? 0xa6 21755 : 0xa7, mask, val); 21756 mask = (0x3 << 10); 21757 val = 3 << 10; 21758 mod_phy_reg(pi, 21759 (core == 21760 PHY_CORE_0) ? 0xa6 21761 : 0xa7, mask, val); 21762 brcms_phy_wr_tx_mux(pi, core); 21763 afectrlovr_rssi_val = 1 << 9; 21764 mod_phy_reg(pi, 21765 (core == 21766 PHY_CORE_0) ? 0x8f 21767 : 0xa5, (0x1 << 9), 21768 afectrlovr_rssi_val); 21769 } 21770 } 21771 } 21772 } 21773 } else { 21774 21775 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21776 (rssi_type == NPHY_RSSI_SEL_W2) || 21777 (rssi_type == NPHY_RSSI_SEL_NB)) 21778 val = 0x0; 21779 else if (rssi_type == NPHY_RSSI_SEL_TBD) 21780 val = 0x1; 21781 else if (rssi_type == NPHY_RSSI_SEL_IQ) 21782 val = 0x2; 21783 else 21784 val = 0x3; 21785 21786 mask = ((0x3 << 12) | (0x3 << 14)); 21787 val = (val << 12) | (val << 14); 21788 mod_phy_reg(pi, 0xa6, mask, val); 21789 mod_phy_reg(pi, 0xa7, mask, val); 21790 21791 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21792 (rssi_type == NPHY_RSSI_SEL_W2) || 21793 (rssi_type == NPHY_RSSI_SEL_NB)) { 21794 if (rssi_type == NPHY_RSSI_SEL_W1) 21795 val = 0x1; 21796 if (rssi_type == NPHY_RSSI_SEL_W2) 21797 val = 0x2; 21798 if (rssi_type == NPHY_RSSI_SEL_NB) 21799 val = 0x3; 21800 21801 mask = (0x3 << 4); 21802 val = (val << 4); 21803 mod_phy_reg(pi, 0x7a, mask, val); 21804 mod_phy_reg(pi, 0x7d, mask, val); 21805 } 21806 21807 if (core_code == RADIO_MIMO_CORESEL_OFF) { 21808 afectrlovr_rssi_val = 0; 21809 rfctrlcmd_rxen_val = 0; 21810 rfctrlcmd_coresel_val = 0; 21811 rfctrlovr_rssi_val = 0; 21812 rfctrlovr_rxen_val = 0; 21813 rfctrlovr_coresel_val = 0; 21814 rfctrlovr_trigger_val = 0; 21815 startseq = 0; 21816 } else { 21817 afectrlovr_rssi_val = 1; 21818 rfctrlcmd_rxen_val = 1; 21819 rfctrlcmd_coresel_val = core_code; 21820 rfctrlovr_rssi_val = 1; 21821 rfctrlovr_rxen_val = 1; 21822 rfctrlovr_coresel_val = 1; 21823 rfctrlovr_trigger_val = 1; 21824 startseq = 1; 21825 } 21826 21827 afectrlovr_rssi_mask = ((0x1 << 12) | (0x1 << 13)); 21828 afectrlovr_rssi_val = (afectrlovr_rssi_val << 21829 12) | (afectrlovr_rssi_val << 13); 21830 mod_phy_reg(pi, 0xa5, afectrlovr_rssi_mask, 21831 afectrlovr_rssi_val); 21832 21833 if ((rssi_type == NPHY_RSSI_SEL_W1) || 21834 (rssi_type == NPHY_RSSI_SEL_W2) || 21835 (rssi_type == NPHY_RSSI_SEL_NB)) { 21836 rfctrlcmd_mask = ((0x1 << 8) | (0x7 << 3)); 21837 rfctrlcmd_val = (rfctrlcmd_rxen_val << 8) | 21838 (rfctrlcmd_coresel_val << 3); 21839 21840 rfctrlovr_mask = ((0x1 << 5) | 21841 (0x1 << 12) | 21842 (0x1 << 1) | (0x1 << 0)); 21843 rfctrlovr_val = (rfctrlovr_rssi_val << 21844 5) | 21845 (rfctrlovr_rxen_val << 12) | 21846 (rfctrlovr_coresel_val << 1) | 21847 (rfctrlovr_trigger_val << 0); 21848 21849 mod_phy_reg(pi, 0x78, rfctrlcmd_mask, rfctrlcmd_val); 21850 mod_phy_reg(pi, 0xec, rfctrlovr_mask, rfctrlovr_val); 21851 21852 mod_phy_reg(pi, 0x78, (0x1 << 0), (startseq << 0)); 21853 udelay(20); 21854 21855 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 21856 } 21857 } 21858} 21859 21860int 21861wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type, s32 *rssi_buf, 21862 u8 nsamps) 21863{ 21864 s16 rssi0, rssi1; 21865 u16 afectrlCore1_save = 0; 21866 u16 afectrlCore2_save = 0; 21867 u16 afectrlOverride1_save = 0; 21868 u16 afectrlOverride2_save = 0; 21869 u16 rfctrlOverrideAux0_save = 0; 21870 u16 rfctrlOverrideAux1_save = 0; 21871 u16 rfctrlMiscReg1_save = 0; 21872 u16 rfctrlMiscReg2_save = 0; 21873 u16 rfctrlcmd_save = 0; 21874 u16 rfctrloverride_save = 0; 21875 u16 rfctrlrssiothers1_save = 0; 21876 u16 rfctrlrssiothers2_save = 0; 21877 s8 tmp_buf[4]; 21878 u8 ctr = 0, samp = 0; 21879 s32 rssi_out_val; 21880 u16 gpiosel_orig; 21881 21882 afectrlCore1_save = read_phy_reg(pi, 0xa6); 21883 afectrlCore2_save = read_phy_reg(pi, 0xa7); 21884 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21885 rfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 21886 rfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 21887 afectrlOverride1_save = read_phy_reg(pi, 0x8f); 21888 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 21889 rfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 21890 rfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 21891 } else { 21892 afectrlOverride1_save = read_phy_reg(pi, 0xa5); 21893 rfctrlcmd_save = read_phy_reg(pi, 0x78); 21894 rfctrloverride_save = read_phy_reg(pi, 0xec); 21895 rfctrlrssiothers1_save = read_phy_reg(pi, 0x7a); 21896 rfctrlrssiothers2_save = read_phy_reg(pi, 0x7d); 21897 } 21898 21899 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 21900 21901 gpiosel_orig = read_phy_reg(pi, 0xca); 21902 if (NREV_LT(pi->pubpi.phy_rev, 2)) 21903 write_phy_reg(pi, 0xca, 5); 21904 21905 for (ctr = 0; ctr < 4; ctr++) 21906 rssi_buf[ctr] = 0; 21907 21908 for (samp = 0; samp < nsamps; samp++) { 21909 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 21910 rssi0 = read_phy_reg(pi, 0x1c9); 21911 rssi1 = read_phy_reg(pi, 0x1ca); 21912 } else { 21913 rssi0 = read_phy_reg(pi, 0x219); 21914 rssi1 = read_phy_reg(pi, 0x21a); 21915 } 21916 21917 ctr = 0; 21918 tmp_buf[ctr++] = ((s8) ((rssi0 & 0x3f) << 2)) >> 2; 21919 tmp_buf[ctr++] = ((s8) (((rssi0 >> 8) & 0x3f) << 2)) >> 2; 21920 tmp_buf[ctr++] = ((s8) ((rssi1 & 0x3f) << 2)) >> 2; 21921 tmp_buf[ctr++] = ((s8) (((rssi1 >> 8) & 0x3f) << 2)) >> 2; 21922 21923 for (ctr = 0; ctr < 4; ctr++) 21924 rssi_buf[ctr] += tmp_buf[ctr]; 21925 21926 } 21927 21928 rssi_out_val = rssi_buf[3] & 0xff; 21929 rssi_out_val |= (rssi_buf[2] & 0xff) << 8; 21930 rssi_out_val |= (rssi_buf[1] & 0xff) << 16; 21931 rssi_out_val |= (rssi_buf[0] & 0xff) << 24; 21932 21933 if (NREV_LT(pi->pubpi.phy_rev, 2)) 21934 write_phy_reg(pi, 0xca, gpiosel_orig); 21935 21936 write_phy_reg(pi, 0xa6, afectrlCore1_save); 21937 write_phy_reg(pi, 0xa7, afectrlCore2_save); 21938 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 21939 write_phy_reg(pi, 0xf9, rfctrlMiscReg1_save); 21940 write_phy_reg(pi, 0xfb, rfctrlMiscReg2_save); 21941 write_phy_reg(pi, 0x8f, afectrlOverride1_save); 21942 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 21943 write_phy_reg(pi, 0xe5, rfctrlOverrideAux0_save); 21944 write_phy_reg(pi, 0xe6, rfctrlOverrideAux1_save); 21945 } else { 21946 write_phy_reg(pi, 0xa5, afectrlOverride1_save); 21947 write_phy_reg(pi, 0x78, rfctrlcmd_save); 21948 write_phy_reg(pi, 0xec, rfctrloverride_save); 21949 write_phy_reg(pi, 0x7a, rfctrlrssiothers1_save); 21950 write_phy_reg(pi, 0x7d, rfctrlrssiothers2_save); 21951 } 21952 21953 return rssi_out_val; 21954} 21955 21956s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi) 21957{ 21958 u16 core1_txrf_iqcal1_save, core1_txrf_iqcal2_save; 21959 u16 core2_txrf_iqcal1_save, core2_txrf_iqcal2_save; 21960 u16 pwrdet_rxtx_core1_save; 21961 u16 pwrdet_rxtx_core2_save; 21962 u16 afectrlCore1_save; 21963 u16 afectrlCore2_save; 21964 u16 afectrlOverride_save; 21965 u16 afectrlOverride2_save; 21966 u16 pd_pll_ts_save; 21967 u16 gpioSel_save; 21968 s32 radio_temp[4]; 21969 s32 radio_temp2[4]; 21970 u16 syn_tempprocsense_save; 21971 s16 offset = 0; 21972 21973 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 21974 u16 auxADC_Vmid, auxADC_Av, auxADC_Vmid_save, auxADC_Av_save; 21975 u16 auxADC_rssi_ctrlL_save, auxADC_rssi_ctrlH_save; 21976 u16 auxADC_rssi_ctrlL, auxADC_rssi_ctrlH; 21977 s32 auxADC_Vl; 21978 u16 RfctrlOverride5_save, RfctrlOverride6_save; 21979 u16 RfctrlMiscReg5_save; 21980 u16 RSSIMultCoef0QPowerDet_save; 21981 u16 tempsense_Rcal; 21982 21983 syn_tempprocsense_save = 21984 read_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG); 21985 21986 afectrlCore1_save = read_phy_reg(pi, 0xa6); 21987 afectrlCore2_save = read_phy_reg(pi, 0xa7); 21988 afectrlOverride_save = read_phy_reg(pi, 0x8f); 21989 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 21990 RSSIMultCoef0QPowerDet_save = read_phy_reg(pi, 0x1ae); 21991 RfctrlOverride5_save = read_phy_reg(pi, 0x346); 21992 RfctrlOverride6_save = read_phy_reg(pi, 0x347); 21993 RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 21994 read_phy_reg(pi, 0x345); /* RfctrlMiscReg6_save */ 21995 21996 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 21997 &auxADC_Vmid_save); 21998 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 21999 &auxADC_Av_save); 22000 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22001 &auxADC_rssi_ctrlL_save); 22002 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22003 &auxADC_rssi_ctrlH_save); 22004 22005 write_phy_reg(pi, 0x1ae, 0x0); 22006 22007 auxADC_rssi_ctrlL = 0x0; 22008 auxADC_rssi_ctrlH = 0x20; 22009 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22010 &auxADC_rssi_ctrlL); 22011 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22012 &auxADC_rssi_ctrlH); 22013 22014 tempsense_Rcal = syn_tempprocsense_save & 0x1c; 22015 22016 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22017 tempsense_Rcal | 0x01); 22018 22019 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 22020 1, 0, 0, 22021 NPHY_REV7_RFCTRLOVERRIDE_ID2); 22022 mod_phy_reg(pi, 0xa6, (0x1 << 7), 0); 22023 mod_phy_reg(pi, 0xa7, (0x1 << 7), 0); 22024 mod_phy_reg(pi, 0x8f, (0x1 << 7), (0x1 << 7)); 22025 mod_phy_reg(pi, 0xa5, (0x1 << 7), (0x1 << 7)); 22026 22027 mod_phy_reg(pi, 0xa6, (0x1 << 2), (0x1 << 2)); 22028 mod_phy_reg(pi, 0xa7, (0x1 << 2), (0x1 << 2)); 22029 mod_phy_reg(pi, 0x8f, (0x1 << 2), (0x1 << 2)); 22030 mod_phy_reg(pi, 0xa5, (0x1 << 2), (0x1 << 2)); 22031 udelay(5); 22032 mod_phy_reg(pi, 0xa6, (0x1 << 2), 0); 22033 mod_phy_reg(pi, 0xa7, (0x1 << 2), 0); 22034 mod_phy_reg(pi, 0xa6, (0x1 << 3), 0); 22035 mod_phy_reg(pi, 0xa7, (0x1 << 3), 0); 22036 mod_phy_reg(pi, 0x8f, (0x1 << 3), (0x1 << 3)); 22037 mod_phy_reg(pi, 0xa5, (0x1 << 3), (0x1 << 3)); 22038 mod_phy_reg(pi, 0xa6, (0x1 << 6), 0); 22039 mod_phy_reg(pi, 0xa7, (0x1 << 6), 0); 22040 mod_phy_reg(pi, 0x8f, (0x1 << 6), (0x1 << 6)); 22041 mod_phy_reg(pi, 0xa5, (0x1 << 6), (0x1 << 6)); 22042 22043 auxADC_Vmid = 0xA3; 22044 auxADC_Av = 0x0; 22045 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22046 &auxADC_Vmid); 22047 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22048 &auxADC_Av); 22049 22050 udelay(3); 22051 22052 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22053 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22054 tempsense_Rcal | 0x03); 22055 22056 udelay(5); 22057 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22058 22059 auxADC_Av = 0x7; 22060 if (radio_temp[1] + radio_temp2[1] < -30) { 22061 auxADC_Vmid = 0x45; 22062 auxADC_Vl = 263; 22063 } else if (radio_temp[1] + radio_temp2[1] < -9) { 22064 auxADC_Vmid = 0x200; 22065 auxADC_Vl = 467; 22066 } else if (radio_temp[1] + radio_temp2[1] < 11) { 22067 auxADC_Vmid = 0x266; 22068 auxADC_Vl = 634; 22069 } else { 22070 auxADC_Vmid = 0x2D5; 22071 auxADC_Vl = 816; 22072 } 22073 22074 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22075 &auxADC_Vmid); 22076 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22077 &auxADC_Av); 22078 22079 udelay(3); 22080 22081 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22082 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22083 tempsense_Rcal | 0x01); 22084 22085 udelay(5); 22086 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22087 22088 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 22089 syn_tempprocsense_save); 22090 22091 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22092 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22093 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22094 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22095 write_phy_reg(pi, 0x1ae, RSSIMultCoef0QPowerDet_save); 22096 write_phy_reg(pi, 0x346, RfctrlOverride5_save); 22097 write_phy_reg(pi, 0x347, RfctrlOverride6_save); 22098 write_phy_reg(pi, 0x344, RfctrlMiscReg5_save); 22099 write_phy_reg(pi, 0x345, RfctrlMiscReg5_save); 22100 22101 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0A, 16, 22102 &auxADC_Vmid_save); 22103 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x0E, 16, 22104 &auxADC_Av_save); 22105 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x02, 16, 22106 &auxADC_rssi_ctrlL_save); 22107 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, 22108 &auxADC_rssi_ctrlH_save); 22109 22110 if (pi->sh->chip == BCMA_CHIP_ID_BCM5357) { 22111 radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1]) 22112 + 88 * (auxADC_Vl) - 27111 + 22113 128) / 256; 22114 } else { 22115 radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) 22116 + 82 * (auxADC_Vl) - 28861 + 22117 128) / 256; 22118 } 22119 22120 offset = (s16) pi->phy_tempsense_offset; 22121 22122 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22123 syn_tempprocsense_save = 22124 read_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE); 22125 22126 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22127 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22128 afectrlOverride_save = read_phy_reg(pi, 0x8f); 22129 afectrlOverride2_save = read_phy_reg(pi, 0xa5); 22130 gpioSel_save = read_phy_reg(pi, 0xca); 22131 22132 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22133 22134 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22135 if (NREV_LT(pi->pubpi.phy_rev, 7)) 22136 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x05); 22137 22138 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22139 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22140 write_radio_reg(pi, RADIO_2057_TEMPSENSE_CONFIG, 0x01); 22141 else 22142 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); 22143 22144 radio_temp[0] = 22145 (126 * (radio_temp[1] + radio_temp2[1]) + 3987) / 64; 22146 22147 write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 22148 syn_tempprocsense_save); 22149 22150 write_phy_reg(pi, 0xca, gpioSel_save); 22151 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22152 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22153 write_phy_reg(pi, 0x8f, afectrlOverride_save); 22154 write_phy_reg(pi, 0xa5, afectrlOverride2_save); 22155 22156 offset = (s16) pi->phy_tempsense_offset; 22157 } else { 22158 22159 pwrdet_rxtx_core1_save = 22160 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 22161 pwrdet_rxtx_core2_save = 22162 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 22163 core1_txrf_iqcal1_save = 22164 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 22165 core1_txrf_iqcal2_save = 22166 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 22167 core2_txrf_iqcal1_save = 22168 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 22169 core2_txrf_iqcal2_save = 22170 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 22171 pd_pll_ts_save = read_radio_reg(pi, RADIO_2055_PD_PLL_TS); 22172 22173 afectrlCore1_save = read_phy_reg(pi, 0xa6); 22174 afectrlCore2_save = read_phy_reg(pi, 0xa7); 22175 afectrlOverride_save = read_phy_reg(pi, 0xa5); 22176 gpioSel_save = read_phy_reg(pi, 0xca); 22177 22178 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x01); 22179 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x01); 22180 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x08); 22181 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x08); 22182 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 22183 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 22184 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, 0x00); 22185 22186 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22187 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22188 22189 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); 22190 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22191 22192 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); 22193 xor_radio_reg(pi, RADIO_2055_CAL_TS, 0x80); 22194 22195 radio_temp[0] = (radio_temp[0] + radio_temp2[0]); 22196 radio_temp[1] = (radio_temp[1] + radio_temp2[1]); 22197 radio_temp[2] = (radio_temp[2] + radio_temp2[2]); 22198 radio_temp[3] = (radio_temp[3] + radio_temp2[3]); 22199 22200 radio_temp[0] = 22201 (radio_temp[0] + radio_temp[1] + radio_temp[2] + 22202 radio_temp[3]); 22203 22204 radio_temp[0] = 22205 (radio_temp[0] + 22206 (8 * 32)) * (950 - 350) / 63 + (350 * 8); 22207 22208 radio_temp[0] = (radio_temp[0] - (8 * 420)) / 38; 22209 22210 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 22211 pwrdet_rxtx_core1_save); 22212 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 22213 pwrdet_rxtx_core2_save); 22214 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 22215 core1_txrf_iqcal1_save); 22216 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 22217 core2_txrf_iqcal1_save); 22218 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 22219 core1_txrf_iqcal2_save); 22220 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 22221 core2_txrf_iqcal2_save); 22222 write_radio_reg(pi, RADIO_2055_PD_PLL_TS, pd_pll_ts_save); 22223 22224 write_phy_reg(pi, 0xca, gpioSel_save); 22225 write_phy_reg(pi, 0xa6, afectrlCore1_save); 22226 write_phy_reg(pi, 0xa7, afectrlCore2_save); 22227 write_phy_reg(pi, 0xa5, afectrlOverride_save); 22228 } 22229 22230 return (s16) radio_temp[0] + offset; 22231} 22232 22233static void 22234wlc_phy_set_rssi_2055_vcm(struct brcms_phy *pi, u8 rssi_type, u8 *vcm_buf) 22235{ 22236 u8 core; 22237 22238 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22239 if (rssi_type == NPHY_RSSI_SEL_NB) { 22240 if (core == PHY_CORE_0) { 22241 mod_radio_reg(pi, 22242 RADIO_2055_CORE1_B0_NBRSSI_VCM, 22243 RADIO_2055_NBRSSI_VCM_I_MASK, 22244 vcm_buf[2 * 22245 core] << 22246 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22247 mod_radio_reg(pi, 22248 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22249 RADIO_2055_NBRSSI_VCM_Q_MASK, 22250 vcm_buf[2 * core + 22251 1] << 22252 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22253 } else { 22254 mod_radio_reg(pi, 22255 RADIO_2055_CORE2_B0_NBRSSI_VCM, 22256 RADIO_2055_NBRSSI_VCM_I_MASK, 22257 vcm_buf[2 * 22258 core] << 22259 RADIO_2055_NBRSSI_VCM_I_SHIFT); 22260 mod_radio_reg(pi, 22261 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22262 RADIO_2055_NBRSSI_VCM_Q_MASK, 22263 vcm_buf[2 * core + 22264 1] << 22265 RADIO_2055_NBRSSI_VCM_Q_SHIFT); 22266 } 22267 } else { 22268 if (core == PHY_CORE_0) 22269 mod_radio_reg(pi, 22270 RADIO_2055_CORE1_RXBB_RSSI_CTRL5, 22271 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22272 vcm_buf[2 * 22273 core] << 22274 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22275 else 22276 mod_radio_reg(pi, 22277 RADIO_2055_CORE2_RXBB_RSSI_CTRL5, 22278 RADIO_2055_WBRSSI_VCM_IQ_MASK, 22279 vcm_buf[2 * 22280 core] << 22281 RADIO_2055_WBRSSI_VCM_IQ_SHIFT); 22282 } 22283 } 22284} 22285 22286static void wlc_phy_rssi_cal_nphy_rev3(struct brcms_phy *pi) 22287{ 22288 u16 classif_state; 22289 u16 clip_state[2]; 22290 u16 clip_off[] = { 0xffff, 0xffff }; 22291 s32 target_code; 22292 u8 vcm, min_vcm; 22293 u8 vcm_final = 0; 22294 u8 result_idx; 22295 s32 poll_results[8][4] = { 22296 {0, 0, 0, 0}, 22297 {0, 0, 0, 0}, 22298 {0, 0, 0, 0}, 22299 {0, 0, 0, 0}, 22300 {0, 0, 0, 0}, 22301 {0, 0, 0, 0}, 22302 {0, 0, 0, 0}, 22303 {0, 0, 0, 0} 22304 }; 22305 s32 poll_result_core[4] = { 0, 0, 0, 0 }; 22306 s32 min_d = NPHY_RSSICAL_MAXD, curr_d; 22307 s32 fine_digital_offset[4]; 22308 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22309 s32 min_poll; 22310 u8 vcm_level_max; 22311 u8 core; 22312 u8 wb_cnt; 22313 u8 rssi_type; 22314 u16 NPHY_Rfctrlintc1_save, NPHY_Rfctrlintc2_save; 22315 u16 NPHY_AfectrlOverride1_save, NPHY_AfectrlOverride2_save; 22316 u16 NPHY_AfectrlCore1_save, NPHY_AfectrlCore2_save; 22317 u16 NPHY_RfctrlOverride0_save, NPHY_RfctrlOverride1_save; 22318 u16 NPHY_RfctrlOverrideAux0_save, NPHY_RfctrlOverrideAux1_save; 22319 u16 NPHY_RfctrlCmd_save; 22320 u16 NPHY_RfctrlMiscReg1_save, NPHY_RfctrlMiscReg2_save; 22321 u16 NPHY_RfctrlRSSIOTHERS1_save, NPHY_RfctrlRSSIOTHERS2_save; 22322 u8 rxcore_state; 22323 u16 NPHY_REV7_RfctrlOverride3_save, NPHY_REV7_RfctrlOverride4_save; 22324 u16 NPHY_REV7_RfctrlOverride5_save, NPHY_REV7_RfctrlOverride6_save; 22325 u16 NPHY_REV7_RfctrlMiscReg3_save, NPHY_REV7_RfctrlMiscReg4_save; 22326 u16 NPHY_REV7_RfctrlMiscReg5_save, NPHY_REV7_RfctrlMiscReg6_save; 22327 22328 NPHY_REV7_RfctrlOverride3_save = 22329 NPHY_REV7_RfctrlOverride4_save = 22330 NPHY_REV7_RfctrlOverride5_save = 22331 NPHY_REV7_RfctrlOverride6_save = 22332 NPHY_REV7_RfctrlMiscReg3_save = 22333 NPHY_REV7_RfctrlMiscReg4_save = 22334 NPHY_REV7_RfctrlMiscReg5_save = 22335 NPHY_REV7_RfctrlMiscReg6_save = 0; 22336 22337 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22338 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22339 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22340 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22341 22342 NPHY_Rfctrlintc1_save = read_phy_reg(pi, 0x91); 22343 NPHY_Rfctrlintc2_save = read_phy_reg(pi, 0x92); 22344 NPHY_AfectrlOverride1_save = read_phy_reg(pi, 0x8f); 22345 NPHY_AfectrlOverride2_save = read_phy_reg(pi, 0xa5); 22346 NPHY_AfectrlCore1_save = read_phy_reg(pi, 0xa6); 22347 NPHY_AfectrlCore2_save = read_phy_reg(pi, 0xa7); 22348 NPHY_RfctrlOverride0_save = read_phy_reg(pi, 0xe7); 22349 NPHY_RfctrlOverride1_save = read_phy_reg(pi, 0xec); 22350 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22351 NPHY_REV7_RfctrlOverride3_save = read_phy_reg(pi, 0x342); 22352 NPHY_REV7_RfctrlOverride4_save = read_phy_reg(pi, 0x343); 22353 NPHY_REV7_RfctrlOverride5_save = read_phy_reg(pi, 0x346); 22354 NPHY_REV7_RfctrlOverride6_save = read_phy_reg(pi, 0x347); 22355 } 22356 NPHY_RfctrlOverrideAux0_save = read_phy_reg(pi, 0xe5); 22357 NPHY_RfctrlOverrideAux1_save = read_phy_reg(pi, 0xe6); 22358 NPHY_RfctrlCmd_save = read_phy_reg(pi, 0x78); 22359 NPHY_RfctrlMiscReg1_save = read_phy_reg(pi, 0xf9); 22360 NPHY_RfctrlMiscReg2_save = read_phy_reg(pi, 0xfb); 22361 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22362 NPHY_REV7_RfctrlMiscReg3_save = read_phy_reg(pi, 0x340); 22363 NPHY_REV7_RfctrlMiscReg4_save = read_phy_reg(pi, 0x341); 22364 NPHY_REV7_RfctrlMiscReg5_save = read_phy_reg(pi, 0x344); 22365 NPHY_REV7_RfctrlMiscReg6_save = read_phy_reg(pi, 0x345); 22366 } 22367 NPHY_RfctrlRSSIOTHERS1_save = read_phy_reg(pi, 0x7a); 22368 NPHY_RfctrlRSSIOTHERS2_save = read_phy_reg(pi, 0x7d); 22369 22370 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_OFF, 0, 22371 RADIO_MIMO_CORESEL_ALLRXTX); 22372 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_TRSW, 1, 22373 RADIO_MIMO_CORESEL_ALLRXTX); 22374 22375 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22376 wlc_phy_rfctrl_override_1tomany_nphy( 22377 pi, 22378 NPHY_REV7_RfctrlOverride_cmd_rxrf_pu, 22379 0, 0, 0); 22380 else 22381 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0, 0); 22382 22383 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22384 wlc_phy_rfctrl_override_1tomany_nphy( 22385 pi, 22386 NPHY_REV7_RfctrlOverride_cmd_rx_pu, 22387 1, 0, 0); 22388 else 22389 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0, 0); 22390 22391 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22392 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 22393 1, 0, 0, 22394 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22395 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 6), 1, 0, 0, 22396 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22397 } else { 22398 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 7), 1, 0, 0); 22399 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 6), 1, 0, 0); 22400 } 22401 22402 if (CHSPEC_IS5G(pi->radio_chanspec)) { 22403 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22404 wlc_phy_rfctrl_override_nphy_rev7( 22405 pi, (0x1 << 5), 22406 0, 0, 0, 22407 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22408 wlc_phy_rfctrl_override_nphy_rev7( 22409 pi, (0x1 << 4), 1, 0, 22410 0, 22411 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22412 } else { 22413 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 0, 0, 0); 22414 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 1, 0, 0); 22415 } 22416 22417 } else { 22418 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22419 wlc_phy_rfctrl_override_nphy_rev7( 22420 pi, (0x1 << 4), 22421 0, 0, 0, 22422 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22423 wlc_phy_rfctrl_override_nphy_rev7( 22424 pi, (0x1 << 5), 1, 0, 22425 0, 22426 NPHY_REV7_RFCTRLOVERRIDE_ID0); 22427 } else { 22428 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 4), 0, 0, 0); 22429 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 5), 1, 0, 0); 22430 } 22431 } 22432 22433 rxcore_state = wlc_phy_rxcore_getstate_nphy( 22434 (struct brcms_phy_pub *) pi); 22435 22436 vcm_level_max = 8; 22437 22438 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22439 22440 if ((rxcore_state & (1 << core)) == 0) 22441 continue; 22442 22443 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22444 core == 22445 PHY_CORE_0 ? 22446 RADIO_MIMO_CORESEL_CORE1 : 22447 RADIO_MIMO_CORESEL_CORE2, 22448 NPHY_RAIL_I, NPHY_RSSI_SEL_NB); 22449 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22450 core == 22451 PHY_CORE_0 ? 22452 RADIO_MIMO_CORESEL_CORE1 : 22453 RADIO_MIMO_CORESEL_CORE2, 22454 NPHY_RAIL_Q, NPHY_RSSI_SEL_NB); 22455 22456 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22457 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22458 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22459 RADIO_2057_NB_MASTER_CORE0 : 22460 RADIO_2057_NB_MASTER_CORE1, 22461 RADIO_2057_VCM_MASK, vcm); 22462 else 22463 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22464 ((core == 22465 PHY_CORE_0) ? RADIO_2056_RX0 : 22466 RADIO_2056_RX1), 22467 RADIO_2056_VCM_MASK, 22468 vcm << RADIO_2056_RSSI_VCM_SHIFT); 22469 22470 wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_NB, 22471 &poll_results[vcm][0], 22472 NPHY_RSSICAL_NPOLL); 22473 } 22474 22475 for (result_idx = 0; result_idx < 4; result_idx++) { 22476 if ((core == result_idx / 2) && 22477 (result_idx % 2 == 0)) { 22478 22479 min_d = NPHY_RSSICAL_MAXD; 22480 min_vcm = 0; 22481 min_poll = 22482 NPHY_RSSICAL_MAXREAD * 22483 NPHY_RSSICAL_NPOLL + 1; 22484 for (vcm = 0; vcm < vcm_level_max; vcm++) { 22485 curr_d = 22486 poll_results[vcm][result_idx] * 22487 poll_results[vcm][result_idx] + 22488 poll_results[vcm][result_idx + 22489 1] * 22490 poll_results[vcm][result_idx + 22491 1]; 22492 if (curr_d < min_d) { 22493 min_d = curr_d; 22494 min_vcm = vcm; 22495 } 22496 if (poll_results[vcm][result_idx] < 22497 min_poll) 22498 min_poll = 22499 poll_results[vcm] 22500 [result_idx]; 22501 } 22502 vcm_final = min_vcm; 22503 poll_results_min[result_idx] = min_poll; 22504 } 22505 } 22506 22507 if (NREV_GE(pi->pubpi.phy_rev, 7)) 22508 mod_radio_reg(pi, (core == PHY_CORE_0) ? 22509 RADIO_2057_NB_MASTER_CORE0 : 22510 RADIO_2057_NB_MASTER_CORE1, 22511 RADIO_2057_VCM_MASK, vcm_final); 22512 else 22513 mod_radio_reg(pi, RADIO_2056_RX_RSSI_MISC | 22514 ((core == 22515 PHY_CORE_0) ? RADIO_2056_RX0 : 22516 RADIO_2056_RX1), RADIO_2056_VCM_MASK, 22517 vcm_final << RADIO_2056_RSSI_VCM_SHIFT); 22518 22519 for (result_idx = 0; result_idx < 4; result_idx++) { 22520 if (core == result_idx / 2) { 22521 fine_digital_offset[result_idx] = 22522 (NPHY_RSSICAL_NB_TARGET * 22523 NPHY_RSSICAL_NPOLL) - 22524 poll_results[vcm_final][result_idx]; 22525 if (fine_digital_offset[result_idx] < 0) { 22526 fine_digital_offset[result_idx] = 22527 abs(fine_digital_offset 22528 [result_idx]); 22529 fine_digital_offset[result_idx] += 22530 (NPHY_RSSICAL_NPOLL / 2); 22531 fine_digital_offset[result_idx] /= 22532 NPHY_RSSICAL_NPOLL; 22533 fine_digital_offset[result_idx] = 22534 -fine_digital_offset[ 22535 result_idx]; 22536 } else { 22537 fine_digital_offset[result_idx] += 22538 (NPHY_RSSICAL_NPOLL / 2); 22539 fine_digital_offset[result_idx] /= 22540 NPHY_RSSICAL_NPOLL; 22541 } 22542 22543 if (poll_results_min[result_idx] == 22544 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 22545 fine_digital_offset[result_idx] = 22546 (NPHY_RSSICAL_NB_TARGET - 22547 NPHY_RSSICAL_MAXREAD - 1); 22548 22549 wlc_phy_scale_offset_rssi_nphy( 22550 pi, 0x0, 22551 (s8) 22552 fine_digital_offset 22553 [result_idx], 22554 (result_idx / 2 == 0) ? 22555 RADIO_MIMO_CORESEL_CORE1 : 22556 RADIO_MIMO_CORESEL_CORE2, 22557 (result_idx % 2 == 0) ? 22558 NPHY_RAIL_I : NPHY_RAIL_Q, 22559 NPHY_RSSI_SEL_NB); 22560 } 22561 } 22562 22563 } 22564 22565 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 22566 22567 if ((rxcore_state & (1 << core)) == 0) 22568 continue; 22569 22570 for (wb_cnt = 0; wb_cnt < 2; wb_cnt++) { 22571 if (wb_cnt == 0) { 22572 rssi_type = NPHY_RSSI_SEL_W1; 22573 target_code = NPHY_RSSICAL_W1_TARGET_REV3; 22574 } else { 22575 rssi_type = NPHY_RSSI_SEL_W2; 22576 target_code = NPHY_RSSICAL_W2_TARGET_REV3; 22577 } 22578 22579 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22580 core == 22581 PHY_CORE_0 ? 22582 RADIO_MIMO_CORESEL_CORE1 22583 : 22584 RADIO_MIMO_CORESEL_CORE2, 22585 NPHY_RAIL_I, rssi_type); 22586 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, 22587 core == 22588 PHY_CORE_0 ? 22589 RADIO_MIMO_CORESEL_CORE1 22590 : 22591 RADIO_MIMO_CORESEL_CORE2, 22592 NPHY_RAIL_Q, rssi_type); 22593 22594 wlc_phy_poll_rssi_nphy(pi, rssi_type, poll_result_core, 22595 NPHY_RSSICAL_NPOLL); 22596 22597 for (result_idx = 0; result_idx < 4; result_idx++) { 22598 if (core == result_idx / 2) { 22599 fine_digital_offset[result_idx] = 22600 (target_code * 22601 NPHY_RSSICAL_NPOLL) - 22602 poll_result_core[result_idx]; 22603 if (fine_digital_offset[result_idx] < 22604 0) { 22605 fine_digital_offset[result_idx] 22606 = abs( 22607 fine_digital_offset 22608 [result_idx]); 22609 fine_digital_offset[result_idx] 22610 += (NPHY_RSSICAL_NPOLL 22611 / 2); 22612 fine_digital_offset[result_idx] 22613 /= NPHY_RSSICAL_NPOLL; 22614 fine_digital_offset[result_idx] 22615 = -fine_digital_offset 22616 [result_idx]; 22617 } else { 22618 fine_digital_offset[result_idx] 22619 += (NPHY_RSSICAL_NPOLL 22620 / 2); 22621 fine_digital_offset[result_idx] 22622 /= NPHY_RSSICAL_NPOLL; 22623 } 22624 22625 wlc_phy_scale_offset_rssi_nphy( 22626 pi, 0x0, 22627 (s8) 22628 fine_digital_offset 22629 [core * 22630 2], 22631 (core == PHY_CORE_0) ? 22632 RADIO_MIMO_CORESEL_CORE1 : 22633 RADIO_MIMO_CORESEL_CORE2, 22634 (result_idx % 2 == 0) ? 22635 NPHY_RAIL_I : 22636 NPHY_RAIL_Q, 22637 rssi_type); 22638 } 22639 } 22640 22641 } 22642 } 22643 22644 write_phy_reg(pi, 0x91, NPHY_Rfctrlintc1_save); 22645 write_phy_reg(pi, 0x92, NPHY_Rfctrlintc2_save); 22646 22647 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 22648 22649 mod_phy_reg(pi, 0xe7, (0x1 << 0), 1 << 0); 22650 mod_phy_reg(pi, 0x78, (0x1 << 0), 1 << 0); 22651 mod_phy_reg(pi, 0xe7, (0x1 << 0), 0); 22652 22653 mod_phy_reg(pi, 0xec, (0x1 << 0), 1 << 0); 22654 mod_phy_reg(pi, 0x78, (0x1 << 1), 1 << 1); 22655 mod_phy_reg(pi, 0xec, (0x1 << 0), 0); 22656 22657 write_phy_reg(pi, 0x8f, NPHY_AfectrlOverride1_save); 22658 write_phy_reg(pi, 0xa5, NPHY_AfectrlOverride2_save); 22659 write_phy_reg(pi, 0xa6, NPHY_AfectrlCore1_save); 22660 write_phy_reg(pi, 0xa7, NPHY_AfectrlCore2_save); 22661 write_phy_reg(pi, 0xe7, NPHY_RfctrlOverride0_save); 22662 write_phy_reg(pi, 0xec, NPHY_RfctrlOverride1_save); 22663 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22664 write_phy_reg(pi, 0x342, NPHY_REV7_RfctrlOverride3_save); 22665 write_phy_reg(pi, 0x343, NPHY_REV7_RfctrlOverride4_save); 22666 write_phy_reg(pi, 0x346, NPHY_REV7_RfctrlOverride5_save); 22667 write_phy_reg(pi, 0x347, NPHY_REV7_RfctrlOverride6_save); 22668 } 22669 write_phy_reg(pi, 0xe5, NPHY_RfctrlOverrideAux0_save); 22670 write_phy_reg(pi, 0xe6, NPHY_RfctrlOverrideAux1_save); 22671 write_phy_reg(pi, 0x78, NPHY_RfctrlCmd_save); 22672 write_phy_reg(pi, 0xf9, NPHY_RfctrlMiscReg1_save); 22673 write_phy_reg(pi, 0xfb, NPHY_RfctrlMiscReg2_save); 22674 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22675 write_phy_reg(pi, 0x340, NPHY_REV7_RfctrlMiscReg3_save); 22676 write_phy_reg(pi, 0x341, NPHY_REV7_RfctrlMiscReg4_save); 22677 write_phy_reg(pi, 0x344, NPHY_REV7_RfctrlMiscReg5_save); 22678 write_phy_reg(pi, 0x345, NPHY_REV7_RfctrlMiscReg6_save); 22679 } 22680 write_phy_reg(pi, 0x7a, NPHY_RfctrlRSSIOTHERS1_save); 22681 write_phy_reg(pi, 0x7d, NPHY_RfctrlRSSIOTHERS2_save); 22682 22683 if (CHSPEC_IS2G(pi->radio_chanspec)) { 22684 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22685 pi->rssical_cache.rssical_radio_regs_2G[0] = 22686 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22687 pi->rssical_cache.rssical_radio_regs_2G[1] = 22688 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22689 } else { 22690 pi->rssical_cache.rssical_radio_regs_2G[0] = 22691 read_radio_reg(pi, 22692 RADIO_2056_RX_RSSI_MISC | 22693 RADIO_2056_RX0); 22694 pi->rssical_cache.rssical_radio_regs_2G[1] = 22695 read_radio_reg(pi, 22696 RADIO_2056_RX_RSSI_MISC | 22697 RADIO_2056_RX1); 22698 } 22699 22700 pi->rssical_cache.rssical_phyregs_2G[0] = 22701 read_phy_reg(pi, 0x1a6); 22702 pi->rssical_cache.rssical_phyregs_2G[1] = 22703 read_phy_reg(pi, 0x1ac); 22704 pi->rssical_cache.rssical_phyregs_2G[2] = 22705 read_phy_reg(pi, 0x1b2); 22706 pi->rssical_cache.rssical_phyregs_2G[3] = 22707 read_phy_reg(pi, 0x1b8); 22708 pi->rssical_cache.rssical_phyregs_2G[4] = 22709 read_phy_reg(pi, 0x1a4); 22710 pi->rssical_cache.rssical_phyregs_2G[5] = 22711 read_phy_reg(pi, 0x1aa); 22712 pi->rssical_cache.rssical_phyregs_2G[6] = 22713 read_phy_reg(pi, 0x1b0); 22714 pi->rssical_cache.rssical_phyregs_2G[7] = 22715 read_phy_reg(pi, 0x1b6); 22716 pi->rssical_cache.rssical_phyregs_2G[8] = 22717 read_phy_reg(pi, 0x1a5); 22718 pi->rssical_cache.rssical_phyregs_2G[9] = 22719 read_phy_reg(pi, 0x1ab); 22720 pi->rssical_cache.rssical_phyregs_2G[10] = 22721 read_phy_reg(pi, 0x1b1); 22722 pi->rssical_cache.rssical_phyregs_2G[11] = 22723 read_phy_reg(pi, 0x1b7); 22724 22725 pi->nphy_rssical_chanspec_2G = pi->radio_chanspec; 22726 } else { 22727 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 22728 pi->rssical_cache.rssical_radio_regs_5G[0] = 22729 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE0); 22730 pi->rssical_cache.rssical_radio_regs_5G[1] = 22731 read_radio_reg(pi, RADIO_2057_NB_MASTER_CORE1); 22732 } else { 22733 pi->rssical_cache.rssical_radio_regs_5G[0] = 22734 read_radio_reg(pi, 22735 RADIO_2056_RX_RSSI_MISC | 22736 RADIO_2056_RX0); 22737 pi->rssical_cache.rssical_radio_regs_5G[1] = 22738 read_radio_reg(pi, 22739 RADIO_2056_RX_RSSI_MISC | 22740 RADIO_2056_RX1); 22741 } 22742 22743 pi->rssical_cache.rssical_phyregs_5G[0] = 22744 read_phy_reg(pi, 0x1a6); 22745 pi->rssical_cache.rssical_phyregs_5G[1] = 22746 read_phy_reg(pi, 0x1ac); 22747 pi->rssical_cache.rssical_phyregs_5G[2] = 22748 read_phy_reg(pi, 0x1b2); 22749 pi->rssical_cache.rssical_phyregs_5G[3] = 22750 read_phy_reg(pi, 0x1b8); 22751 pi->rssical_cache.rssical_phyregs_5G[4] = 22752 read_phy_reg(pi, 0x1a4); 22753 pi->rssical_cache.rssical_phyregs_5G[5] = 22754 read_phy_reg(pi, 0x1aa); 22755 pi->rssical_cache.rssical_phyregs_5G[6] = 22756 read_phy_reg(pi, 0x1b0); 22757 pi->rssical_cache.rssical_phyregs_5G[7] = 22758 read_phy_reg(pi, 0x1b6); 22759 pi->rssical_cache.rssical_phyregs_5G[8] = 22760 read_phy_reg(pi, 0x1a5); 22761 pi->rssical_cache.rssical_phyregs_5G[9] = 22762 read_phy_reg(pi, 0x1ab); 22763 pi->rssical_cache.rssical_phyregs_5G[10] = 22764 read_phy_reg(pi, 0x1b1); 22765 pi->rssical_cache.rssical_phyregs_5G[11] = 22766 read_phy_reg(pi, 0x1b7); 22767 22768 pi->nphy_rssical_chanspec_5G = pi->radio_chanspec; 22769 } 22770 22771 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 22772 wlc_phy_clip_det_nphy(pi, 1, clip_state); 22773} 22774 22775static void wlc_phy_rssi_cal_nphy_rev2(struct brcms_phy *pi, u8 rssi_type) 22776{ 22777 s32 target_code; 22778 u16 classif_state; 22779 u16 clip_state[2]; 22780 u16 rssi_ctrl_state[2], pd_state[2]; 22781 u16 rfctrlintc_state[2], rfpdcorerxtx_state[2]; 22782 u16 rfctrlintc_override_val; 22783 u16 clip_off[] = { 0xffff, 0xffff }; 22784 u16 rf_pd_val, pd_mask, rssi_ctrl_mask; 22785 u8 vcm, min_vcm, vcm_tmp[4]; 22786 u8 vcm_final[4] = { 0, 0, 0, 0 }; 22787 u8 result_idx, ctr; 22788 s32 poll_results[4][4] = { 22789 {0, 0, 0, 0}, 22790 {0, 0, 0, 0}, 22791 {0, 0, 0, 0}, 22792 {0, 0, 0, 0} 22793 }; 22794 s32 poll_miniq[4][2] = { 22795 {0, 0}, 22796 {0, 0}, 22797 {0, 0}, 22798 {0, 0} 22799 }; 22800 s32 min_d, curr_d; 22801 s32 fine_digital_offset[4]; 22802 s32 poll_results_min[4] = { 0, 0, 0, 0 }; 22803 s32 min_poll; 22804 22805 switch (rssi_type) { 22806 case NPHY_RSSI_SEL_NB: 22807 target_code = NPHY_RSSICAL_NB_TARGET; 22808 break; 22809 case NPHY_RSSI_SEL_W1: 22810 target_code = NPHY_RSSICAL_W1_TARGET; 22811 break; 22812 case NPHY_RSSI_SEL_W2: 22813 target_code = NPHY_RSSICAL_W2_TARGET; 22814 break; 22815 default: 22816 return; 22817 } 22818 22819 classif_state = wlc_phy_classifier_nphy(pi, 0, 0); 22820 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 22821 wlc_phy_clip_det_nphy(pi, 0, clip_state); 22822 wlc_phy_clip_det_nphy(pi, 1, clip_off); 22823 22824 rf_pd_val = (rssi_type == NPHY_RSSI_SEL_NB) ? 0x6 : 0x4; 22825 rfctrlintc_override_val = 22826 CHSPEC_IS5G(pi->radio_chanspec) ? 0x140 : 0x110; 22827 22828 rfctrlintc_state[0] = read_phy_reg(pi, 0x91); 22829 rfpdcorerxtx_state[0] = read_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX); 22830 write_phy_reg(pi, 0x91, rfctrlintc_override_val); 22831 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rf_pd_val); 22832 22833 rfctrlintc_state[1] = read_phy_reg(pi, 0x92); 22834 rfpdcorerxtx_state[1] = read_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX); 22835 write_phy_reg(pi, 0x92, rfctrlintc_override_val); 22836 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rf_pd_val); 22837 22838 pd_mask = RADIO_2055_NBRSSI_PD | RADIO_2055_WBRSSI_G1_PD | 22839 RADIO_2055_WBRSSI_G2_PD; 22840 pd_state[0] = 22841 read_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC) & pd_mask; 22842 pd_state[1] = 22843 read_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC) & pd_mask; 22844 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, 0); 22845 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, 0); 22846 rssi_ctrl_mask = RADIO_2055_NBRSSI_SEL | RADIO_2055_WBRSSI_G1_SEL | 22847 RADIO_2055_WBRSSI_G2_SEL; 22848 rssi_ctrl_state[0] = 22849 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE1) & rssi_ctrl_mask; 22850 rssi_ctrl_state[1] = 22851 read_radio_reg(pi, RADIO_2055_SP_RSSI_CORE2) & rssi_ctrl_mask; 22852 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_ALLRX, rssi_type); 22853 22854 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22855 NPHY_RAIL_I, rssi_type); 22856 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 0x0, RADIO_MIMO_CORESEL_ALLRX, 22857 NPHY_RAIL_Q, rssi_type); 22858 22859 for (vcm = 0; vcm < 4; vcm++) { 22860 22861 vcm_tmp[0] = vcm_tmp[1] = vcm_tmp[2] = vcm_tmp[3] = vcm; 22862 if (rssi_type != NPHY_RSSI_SEL_W2) 22863 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_tmp); 22864 22865 wlc_phy_poll_rssi_nphy(pi, rssi_type, &poll_results[vcm][0], 22866 NPHY_RSSICAL_NPOLL); 22867 22868 if ((rssi_type == NPHY_RSSI_SEL_W1) 22869 || (rssi_type == NPHY_RSSI_SEL_W2)) { 22870 for (ctr = 0; ctr < 2; ctr++) 22871 poll_miniq[vcm][ctr] = 22872 min(poll_results[vcm][ctr * 2 + 0], 22873 poll_results[vcm][ctr * 2 + 1]); 22874 } 22875 } 22876 22877 for (result_idx = 0; result_idx < 4; result_idx++) { 22878 min_d = NPHY_RSSICAL_MAXD; 22879 min_vcm = 0; 22880 min_poll = NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL + 1; 22881 for (vcm = 0; vcm < 4; vcm++) { 22882 curr_d = abs(((rssi_type == NPHY_RSSI_SEL_NB) ? 22883 poll_results[vcm][result_idx] : 22884 poll_miniq[vcm][result_idx / 2]) - 22885 (target_code * NPHY_RSSICAL_NPOLL)); 22886 if (curr_d < min_d) { 22887 min_d = curr_d; 22888 min_vcm = vcm; 22889 } 22890 if (poll_results[vcm][result_idx] < min_poll) 22891 min_poll = poll_results[vcm][result_idx]; 22892 } 22893 vcm_final[result_idx] = min_vcm; 22894 poll_results_min[result_idx] = min_poll; 22895 } 22896 22897 if (rssi_type != NPHY_RSSI_SEL_W2) 22898 wlc_phy_set_rssi_2055_vcm(pi, rssi_type, vcm_final); 22899 22900 for (result_idx = 0; result_idx < 4; result_idx++) { 22901 fine_digital_offset[result_idx] = 22902 (target_code * NPHY_RSSICAL_NPOLL) - 22903 poll_results[vcm_final[result_idx]][result_idx]; 22904 if (fine_digital_offset[result_idx] < 0) { 22905 fine_digital_offset[result_idx] = 22906 abs(fine_digital_offset[result_idx]); 22907 fine_digital_offset[result_idx] += 22908 (NPHY_RSSICAL_NPOLL / 2); 22909 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 22910 fine_digital_offset[result_idx] = 22911 -fine_digital_offset[result_idx]; 22912 } else { 22913 fine_digital_offset[result_idx] += 22914 (NPHY_RSSICAL_NPOLL / 2); 22915 fine_digital_offset[result_idx] /= NPHY_RSSICAL_NPOLL; 22916 } 22917 22918 if (poll_results_min[result_idx] == 22919 NPHY_RSSICAL_MAXREAD * NPHY_RSSICAL_NPOLL) 22920 fine_digital_offset[result_idx] = 22921 (target_code - NPHY_RSSICAL_MAXREAD - 1); 22922 22923 wlc_phy_scale_offset_rssi_nphy(pi, 0x0, 22924 (s8) 22925 fine_digital_offset[result_idx], 22926 (result_idx / 2 == 22927 0) ? RADIO_MIMO_CORESEL_CORE1 : 22928 RADIO_MIMO_CORESEL_CORE2, 22929 (result_idx % 2 == 22930 0) ? NPHY_RAIL_I : NPHY_RAIL_Q, 22931 rssi_type); 22932 } 22933 22934 mod_radio_reg(pi, RADIO_2055_PD_CORE1_RSSI_MISC, pd_mask, pd_state[0]); 22935 mod_radio_reg(pi, RADIO_2055_PD_CORE2_RSSI_MISC, pd_mask, pd_state[1]); 22936 if (rssi_ctrl_state[0] == RADIO_2055_NBRSSI_SEL) 22937 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22938 NPHY_RSSI_SEL_NB); 22939 else if (rssi_ctrl_state[0] == RADIO_2055_WBRSSI_G1_SEL) 22940 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22941 NPHY_RSSI_SEL_W1); 22942 else /* RADIO_2055_WBRSSI_G2_SEL */ 22943 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE1, 22944 NPHY_RSSI_SEL_W2); 22945 if (rssi_ctrl_state[1] == RADIO_2055_NBRSSI_SEL) 22946 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22947 NPHY_RSSI_SEL_NB); 22948 else if (rssi_ctrl_state[1] == RADIO_2055_WBRSSI_G1_SEL) 22949 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22950 NPHY_RSSI_SEL_W1); 22951 else /* RADIO_2055_WBRSSI_G1_SEL */ 22952 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_CORE2, 22953 NPHY_RSSI_SEL_W2); 22954 wlc_phy_rssisel_nphy(pi, RADIO_MIMO_CORESEL_OFF, rssi_type); 22955 22956 write_phy_reg(pi, 0x91, rfctrlintc_state[0]); 22957 write_radio_reg(pi, RADIO_2055_PD_CORE1_RXTX, rfpdcorerxtx_state[0]); 22958 write_phy_reg(pi, 0x92, rfctrlintc_state[1]); 22959 write_radio_reg(pi, RADIO_2055_PD_CORE2_RXTX, rfpdcorerxtx_state[1]); 22960 22961 wlc_phy_classifier_nphy(pi, (0x7 << 0), classif_state); 22962 wlc_phy_clip_det_nphy(pi, 1, clip_state); 22963 22964 wlc_phy_resetcca_nphy(pi); 22965} 22966 22967void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi) 22968{ 22969 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 22970 wlc_phy_rssi_cal_nphy_rev3(pi); 22971 } else { 22972 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_NB); 22973 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W1); 22974 wlc_phy_rssi_cal_nphy_rev2(pi, NPHY_RSSI_SEL_W2); 22975 } 22976} 22977 22978int 22979wlc_phy_rssi_compute_nphy(struct brcms_phy *pi, struct d11rxhdr *rxh) 22980{ 22981 s16 rxpwr, rxpwr0, rxpwr1; 22982 s16 phyRx2_l; 22983 22984 rxpwr = 0; 22985 rxpwr0 = rxh->PhyRxStatus_1 & PRXS1_nphy_PWR0_MASK; 22986 rxpwr1 = (rxh->PhyRxStatus_1 & PRXS1_nphy_PWR1_MASK) >> 8; 22987 22988 if (rxpwr0 > 127) 22989 rxpwr0 -= 256; 22990 if (rxpwr1 > 127) 22991 rxpwr1 -= 256; 22992 22993 phyRx2_l = rxh->PhyRxStatus_2 & 0x00ff; 22994 if (phyRx2_l > 127) 22995 phyRx2_l -= 256; 22996 22997 if (((rxpwr0 == 16) || (rxpwr0 == 32))) { 22998 rxpwr0 = rxpwr1; 22999 rxpwr1 = phyRx2_l; 23000 } 23001 23002 if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MAX) 23003 rxpwr = (rxpwr0 > rxpwr1) ? rxpwr0 : rxpwr1; 23004 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_MIN) 23005 rxpwr = (rxpwr0 < rxpwr1) ? rxpwr0 : rxpwr1; 23006 else if (pi->sh->rssi_mode == RSSI_ANT_MERGE_AVG) 23007 rxpwr = (rxpwr0 + rxpwr1) >> 1; 23008 23009 return rxpwr; 23010} 23011 23012static void 23013wlc_phy_loadsampletable_nphy(struct brcms_phy *pi, struct cordic_iq *tone_buf, 23014 u16 num_samps) 23015{ 23016 u16 t; 23017 u32 *data_buf = NULL; 23018 23019 data_buf = kmalloc_array(num_samps, sizeof(u32), GFP_ATOMIC); 23020 if (data_buf == NULL) 23021 return; 23022 23023 if (pi->phyhang_avoid) 23024 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23025 23026 for (t = 0; t < num_samps; t++) 23027 data_buf[t] = ((((unsigned int)tone_buf[t].i) & 0x3ff) << 10) | 23028 (((unsigned int)tone_buf[t].q) & 0x3ff); 23029 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SAMPLEPLAY, num_samps, 0, 32, 23030 data_buf); 23031 23032 kfree(data_buf); 23033 23034 if (pi->phyhang_avoid) 23035 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23036} 23037 23038static u16 23039wlc_phy_gen_load_samples_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23040 u8 dac_test_mode) 23041{ 23042 u8 phy_bw, is_phybw40; 23043 u16 num_samps, t, spur; 23044 s32 theta = 0, rot = 0; 23045 u32 tbl_len; 23046 struct cordic_iq *tone_buf = NULL; 23047 23048 is_phybw40 = CHSPEC_IS40(pi->radio_chanspec); 23049 phy_bw = (is_phybw40 == 1) ? 40 : 20; 23050 tbl_len = (phy_bw << 3); 23051 23052 if (dac_test_mode == 1) { 23053 spur = read_phy_reg(pi, 0x01); 23054 spur = (spur >> 15) & 1; 23055 phy_bw = (spur == 1) ? 82 : 80; 23056 phy_bw = (is_phybw40 == 1) ? (phy_bw << 1) : phy_bw; 23057 23058 tbl_len = (phy_bw << 1); 23059 } 23060 23061 tone_buf = kmalloc_array(tbl_len, sizeof(struct cordic_iq), 23062 GFP_ATOMIC); 23063 if (tone_buf == NULL) 23064 return 0; 23065 23066 num_samps = (u16) tbl_len; 23067 rot = ((f_kHz * 36) / phy_bw) / 100; 23068 theta = 0; 23069 23070 for (t = 0; t < num_samps; t++) { 23071 23072 tone_buf[t] = cordic_calc_iq(theta); 23073 23074 theta += rot; 23075 23076 tone_buf[t].q = (s32)CORDIC_FLOAT(tone_buf[t].q * max_val); 23077 tone_buf[t].i = (s32)CORDIC_FLOAT(tone_buf[t].i * max_val); 23078 } 23079 23080 wlc_phy_loadsampletable_nphy(pi, tone_buf, num_samps); 23081 23082 kfree(tone_buf); 23083 23084 return num_samps; 23085} 23086 23087static void 23088wlc_phy_runsamples_nphy(struct brcms_phy *pi, u16 num_samps, u16 loops, 23089 u16 wait, u8 iqmode, u8 dac_test_mode, 23090 bool modify_bbmult) 23091{ 23092 u16 bb_mult; 23093 u8 phy_bw, sample_cmd; 23094 u16 orig_RfseqCoreActv; 23095 u16 lpf_bw_ctl_override3, lpf_bw_ctl_override4; 23096 23097 if (pi->phyhang_avoid) 23098 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23099 23100 phy_bw = 20; 23101 if (CHSPEC_IS40(pi->radio_chanspec)) 23102 phy_bw = 40; 23103 23104 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23105 23106 lpf_bw_ctl_override3 = read_phy_reg(pi, 0x342) & (0x1 << 7); 23107 lpf_bw_ctl_override4 = read_phy_reg(pi, 0x343) & (0x1 << 7); 23108 if (!(lpf_bw_ctl_override3 | lpf_bw_ctl_override4)) { 23109 wlc_phy_rfctrl_override_nphy_rev7( 23110 pi, 23111 (0x1 << 7), 23112 wlc_phy_read_lpf_bw_ctl_nphy 23113 (pi, 23114 0), 0, 0, 23115 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23116 23117 pi->nphy_sample_play_lpf_bw_ctl_ovr = true; 23118 } 23119 read_phy_reg(pi, 0x340); /* lpf_bw_ctl_miscreg3 */ 23120 read_phy_reg(pi, 0x341); /* lpf_bw_ctl_miscreg4 */ 23121 } 23122 23123 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) == 0) { 23124 23125 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23126 &bb_mult); 23127 pi->nphy_bb_mult_save = 23128 BB_MULT_VALID_MASK | (bb_mult & BB_MULT_MASK); 23129 } 23130 23131 if (modify_bbmult) { 23132 bb_mult = (phy_bw == 20) ? 100 : 71; 23133 bb_mult = (bb_mult << 8) + bb_mult; 23134 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23135 &bb_mult); 23136 } 23137 23138 if (pi->phyhang_avoid) 23139 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23140 23141 write_phy_reg(pi, 0xc6, num_samps - 1); 23142 23143 if (loops != 0xffff) 23144 write_phy_reg(pi, 0xc4, loops - 1); 23145 else 23146 write_phy_reg(pi, 0xc4, loops); 23147 23148 write_phy_reg(pi, 0xc5, wait); 23149 23150 orig_RfseqCoreActv = read_phy_reg(pi, 0xa1); 23151 or_phy_reg(pi, 0xa1, NPHY_RfseqMode_CoreActv_override); 23152 if (iqmode) { 23153 23154 and_phy_reg(pi, 0xc2, 0x7FFF); 23155 23156 or_phy_reg(pi, 0xc2, 0x8000); 23157 } else { 23158 23159 sample_cmd = (dac_test_mode == 1) ? 0x5 : 0x1; 23160 write_phy_reg(pi, 0xc3, sample_cmd); 23161 } 23162 23163 SPINWAIT(((read_phy_reg(pi, 0xa4) & 0x1) == 1), 1000); 23164 23165 write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); 23166} 23167 23168int 23169wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, 23170 u8 iqmode, u8 dac_test_mode, bool modify_bbmult) 23171{ 23172 u16 num_samps; 23173 u16 loops = 0xffff; 23174 u16 wait = 0; 23175 23176 num_samps = wlc_phy_gen_load_samples_nphy(pi, f_kHz, max_val, 23177 dac_test_mode); 23178 if (num_samps == 0) 23179 return -EBADE; 23180 23181 wlc_phy_runsamples_nphy(pi, num_samps, loops, wait, iqmode, 23182 dac_test_mode, modify_bbmult); 23183 23184 return 0; 23185} 23186 23187void wlc_phy_stopplayback_nphy(struct brcms_phy *pi) 23188{ 23189 u16 playback_status; 23190 u16 bb_mult; 23191 23192 if (pi->phyhang_avoid) 23193 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23194 23195 playback_status = read_phy_reg(pi, 0xc7); 23196 if (playback_status & 0x1) 23197 or_phy_reg(pi, 0xc3, NPHY_sampleCmd_STOP); 23198 else if (playback_status & 0x2) 23199 and_phy_reg(pi, 0xc2, 23200 (u16) ~NPHY_iqloCalCmdGctl_IQLO_CAL_EN); 23201 23202 and_phy_reg(pi, 0xc3, (u16) ~(0x1 << 2)); 23203 23204 if ((pi->nphy_bb_mult_save & BB_MULT_VALID_MASK) != 0) { 23205 23206 bb_mult = pi->nphy_bb_mult_save & BB_MULT_MASK; 23207 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, 87, 16, 23208 &bb_mult); 23209 23210 pi->nphy_bb_mult_save = 0; 23211 } 23212 23213 if (NREV_IS(pi->pubpi.phy_rev, 7) || NREV_GE(pi->pubpi.phy_rev, 8)) { 23214 if (pi->nphy_sample_play_lpf_bw_ctl_ovr) { 23215 wlc_phy_rfctrl_override_nphy_rev7( 23216 pi, 23217 (0x1 << 7), 23218 0, 0, 1, 23219 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23220 pi->nphy_sample_play_lpf_bw_ctl_ovr = false; 23221 } 23222 } 23223 23224 if (pi->phyhang_avoid) 23225 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23226} 23227 23228static u32 *brcms_phy_get_tx_pwrctrl_tbl(struct brcms_phy *pi) 23229{ 23230 u32 *tx_pwrctrl_tbl = NULL; 23231 uint phyrev = pi->pubpi.phy_rev; 23232 23233 if (PHY_IPA(pi)) { 23234 tx_pwrctrl_tbl = 23235 wlc_phy_get_ipa_gaintbl_nphy(pi); 23236 } else { 23237 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23238 if (NREV_IS(phyrev, 3)) 23239 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev3; 23240 else if (NREV_IS(phyrev, 4)) 23241 tx_pwrctrl_tbl = 23242 (pi->srom_fem5g.extpagain == 3) ? 23243 nphy_tpc_5GHz_txgain_HiPwrEPA : 23244 nphy_tpc_5GHz_txgain_rev4; 23245 else 23246 tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev5; 23247 } else { 23248 if (NREV_GE(phyrev, 7)) { 23249 if (pi->pubpi.radiorev == 3) 23250 tx_pwrctrl_tbl = 23251 nphy_tpc_txgain_epa_2057rev3; 23252 else if (pi->pubpi.radiorev == 5) 23253 tx_pwrctrl_tbl = 23254 nphy_tpc_txgain_epa_2057rev5; 23255 } else { 23256 if (NREV_GE(phyrev, 5) && 23257 (pi->srom_fem2g.extpagain == 3)) 23258 tx_pwrctrl_tbl = 23259 nphy_tpc_txgain_HiPwrEPA; 23260 else 23261 tx_pwrctrl_tbl = 23262 nphy_tpc_txgain_rev3; 23263 } 23264 } 23265 } 23266 return tx_pwrctrl_tbl; 23267} 23268 23269struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi) 23270{ 23271 u16 base_idx[2], curr_gain[2]; 23272 u8 core_no; 23273 struct nphy_txgains target_gain; 23274 u32 *tx_pwrctrl_tbl = NULL; 23275 23276 if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { 23277 if (pi->phyhang_avoid) 23278 wlc_phy_stay_in_carriersearch_nphy(pi, true); 23279 23280 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 23281 curr_gain); 23282 23283 if (pi->phyhang_avoid) 23284 wlc_phy_stay_in_carriersearch_nphy(pi, false); 23285 23286 for (core_no = 0; core_no < 2; core_no++) { 23287 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23288 target_gain.ipa[core_no] = 23289 curr_gain[core_no] & 0x0007; 23290 target_gain.pad[core_no] = 23291 ((curr_gain[core_no] & 0x00F8) >> 3); 23292 target_gain.pga[core_no] = 23293 ((curr_gain[core_no] & 0x0F00) >> 8); 23294 target_gain.txgm[core_no] = 23295 ((curr_gain[core_no] & 0x7000) >> 12); 23296 target_gain.txlpf[core_no] = 23297 ((curr_gain[core_no] & 0x8000) >> 15); 23298 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23299 target_gain.ipa[core_no] = 23300 curr_gain[core_no] & 0x000F; 23301 target_gain.pad[core_no] = 23302 ((curr_gain[core_no] & 0x00F0) >> 4); 23303 target_gain.pga[core_no] = 23304 ((curr_gain[core_no] & 0x0F00) >> 8); 23305 target_gain.txgm[core_no] = 23306 ((curr_gain[core_no] & 0x7000) >> 12); 23307 } else { 23308 target_gain.ipa[core_no] = 23309 curr_gain[core_no] & 0x0003; 23310 target_gain.pad[core_no] = 23311 ((curr_gain[core_no] & 0x000C) >> 2); 23312 target_gain.pga[core_no] = 23313 ((curr_gain[core_no] & 0x0070) >> 4); 23314 target_gain.txgm[core_no] = 23315 ((curr_gain[core_no] & 0x0380) >> 7); 23316 } 23317 } 23318 } else { 23319 uint phyrev = pi->pubpi.phy_rev; 23320 23321 base_idx[0] = (read_phy_reg(pi, 0x1ed) >> 8) & 0x7f; 23322 base_idx[1] = (read_phy_reg(pi, 0x1ee) >> 8) & 0x7f; 23323 for (core_no = 0; core_no < 2; core_no++) { 23324 if (NREV_GE(phyrev, 3)) { 23325 tx_pwrctrl_tbl = 23326 brcms_phy_get_tx_pwrctrl_tbl(pi); 23327 if (NREV_GE(phyrev, 7)) { 23328 target_gain.ipa[core_no] = 23329 (tx_pwrctrl_tbl 23330 [base_idx[core_no]] 23331 >> 16) & 0x7; 23332 target_gain.pad[core_no] = 23333 (tx_pwrctrl_tbl 23334 [base_idx[core_no]] 23335 >> 19) & 0x1f; 23336 target_gain.pga[core_no] = 23337 (tx_pwrctrl_tbl 23338 [base_idx[core_no]] 23339 >> 24) & 0xf; 23340 target_gain.txgm[core_no] = 23341 (tx_pwrctrl_tbl 23342 [base_idx[core_no]] 23343 >> 28) & 0x7; 23344 target_gain.txlpf[core_no] = 23345 (tx_pwrctrl_tbl 23346 [base_idx[core_no]] 23347 >> 31) & 0x1; 23348 } else { 23349 target_gain.ipa[core_no] = 23350 (tx_pwrctrl_tbl 23351 [base_idx[core_no]] 23352 >> 16) & 0xf; 23353 target_gain.pad[core_no] = 23354 (tx_pwrctrl_tbl 23355 [base_idx[core_no]] 23356 >> 20) & 0xf; 23357 target_gain.pga[core_no] = 23358 (tx_pwrctrl_tbl 23359 [base_idx[core_no]] 23360 >> 24) & 0xf; 23361 target_gain.txgm[core_no] = 23362 (tx_pwrctrl_tbl 23363 [base_idx[core_no]] 23364 >> 28) & 0x7; 23365 } 23366 } else { 23367 target_gain.ipa[core_no] = 23368 (nphy_tpc_txgain[base_idx[core_no]] >> 23369 16) & 0x3; 23370 target_gain.pad[core_no] = 23371 (nphy_tpc_txgain[base_idx[core_no]] >> 23372 18) & 0x3; 23373 target_gain.pga[core_no] = 23374 (nphy_tpc_txgain[base_idx[core_no]] >> 23375 20) & 0x7; 23376 target_gain.txgm[core_no] = 23377 (nphy_tpc_txgain[base_idx[core_no]] >> 23378 23) & 0x7; 23379 } 23380 } 23381 } 23382 23383 return target_gain; 23384} 23385 23386static void 23387wlc_phy_iqcal_gainparams_nphy(struct brcms_phy *pi, u16 core_no, 23388 struct nphy_txgains target_gain, 23389 struct nphy_iqcal_params *params) 23390{ 23391 u8 k; 23392 u16 gain_index; 23393 u8 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); 23394 23395 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23396 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23397 params->txlpf = target_gain.txlpf[core_no]; 23398 23399 params->txgm = target_gain.txgm[core_no]; 23400 params->pga = target_gain.pga[core_no]; 23401 params->pad = target_gain.pad[core_no]; 23402 params->ipa = target_gain.ipa[core_no]; 23403 if (NREV_GE(pi->pubpi.phy_rev, 7)) 23404 params->cal_gain = 23405 ((params->txlpf << 15) | (params->txgm << 12) | 23406 (params->pga << 8) | 23407 (params->pad << 3) | (params->ipa)); 23408 else 23409 params->cal_gain = 23410 ((params->txgm << 12) | (params->pga << 8) | 23411 (params->pad << 4) | (params->ipa)); 23412 23413 params->ncorr[0] = 0x79; 23414 params->ncorr[1] = 0x79; 23415 params->ncorr[2] = 0x79; 23416 params->ncorr[3] = 0x79; 23417 params->ncorr[4] = 0x79; 23418 } else { 23419 23420 gain_index = ((target_gain.pad[core_no] << 0) | 23421 (target_gain.pga[core_no] << 4) | 23422 (target_gain.txgm[core_no] << 8)); 23423 23424 for (k = 0; k < NPHY_IQCAL_NUMGAINS; k++) { 23425 if (tbl_iqcal_gainparams_nphy[band_idx][k][0] == 23426 gain_index) 23427 break; 23428 } 23429 23430 params->txgm = tbl_iqcal_gainparams_nphy[band_idx][k][1]; 23431 params->pga = tbl_iqcal_gainparams_nphy[band_idx][k][2]; 23432 params->pad = tbl_iqcal_gainparams_nphy[band_idx][k][3]; 23433 params->cal_gain = ((params->txgm << 7) | (params->pga << 4) | 23434 (params->pad << 2)); 23435 params->ncorr[0] = tbl_iqcal_gainparams_nphy[band_idx][k][4]; 23436 params->ncorr[1] = tbl_iqcal_gainparams_nphy[band_idx][k][5]; 23437 params->ncorr[2] = tbl_iqcal_gainparams_nphy[band_idx][k][6]; 23438 params->ncorr[3] = tbl_iqcal_gainparams_nphy[band_idx][k][7]; 23439 } 23440} 23441 23442static void wlc_phy_txcal_radio_setup_nphy(struct brcms_phy *pi) 23443{ 23444 u16 jtag_core, core; 23445 23446 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23447 23448 for (core = 0; core <= 1; core++) { 23449 23450 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23451 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23452 TX_SSI_MASTER); 23453 23454 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23455 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23456 IQCAL_VCM_HG); 23457 23458 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23459 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23460 IQCAL_IDAC); 23461 23462 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23463 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23464 TSSI_VCM); 23465 23466 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 0; 23467 23468 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23469 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23470 TX_SSI_MUX); 23471 23472 if (pi->pubpi.radiorev != 5) 23473 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23474 READ_RADIO_REG3(pi, RADIO_2057, TX, 23475 core, 23476 TSSIA); 23477 23478 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23479 READ_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG); 23480 23481 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23482 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 23483 TSSI_MISC1); 23484 23485 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23486 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23487 TX_SSI_MASTER, 0x0a); 23488 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23489 IQCAL_VCM_HG, 0x43); 23490 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23491 IQCAL_IDAC, 0x55); 23492 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23493 TSSI_VCM, 0x00); 23494 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23495 TSSIG, 0x00); 23496 if (pi->use_int_tx_iqlo_cal_nphy) { 23497 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23498 core, TX_SSI_MUX, 0x4); 23499 if (!(pi-> 23500 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23501 WRITE_RADIO_REG3(pi, RADIO_2057, 23502 TX, core, 23503 TSSIA, 0x31); 23504 else 23505 WRITE_RADIO_REG3(pi, RADIO_2057, 23506 TX, core, 23507 TSSIA, 0x21); 23508 } 23509 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23510 TSSI_MISC1, 0x00); 23511 } else { 23512 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23513 TX_SSI_MASTER, 0x06); 23514 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23515 IQCAL_VCM_HG, 0x43); 23516 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23517 IQCAL_IDAC, 0x55); 23518 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23519 TSSI_VCM, 0x00); 23520 23521 if (pi->pubpi.radiorev != 5) 23522 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23523 core, TSSIA, 0x00); 23524 if (pi->use_int_tx_iqlo_cal_nphy) { 23525 WRITE_RADIO_REG3(pi, RADIO_2057, TX, 23526 core, TX_SSI_MUX, 23527 0x06); 23528 if (!(pi-> 23529 internal_tx_iqlo_cal_tapoff_intpa_nphy)) 23530 WRITE_RADIO_REG3(pi, RADIO_2057, 23531 TX, core, 23532 TSSIG, 0x31); 23533 else 23534 WRITE_RADIO_REG3(pi, RADIO_2057, 23535 TX, core, 23536 TSSIG, 0x21); 23537 } 23538 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23539 TSSI_MISC1, 0x00); 23540 } 23541 } 23542 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23543 23544 for (core = 0; core <= 1; core++) { 23545 jtag_core = 23546 (core == 23547 PHY_CORE_0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 23548 23549 pi->tx_rx_cal_radio_saveregs[(core * 11) + 0] = 23550 read_radio_reg(pi, 23551 RADIO_2056_TX_TX_SSI_MASTER | 23552 jtag_core); 23553 23554 pi->tx_rx_cal_radio_saveregs[(core * 11) + 1] = 23555 read_radio_reg(pi, 23556 RADIO_2056_TX_IQCAL_VCM_HG | 23557 jtag_core); 23558 23559 pi->tx_rx_cal_radio_saveregs[(core * 11) + 2] = 23560 read_radio_reg(pi, 23561 RADIO_2056_TX_IQCAL_IDAC | 23562 jtag_core); 23563 23564 pi->tx_rx_cal_radio_saveregs[(core * 11) + 3] = 23565 read_radio_reg( 23566 pi, 23567 RADIO_2056_TX_TSSI_VCM | 23568 jtag_core); 23569 23570 pi->tx_rx_cal_radio_saveregs[(core * 11) + 4] = 23571 read_radio_reg(pi, 23572 RADIO_2056_TX_TX_AMP_DET | 23573 jtag_core); 23574 23575 pi->tx_rx_cal_radio_saveregs[(core * 11) + 5] = 23576 read_radio_reg(pi, 23577 RADIO_2056_TX_TX_SSI_MUX | 23578 jtag_core); 23579 23580 pi->tx_rx_cal_radio_saveregs[(core * 11) + 6] = 23581 read_radio_reg(pi, 23582 RADIO_2056_TX_TSSIA | jtag_core); 23583 23584 pi->tx_rx_cal_radio_saveregs[(core * 11) + 7] = 23585 read_radio_reg(pi, 23586 RADIO_2056_TX_TSSIG | jtag_core); 23587 23588 pi->tx_rx_cal_radio_saveregs[(core * 11) + 8] = 23589 read_radio_reg(pi, 23590 RADIO_2056_TX_TSSI_MISC1 | 23591 jtag_core); 23592 23593 pi->tx_rx_cal_radio_saveregs[(core * 11) + 9] = 23594 read_radio_reg(pi, 23595 RADIO_2056_TX_TSSI_MISC2 | 23596 jtag_core); 23597 23598 pi->tx_rx_cal_radio_saveregs[(core * 11) + 10] = 23599 read_radio_reg(pi, 23600 RADIO_2056_TX_TSSI_MISC3 | 23601 jtag_core); 23602 23603 if (CHSPEC_IS5G(pi->radio_chanspec)) { 23604 write_radio_reg(pi, 23605 RADIO_2056_TX_TX_SSI_MASTER | 23606 jtag_core, 0x0a); 23607 write_radio_reg(pi, 23608 RADIO_2056_TX_IQCAL_VCM_HG | 23609 jtag_core, 0x40); 23610 write_radio_reg(pi, 23611 RADIO_2056_TX_IQCAL_IDAC | 23612 jtag_core, 0x55); 23613 write_radio_reg(pi, 23614 RADIO_2056_TX_TSSI_VCM | 23615 jtag_core, 0x00); 23616 write_radio_reg(pi, 23617 RADIO_2056_TX_TX_AMP_DET | 23618 jtag_core, 0x00); 23619 23620 if (PHY_IPA(pi)) { 23621 write_radio_reg( 23622 pi, 23623 RADIO_2056_TX_TX_SSI_MUX 23624 | jtag_core, 0x4); 23625 write_radio_reg(pi, 23626 RADIO_2056_TX_TSSIA | 23627 jtag_core, 0x1); 23628 } else { 23629 write_radio_reg( 23630 pi, 23631 RADIO_2056_TX_TX_SSI_MUX 23632 | jtag_core, 0x00); 23633 write_radio_reg(pi, 23634 RADIO_2056_TX_TSSIA | 23635 jtag_core, 0x2f); 23636 } 23637 write_radio_reg(pi, 23638 RADIO_2056_TX_TSSIG | jtag_core, 23639 0x00); 23640 write_radio_reg(pi, 23641 RADIO_2056_TX_TSSI_MISC1 | 23642 jtag_core, 0x00); 23643 23644 write_radio_reg(pi, 23645 RADIO_2056_TX_TSSI_MISC2 | 23646 jtag_core, 0x00); 23647 write_radio_reg(pi, 23648 RADIO_2056_TX_TSSI_MISC3 | 23649 jtag_core, 0x00); 23650 } else { 23651 write_radio_reg(pi, 23652 RADIO_2056_TX_TX_SSI_MASTER | 23653 jtag_core, 0x06); 23654 write_radio_reg(pi, 23655 RADIO_2056_TX_IQCAL_VCM_HG | 23656 jtag_core, 0x40); 23657 write_radio_reg(pi, 23658 RADIO_2056_TX_IQCAL_IDAC | 23659 jtag_core, 0x55); 23660 write_radio_reg(pi, 23661 RADIO_2056_TX_TSSI_VCM | 23662 jtag_core, 0x00); 23663 write_radio_reg(pi, 23664 RADIO_2056_TX_TX_AMP_DET | 23665 jtag_core, 0x00); 23666 write_radio_reg(pi, 23667 RADIO_2056_TX_TSSIA | jtag_core, 23668 0x00); 23669 23670 if (PHY_IPA(pi)) { 23671 23672 write_radio_reg( 23673 pi, 23674 RADIO_2056_TX_TX_SSI_MUX 23675 | jtag_core, 0x06); 23676 if (NREV_LT(pi->pubpi.phy_rev, 5)) 23677 write_radio_reg( 23678 pi, 23679 RADIO_2056_TX_TSSIG 23680 | jtag_core, 23681 0x11); 23682 else 23683 write_radio_reg( 23684 pi, 23685 RADIO_2056_TX_TSSIG 23686 | jtag_core, 23687 0x1); 23688 } else { 23689 write_radio_reg( 23690 pi, 23691 RADIO_2056_TX_TX_SSI_MUX 23692 | jtag_core, 0x00); 23693 write_radio_reg(pi, 23694 RADIO_2056_TX_TSSIG | 23695 jtag_core, 0x20); 23696 } 23697 23698 write_radio_reg(pi, 23699 RADIO_2056_TX_TSSI_MISC1 | 23700 jtag_core, 0x00); 23701 write_radio_reg(pi, 23702 RADIO_2056_TX_TSSI_MISC2 | 23703 jtag_core, 0x00); 23704 write_radio_reg(pi, 23705 RADIO_2056_TX_TSSI_MISC3 | 23706 jtag_core, 0x00); 23707 } 23708 } 23709 } else { 23710 23711 pi->tx_rx_cal_radio_saveregs[0] = 23712 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1); 23713 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 0x29); 23714 pi->tx_rx_cal_radio_saveregs[1] = 23715 read_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2); 23716 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 0x54); 23717 23718 pi->tx_rx_cal_radio_saveregs[2] = 23719 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1); 23720 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 0x29); 23721 pi->tx_rx_cal_radio_saveregs[3] = 23722 read_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2); 23723 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 0x54); 23724 23725 pi->tx_rx_cal_radio_saveregs[4] = 23726 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1); 23727 pi->tx_rx_cal_radio_saveregs[5] = 23728 read_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2); 23729 23730 if ((read_phy_reg(pi, 0x09) & NPHY_BandControl_currentBand) == 23731 0) { 23732 23733 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x04); 23734 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x04); 23735 } else { 23736 23737 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 0x20); 23738 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 0x20); 23739 } 23740 23741 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 23742 23743 or_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0x20); 23744 or_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0x20); 23745 } else { 23746 23747 and_radio_reg(pi, RADIO_2055_CORE1_TX_BB_MXGM, 0xdf); 23748 and_radio_reg(pi, RADIO_2055_CORE2_TX_BB_MXGM, 0xdf); 23749 } 23750 } 23751} 23752 23753static void wlc_phy_txcal_radio_cleanup_nphy(struct brcms_phy *pi) 23754{ 23755 u16 jtag_core, core; 23756 23757 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 23758 for (core = 0; core <= 1; core++) { 23759 23760 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23761 TX_SSI_MASTER, 23762 pi-> 23763 tx_rx_cal_radio_saveregs[(core * 11) + 23764 0]); 23765 23766 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_VCM_HG, 23767 pi-> 23768 tx_rx_cal_radio_saveregs[(core * 11) + 23769 1]); 23770 23771 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, IQCAL_IDAC, 23772 pi-> 23773 tx_rx_cal_radio_saveregs[(core * 11) + 23774 2]); 23775 23776 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_VCM, 23777 pi-> 23778 tx_rx_cal_radio_saveregs[(core * 11) + 23779 3]); 23780 23781 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TX_SSI_MUX, 23782 pi-> 23783 tx_rx_cal_radio_saveregs[(core * 11) + 23784 5]); 23785 23786 if (pi->pubpi.radiorev != 5) 23787 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 23788 TSSIA, 23789 pi->tx_rx_cal_radio_saveregs 23790 [(core * 11) + 6]); 23791 23792 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSIG, 23793 pi-> 23794 tx_rx_cal_radio_saveregs[(core * 11) + 23795 7]); 23796 23797 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, TSSI_MISC1, 23798 pi-> 23799 tx_rx_cal_radio_saveregs[(core * 11) + 23800 8]); 23801 } 23802 } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23803 for (core = 0; core <= 1; core++) { 23804 jtag_core = (core == PHY_CORE_0) ? 23805 RADIO_2056_TX0 : RADIO_2056_TX1; 23806 23807 write_radio_reg(pi, 23808 RADIO_2056_TX_TX_SSI_MASTER | jtag_core, 23809 pi-> 23810 tx_rx_cal_radio_saveregs[(core * 11) + 23811 0]); 23812 23813 write_radio_reg(pi, 23814 RADIO_2056_TX_IQCAL_VCM_HG | jtag_core, 23815 pi-> 23816 tx_rx_cal_radio_saveregs[(core * 11) + 23817 1]); 23818 23819 write_radio_reg(pi, 23820 RADIO_2056_TX_IQCAL_IDAC | jtag_core, 23821 pi-> 23822 tx_rx_cal_radio_saveregs[(core * 11) + 23823 2]); 23824 23825 write_radio_reg(pi, RADIO_2056_TX_TSSI_VCM | jtag_core, 23826 pi-> 23827 tx_rx_cal_radio_saveregs[(core * 11) + 23828 3]); 23829 23830 write_radio_reg(pi, 23831 RADIO_2056_TX_TX_AMP_DET | jtag_core, 23832 pi-> 23833 tx_rx_cal_radio_saveregs[(core * 11) + 23834 4]); 23835 23836 write_radio_reg(pi, 23837 RADIO_2056_TX_TX_SSI_MUX | jtag_core, 23838 pi-> 23839 tx_rx_cal_radio_saveregs[(core * 11) + 23840 5]); 23841 23842 write_radio_reg(pi, RADIO_2056_TX_TSSIA | jtag_core, 23843 pi-> 23844 tx_rx_cal_radio_saveregs[(core * 11) + 23845 6]); 23846 23847 write_radio_reg(pi, RADIO_2056_TX_TSSIG | jtag_core, 23848 pi-> 23849 tx_rx_cal_radio_saveregs[(core * 11) + 23850 7]); 23851 23852 write_radio_reg(pi, 23853 RADIO_2056_TX_TSSI_MISC1 | jtag_core, 23854 pi-> 23855 tx_rx_cal_radio_saveregs[(core * 11) + 23856 8]); 23857 23858 write_radio_reg(pi, 23859 RADIO_2056_TX_TSSI_MISC2 | jtag_core, 23860 pi-> 23861 tx_rx_cal_radio_saveregs[(core * 11) + 23862 9]); 23863 23864 write_radio_reg(pi, 23865 RADIO_2056_TX_TSSI_MISC3 | jtag_core, 23866 pi-> 23867 tx_rx_cal_radio_saveregs[(core * 11) + 23868 10]); 23869 } 23870 } else { 23871 23872 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL1, 23873 pi->tx_rx_cal_radio_saveregs[0]); 23874 write_radio_reg(pi, RADIO_2055_CORE1_TXRF_IQCAL2, 23875 pi->tx_rx_cal_radio_saveregs[1]); 23876 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL1, 23877 pi->tx_rx_cal_radio_saveregs[2]); 23878 write_radio_reg(pi, RADIO_2055_CORE2_TXRF_IQCAL2, 23879 pi->tx_rx_cal_radio_saveregs[3]); 23880 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE1, 23881 pi->tx_rx_cal_radio_saveregs[4]); 23882 write_radio_reg(pi, RADIO_2055_PWRDET_RXTX_CORE2, 23883 pi->tx_rx_cal_radio_saveregs[5]); 23884 } 23885} 23886 23887static void wlc_phy_txcal_physetup_nphy(struct brcms_phy *pi) 23888{ 23889 u16 val, mask; 23890 23891 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 23892 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 23893 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 23894 23895 mask = ((0x3 << 8) | (0x3 << 10)); 23896 val = (0x2 << 8); 23897 val |= (0x2 << 10); 23898 mod_phy_reg(pi, 0xa6, mask, val); 23899 mod_phy_reg(pi, 0xa7, mask, val); 23900 23901 val = read_phy_reg(pi, 0x8f); 23902 pi->tx_rx_cal_phy_saveregs[2] = val; 23903 val |= ((0x1 << 9) | (0x1 << 10)); 23904 write_phy_reg(pi, 0x8f, val); 23905 23906 val = read_phy_reg(pi, 0xa5); 23907 pi->tx_rx_cal_phy_saveregs[3] = val; 23908 val |= ((0x1 << 9) | (0x1 << 10)); 23909 write_phy_reg(pi, 0xa5, val); 23910 23911 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x01); 23912 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 23913 23914 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 23915 &val); 23916 pi->tx_rx_cal_phy_saveregs[5] = val; 23917 val = 0; 23918 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 23919 &val); 23920 23921 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 23922 &val); 23923 pi->tx_rx_cal_phy_saveregs[6] = val; 23924 val = 0; 23925 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 23926 &val); 23927 23928 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0x91); 23929 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0x92); 23930 23931 if (!(pi->use_int_tx_iqlo_cal_nphy)) 23932 wlc_phy_rfctrlintc_override_nphy( 23933 pi, 23934 NPHY_RfctrlIntc_override_PA, 23935 1, 23936 RADIO_MIMO_CORESEL_CORE1 23937 | 23938 RADIO_MIMO_CORESEL_CORE2); 23939 else 23940 wlc_phy_rfctrlintc_override_nphy( 23941 pi, 23942 NPHY_RfctrlIntc_override_PA, 23943 0, 23944 RADIO_MIMO_CORESEL_CORE1 23945 | 23946 RADIO_MIMO_CORESEL_CORE2); 23947 23948 wlc_phy_rfctrlintc_override_nphy(pi, 23949 NPHY_RfctrlIntc_override_TRSW, 23950 0x2, RADIO_MIMO_CORESEL_CORE1); 23951 wlc_phy_rfctrlintc_override_nphy(pi, 23952 NPHY_RfctrlIntc_override_TRSW, 23953 0x8, RADIO_MIMO_CORESEL_CORE2); 23954 23955 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 23956 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 23957 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 23958 0x29b, (0x1 << 0), (0) << 0); 23959 23960 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 23961 0x29b, (0x1 << 0), (0) << 0); 23962 23963 if (NREV_IS(pi->pubpi.phy_rev, 7) 23964 || NREV_GE(pi->pubpi.phy_rev, 8)) 23965 wlc_phy_rfctrl_override_nphy_rev7( 23966 pi, (0x1 << 7), 23967 wlc_phy_read_lpf_bw_ctl_nphy 23968 (pi, 23969 0), 0, 0, 23970 NPHY_REV7_RFCTRLOVERRIDE_ID1); 23971 23972 if (pi->use_int_tx_iqlo_cal_nphy 23973 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 23974 23975 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 23976 23977 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 23978 1 << 4); 23979 23980 if (CHSPEC_IS2G(pi->radio_chanspec)) { 23981 mod_radio_reg( 23982 pi, 23983 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 23984 1, 0); 23985 mod_radio_reg( 23986 pi, 23987 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 23988 1, 0); 23989 } else { 23990 mod_radio_reg( 23991 pi, 23992 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 23993 1, 0); 23994 mod_radio_reg( 23995 pi, 23996 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 23997 1, 0); 23998 } 23999 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 24000 wlc_phy_rfctrl_override_nphy_rev7( 24001 pi, 24002 (0x1 << 3), 0, 24003 0x3, 0, 24004 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24005 } 24006 } 24007 } else { 24008 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa6); 24009 pi->tx_rx_cal_phy_saveregs[1] = read_phy_reg(pi, 0xa7); 24010 24011 mask = ((0x3 << 12) | (0x3 << 14)); 24012 val = (0x2 << 12); 24013 val |= (0x2 << 14); 24014 mod_phy_reg(pi, 0xa6, mask, val); 24015 mod_phy_reg(pi, 0xa7, mask, val); 24016 24017 val = read_phy_reg(pi, 0xa5); 24018 pi->tx_rx_cal_phy_saveregs[2] = val; 24019 val |= ((0x1 << 12) | (0x1 << 13)); 24020 write_phy_reg(pi, 0xa5, val); 24021 24022 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24023 &val); 24024 pi->tx_rx_cal_phy_saveregs[3] = val; 24025 val |= 0x2000; 24026 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24027 &val); 24028 24029 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24030 &val); 24031 pi->tx_rx_cal_phy_saveregs[4] = val; 24032 val |= 0x2000; 24033 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24034 &val); 24035 24036 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x91); 24037 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x92); 24038 val = CHSPEC_IS5G(pi->radio_chanspec) ? 0x180 : 0x120; 24039 write_phy_reg(pi, 0x91, val); 24040 write_phy_reg(pi, 0x92, val); 24041 } 24042} 24043 24044static void wlc_phy_txcal_phycleanup_nphy(struct brcms_phy *pi) 24045{ 24046 u16 mask; 24047 24048 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 24049 write_phy_reg(pi, 0xa6, pi->tx_rx_cal_phy_saveregs[0]); 24050 write_phy_reg(pi, 0xa7, pi->tx_rx_cal_phy_saveregs[1]); 24051 write_phy_reg(pi, 0x8f, pi->tx_rx_cal_phy_saveregs[2]); 24052 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[3]); 24053 write_phy_reg(pi, 0x01, pi->tx_rx_cal_phy_saveregs[4]); 24054 24055 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 3, 16, 24056 &pi->tx_rx_cal_phy_saveregs[5]); 24057 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 19, 16, 24058 &pi->tx_rx_cal_phy_saveregs[6]); 24059 24060 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[7]); 24061 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[8]); 24062 24063 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 24064 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 24065 24066 if (NREV_IS(pi->pubpi.phy_rev, 7) 24067 || NREV_GE(pi->pubpi.phy_rev, 8)) 24068 wlc_phy_rfctrl_override_nphy_rev7( 24069 pi, (0x1 << 7), 0, 0, 24070 1, 24071 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24072 24073 wlc_phy_resetcca_nphy(pi); 24074 24075 if (pi->use_int_tx_iqlo_cal_nphy 24076 && !(pi->internal_tx_iqlo_cal_tapoff_intpa_nphy)) { 24077 24078 if (NREV_IS(pi->pubpi.phy_rev, 7)) { 24079 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24080 mod_radio_reg( 24081 pi, 24082 RADIO_2057_PAD2G_TUNE_PUS_CORE0, 24083 1, 1); 24084 mod_radio_reg( 24085 pi, 24086 RADIO_2057_PAD2G_TUNE_PUS_CORE1, 24087 1, 1); 24088 } else { 24089 mod_radio_reg( 24090 pi, 24091 RADIO_2057_IPA5G_CASCOFFV_PU_CORE0, 24092 1, 1); 24093 mod_radio_reg( 24094 pi, 24095 RADIO_2057_IPA5G_CASCOFFV_PU_CORE1, 24096 1, 1); 24097 } 24098 24099 mod_radio_reg(pi, RADIO_2057_OVR_REG0, 1 << 4, 24100 0); 24101 } else if (NREV_GE(pi->pubpi.phy_rev, 8)) { 24102 wlc_phy_rfctrl_override_nphy_rev7( 24103 pi, 24104 (0x1 << 3), 0, 24105 0x3, 1, 24106 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24107 } 24108 } 24109 } else { 24110 mask = ((0x3 << 12) | (0x3 << 14)); 24111 mod_phy_reg(pi, 0xa6, mask, pi->tx_rx_cal_phy_saveregs[0]); 24112 mod_phy_reg(pi, 0xa7, mask, pi->tx_rx_cal_phy_saveregs[1]); 24113 write_phy_reg(pi, 0xa5, pi->tx_rx_cal_phy_saveregs[2]); 24114 24115 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 2, 16, 24116 &pi->tx_rx_cal_phy_saveregs[3]); 24117 24118 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 18, 16, 24119 &pi->tx_rx_cal_phy_saveregs[4]); 24120 24121 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[5]); 24122 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[6]); 24123 } 24124} 24125 24126void 24127wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf, u8 num_samps) 24128{ 24129 u16 tssi_reg; 24130 s32 temp, pwrindex[2]; 24131 s32 idle_tssi[2]; 24132 s32 rssi_buf[4]; 24133 s32 tssival[2]; 24134 u8 tssi_type; 24135 24136 tssi_reg = read_phy_reg(pi, 0x1e9); 24137 24138 temp = (s32) (tssi_reg & 0x3f); 24139 idle_tssi[0] = (temp <= 31) ? temp : (temp - 64); 24140 24141 temp = (s32) ((tssi_reg >> 8) & 0x3f); 24142 idle_tssi[1] = (temp <= 31) ? temp : (temp - 64); 24143 24144 tssi_type = 24145 CHSPEC_IS5G(pi->radio_chanspec) ? 24146 (u8)NPHY_RSSI_SEL_TSSI_5G : (u8)NPHY_RSSI_SEL_TSSI_2G; 24147 24148 wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); 24149 24150 tssival[0] = rssi_buf[0] / ((s32) num_samps); 24151 tssival[1] = rssi_buf[2] / ((s32) num_samps); 24152 24153 pwrindex[0] = idle_tssi[0] - tssival[0] + 64; 24154 pwrindex[1] = idle_tssi[1] - tssival[1] + 64; 24155 24156 if (pwrindex[0] < 0) 24157 pwrindex[0] = 0; 24158 else if (pwrindex[0] > 63) 24159 pwrindex[0] = 63; 24160 24161 if (pwrindex[1] < 0) 24162 pwrindex[1] = 0; 24163 else if (pwrindex[1] > 63) 24164 pwrindex[1] = 63; 24165 24166 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 1, 24167 (u32) pwrindex[0], 32, &qdBm_pwrbuf[0]); 24168 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 1, 24169 (u32) pwrindex[1], 32, &qdBm_pwrbuf[1]); 24170} 24171 24172static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core) 24173{ 24174 int index; 24175 u32 bbmult_scale; 24176 u16 bbmult; 24177 u16 tblentry; 24178 24179 static const struct nphy_txiqcal_ladder ladder_lo[] = { 24180 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24181 {25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5}, 24182 {25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7} 24183 }; 24184 24185 static const struct nphy_txiqcal_ladder ladder_iq[] = { 24186 {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, 24187 {25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1}, 24188 {100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7} 24189 }; 24190 24191 bbmult = (core == PHY_CORE_0) ? 24192 ((pi->nphy_txcal_bbmult >> 8) & 0xff) : 24193 (pi->nphy_txcal_bbmult & 0xff); 24194 24195 for (index = 0; index < 18; index++) { 24196 bbmult_scale = ladder_lo[index].percent * bbmult; 24197 bbmult_scale /= 100; 24198 24199 tblentry = 24200 ((bbmult_scale & 0xff) << 8) | ladder_lo[index].g_env; 24201 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index, 16, 24202 &tblentry); 24203 24204 bbmult_scale = ladder_iq[index].percent * bbmult; 24205 bbmult_scale /= 100; 24206 24207 tblentry = 24208 ((bbmult_scale & 0xff) << 8) | ladder_iq[index].g_env; 24209 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 1, index + 32, 24210 16, &tblentry); 24211 } 24212} 24213 24214static u8 wlc_phy_txpwr_idx_cur_get_nphy(struct brcms_phy *pi, u8 core) 24215{ 24216 u16 tmp; 24217 tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); 24218 24219 tmp = (tmp & (0x7f << 8)) >> 8; 24220 return (u8) tmp; 24221} 24222 24223static void 24224wlc_phy_txpwr_idx_cur_set_nphy(struct brcms_phy *pi, u8 idx0, u8 idx1) 24225{ 24226 mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); 24227 24228 if (NREV_GT(pi->pubpi.phy_rev, 1)) 24229 mod_phy_reg(pi, 0x222, (0xff << 0), idx1); 24230} 24231 24232static u16 wlc_phy_ipa_get_bbmult_nphy(struct brcms_phy *pi) 24233{ 24234 u16 m0m1; 24235 24236 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m0m1); 24237 24238 return m0m1; 24239} 24240 24241static void wlc_phy_ipa_set_bbmult_nphy(struct brcms_phy *pi, u8 m0, u8 m1) 24242{ 24243 u16 m0m1 = (u16) ((m0 << 8) | m1); 24244 24245 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m0m1); 24246 wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &m0m1); 24247} 24248 24249static void 24250wlc_phy_papd_cal_setup_nphy(struct brcms_phy *pi, 24251 struct nphy_papd_restore_state *state, u8 core) 24252{ 24253 s32 tone_freq; 24254 u8 off_core; 24255 u16 mixgain = 0; 24256 24257 off_core = core ^ 0x1; 24258 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24259 24260 if (NREV_IS(pi->pubpi.phy_rev, 7) 24261 || NREV_GE(pi->pubpi.phy_rev, 8)) 24262 wlc_phy_rfctrl_override_nphy_rev7( 24263 pi, (0x1 << 7), 24264 wlc_phy_read_lpf_bw_ctl_nphy 24265 (pi, 24266 0), 0, 0, 24267 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24268 24269 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24270 if (pi->pubpi.radiorev == 5) 24271 mixgain = (core == 0) ? 0x20 : 0x00; 24272 else if ((pi->pubpi.radiorev == 7) 24273 || (pi->pubpi.radiorev == 8)) 24274 mixgain = 0x00; 24275 else if ((pi->pubpi.radiorev <= 4) 24276 || (pi->pubpi.radiorev == 6)) 24277 mixgain = 0x00; 24278 } else { 24279 if ((pi->pubpi.radiorev == 4) || 24280 (pi->pubpi.radiorev == 6)) 24281 mixgain = 0x50; 24282 else if ((pi->pubpi.radiorev == 3) 24283 || (pi->pubpi.radiorev == 7) 24284 || (pi->pubpi.radiorev == 8)) 24285 mixgain = 0x0; 24286 } 24287 24288 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 24289 mixgain, (1 << core), 0, 24290 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24291 24292 wlc_phy_rfctrl_override_1tomany_nphy( 24293 pi, 24294 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24295 1, (1 << core), 0); 24296 wlc_phy_rfctrl_override_1tomany_nphy( 24297 pi, 24298 NPHY_REV7_RfctrlOverride_cmd_tx_pu, 24299 0, (1 << off_core), 0); 24300 24301 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24302 0, 0x3, 0, 24303 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24304 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 24305 (1 << core), 0, 24306 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24307 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 24308 (1 << core), 0, 24309 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24310 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 24311 (1 << core), 0, 24312 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24313 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 24314 (1 << core), 0, 24315 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24316 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 24317 (1 << core), 0, 24318 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24319 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 24320 (1 << core), 0, 24321 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24322 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 24323 (1 << core), 0, 24324 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24325 24326 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 24327 0, (1 << core), 0, 24328 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24329 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 24330 (1 << core), 0, 24331 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24332 24333 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24334 0xa6 : 0xa7); 24335 state->afeoverride[core] = 24336 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24337 state->afectrl[off_core] = 24338 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa7 : 0xa6); 24339 state->afeoverride[off_core] = 24340 read_phy_reg(pi, (core == PHY_CORE_0) ? 0xa5 : 0x8f); 24341 24342 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24343 (0x1 << 2), 0); 24344 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24345 0xa5), (0x1 << 2), (0x1 << 2)); 24346 24347 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa7 : 0xa6), 24348 (0x1 << 2), (0x1 << 2)); 24349 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa5 : 24350 0x8f), (0x1 << 2), (0x1 << 2)); 24351 24352 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24353 state->pwrup[core] = 24354 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24355 TXRXCOUPLE_2G_PWRUP); 24356 state->atten[core] = 24357 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24358 TXRXCOUPLE_2G_ATTEN); 24359 state->pwrup[off_core] = 24360 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24361 TXRXCOUPLE_2G_PWRUP); 24362 state->atten[off_core] = 24363 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24364 TXRXCOUPLE_2G_ATTEN); 24365 24366 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24367 TXRXCOUPLE_2G_PWRUP, 0xc); 24368 24369 if ((pi->pubpi.radiorev == 3) || 24370 (pi->pubpi.radiorev == 4) || 24371 (pi->pubpi.radiorev == 6)) 24372 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24373 TXRXCOUPLE_2G_ATTEN, 0xf0); 24374 else if (pi->pubpi.radiorev == 5) 24375 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24376 TXRXCOUPLE_2G_ATTEN, 24377 (core == 0) ? 0xf7 : 0xf2); 24378 else if ((pi->pubpi.radiorev == 7) 24379 || (pi->pubpi.radiorev == 8)) 24380 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24381 TXRXCOUPLE_2G_ATTEN, 0xf0); 24382 24383 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24384 TXRXCOUPLE_2G_PWRUP, 0x0); 24385 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24386 TXRXCOUPLE_2G_ATTEN, 0xff); 24387 } else { 24388 state->pwrup[core] = 24389 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24390 TXRXCOUPLE_5G_PWRUP); 24391 state->atten[core] = 24392 READ_RADIO_REG3(pi, RADIO_2057, TX, core, 24393 TXRXCOUPLE_5G_ATTEN); 24394 state->pwrup[off_core] = 24395 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24396 TXRXCOUPLE_5G_PWRUP); 24397 state->atten[off_core] = 24398 READ_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24399 TXRXCOUPLE_5G_ATTEN); 24400 24401 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24402 TXRXCOUPLE_5G_PWRUP, 0xc); 24403 24404 if ((pi->pubpi.radiorev == 7) 24405 || (pi->pubpi.radiorev == 8)) 24406 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24407 TXRXCOUPLE_5G_ATTEN, 0xf4); 24408 24409 else 24410 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24411 TXRXCOUPLE_5G_ATTEN, 0xf0); 24412 24413 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24414 TXRXCOUPLE_5G_PWRUP, 0x0); 24415 WRITE_RADIO_REG3(pi, RADIO_2057, TX, off_core, 24416 TXRXCOUPLE_5G_ATTEN, 0xff); 24417 } 24418 24419 tone_freq = 4000; 24420 24421 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24422 24423 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24424 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 24425 24426 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24427 0x2a4, (0x1 << 13), (1) << 13); 24428 24429 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24430 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_OFF) << 0); 24431 24432 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x2a3 : 24433 0x2a4, (0x1 << 13), (0) << 13); 24434 24435 } else { 24436 24437 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 0); 24438 24439 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0, 0); 24440 24441 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 0); 24442 24443 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 1, 0x3, 0); 24444 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 1, 0x3, 0); 24445 24446 state->afectrl[core] = read_phy_reg(pi, (core == PHY_CORE_0) ? 24447 0xa6 : 0xa7); 24448 state->afeoverride[core] = 24449 read_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 0xa5); 24450 24451 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0xa6 : 0xa7), 24452 (0x1 << 0) | (0x1 << 1) | (0x1 << 2), 0); 24453 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 24454 0xa5), 24455 (0x1 << 0) | 24456 (0x1 << 1) | 24457 (0x1 << 2), (0x1 << 0) | (0x1 << 1) | (0x1 << 2)); 24458 24459 state->vga_master[core] = 24460 READ_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER); 24461 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 0x2b); 24462 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24463 state->fbmix[core] = 24464 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24465 TXFBMIX_G); 24466 state->intpa_master[core] = 24467 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24468 INTPAG_MASTER); 24469 24470 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_G, 24471 0x03); 24472 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24473 INTPAG_MASTER, 0x04); 24474 } else { 24475 state->fbmix[core] = 24476 READ_RADIO_REG2(pi, RADIO_2056, RX, core, 24477 TXFBMIX_A); 24478 state->intpa_master[core] = 24479 READ_RADIO_REG2(pi, RADIO_2056, TX, core, 24480 INTPAA_MASTER); 24481 24482 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, TXFBMIX_A, 24483 0x03); 24484 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24485 INTPAA_MASTER, 0x04); 24486 24487 } 24488 24489 tone_freq = 4000; 24490 24491 wlc_phy_tx_tone_nphy(pi, tone_freq, 181, 0, 0, false); 24492 24493 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24494 0x29b, (0x1 << 0), (1) << 0); 24495 24496 mod_phy_reg(pi, (off_core == PHY_CORE_0) ? 0x297 : 24497 0x29b, (0x1 << 0), (0) << 0); 24498 24499 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 24500 } 24501} 24502 24503static void 24504wlc_phy_papd_cal_cleanup_nphy(struct brcms_phy *pi, 24505 struct nphy_papd_restore_state *state) 24506{ 24507 u8 core; 24508 24509 wlc_phy_stopplayback_nphy(pi); 24510 24511 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24512 24513 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24514 24515 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24516 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24517 TXRXCOUPLE_2G_PWRUP, 0); 24518 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24519 TXRXCOUPLE_2G_ATTEN, 24520 state->atten[core]); 24521 } else { 24522 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24523 TXRXCOUPLE_5G_PWRUP, 0); 24524 WRITE_RADIO_REG3(pi, RADIO_2057, TX, core, 24525 TXRXCOUPLE_5G_ATTEN, 24526 state->atten[core]); 24527 } 24528 } 24529 24530 if ((pi->pubpi.radiorev == 4) || (pi->pubpi.radiorev == 6)) 24531 wlc_phy_rfctrl_override_nphy_rev7( 24532 pi, (0x1 << 2), 24533 1, 0x3, 0, 24534 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24535 else 24536 wlc_phy_rfctrl_override_nphy_rev7( 24537 pi, (0x1 << 2), 24538 0, 0x3, 1, 24539 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24540 24541 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 24542 0, 0x3, 1, 24543 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24544 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24545 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24546 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 0, 0x3, 1, 24547 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24548 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 1, 0x3, 1, 24549 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24550 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 0, 0x3, 1, 24551 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24552 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0x3, 1, 24553 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24554 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 12), 0, 0x3, 1, 24555 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24556 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 2), 1, 0x3, 1, 24557 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24558 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 0, 0x3, 1, 24559 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24560 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0x3, 1, 24561 NPHY_REV7_RFCTRLOVERRIDE_ID2); 24562 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 8), 0, 0x3, 1, 24563 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24564 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 1, 0x3, 1, 24565 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24566 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 0, 0x3, 1, 24567 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24568 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 1, 0x3, 1, 24569 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24570 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0x3, 1, 24571 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24572 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 4), 0, 0x3, 1, 24573 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24574 24575 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24576 24577 write_phy_reg(pi, (core == PHY_CORE_0) ? 24578 0xa6 : 0xa7, state->afectrl[core]); 24579 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24580 0xa5, state->afeoverride[core]); 24581 } 24582 24583 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24584 (state->mm & 0xff)); 24585 24586 if (NREV_IS(pi->pubpi.phy_rev, 7) 24587 || NREV_GE(pi->pubpi.phy_rev, 8)) 24588 wlc_phy_rfctrl_override_nphy_rev7( 24589 pi, (0x1 << 7), 0, 0, 24590 1, 24591 NPHY_REV7_RFCTRLOVERRIDE_ID1); 24592 } else { 24593 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 24594 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 13), 0, 0x3, 1); 24595 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 0), 0, 0x3, 1); 24596 24597 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 2), 0, 0x3, 1); 24598 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 1), 0, 0x3, 1); 24599 24600 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 24601 24602 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, VGA_MASTER, 24603 state->vga_master[core]); 24604 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24605 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24606 TXFBMIX_G, state->fbmix[core]); 24607 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24608 INTPAG_MASTER, 24609 state->intpa_master[core]); 24610 } else { 24611 WRITE_RADIO_REG2(pi, RADIO_2056, RX, core, 24612 TXFBMIX_A, state->fbmix[core]); 24613 WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, 24614 INTPAA_MASTER, 24615 state->intpa_master[core]); 24616 } 24617 24618 write_phy_reg(pi, (core == PHY_CORE_0) ? 24619 0xa6 : 0xa7, state->afectrl[core]); 24620 write_phy_reg(pi, (core == PHY_CORE_0) ? 0x8f : 24621 0xa5, state->afeoverride[core]); 24622 } 24623 24624 wlc_phy_ipa_set_bbmult_nphy(pi, (state->mm >> 8) & 0xff, 24625 (state->mm & 0xff)); 24626 24627 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 1); 24628 } 24629} 24630 24631static void 24632wlc_phy_a1_nphy(struct brcms_phy *pi, u8 core, u32 winsz, u32 start, 24633 u32 end) 24634{ 24635 u32 *buf, *src, *dst, sz; 24636 24637 sz = end - start + 1; 24638 24639 buf = kmalloc(2 * sizeof(u32) * NPHY_PAPD_EPS_TBL_SIZE, GFP_ATOMIC); 24640 if (NULL == buf) 24641 return; 24642 24643 src = buf; 24644 dst = buf + NPHY_PAPD_EPS_TBL_SIZE; 24645 24646 wlc_phy_table_read_nphy(pi, 24647 (core == 24648 PHY_CORE_0 ? NPHY_TBL_ID_EPSILONTBL0 : 24649 NPHY_TBL_ID_EPSILONTBL1), 24650 NPHY_PAPD_EPS_TBL_SIZE, 0, 32, src); 24651 24652 do { 24653 u32 phy_a1, phy_a2; 24654 s32 phy_a3, phy_a4, phy_a5, phy_a6, phy_a7; 24655 24656 phy_a1 = end - min(end, (winsz >> 1)); 24657 phy_a2 = min_t(u32, NPHY_PAPD_EPS_TBL_SIZE - 1, 24658 end + (winsz >> 1)); 24659 phy_a3 = phy_a2 - phy_a1 + 1; 24660 phy_a6 = 0; 24661 phy_a7 = 0; 24662 24663 do { 24664 wlc_phy_papd_decode_epsilon(src[phy_a2], &phy_a4, 24665 &phy_a5); 24666 phy_a6 += phy_a4; 24667 phy_a7 += phy_a5; 24668 } while (phy_a2-- != phy_a1); 24669 24670 phy_a6 /= phy_a3; 24671 phy_a7 /= phy_a3; 24672 dst[end] = ((u32) phy_a7 << 13) | ((u32) phy_a6 & 0x1fff); 24673 } while (end-- != start); 24674 24675 wlc_phy_table_write_nphy(pi, 24676 (core == 24677 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 : 24678 NPHY_TBL_ID_EPSILONTBL1, sz, start, 32, dst); 24679 24680 kfree(buf); 24681} 24682 24683static void 24684wlc_phy_a2_nphy(struct brcms_phy *pi, struct nphy_ipa_txcalgains *txgains, 24685 enum phy_cal_mode cal_mode, u8 core) 24686{ 24687 u16 phy_a1, phy_a2, phy_a3; 24688 u16 phy_a4, phy_a5; 24689 u8 phy_a7, m[2]; 24690 u32 phy_a8 = 0; 24691 struct nphy_txgains phy_a9; 24692 24693 if (NREV_LT(pi->pubpi.phy_rev, 3)) 24694 return; 24695 24696 phy_a7 = (core == PHY_CORE_0) ? 1 : 0; 24697 24698 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24699 24700 phy_a9 = wlc_phy_get_tx_gain_nphy(pi); 24701 24702 if (CHSPEC_IS2G(pi->radio_chanspec)) 24703 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24704 (phy_a9.txgm[core] << 12) | 24705 (phy_a9.pga[core] << 8) | 24706 (txgains->gains.pad[core] << 3) | 24707 (phy_a9.ipa[core])); 24708 else 24709 phy_a5 = ((phy_a9.txlpf[core] << 15) | 24710 (phy_a9.txgm[core] << 12) | 24711 (txgains->gains.pga[core] << 8) | 24712 (phy_a9.pad[core] << 3) | (phy_a9.ipa[core])); 24713 24714 wlc_phy_rfctrl_override_1tomany_nphy( 24715 pi, 24716 NPHY_REV7_RfctrlOverride_cmd_txgain, 24717 phy_a5, (1 << core), 0); 24718 24719 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24720 if ((pi->pubpi.radiorev <= 4) 24721 || (pi->pubpi.radiorev == 6)) 24722 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24723 60 : 79; 24724 else 24725 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 24726 45 : 64; 24727 } else { 24728 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24729 } 24730 24731 m[phy_a7] = 0; 24732 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24733 24734 phy_a2 = 63; 24735 24736 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24737 if ((pi->pubpi.radiorev == 4) 24738 || (pi->pubpi.radiorev == 6)) { 24739 phy_a1 = 30; 24740 phy_a3 = 30; 24741 } else { 24742 phy_a1 = 25; 24743 phy_a3 = 25; 24744 } 24745 } else { 24746 if ((pi->pubpi.radiorev == 5) 24747 || (pi->pubpi.radiorev == 7) 24748 || (pi->pubpi.radiorev == 8)) { 24749 phy_a1 = 25; 24750 phy_a3 = 25; 24751 } else { 24752 phy_a1 = 35; 24753 phy_a3 = 35; 24754 } 24755 } 24756 24757 if (cal_mode == CAL_GCTRL) { 24758 if ((pi->pubpi.radiorev == 5) 24759 && (CHSPEC_IS2G(pi->radio_chanspec))) 24760 phy_a1 = 55; 24761 else if (((pi->pubpi.radiorev == 7) && 24762 (CHSPEC_IS2G(pi->radio_chanspec))) || 24763 ((pi->pubpi.radiorev == 8) && 24764 (CHSPEC_IS2G(pi->radio_chanspec)))) 24765 phy_a1 = 60; 24766 else 24767 phy_a1 = 63; 24768 24769 } else if ((cal_mode != CAL_FULL) && (cal_mode != CAL_SOFT)) { 24770 24771 phy_a1 = 35; 24772 phy_a3 = 35; 24773 } 24774 24775 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24776 0x29b, (0x1 << 0), (1) << 0); 24777 24778 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 24779 0x29b, (0x1 << 0), (0) << 0); 24780 24781 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24782 0x2a4, (0x1 << 13), (1) << 13); 24783 24784 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24785 0x2a4, (0x1 << 13), (0) << 13); 24786 24787 write_phy_reg(pi, 0x2a1, 0x80); 24788 write_phy_reg(pi, 0x2a2, 0x100); 24789 24790 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24791 0x2a4, (0x7 << 4), (11) << 4); 24792 24793 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24794 0x2a4, (0x7 << 8), (11) << 8); 24795 24796 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24797 0x2a4, (0x7 << 0), (0x3) << 0); 24798 24799 write_phy_reg(pi, 0x2e5, 0x20); 24800 24801 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 24802 24803 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 24804 24805 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 24806 24807 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24808 1, ((core == 0) ? 1 : 2), 0, 24809 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24810 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24811 0, ((core == 0) ? 2 : 1), 0, 24812 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24813 24814 write_phy_reg(pi, 0x2be, 1); 24815 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 24816 24817 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 24818 0, 0x3, 0, 24819 NPHY_REV7_RFCTRLOVERRIDE_ID0); 24820 24821 wlc_phy_table_write_nphy(pi, 24822 (core == 24823 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 24824 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 24825 32, &phy_a8); 24826 24827 if (cal_mode != CAL_GCTRL) { 24828 if (CHSPEC_IS5G(pi->radio_chanspec)) 24829 wlc_phy_a1_nphy(pi, core, 5, 0, 35); 24830 } 24831 24832 wlc_phy_rfctrl_override_1tomany_nphy( 24833 pi, 24834 NPHY_REV7_RfctrlOverride_cmd_txgain, 24835 phy_a5, (1 << core), 1); 24836 24837 } else { 24838 24839 if (txgains) { 24840 if (txgains->useindex) { 24841 phy_a4 = 15 - ((txgains->index) >> 3); 24842 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24843 if (NREV_GE(pi->pubpi.phy_rev, 6) && 24844 pi->sh->chip == BCMA_CHIP_ID_BCM47162) { 24845 phy_a5 = 0x10f7 | (phy_a4 << 8); 24846 } else if (NREV_GE(pi->pubpi.phy_rev, 6)) { 24847 phy_a5 = 0x00f7 | (phy_a4 << 8); 24848 } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { 24849 phy_a5 = 0x10f7 | (phy_a4 << 8); 24850 } else { 24851 phy_a5 = 0x50f7 | (phy_a4 << 8); 24852 } 24853 } else { 24854 phy_a5 = 0x70f7 | (phy_a4 << 8); 24855 } 24856 wlc_phy_rfctrl_override_nphy(pi, 24857 (0x1 << 13), 24858 phy_a5, 24859 (1 << core), 0); 24860 } else { 24861 wlc_phy_rfctrl_override_nphy(pi, 24862 (0x1 << 13), 24863 0x5bf7, 24864 (1 << core), 0); 24865 } 24866 } 24867 24868 if (CHSPEC_IS2G(pi->radio_chanspec)) 24869 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 45 : 64; 24870 else 24871 m[core] = (pi->bw == WL_CHANSPEC_BW_40) ? 75 : 107; 24872 24873 m[phy_a7] = 0; 24874 wlc_phy_ipa_set_bbmult_nphy(pi, m[0], m[1]); 24875 24876 phy_a2 = 63; 24877 24878 if (cal_mode == CAL_FULL) { 24879 phy_a1 = 25; 24880 phy_a3 = 25; 24881 } else if (cal_mode == CAL_SOFT) { 24882 phy_a1 = 25; 24883 phy_a3 = 25; 24884 } else if (cal_mode == CAL_GCTRL) { 24885 phy_a1 = 63; 24886 phy_a3 = 25; 24887 } else { 24888 24889 phy_a1 = 25; 24890 phy_a3 = 25; 24891 } 24892 24893 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 24894 0x29b, (0x1 << 0), (1) << 0); 24895 24896 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x297 : 24897 0x29b, (0x1 << 0), (0) << 0); 24898 24899 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 24900 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24901 0x2a4, (0x1 << 13), (1) << 13); 24902 24903 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24904 0x2a4, (0x1 << 13), (0) << 13); 24905 24906 write_phy_reg(pi, 0x2a1, 0x20); 24907 write_phy_reg(pi, 0x2a2, 0x60); 24908 24909 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24910 0x2a4, (0xf << 4), (9) << 4); 24911 24912 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24913 0x2a4, (0xf << 8), (9) << 8); 24914 24915 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24916 0x2a4, (0xf << 0), (0x2) << 0); 24917 24918 write_phy_reg(pi, 0x2e5, 0x20); 24919 } else { 24920 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24921 0x2a4, (0x1 << 11), (1) << 11); 24922 24923 mod_phy_reg(pi, (phy_a7 == PHY_CORE_0) ? 0x2a3 : 24924 0x2a4, (0x1 << 11), (0) << 11); 24925 24926 write_phy_reg(pi, 0x2a1, 0x80); 24927 write_phy_reg(pi, 0x2a2, 0x600); 24928 24929 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24930 0x2a4, (0x7 << 4), (0) << 4); 24931 24932 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24933 0x2a4, (0x7 << 8), (0) << 8); 24934 24935 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x2a3 : 24936 0x2a4, (0x7 << 0), (0x3) << 0); 24937 24938 mod_phy_reg(pi, 0x2a0, (0x3f << 8), (0x20) << 8); 24939 24940 } 24941 24942 mod_phy_reg(pi, 0x2a0, (0x3f << 0), (phy_a3) << 0); 24943 24944 mod_phy_reg(pi, 0x29f, (0x3f << 0), (phy_a1) << 0); 24945 24946 mod_phy_reg(pi, 0x29f, (0x3f << 8), (phy_a2) << 8); 24947 24948 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 1, 0x3, 0); 24949 24950 write_phy_reg(pi, 0x2be, 1); 24951 SPINWAIT(read_phy_reg(pi, 0x2be), 10 * 1000 * 1000); 24952 24953 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 0x3, 0); 24954 24955 wlc_phy_table_write_nphy(pi, 24956 (core == 24957 PHY_CORE_0) ? NPHY_TBL_ID_EPSILONTBL0 24958 : NPHY_TBL_ID_EPSILONTBL1, 1, phy_a3, 24959 32, &phy_a8); 24960 24961 if (cal_mode != CAL_GCTRL) 24962 wlc_phy_a1_nphy(pi, core, 5, 0, 40); 24963 } 24964} 24965 24966static u8 wlc_phy_a3_nphy(struct brcms_phy *pi, u8 start_gain, u8 core) 24967{ 24968 int phy_a1; 24969 int phy_a2; 24970 bool phy_a3; 24971 struct nphy_ipa_txcalgains phy_a4; 24972 bool phy_a5 = false; 24973 bool phy_a6 = true; 24974 s32 phy_a7, phy_a8; 24975 u32 phy_a9; 24976 int phy_a10; 24977 int phy_a12; 24978 u8 phy_a13 = 0; 24979 u8 phy_a14; 24980 u8 *phy_a15 = NULL; 24981 24982 phy_a4.useindex = true; 24983 phy_a12 = start_gain; 24984 24985 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 24986 24987 phy_a2 = 20; 24988 phy_a1 = 1; 24989 24990 if (CHSPEC_IS2G(pi->radio_chanspec)) { 24991 if (pi->pubpi.radiorev == 5) { 24992 24993 phy_a15 = pad_gain_codes_used_2057rev5; 24994 phy_a13 = 24995 ARRAY_SIZE(pad_gain_codes_used_2057rev5) - 1; 24996 24997 } else if ((pi->pubpi.radiorev == 7) 24998 || (pi->pubpi.radiorev == 8)) { 24999 25000 phy_a15 = pad_gain_codes_used_2057rev7; 25001 phy_a13 = 25002 ARRAY_SIZE(pad_gain_codes_used_2057rev7) - 1; 25003 25004 } else { 25005 25006 phy_a15 = pad_all_gain_codes_2057; 25007 phy_a13 = ARRAY_SIZE(pad_all_gain_codes_2057) - 25008 1; 25009 } 25010 25011 } else { 25012 25013 phy_a15 = pga_all_gain_codes_2057; 25014 phy_a13 = ARRAY_SIZE(pga_all_gain_codes_2057) - 1; 25015 } 25016 25017 phy_a14 = 0; 25018 25019 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25020 if (CHSPEC_IS2G(pi->radio_chanspec)) 25021 phy_a4.gains.pad[core] = 25022 (u16) phy_a15[phy_a12]; 25023 else 25024 phy_a4.gains.pga[core] = 25025 (u16) phy_a15[phy_a12]; 25026 25027 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25028 25029 wlc_phy_table_read_nphy(pi, 25030 (core == 25031 PHY_CORE_0 ? 25032 NPHY_TBL_ID_EPSILONTBL0 : 25033 NPHY_TBL_ID_EPSILONTBL1), 1, 25034 63, 32, &phy_a9); 25035 25036 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25037 25038 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25039 (phy_a8 == 4095) || (phy_a8 == -4096)); 25040 25041 if (!phy_a6 && (phy_a3 != phy_a5)) { 25042 if (!phy_a3) 25043 phy_a12 -= (u8) phy_a1; 25044 break; 25045 } 25046 25047 if (phy_a3) 25048 phy_a12 += (u8) phy_a1; 25049 else 25050 phy_a12 -= (u8) phy_a1; 25051 25052 if ((phy_a12 < phy_a14) || (phy_a12 > phy_a13)) { 25053 if (phy_a12 < phy_a14) 25054 phy_a12 = phy_a14; 25055 else 25056 phy_a12 = phy_a13; 25057 break; 25058 } 25059 25060 phy_a6 = false; 25061 phy_a5 = phy_a3; 25062 } 25063 25064 } else { 25065 phy_a2 = 10; 25066 phy_a1 = 8; 25067 for (phy_a10 = 0; phy_a10 < phy_a2; phy_a10++) { 25068 phy_a4.index = (u8) phy_a12; 25069 wlc_phy_a2_nphy(pi, &phy_a4, CAL_GCTRL, core); 25070 25071 wlc_phy_table_read_nphy(pi, 25072 (core == 25073 PHY_CORE_0 ? 25074 NPHY_TBL_ID_EPSILONTBL0 : 25075 NPHY_TBL_ID_EPSILONTBL1), 1, 25076 63, 32, &phy_a9); 25077 25078 wlc_phy_papd_decode_epsilon(phy_a9, &phy_a7, &phy_a8); 25079 25080 phy_a3 = ((phy_a7 == 4095) || (phy_a7 == -4096) || 25081 (phy_a8 == 4095) || (phy_a8 == -4096)); 25082 25083 if (!phy_a6 && (phy_a3 != phy_a5)) { 25084 if (!phy_a3) 25085 phy_a12 -= (u8) phy_a1; 25086 break; 25087 } 25088 25089 if (phy_a3) 25090 phy_a12 += (u8) phy_a1; 25091 else 25092 phy_a12 -= (u8) phy_a1; 25093 25094 if ((phy_a12 < 0) || (phy_a12 > 127)) { 25095 if (phy_a12 < 0) 25096 phy_a12 = 0; 25097 else 25098 phy_a12 = 127; 25099 break; 25100 } 25101 25102 phy_a6 = false; 25103 phy_a5 = phy_a3; 25104 } 25105 25106 } 25107 25108 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25109 return (u8) phy_a15[phy_a12]; 25110 else 25111 return (u8) phy_a12; 25112 25113} 25114 25115static void wlc_phy_a4(struct brcms_phy *pi, bool full_cal) 25116{ 25117 struct nphy_ipa_txcalgains phy_b1[2]; 25118 struct nphy_papd_restore_state phy_b2; 25119 bool phy_b3; 25120 u8 phy_b4; 25121 u8 phy_b5; 25122 s16 phy_b6, phy_b7, phy_b8; 25123 u16 phy_b9; 25124 s16 phy_b10, phy_b11, phy_b12; 25125 25126 phy_b11 = 0; 25127 phy_b12 = 0; 25128 phy_b7 = 0; 25129 phy_b8 = 0; 25130 phy_b6 = 0; 25131 25132 if (pi->nphy_papd_skip == 1) 25133 return; 25134 25135 phy_b3 = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & 25136 MCTL_EN_MAC)); 25137 if (!phy_b3) 25138 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25139 25140 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25141 25142 pi->nphy_force_papd_cal = false; 25143 25144 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) 25145 pi->nphy_papd_tx_gain_at_last_cal[phy_b5] = 25146 wlc_phy_txpwr_idx_cur_get_nphy(pi, phy_b5); 25147 25148 pi->nphy_papd_last_cal = pi->sh->now; 25149 pi->nphy_papd_recal_counter++; 25150 25151 phy_b4 = pi->nphy_txpwrctrl; 25152 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25153 25154 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL0, 64, 0, 32, 25155 nphy_papd_scaltbl); 25156 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_SCALARTBL1, 64, 0, 32, 25157 nphy_papd_scaltbl); 25158 25159 phy_b9 = read_phy_reg(pi, 0x01); 25160 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 25161 25162 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25163 s32 i, val = 0; 25164 for (i = 0; i < 64; i++) 25165 wlc_phy_table_write_nphy(pi, 25166 ((phy_b5 == 25167 PHY_CORE_0) ? 25168 NPHY_TBL_ID_EPSILONTBL0 : 25169 NPHY_TBL_ID_EPSILONTBL1), 1, 25170 i, 32, &val); 25171 } 25172 25173 wlc_phy_ipa_restore_tx_digi_filts_nphy(pi); 25174 25175 phy_b2.mm = wlc_phy_ipa_get_bbmult_nphy(pi); 25176 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25177 wlc_phy_papd_cal_setup_nphy(pi, &phy_b2, phy_b5); 25178 25179 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25180 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25181 if ((pi->pubpi.radiorev == 3) 25182 || (pi->pubpi.radiorev == 4) 25183 || (pi->pubpi.radiorev == 6)) { 25184 pi->nphy_papd_cal_gain_index[phy_b5] = 25185 23; 25186 } else if (pi->pubpi.radiorev == 5) { 25187 pi->nphy_papd_cal_gain_index[phy_b5] = 25188 0; 25189 pi->nphy_papd_cal_gain_index[phy_b5] = 25190 wlc_phy_a3_nphy( 25191 pi, 25192 pi-> 25193 nphy_papd_cal_gain_index 25194 [phy_b5], 25195 phy_b5); 25196 25197 } else if ((pi->pubpi.radiorev == 7) 25198 || (pi->pubpi.radiorev == 8)) { 25199 25200 pi->nphy_papd_cal_gain_index[phy_b5] = 25201 0; 25202 pi->nphy_papd_cal_gain_index[phy_b5] = 25203 wlc_phy_a3_nphy( 25204 pi, 25205 pi-> 25206 nphy_papd_cal_gain_index 25207 [phy_b5], 25208 phy_b5); 25209 25210 } 25211 25212 phy_b1[phy_b5].gains.pad[phy_b5] = 25213 pi->nphy_papd_cal_gain_index[phy_b5]; 25214 25215 } else { 25216 pi->nphy_papd_cal_gain_index[phy_b5] = 0; 25217 pi->nphy_papd_cal_gain_index[phy_b5] = 25218 wlc_phy_a3_nphy( 25219 pi, 25220 pi-> 25221 nphy_papd_cal_gain_index 25222 [phy_b5], phy_b5); 25223 phy_b1[phy_b5].gains.pga[phy_b5] = 25224 pi->nphy_papd_cal_gain_index[phy_b5]; 25225 } 25226 } else { 25227 phy_b1[phy_b5].useindex = true; 25228 phy_b1[phy_b5].index = 16; 25229 phy_b1[phy_b5].index = 25230 wlc_phy_a3_nphy(pi, phy_b1[phy_b5].index, 25231 phy_b5); 25232 25233 pi->nphy_papd_cal_gain_index[phy_b5] = 25234 15 - ((phy_b1[phy_b5].index) >> 3); 25235 } 25236 25237 switch (pi->nphy_papd_cal_type) { 25238 case 0: 25239 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_FULL, phy_b5); 25240 break; 25241 case 1: 25242 wlc_phy_a2_nphy(pi, &phy_b1[phy_b5], CAL_SOFT, phy_b5); 25243 break; 25244 } 25245 25246 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25247 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25248 } 25249 25250 if (NREV_LT(pi->pubpi.phy_rev, 7)) 25251 wlc_phy_papd_cal_cleanup_nphy(pi, &phy_b2); 25252 25253 for (phy_b5 = 0; phy_b5 < pi->pubpi.phy_corenum; phy_b5++) { 25254 int eps_offset = 0; 25255 25256 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 25257 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25258 if (pi->pubpi.radiorev == 3) 25259 eps_offset = -2; 25260 else if (pi->pubpi.radiorev == 5) 25261 eps_offset = 3; 25262 else 25263 eps_offset = -1; 25264 } else { 25265 eps_offset = 2; 25266 } 25267 25268 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25269 phy_b8 = phy_b1[phy_b5].gains.pad[phy_b5]; 25270 phy_b10 = 0; 25271 if ((pi->pubpi.radiorev == 3) || 25272 (pi->pubpi.radiorev == 4) || 25273 (pi->pubpi.radiorev == 6)) { 25274 phy_b12 = -( 25275 nphy_papd_padgain_dlt_2g_2057rev3n4 25276 [phy_b8] + 1) / 2; 25277 phy_b10 = -1; 25278 } else if (pi->pubpi.radiorev == 5) { 25279 phy_b12 = -( 25280 nphy_papd_padgain_dlt_2g_2057rev5 25281 [phy_b8] + 1) / 2; 25282 } else if ((pi->pubpi.radiorev == 7) || 25283 (pi->pubpi.radiorev == 8)) { 25284 phy_b12 = -( 25285 nphy_papd_padgain_dlt_2g_2057rev7 25286 [phy_b8] + 1) / 2; 25287 } 25288 } else { 25289 phy_b7 = phy_b1[phy_b5].gains.pga[phy_b5]; 25290 if ((pi->pubpi.radiorev == 3) || 25291 (pi->pubpi.radiorev == 4) || 25292 (pi->pubpi.radiorev == 6)) 25293 phy_b11 = 25294 -(nphy_papd_pgagain_dlt_5g_2057 25295 [phy_b7] 25296 + 1) / 2; 25297 else if ((pi->pubpi.radiorev == 7) 25298 || (pi->pubpi.radiorev == 8)) 25299 phy_b11 = -( 25300 nphy_papd_pgagain_dlt_5g_2057rev7 25301 [phy_b7] + 1) / 2; 25302 25303 phy_b10 = -9; 25304 } 25305 25306 if (CHSPEC_IS2G(pi->radio_chanspec)) 25307 phy_b6 = 25308 -60 + 27 + eps_offset + phy_b12 + 25309 phy_b10; 25310 else 25311 phy_b6 = 25312 -60 + 27 + eps_offset + phy_b11 + 25313 phy_b10; 25314 25315 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25316 0x29c, (0x1ff << 7), (phy_b6) << 7); 25317 25318 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25319 } else { 25320 if (NREV_LT(pi->pubpi.phy_rev, 5)) 25321 eps_offset = 4; 25322 else 25323 eps_offset = 2; 25324 25325 phy_b7 = 15 - ((phy_b1[phy_b5].index) >> 3); 25326 25327 if (CHSPEC_IS2G(pi->radio_chanspec)) { 25328 phy_b11 = 25329 -(nphy_papd_pga_gain_delta_ipa_2g[ 25330 phy_b7] + 25331 1) / 2; 25332 phy_b10 = 0; 25333 } else { 25334 phy_b11 = 25335 -(nphy_papd_pga_gain_delta_ipa_5g[ 25336 phy_b7] + 25337 1) / 2; 25338 phy_b10 = -9; 25339 } 25340 25341 phy_b6 = -60 + 27 + eps_offset + phy_b11 + phy_b10; 25342 25343 mod_phy_reg(pi, (phy_b5 == PHY_CORE_0) ? 0x298 : 25344 0x29c, (0x1ff << 7), (phy_b6) << 7); 25345 25346 pi->nphy_papd_epsilon_offset[phy_b5] = phy_b6; 25347 } 25348 } 25349 25350 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 25351 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25352 25353 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 25354 0x29b, (0x1 << 0), (NPHY_PAPD_COMP_ON) << 0); 25355 25356 if (NREV_GE(pi->pubpi.phy_rev, 6)) { 25357 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25358 0x2a4, (0x1 << 13), (0) << 13); 25359 25360 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25361 0x2a4, (0x1 << 13), (0) << 13); 25362 25363 } else { 25364 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x2a3 : 25365 0x2a4, (0x1 << 11), (0) << 11); 25366 25367 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x2a3 : 25368 0x2a4, (0x1 << 11), (0) << 11); 25369 25370 } 25371 pi->nphy_papdcomp = NPHY_PAPD_COMP_ON; 25372 25373 write_phy_reg(pi, 0x01, phy_b9); 25374 25375 wlc_phy_ipa_set_tx_digi_filts_nphy(pi); 25376 25377 wlc_phy_txpwrctrl_enable_nphy(pi, phy_b4); 25378 if (phy_b4 == PHY_TPC_HW_OFF) { 25379 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25380 (s8) (pi->nphy_txpwrindex[0]. 25381 index_internal), false); 25382 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25383 (s8) (pi->nphy_txpwrindex[1]. 25384 index_internal), false); 25385 } 25386 25387 wlc_phy_stay_in_carriersearch_nphy(pi, false); 25388 25389 if (!phy_b3) 25390 wlapi_enable_mac(pi->sh->physhim); 25391} 25392 25393void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype) 25394{ 25395 struct nphy_txgains target_gain; 25396 u8 tx_pwr_ctrl_state; 25397 bool fullcal = true; 25398 bool restore_tx_gain = false; 25399 bool mphase; 25400 25401 if (PHY_MUTED(pi)) 25402 return; 25403 25404 if (caltype == PHY_PERICAL_AUTO) 25405 fullcal = (pi->radio_chanspec != pi->nphy_txiqlocal_chanspec); 25406 else if (caltype == PHY_PERICAL_PARTIAL) 25407 fullcal = false; 25408 25409 if (pi->cal_type_override != PHY_PERICAL_AUTO) 25410 fullcal = 25411 (pi->cal_type_override == 25412 PHY_PERICAL_FULL) ? true : false; 25413 25414 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_INIT) { 25415 if (pi->nphy_txiqlocal_chanspec != pi->radio_chanspec) 25416 wlc_phy_cal_perical_mphase_restart(pi); 25417 } 25418 25419 if (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_RXCAL) 25420 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); 25421 25422 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25423 25424 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25425 25426 if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || 25427 (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { 25428 pi->nphy_cal_orig_pwr_idx[0] = 25429 (u8) ((read_phy_reg(pi, 0x1ed) >> 8) & 0x7f); 25430 pi->nphy_cal_orig_pwr_idx[1] = 25431 (u8) ((read_phy_reg(pi, 0x1ee) >> 8) & 0x7f); 25432 25433 if (pi->nphy_txpwrctrl != PHY_TPC_HW_OFF) { 25434 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 25435 0x110, 16, 25436 pi->nphy_cal_orig_tx_gain); 25437 } else { 25438 pi->nphy_cal_orig_tx_gain[0] = 0; 25439 pi->nphy_cal_orig_tx_gain[1] = 0; 25440 } 25441 } 25442 target_gain = wlc_phy_get_tx_gain_nphy(pi); 25443 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 25444 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 25445 25446 if (pi->antsel_type == ANTSEL_2x3) 25447 wlc_phy_antsel_init((struct brcms_phy_pub *) pi, true); 25448 25449 mphase = (pi->mphase_cal_phase_id != MPHASE_CAL_STATE_IDLE); 25450 if (!mphase) { 25451 25452 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25453 wlc_phy_precal_txgain_nphy(pi); 25454 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25455 restore_tx_gain = true; 25456 25457 target_gain = pi->nphy_cal_target_gain; 25458 } 25459 if (0 == 25460 wlc_phy_cal_txiqlo_nphy(pi, target_gain, fullcal, 25461 mphase)) { 25462 if (PHY_IPA(pi)) 25463 wlc_phy_a4(pi, true); 25464 25465 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25466 wlapi_enable_mac(pi->sh->physhim); 25467 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 25468 10000); 25469 wlapi_suspend_mac_and_wait(pi->sh->physhim); 25470 wlc_phyreg_enter((struct brcms_phy_pub *) pi); 25471 25472 if (0 == wlc_phy_cal_rxiq_nphy(pi, target_gain, 25473 (pi->first_cal_after_assoc || 25474 (pi->cal_type_override == 25475 PHY_PERICAL_FULL)) ? 2 : 0, false)) { 25476 wlc_phy_savecal_nphy(pi); 25477 25478 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25479 25480 pi->nphy_perical_last = pi->sh->now; 25481 } 25482 } 25483 if (caltype != PHY_PERICAL_AUTO) 25484 wlc_phy_rssi_cal_nphy(pi); 25485 25486 if (pi->first_cal_after_assoc 25487 || (pi->cal_type_override == PHY_PERICAL_FULL)) { 25488 pi->first_cal_after_assoc = false; 25489 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25490 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25491 } 25492 25493 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25494 wlc_phy_radio205x_vcocal_nphy(pi); 25495 } else { 25496 switch (pi->mphase_cal_phase_id) { 25497 case MPHASE_CAL_STATE_INIT: 25498 pi->nphy_perical_last = pi->sh->now; 25499 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 25500 25501 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25502 wlc_phy_precal_txgain_nphy(pi); 25503 25504 pi->nphy_cal_target_gain = wlc_phy_get_tx_gain_nphy(pi); 25505 pi->mphase_cal_phase_id++; 25506 break; 25507 25508 case MPHASE_CAL_STATE_TXPHASE0: 25509 case MPHASE_CAL_STATE_TXPHASE1: 25510 case MPHASE_CAL_STATE_TXPHASE2: 25511 case MPHASE_CAL_STATE_TXPHASE3: 25512 case MPHASE_CAL_STATE_TXPHASE4: 25513 case MPHASE_CAL_STATE_TXPHASE5: 25514 if ((pi->radar_percal_mask & 0x10) != 0) 25515 pi->nphy_rxcal_active = true; 25516 25517 if (wlc_phy_cal_txiqlo_nphy 25518 (pi, pi->nphy_cal_target_gain, fullcal, 25519 true) != 0) { 25520 25521 wlc_phy_cal_perical_mphase_reset(pi); 25522 break; 25523 } 25524 25525 if (NREV_LE(pi->pubpi.phy_rev, 2) && 25526 (pi->mphase_cal_phase_id == 25527 MPHASE_CAL_STATE_TXPHASE4)) 25528 pi->mphase_cal_phase_id += 2; 25529 else 25530 pi->mphase_cal_phase_id++; 25531 break; 25532 25533 case MPHASE_CAL_STATE_PAPDCAL: 25534 if ((pi->radar_percal_mask & 0x2) != 0) 25535 pi->nphy_rxcal_active = true; 25536 25537 if (PHY_IPA(pi)) 25538 wlc_phy_a4(pi, true); 25539 25540 pi->mphase_cal_phase_id++; 25541 break; 25542 25543 case MPHASE_CAL_STATE_RXCAL: 25544 if ((pi->radar_percal_mask & 0x1) != 0) 25545 pi->nphy_rxcal_active = true; 25546 if (wlc_phy_cal_rxiq_nphy(pi, target_gain, 25547 (pi->first_cal_after_assoc || 25548 (pi->cal_type_override == 25549 PHY_PERICAL_FULL)) ? 2 : 0, 25550 false) == 0) 25551 wlc_phy_savecal_nphy(pi); 25552 25553 pi->mphase_cal_phase_id++; 25554 break; 25555 25556 case MPHASE_CAL_STATE_RSSICAL: 25557 if ((pi->radar_percal_mask & 0x4) != 0) 25558 pi->nphy_rxcal_active = true; 25559 wlc_phy_txpwrctrl_coeff_setup_nphy(pi); 25560 wlc_phy_rssi_cal_nphy(pi); 25561 25562 if (NREV_GE(pi->pubpi.phy_rev, 3)) 25563 wlc_phy_radio205x_vcocal_nphy(pi); 25564 25565 restore_tx_gain = true; 25566 25567 if (pi->first_cal_after_assoc) 25568 pi->mphase_cal_phase_id++; 25569 else 25570 wlc_phy_cal_perical_mphase_reset(pi); 25571 25572 break; 25573 25574 case MPHASE_CAL_STATE_IDLETSSI: 25575 if ((pi->radar_percal_mask & 0x8) != 0) 25576 pi->nphy_rxcal_active = true; 25577 25578 if (pi->first_cal_after_assoc) { 25579 pi->first_cal_after_assoc = false; 25580 wlc_phy_txpwrctrl_idle_tssi_nphy(pi); 25581 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 25582 } 25583 25584 wlc_phy_cal_perical_mphase_reset(pi); 25585 break; 25586 25587 default: 25588 wlc_phy_cal_perical_mphase_reset(pi); 25589 break; 25590 } 25591 } 25592 25593 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25594 if (restore_tx_gain) { 25595 if (tx_pwr_ctrl_state != PHY_TPC_HW_OFF) { 25596 25597 wlc_phy_txpwr_index_nphy(pi, 1, 25598 pi-> 25599 nphy_cal_orig_pwr_idx 25600 [0], false); 25601 wlc_phy_txpwr_index_nphy(pi, 2, 25602 pi-> 25603 nphy_cal_orig_pwr_idx 25604 [1], false); 25605 25606 pi->nphy_txpwrindex[0].index = -1; 25607 pi->nphy_txpwrindex[1].index = -1; 25608 } else { 25609 wlc_phy_txpwr_index_nphy(pi, (1 << 0), 25610 (s8) (pi-> 25611 nphy_txpwrindex 25612 [0]. 25613 index_internal), 25614 false); 25615 wlc_phy_txpwr_index_nphy(pi, (1 << 1), 25616 (s8) (pi-> 25617 nphy_txpwrindex 25618 [1]. 25619 index_internal), 25620 false); 25621 } 25622 } 25623 } 25624 25625 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 25626 wlc_phyreg_exit((struct brcms_phy_pub *) pi); 25627 wlapi_enable_mac(pi->sh->physhim); 25628} 25629 25630int 25631wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 25632 bool fullcal, bool mphase) 25633{ 25634 u16 val; 25635 u16 tbl_buf[11]; 25636 u8 cal_cnt; 25637 u16 cal_cmd; 25638 u8 num_cals, max_cal_cmds; 25639 u16 core_no, cal_type; 25640 u16 diq_start = 0; 25641 u8 phy_bw; 25642 u16 max_val; 25643 u16 tone_freq; 25644 u16 gain_save[2]; 25645 u16 cal_gain[2]; 25646 struct nphy_iqcal_params cal_params[2]; 25647 u32 tbl_len; 25648 const void *tbl_ptr; 25649 bool ladder_updated[2]; 25650 u8 mphase_cal_lastphase = 0; 25651 int bcmerror = 0; 25652 bool phyhang_avoid_state = false; 25653 25654 static const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = { 25655 0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901, 25656 0x1902, 25657 0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607, 25658 0x6407 25659 }; 25660 25661 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = { 25662 0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400, 25663 0x3200, 25664 0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406, 25665 0x6407 25666 }; 25667 25668 static const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = { 25669 0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201, 25670 0x1202, 25671 0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207, 25672 0x4707 25673 }; 25674 25675 static const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = { 25676 0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900, 25677 0x2300, 25678 0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706, 25679 0x4707 25680 }; 25681 25682 static const u16 tbl_tx_iqlo_cal_startcoefs[] = { 25683 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25684 0x0000 25685 }; 25686 25687 static const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = { 25688 0x8123, 0x8264, 0x8086, 0x8245, 0x8056, 25689 0x9123, 0x9264, 0x9086, 0x9245, 0x9056 25690 }; 25691 25692 static const u16 tbl_tx_iqlo_cal_cmds_recal[] = { 25693 0x8101, 0x8253, 0x8053, 0x8234, 0x8034, 25694 0x9101, 0x9253, 0x9053, 0x9234, 0x9034 25695 }; 25696 25697 static const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = { 25698 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25699 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 25700 0x0000 25701 }; 25702 25703 static const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = { 25704 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234, 25705 0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234 25706 }; 25707 25708 static const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = { 25709 0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223, 25710 0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223 25711 }; 25712 25713 wlc_phy_stay_in_carriersearch_nphy(pi, true); 25714 25715 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 25716 phyhang_avoid_state = pi->phyhang_avoid; 25717 pi->phyhang_avoid = false; 25718 } 25719 25720 if (CHSPEC_IS40(pi->radio_chanspec)) 25721 phy_bw = 40; 25722 else 25723 phy_bw = 20; 25724 25725 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 25726 25727 for (core_no = 0; core_no <= 1; core_no++) { 25728 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 25729 &cal_params[core_no]); 25730 cal_gain[core_no] = cal_params[core_no].cal_gain; 25731 } 25732 25733 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 25734 25735 wlc_phy_txcal_radio_setup_nphy(pi); 25736 25737 wlc_phy_txcal_physetup_nphy(pi); 25738 25739 ladder_updated[0] = ladder_updated[1] = false; 25740 if (!(NREV_GE(pi->pubpi.phy_rev, 6) || 25741 (NREV_IS(pi->pubpi.phy_rev, 5) && PHY_IPA(pi) 25742 && (CHSPEC_IS2G(pi->radio_chanspec))))) { 25743 25744 if (phy_bw == 40) { 25745 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_40; 25746 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_40); 25747 } else { 25748 tbl_ptr = tbl_tx_iqlo_cal_loft_ladder_20; 25749 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_loft_ladder_20); 25750 } 25751 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 0, 25752 16, tbl_ptr); 25753 25754 if (phy_bw == 40) { 25755 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_40; 25756 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_40); 25757 } else { 25758 tbl_ptr = tbl_tx_iqlo_cal_iqimb_ladder_20; 25759 tbl_len = ARRAY_SIZE(tbl_tx_iqlo_cal_iqimb_ladder_20); 25760 } 25761 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 32, 25762 16, tbl_ptr); 25763 } 25764 25765 if (NREV_GE(pi->pubpi.phy_rev, 7)) 25766 write_phy_reg(pi, 0xc2, 0x8ad9); 25767 else 25768 write_phy_reg(pi, 0xc2, 0x8aa9); 25769 25770 max_val = 250; 25771 tone_freq = (phy_bw == 20) ? 2500 : 5000; 25772 25773 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25774 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 0, 1, 0, false); 25775 bcmerror = 0; 25776 } else { 25777 bcmerror = 25778 wlc_phy_tx_tone_nphy(pi, tone_freq, max_val, 1, 0, 25779 false); 25780 } 25781 25782 if (bcmerror == 0) { 25783 25784 if (pi->mphase_cal_phase_id > MPHASE_CAL_STATE_TXPHASE0) { 25785 tbl_ptr = pi->mphase_txcal_bestcoeffs; 25786 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 25787 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25788 tbl_len -= 2; 25789 } else { 25790 if ((!fullcal) && (pi->nphy_txiqlocal_coeffsvalid)) { 25791 25792 tbl_ptr = pi->nphy_txiqlocal_bestc; 25793 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 25794 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25795 tbl_len -= 2; 25796 } else { 25797 25798 fullcal = true; 25799 25800 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 25801 tbl_ptr = 25802 tbl_tx_iqlo_cal_startcoefs_nphyrev3; 25803 tbl_len = ARRAY_SIZE( 25804 tbl_tx_iqlo_cal_startcoefs_nphyrev3); 25805 } else { 25806 tbl_ptr = tbl_tx_iqlo_cal_startcoefs; 25807 tbl_len = ARRAY_SIZE( 25808 tbl_tx_iqlo_cal_startcoefs); 25809 } 25810 } 25811 } 25812 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, tbl_len, 64, 25813 16, tbl_ptr); 25814 25815 if (fullcal) { 25816 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25817 ARRAY_SIZE( 25818 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3) : 25819 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_fullcal); 25820 } else { 25821 max_cal_cmds = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25822 ARRAY_SIZE( 25823 tbl_tx_iqlo_cal_cmds_recal_nphyrev3) : 25824 ARRAY_SIZE(tbl_tx_iqlo_cal_cmds_recal); 25825 } 25826 25827 if (mphase) { 25828 cal_cnt = pi->mphase_txcal_cmdidx; 25829 if ((cal_cnt + pi->mphase_txcal_numcmds) < max_cal_cmds) 25830 num_cals = cal_cnt + pi->mphase_txcal_numcmds; 25831 else 25832 num_cals = max_cal_cmds; 25833 } else { 25834 cal_cnt = 0; 25835 num_cals = max_cal_cmds; 25836 } 25837 25838 for (; cal_cnt < num_cals; cal_cnt++) { 25839 25840 if (fullcal) { 25841 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25842 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3 25843 [cal_cnt] : 25844 tbl_tx_iqlo_cal_cmds_fullcal[cal_cnt]; 25845 } else { 25846 cal_cmd = (NREV_GE(pi->pubpi.phy_rev, 3)) ? 25847 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[ 25848 cal_cnt] 25849 : tbl_tx_iqlo_cal_cmds_recal[cal_cnt]; 25850 } 25851 25852 core_no = ((cal_cmd & 0x3000) >> 12); 25853 cal_type = ((cal_cmd & 0x0F00) >> 8); 25854 25855 if (NREV_GE(pi->pubpi.phy_rev, 6) || 25856 (NREV_IS(pi->pubpi.phy_rev, 5) && 25857 PHY_IPA(pi) 25858 && (CHSPEC_IS2G(pi->radio_chanspec)))) { 25859 if (!ladder_updated[core_no]) { 25860 wlc_phy_update_txcal_ladder_nphy( 25861 pi, 25862 core_no); 25863 ladder_updated[core_no] = true; 25864 } 25865 } 25866 25867 val = 25868 (cal_params[core_no]. 25869 ncorr[cal_type] << 8) | NPHY_N_GCTL; 25870 write_phy_reg(pi, 0xc1, val); 25871 25872 if ((cal_type == 1) || (cal_type == 3) 25873 || (cal_type == 4)) { 25874 25875 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25876 1, 69 + core_no, 16, 25877 tbl_buf); 25878 25879 diq_start = tbl_buf[0]; 25880 25881 tbl_buf[0] = 0; 25882 wlc_phy_table_write_nphy(pi, 25883 NPHY_TBL_ID_IQLOCAL, 1, 25884 69 + core_no, 16, 25885 tbl_buf); 25886 } 25887 25888 write_phy_reg(pi, 0xc0, cal_cmd); 25889 25890 SPINWAIT(((read_phy_reg(pi, 0xc0) & 0xc000) != 0), 25891 20000); 25892 if (WARN(read_phy_reg(pi, 0xc0) & 0xc000, 25893 "HW error: txiq calib")) 25894 return -EIO; 25895 25896 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25897 tbl_len, 96, 16, tbl_buf); 25898 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25899 tbl_len, 64, 16, tbl_buf); 25900 25901 if ((cal_type == 1) || (cal_type == 3) 25902 || (cal_type == 4)) { 25903 25904 tbl_buf[0] = diq_start; 25905 25906 } 25907 25908 } 25909 25910 if (mphase) { 25911 pi->mphase_txcal_cmdidx = num_cals; 25912 if (pi->mphase_txcal_cmdidx >= max_cal_cmds) 25913 pi->mphase_txcal_cmdidx = 0; 25914 } 25915 25916 mphase_cal_lastphase = 25917 (NREV_LE(pi->pubpi.phy_rev, 2)) ? 25918 MPHASE_CAL_STATE_TXPHASE4 : MPHASE_CAL_STATE_TXPHASE5; 25919 25920 if (!mphase 25921 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) { 25922 25923 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 96, 25924 16, tbl_buf); 25925 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 25926 16, tbl_buf); 25927 25928 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 25929 25930 tbl_buf[0] = 0; 25931 tbl_buf[1] = 0; 25932 tbl_buf[2] = 0; 25933 tbl_buf[3] = 0; 25934 25935 } 25936 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 25937 16, tbl_buf); 25938 25939 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 101, 25940 16, tbl_buf); 25941 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 25942 16, tbl_buf); 25943 25944 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 25945 16, tbl_buf); 25946 25947 tbl_len = ARRAY_SIZE(pi->nphy_txiqlocal_bestc); 25948 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25949 tbl_len -= 2; 25950 25951 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25952 tbl_len, 96, 16, 25953 pi->nphy_txiqlocal_bestc); 25954 25955 pi->nphy_txiqlocal_coeffsvalid = true; 25956 pi->nphy_txiqlocal_chanspec = pi->radio_chanspec; 25957 } else { 25958 tbl_len = ARRAY_SIZE(pi->mphase_txcal_bestcoeffs); 25959 if (NREV_LT(pi->pubpi.phy_rev, 3)) 25960 tbl_len -= 2; 25961 25962 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 25963 tbl_len, 96, 16, 25964 pi->mphase_txcal_bestcoeffs); 25965 } 25966 25967 wlc_phy_stopplayback_nphy(pi); 25968 25969 write_phy_reg(pi, 0xc2, 0x0000); 25970 25971 } 25972 25973 wlc_phy_txcal_phycleanup_nphy(pi); 25974 25975 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 25976 gain_save); 25977 25978 wlc_phy_txcal_radio_cleanup_nphy(pi); 25979 25980 if (NREV_LT(pi->pubpi.phy_rev, 2)) { 25981 if (!mphase 25982 || (pi->mphase_cal_phase_id == mphase_cal_lastphase)) 25983 wlc_phy_tx_iq_war_nphy(pi); 25984 } 25985 25986 if (NREV_GE(pi->pubpi.phy_rev, 4)) 25987 pi->phyhang_avoid = phyhang_avoid_state; 25988 25989 wlc_phy_stay_in_carriersearch_nphy(pi, false); 25990 25991 return bcmerror; 25992} 25993 25994static void wlc_phy_reapply_txcal_coeffs_nphy(struct brcms_phy *pi) 25995{ 25996 u16 tbl_buf[7]; 25997 25998 if ((pi->nphy_txiqlocal_chanspec == pi->radio_chanspec) && 25999 (pi->nphy_txiqlocal_coeffsvalid)) { 26000 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_IQLOCAL, 26001 ARRAY_SIZE(tbl_buf), 80, 16, tbl_buf); 26002 26003 if ((pi->nphy_txiqlocal_bestc[0] != tbl_buf[0]) || 26004 (pi->nphy_txiqlocal_bestc[1] != tbl_buf[1]) || 26005 (pi->nphy_txiqlocal_bestc[2] != tbl_buf[2]) || 26006 (pi->nphy_txiqlocal_bestc[3] != tbl_buf[3])) { 26007 26008 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 80, 26009 16, pi->nphy_txiqlocal_bestc); 26010 26011 tbl_buf[0] = 0; 26012 tbl_buf[1] = 0; 26013 tbl_buf[2] = 0; 26014 tbl_buf[3] = 0; 26015 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 4, 88, 26016 16, tbl_buf); 26017 26018 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 85, 26019 16, 26020 &pi->nphy_txiqlocal_bestc[5]); 26021 26022 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_IQLOCAL, 2, 93, 26023 16, 26024 &pi->nphy_txiqlocal_bestc[5]); 26025 } 26026 } 26027} 26028 26029void 26030wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write, 26031 struct nphy_iq_comp *pcomp) 26032{ 26033 if (write) { 26034 write_phy_reg(pi, 0x9a, pcomp->a0); 26035 write_phy_reg(pi, 0x9b, pcomp->b0); 26036 write_phy_reg(pi, 0x9c, pcomp->a1); 26037 write_phy_reg(pi, 0x9d, pcomp->b1); 26038 } else { 26039 pcomp->a0 = read_phy_reg(pi, 0x9a); 26040 pcomp->b0 = read_phy_reg(pi, 0x9b); 26041 pcomp->a1 = read_phy_reg(pi, 0x9c); 26042 pcomp->b1 = read_phy_reg(pi, 0x9d); 26043 } 26044} 26045 26046void 26047wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est, 26048 u16 num_samps, u8 wait_time, u8 wait_for_crs) 26049{ 26050 u8 core; 26051 26052 write_phy_reg(pi, 0x12b, num_samps); 26053 mod_phy_reg(pi, 0x12a, (0xff << 0), (wait_time << 0)); 26054 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqMode, 26055 (wait_for_crs) ? NPHY_IqestCmd_iqMode : 0); 26056 26057 mod_phy_reg(pi, 0x129, NPHY_IqestCmd_iqstart, NPHY_IqestCmd_iqstart); 26058 26059 SPINWAIT(((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) != 0), 26060 10000); 26061 if (WARN(read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart, 26062 "HW error: rxiq est")) 26063 return; 26064 26065 if ((read_phy_reg(pi, 0x129) & NPHY_IqestCmd_iqstart) == 0) { 26066 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 26067 est[core].i_pwr = 26068 (read_phy_reg(pi, 26069 NPHY_IqestipwrAccHi(core)) << 16) 26070 | read_phy_reg(pi, NPHY_IqestipwrAccLo(core)); 26071 est[core].q_pwr = 26072 (read_phy_reg(pi, 26073 NPHY_IqestqpwrAccHi(core)) << 16) 26074 | read_phy_reg(pi, NPHY_IqestqpwrAccLo(core)); 26075 est[core].iq_prod = 26076 (read_phy_reg(pi, 26077 NPHY_IqestIqAccHi(core)) << 16) | 26078 read_phy_reg(pi, NPHY_IqestIqAccLo(core)); 26079 } 26080 } 26081} 26082 26083#define CAL_RETRY_CNT 2 26084static void wlc_phy_calc_rx_iq_comp_nphy(struct brcms_phy *pi, u8 core_mask) 26085{ 26086 u8 curr_core; 26087 struct phy_iq_est est[PHY_CORE_MAX]; 26088 struct nphy_iq_comp old_comp, new_comp; 26089 s32 iq = 0; 26090 u32 ii = 0, qq = 0; 26091 s16 iq_nbits, qq_nbits, brsh, arsh; 26092 s32 a, b, temp; 26093 int bcmerror = 0; 26094 uint cal_retry = 0; 26095 26096 if (core_mask == 0x0) 26097 return; 26098 26099 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &old_comp); 26100 new_comp.a0 = new_comp.b0 = new_comp.a1 = new_comp.b1 = 0x0; 26101 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26102 26103cal_try: 26104 wlc_phy_rx_iq_est_nphy(pi, est, 0x4000, 32, 0); 26105 26106 new_comp = old_comp; 26107 26108 for (curr_core = 0; curr_core < pi->pubpi.phy_corenum; curr_core++) { 26109 26110 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26111 iq = est[curr_core].iq_prod; 26112 ii = est[curr_core].i_pwr; 26113 qq = est[curr_core].q_pwr; 26114 } else if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26115 iq = est[curr_core].iq_prod; 26116 ii = est[curr_core].i_pwr; 26117 qq = est[curr_core].q_pwr; 26118 } else { 26119 continue; 26120 } 26121 26122 if ((ii + qq) < NPHY_MIN_RXIQ_PWR) { 26123 bcmerror = -EBADE; 26124 break; 26125 } 26126 26127 iq_nbits = wlc_phy_nbits(iq); 26128 qq_nbits = wlc_phy_nbits(qq); 26129 26130 arsh = 10 - (30 - iq_nbits); 26131 if (arsh >= 0) { 26132 a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh))); 26133 temp = (s32) (ii >> arsh); 26134 if (temp == 0) { 26135 bcmerror = -EBADE; 26136 break; 26137 } 26138 } else { 26139 a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh))); 26140 temp = (s32) (ii << -arsh); 26141 if (temp == 0) { 26142 bcmerror = -EBADE; 26143 break; 26144 } 26145 } 26146 26147 a /= temp; 26148 26149 brsh = qq_nbits - 31 + 20; 26150 if (brsh >= 0) { 26151 b = (qq << (31 - qq_nbits)); 26152 temp = (s32) (ii >> brsh); 26153 if (temp == 0) { 26154 bcmerror = -EBADE; 26155 break; 26156 } 26157 } else { 26158 b = (qq << (31 - qq_nbits)); 26159 temp = (s32) (ii << -brsh); 26160 if (temp == 0) { 26161 bcmerror = -EBADE; 26162 break; 26163 } 26164 } 26165 b /= temp; 26166 b -= a * a; 26167 b = (s32) int_sqrt((unsigned long) b); 26168 b -= (1 << 10); 26169 26170 if ((curr_core == PHY_CORE_0) && (core_mask & 0x1)) { 26171 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26172 new_comp.a0 = (s16) a & 0x3ff; 26173 new_comp.b0 = (s16) b & 0x3ff; 26174 } else { 26175 26176 new_comp.a0 = (s16) b & 0x3ff; 26177 new_comp.b0 = (s16) a & 0x3ff; 26178 } 26179 } 26180 if ((curr_core == PHY_CORE_1) && (core_mask & 0x2)) { 26181 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 26182 new_comp.a1 = (s16) a & 0x3ff; 26183 new_comp.b1 = (s16) b & 0x3ff; 26184 } else { 26185 26186 new_comp.a1 = (s16) b & 0x3ff; 26187 new_comp.b1 = (s16) a & 0x3ff; 26188 } 26189 } 26190 } 26191 26192 if (bcmerror != 0) { 26193 pr_debug("%s: Failed, cnt = %d\n", __func__, cal_retry); 26194 26195 if (cal_retry < CAL_RETRY_CNT) { 26196 cal_retry++; 26197 goto cal_try; 26198 } 26199 26200 new_comp = old_comp; 26201 } 26202 26203 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); 26204} 26205 26206static void wlc_phy_rxcal_radio_setup_nphy(struct brcms_phy *pi, u8 rx_core) 26207{ 26208 u16 offtune_val; 26209 u16 bias_g = 0; 26210 u16 bias_a = 0; 26211 26212 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26213 if (rx_core == PHY_CORE_0) { 26214 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26215 pi->tx_rx_cal_radio_saveregs[0] = 26216 read_radio_reg(pi, 26217 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP); 26218 pi->tx_rx_cal_radio_saveregs[1] = 26219 read_radio_reg(pi, 26220 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN); 26221 26222 write_radio_reg(pi, 26223 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26224 0x3); 26225 write_radio_reg(pi, 26226 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26227 0xaf); 26228 26229 } else { 26230 pi->tx_rx_cal_radio_saveregs[0] = 26231 read_radio_reg(pi, 26232 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP); 26233 pi->tx_rx_cal_radio_saveregs[1] = 26234 read_radio_reg(pi, 26235 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN); 26236 26237 write_radio_reg( 26238 pi, 26239 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26240 0x3); 26241 write_radio_reg( 26242 pi, 26243 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26244 0x7f); 26245 } 26246 26247 } else { 26248 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26249 pi->tx_rx_cal_radio_saveregs[0] = 26250 read_radio_reg(pi, 26251 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP); 26252 pi->tx_rx_cal_radio_saveregs[1] = 26253 read_radio_reg(pi, 26254 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN); 26255 26256 write_radio_reg( 26257 pi, 26258 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26259 0x3); 26260 write_radio_reg( 26261 pi, 26262 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26263 0xaf); 26264 26265 } else { 26266 pi->tx_rx_cal_radio_saveregs[0] = 26267 read_radio_reg(pi, 26268 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP); 26269 pi->tx_rx_cal_radio_saveregs[1] = 26270 read_radio_reg(pi, 26271 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN); 26272 26273 write_radio_reg(pi, 26274 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26275 0x3); 26276 write_radio_reg(pi, 26277 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26278 0x7f); 26279 } 26280 } 26281 26282 } else { 26283 if (rx_core == PHY_CORE_0) { 26284 pi->tx_rx_cal_radio_saveregs[0] = 26285 read_radio_reg(pi, 26286 RADIO_2056_TX_RXIQCAL_TXMUX | 26287 RADIO_2056_TX1); 26288 pi->tx_rx_cal_radio_saveregs[1] = 26289 read_radio_reg(pi, 26290 RADIO_2056_RX_RXIQCAL_RXMUX | 26291 RADIO_2056_RX0); 26292 26293 if (pi->pubpi.radiorev >= 5) { 26294 pi->tx_rx_cal_radio_saveregs[2] = 26295 read_radio_reg(pi, 26296 RADIO_2056_RX_RXSPARE2 | 26297 RADIO_2056_RX0); 26298 pi->tx_rx_cal_radio_saveregs[3] = 26299 read_radio_reg(pi, 26300 RADIO_2056_TX_TXSPARE2 | 26301 RADIO_2056_TX1); 26302 } 26303 26304 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26305 26306 if (pi->pubpi.radiorev >= 5) { 26307 pi->tx_rx_cal_radio_saveregs[4] = 26308 read_radio_reg(pi, 26309 RADIO_2056_RX_LNAA_MASTER 26310 | RADIO_2056_RX0); 26311 26312 write_radio_reg( 26313 pi, 26314 RADIO_2056_RX_LNAA_MASTER 26315 | RADIO_2056_RX0, 0x40); 26316 26317 write_radio_reg(pi, 26318 RADIO_2056_TX_TXSPARE2 | 26319 RADIO_2056_TX1, bias_a); 26320 26321 write_radio_reg(pi, 26322 RADIO_2056_RX_RXSPARE2 | 26323 RADIO_2056_RX0, bias_a); 26324 } else { 26325 pi->tx_rx_cal_radio_saveregs[4] = 26326 read_radio_reg(pi, 26327 RADIO_2056_RX_LNAA_TUNE 26328 | RADIO_2056_RX0); 26329 26330 offtune_val = 26331 (pi->tx_rx_cal_radio_saveregs 26332 [2] & 0xF0) >> 8; 26333 offtune_val = 26334 (offtune_val <= 0x7) ? 0xF : 0; 26335 26336 mod_radio_reg(pi, 26337 RADIO_2056_RX_LNAA_TUNE | 26338 RADIO_2056_RX0, 0xF0, 26339 (offtune_val << 8)); 26340 } 26341 26342 write_radio_reg(pi, 26343 RADIO_2056_TX_RXIQCAL_TXMUX | 26344 RADIO_2056_TX1, 0x9); 26345 write_radio_reg(pi, 26346 RADIO_2056_RX_RXIQCAL_RXMUX | 26347 RADIO_2056_RX0, 0x9); 26348 } else { 26349 if (pi->pubpi.radiorev >= 5) { 26350 pi->tx_rx_cal_radio_saveregs[4] = 26351 read_radio_reg( 26352 pi, 26353 RADIO_2056_RX_LNAG_MASTER 26354 | RADIO_2056_RX0); 26355 26356 write_radio_reg( 26357 pi, 26358 RADIO_2056_RX_LNAG_MASTER 26359 | RADIO_2056_RX0, 0x40); 26360 26361 write_radio_reg( 26362 pi, 26363 RADIO_2056_TX_TXSPARE2 26364 | 26365 RADIO_2056_TX1, bias_g); 26366 26367 write_radio_reg( 26368 pi, 26369 RADIO_2056_RX_RXSPARE2 26370 | 26371 RADIO_2056_RX0, bias_g); 26372 26373 } else { 26374 pi->tx_rx_cal_radio_saveregs[4] = 26375 read_radio_reg( 26376 pi, 26377 RADIO_2056_RX_LNAG_TUNE 26378 | RADIO_2056_RX0); 26379 26380 offtune_val = 26381 (pi-> 26382 tx_rx_cal_radio_saveregs[2] & 26383 0xF0) >> 8; 26384 offtune_val = 26385 (offtune_val <= 0x7) ? 0xF : 0; 26386 26387 mod_radio_reg(pi, 26388 RADIO_2056_RX_LNAG_TUNE | 26389 RADIO_2056_RX0, 0xF0, 26390 (offtune_val << 8)); 26391 } 26392 26393 write_radio_reg(pi, 26394 RADIO_2056_TX_RXIQCAL_TXMUX | 26395 RADIO_2056_TX1, 0x6); 26396 write_radio_reg(pi, 26397 RADIO_2056_RX_RXIQCAL_RXMUX | 26398 RADIO_2056_RX0, 0x6); 26399 } 26400 26401 } else { 26402 pi->tx_rx_cal_radio_saveregs[0] = 26403 read_radio_reg(pi, 26404 RADIO_2056_TX_RXIQCAL_TXMUX | 26405 RADIO_2056_TX0); 26406 pi->tx_rx_cal_radio_saveregs[1] = 26407 read_radio_reg(pi, 26408 RADIO_2056_RX_RXIQCAL_RXMUX | 26409 RADIO_2056_RX1); 26410 26411 if (pi->pubpi.radiorev >= 5) { 26412 pi->tx_rx_cal_radio_saveregs[2] = 26413 read_radio_reg(pi, 26414 RADIO_2056_RX_RXSPARE2 | 26415 RADIO_2056_RX1); 26416 pi->tx_rx_cal_radio_saveregs[3] = 26417 read_radio_reg(pi, 26418 RADIO_2056_TX_TXSPARE2 | 26419 RADIO_2056_TX0); 26420 } 26421 26422 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26423 26424 if (pi->pubpi.radiorev >= 5) { 26425 pi->tx_rx_cal_radio_saveregs[4] = 26426 read_radio_reg( 26427 pi, 26428 RADIO_2056_RX_LNAA_MASTER 26429 | RADIO_2056_RX1); 26430 26431 write_radio_reg( 26432 pi, 26433 RADIO_2056_RX_LNAA_MASTER | 26434 RADIO_2056_RX1, 0x40); 26435 26436 write_radio_reg( 26437 pi, 26438 RADIO_2056_TX_TXSPARE2 26439 | 26440 RADIO_2056_TX0, bias_a); 26441 26442 write_radio_reg( 26443 pi, 26444 RADIO_2056_RX_RXSPARE2 26445 | 26446 RADIO_2056_RX1, bias_a); 26447 } else { 26448 pi->tx_rx_cal_radio_saveregs[4] = 26449 read_radio_reg( 26450 pi, 26451 RADIO_2056_RX_LNAA_TUNE 26452 | RADIO_2056_RX1); 26453 26454 offtune_val = 26455 (pi-> 26456 tx_rx_cal_radio_saveregs[2] & 26457 0xF0) >> 8; 26458 offtune_val = 26459 (offtune_val <= 0x7) ? 0xF : 0; 26460 26461 mod_radio_reg(pi, 26462 RADIO_2056_RX_LNAA_TUNE | 26463 RADIO_2056_RX1, 0xF0, 26464 (offtune_val << 8)); 26465 } 26466 26467 write_radio_reg(pi, 26468 RADIO_2056_TX_RXIQCAL_TXMUX | 26469 RADIO_2056_TX0, 0x9); 26470 write_radio_reg(pi, 26471 RADIO_2056_RX_RXIQCAL_RXMUX | 26472 RADIO_2056_RX1, 0x9); 26473 } else { 26474 if (pi->pubpi.radiorev >= 5) { 26475 pi->tx_rx_cal_radio_saveregs[4] = 26476 read_radio_reg( 26477 pi, 26478 RADIO_2056_RX_LNAG_MASTER 26479 | RADIO_2056_RX1); 26480 26481 write_radio_reg( 26482 pi, 26483 RADIO_2056_RX_LNAG_MASTER 26484 | RADIO_2056_RX1, 0x40); 26485 26486 write_radio_reg( 26487 pi, 26488 RADIO_2056_TX_TXSPARE2 26489 | 26490 RADIO_2056_TX0, bias_g); 26491 26492 write_radio_reg( 26493 pi, 26494 RADIO_2056_RX_RXSPARE2 26495 | 26496 RADIO_2056_RX1, bias_g); 26497 } else { 26498 pi->tx_rx_cal_radio_saveregs[4] = 26499 read_radio_reg( 26500 pi, 26501 RADIO_2056_RX_LNAG_TUNE 26502 | RADIO_2056_RX1); 26503 26504 offtune_val = 26505 (pi-> 26506 tx_rx_cal_radio_saveregs[2] & 26507 0xF0) >> 8; 26508 offtune_val = 26509 (offtune_val <= 0x7) ? 0xF : 0; 26510 26511 mod_radio_reg(pi, 26512 RADIO_2056_RX_LNAG_TUNE | 26513 RADIO_2056_RX1, 0xF0, 26514 (offtune_val << 8)); 26515 } 26516 26517 write_radio_reg(pi, 26518 RADIO_2056_TX_RXIQCAL_TXMUX | 26519 RADIO_2056_TX0, 0x6); 26520 write_radio_reg(pi, 26521 RADIO_2056_RX_RXIQCAL_RXMUX | 26522 RADIO_2056_RX1, 0x6); 26523 } 26524 } 26525 } 26526} 26527 26528static void wlc_phy_rxcal_radio_cleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26529{ 26530 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26531 if (rx_core == PHY_CORE_0) { 26532 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26533 write_radio_reg( 26534 pi, 26535 RADIO_2057_TX0_TXRXCOUPLE_5G_PWRUP, 26536 pi-> 26537 tx_rx_cal_radio_saveregs[0]); 26538 write_radio_reg( 26539 pi, 26540 RADIO_2057_TX0_TXRXCOUPLE_5G_ATTEN, 26541 pi-> 26542 tx_rx_cal_radio_saveregs[1]); 26543 26544 } else { 26545 write_radio_reg( 26546 pi, 26547 RADIO_2057_TX0_TXRXCOUPLE_2G_PWRUP, 26548 pi-> 26549 tx_rx_cal_radio_saveregs[0]); 26550 write_radio_reg( 26551 pi, 26552 RADIO_2057_TX0_TXRXCOUPLE_2G_ATTEN, 26553 pi-> 26554 tx_rx_cal_radio_saveregs[1]); 26555 } 26556 26557 } else { 26558 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26559 write_radio_reg( 26560 pi, 26561 RADIO_2057_TX1_TXRXCOUPLE_5G_PWRUP, 26562 pi-> 26563 tx_rx_cal_radio_saveregs[0]); 26564 write_radio_reg( 26565 pi, 26566 RADIO_2057_TX1_TXRXCOUPLE_5G_ATTEN, 26567 pi-> 26568 tx_rx_cal_radio_saveregs[1]); 26569 26570 } else { 26571 write_radio_reg( 26572 pi, 26573 RADIO_2057_TX1_TXRXCOUPLE_2G_PWRUP, 26574 pi-> 26575 tx_rx_cal_radio_saveregs[0]); 26576 write_radio_reg( 26577 pi, 26578 RADIO_2057_TX1_TXRXCOUPLE_2G_ATTEN, 26579 pi-> 26580 tx_rx_cal_radio_saveregs[1]); 26581 } 26582 } 26583 26584 } else { 26585 if (rx_core == PHY_CORE_0) { 26586 write_radio_reg(pi, 26587 RADIO_2056_TX_RXIQCAL_TXMUX | 26588 RADIO_2056_TX1, 26589 pi->tx_rx_cal_radio_saveregs[0]); 26590 26591 write_radio_reg(pi, 26592 RADIO_2056_RX_RXIQCAL_RXMUX | 26593 RADIO_2056_RX0, 26594 pi->tx_rx_cal_radio_saveregs[1]); 26595 26596 if (pi->pubpi.radiorev >= 5) { 26597 write_radio_reg(pi, 26598 RADIO_2056_RX_RXSPARE2 | 26599 RADIO_2056_RX0, 26600 pi-> 26601 tx_rx_cal_radio_saveregs[2]); 26602 26603 write_radio_reg(pi, 26604 RADIO_2056_TX_TXSPARE2 | 26605 RADIO_2056_TX1, 26606 pi-> 26607 tx_rx_cal_radio_saveregs[3]); 26608 } 26609 26610 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26611 if (pi->pubpi.radiorev >= 5) 26612 write_radio_reg( 26613 pi, 26614 RADIO_2056_RX_LNAA_MASTER 26615 | RADIO_2056_RX0, 26616 pi-> 26617 tx_rx_cal_radio_saveregs 26618 [4]); 26619 else 26620 write_radio_reg( 26621 pi, 26622 RADIO_2056_RX_LNAA_TUNE 26623 | RADIO_2056_RX0, 26624 pi-> 26625 tx_rx_cal_radio_saveregs 26626 [4]); 26627 } else { 26628 if (pi->pubpi.radiorev >= 5) 26629 write_radio_reg( 26630 pi, 26631 RADIO_2056_RX_LNAG_MASTER 26632 | RADIO_2056_RX0, 26633 pi-> 26634 tx_rx_cal_radio_saveregs 26635 [4]); 26636 else 26637 write_radio_reg( 26638 pi, 26639 RADIO_2056_RX_LNAG_TUNE 26640 | RADIO_2056_RX0, 26641 pi-> 26642 tx_rx_cal_radio_saveregs 26643 [4]); 26644 } 26645 26646 } else { 26647 write_radio_reg(pi, 26648 RADIO_2056_TX_RXIQCAL_TXMUX | 26649 RADIO_2056_TX0, 26650 pi->tx_rx_cal_radio_saveregs[0]); 26651 26652 write_radio_reg(pi, 26653 RADIO_2056_RX_RXIQCAL_RXMUX | 26654 RADIO_2056_RX1, 26655 pi->tx_rx_cal_radio_saveregs[1]); 26656 26657 if (pi->pubpi.radiorev >= 5) { 26658 write_radio_reg(pi, 26659 RADIO_2056_RX_RXSPARE2 | 26660 RADIO_2056_RX1, 26661 pi-> 26662 tx_rx_cal_radio_saveregs[2]); 26663 26664 write_radio_reg(pi, 26665 RADIO_2056_TX_TXSPARE2 | 26666 RADIO_2056_TX0, 26667 pi-> 26668 tx_rx_cal_radio_saveregs[3]); 26669 } 26670 26671 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26672 if (pi->pubpi.radiorev >= 5) 26673 write_radio_reg( 26674 pi, 26675 RADIO_2056_RX_LNAA_MASTER 26676 | RADIO_2056_RX1, 26677 pi-> 26678 tx_rx_cal_radio_saveregs 26679 [4]); 26680 else 26681 write_radio_reg( 26682 pi, 26683 RADIO_2056_RX_LNAA_TUNE 26684 | RADIO_2056_RX1, 26685 pi-> 26686 tx_rx_cal_radio_saveregs 26687 [4]); 26688 } else { 26689 if (pi->pubpi.radiorev >= 5) 26690 write_radio_reg( 26691 pi, 26692 RADIO_2056_RX_LNAG_MASTER 26693 | RADIO_2056_RX1, 26694 pi-> 26695 tx_rx_cal_radio_saveregs 26696 [4]); 26697 else 26698 write_radio_reg( 26699 pi, 26700 RADIO_2056_RX_LNAG_TUNE 26701 | RADIO_2056_RX1, 26702 pi-> 26703 tx_rx_cal_radio_saveregs 26704 [4]); 26705 } 26706 } 26707 } 26708} 26709 26710static void wlc_phy_rxcal_physetup_nphy(struct brcms_phy *pi, u8 rx_core) 26711{ 26712 u8 tx_core; 26713 u16 rx_antval, tx_antval; 26714 26715 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26716 tx_core = rx_core; 26717 else 26718 tx_core = (rx_core == PHY_CORE_0) ? 1 : 0; 26719 26720 pi->tx_rx_cal_phy_saveregs[0] = read_phy_reg(pi, 0xa2); 26721 pi->tx_rx_cal_phy_saveregs[1] = 26722 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7); 26723 pi->tx_rx_cal_phy_saveregs[2] = 26724 read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5); 26725 pi->tx_rx_cal_phy_saveregs[3] = read_phy_reg(pi, 0x91); 26726 pi->tx_rx_cal_phy_saveregs[4] = read_phy_reg(pi, 0x92); 26727 pi->tx_rx_cal_phy_saveregs[5] = read_phy_reg(pi, 0x7a); 26728 pi->tx_rx_cal_phy_saveregs[6] = read_phy_reg(pi, 0x7d); 26729 pi->tx_rx_cal_phy_saveregs[7] = read_phy_reg(pi, 0xe7); 26730 pi->tx_rx_cal_phy_saveregs[8] = read_phy_reg(pi, 0xec); 26731 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26732 pi->tx_rx_cal_phy_saveregs[11] = read_phy_reg(pi, 0x342); 26733 pi->tx_rx_cal_phy_saveregs[12] = read_phy_reg(pi, 0x343); 26734 pi->tx_rx_cal_phy_saveregs[13] = read_phy_reg(pi, 0x346); 26735 pi->tx_rx_cal_phy_saveregs[14] = read_phy_reg(pi, 0x347); 26736 } 26737 26738 pi->tx_rx_cal_phy_saveregs[9] = read_phy_reg(pi, 0x297); 26739 pi->tx_rx_cal_phy_saveregs[10] = read_phy_reg(pi, 0x29b); 26740 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 26741 0x29b, (0x1 << 0), (0) << 0); 26742 26743 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 26744 0x29b, (0x1 << 0), (0) << 0); 26745 26746 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26747 26748 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26749 26750 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << (1 - rx_core)) << 12); 26751 26752 } else { 26753 26754 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 26755 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 26756 mod_phy_reg(pi, 0xa2, (0xf << 4), (1 << rx_core) << 4); 26757 mod_phy_reg(pi, 0xa2, (0xf << 8), (1 << rx_core) << 8); 26758 } 26759 26760 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), (0x1 << 2), 0); 26761 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26762 (0x1 << 2), (0x1 << 2)); 26763 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 26764 mod_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 26765 (0x1 << 0) | (0x1 << 1), 0); 26766 mod_phy_reg(pi, (rx_core == PHY_CORE_0) ? 26767 0x8f : 0xa5, 26768 (0x1 << 0) | (0x1 << 1), (0x1 << 0) | (0x1 << 1)); 26769 } 26770 26771 wlc_phy_rfctrlintc_override_nphy(pi, NPHY_RfctrlIntc_override_PA, 0, 26772 RADIO_MIMO_CORESEL_CORE1 | 26773 RADIO_MIMO_CORESEL_CORE2); 26774 26775 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26776 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 3), 26777 0, 0, 0, 26778 NPHY_REV7_RFCTRLOVERRIDE_ID0); 26779 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 9), 0, 0, 0, 26780 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26781 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 10), 1, 0, 0, 26782 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26783 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 0), 1, 0, 0, 26784 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26785 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 1), 1, 0, 0, 26786 NPHY_REV7_RFCTRLOVERRIDE_ID2); 26787 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 11), 0, 0, 0, 26788 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26789 if (CHSPEC_IS40(pi->radio_chanspec)) 26790 wlc_phy_rfctrl_override_nphy_rev7( 26791 pi, 26792 (0x1 << 7), 26793 2, 0, 0, 26794 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26795 else 26796 wlc_phy_rfctrl_override_nphy_rev7( 26797 pi, 26798 (0x1 << 7), 26799 0, 0, 0, 26800 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26801 26802 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 7), 26803 0, 0, 0, 26804 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26805 wlc_phy_rfctrl_override_nphy_rev7(pi, (0x1 << 5), 0, 0, 0, 26806 NPHY_REV7_RFCTRLOVERRIDE_ID1); 26807 } else { 26808 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 3), 0, 3, 0); 26809 } 26810 26811 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RX2TX); 26812 26813 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26814 26815 wlc_phy_rfctrlintc_override_nphy(pi, 26816 NPHY_RfctrlIntc_override_TRSW, 26817 0x1, rx_core + 1); 26818 } else { 26819 26820 if (rx_core == PHY_CORE_0) { 26821 rx_antval = 0x1; 26822 tx_antval = 0x8; 26823 } else { 26824 rx_antval = 0x4; 26825 tx_antval = 0x2; 26826 } 26827 26828 wlc_phy_rfctrlintc_override_nphy(pi, 26829 NPHY_RfctrlIntc_override_TRSW, 26830 rx_antval, rx_core + 1); 26831 wlc_phy_rfctrlintc_override_nphy(pi, 26832 NPHY_RfctrlIntc_override_TRSW, 26833 tx_antval, tx_core + 1); 26834 } 26835} 26836 26837static void wlc_phy_rxcal_phycleanup_nphy(struct brcms_phy *pi, u8 rx_core) 26838{ 26839 26840 write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); 26841 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 0xa7, 26842 pi->tx_rx_cal_phy_saveregs[1]); 26843 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x8f : 0xa5, 26844 pi->tx_rx_cal_phy_saveregs[2]); 26845 write_phy_reg(pi, 0x91, pi->tx_rx_cal_phy_saveregs[3]); 26846 write_phy_reg(pi, 0x92, pi->tx_rx_cal_phy_saveregs[4]); 26847 26848 write_phy_reg(pi, 0x7a, pi->tx_rx_cal_phy_saveregs[5]); 26849 write_phy_reg(pi, 0x7d, pi->tx_rx_cal_phy_saveregs[6]); 26850 write_phy_reg(pi, 0xe7, pi->tx_rx_cal_phy_saveregs[7]); 26851 write_phy_reg(pi, 0xec, pi->tx_rx_cal_phy_saveregs[8]); 26852 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 26853 write_phy_reg(pi, 0x342, pi->tx_rx_cal_phy_saveregs[11]); 26854 write_phy_reg(pi, 0x343, pi->tx_rx_cal_phy_saveregs[12]); 26855 write_phy_reg(pi, 0x346, pi->tx_rx_cal_phy_saveregs[13]); 26856 write_phy_reg(pi, 0x347, pi->tx_rx_cal_phy_saveregs[14]); 26857 } 26858 26859 write_phy_reg(pi, 0x297, pi->tx_rx_cal_phy_saveregs[9]); 26860 write_phy_reg(pi, 0x29b, pi->tx_rx_cal_phy_saveregs[10]); 26861} 26862 26863static void 26864wlc_phy_rxcal_gainctrl_nphy_rev5(struct brcms_phy *pi, u8 rx_core, 26865 u16 *rxgain, u8 cal_type) 26866{ 26867 26868 u16 num_samps; 26869 struct phy_iq_est est[PHY_CORE_MAX]; 26870 u8 tx_core; 26871 struct nphy_iq_comp save_comp, zero_comp; 26872 u32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, 26873 thresh_pwr = 10000; 26874 s16 desired_log2_pwr, actual_log2_pwr, delta_pwr; 26875 bool gainctrl_done = false; 26876 u8 mix_tia_gain = 3; 26877 s8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; 26878 s8 curr_gaintbl_index = 3; 26879 u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; 26880 const struct nphy_ipa_txrxgain *nphy_rxcal_gaintbl; 26881 u16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; 26882 int fine_gain_idx; 26883 s8 txpwrindex; 26884 u16 nphy_rxcal_txgain[2]; 26885 26886 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26887 tx_core = rx_core; 26888 else 26889 tx_core = 1 - rx_core; 26890 26891 num_samps = 1024; 26892 desired_log2_pwr = 13; 26893 26894 wlc_phy_rx_iq_coeffs_nphy(pi, 0, &save_comp); 26895 zero_comp.a0 = zero_comp.b0 = zero_comp.a1 = zero_comp.b1 = 0x0; 26896 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &zero_comp); 26897 26898 if (CHSPEC_IS5G(pi->radio_chanspec)) { 26899 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26900 mix_tia_gain = 3; 26901 else if (NREV_GE(pi->pubpi.phy_rev, 4)) 26902 mix_tia_gain = 4; 26903 else 26904 mix_tia_gain = 6; 26905 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26906 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz_rev7; 26907 else 26908 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_5GHz; 26909 } else { 26910 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26911 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz_rev7; 26912 else 26913 nphy_rxcal_gaintbl = nphy_ipa_rxcal_gaintbl_2GHz; 26914 } 26915 26916 do { 26917 26918 hpvga = (NREV_GE(pi->pubpi.phy_rev, 7)) ? 26919 0 : nphy_rxcal_gaintbl[curr_gaintbl_index].hpvga; 26920 lpf_biq1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq1; 26921 lpf_biq0 = nphy_rxcal_gaintbl[curr_gaintbl_index].lpf_biq0; 26922 lna2 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna2; 26923 lna1 = nphy_rxcal_gaintbl[curr_gaintbl_index].lna1; 26924 txpwrindex = nphy_rxcal_gaintbl[curr_gaintbl_index].txpwrindex; 26925 26926 if (NREV_GE(pi->pubpi.phy_rev, 7)) 26927 wlc_phy_rfctrl_override_1tomany_nphy( 26928 pi, 26929 NPHY_REV7_RfctrlOverride_cmd_rxgain, 26930 ((lpf_biq1 << 12) | 26931 (lpf_biq0 << 8) | 26932 (mix_tia_gain << 4) | (lna2 << 2) 26933 | lna1), 0x3, 0); 26934 else 26935 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 26936 ((hpvga << 12) | 26937 (lpf_biq1 << 10) | 26938 (lpf_biq0 << 8) | 26939 (mix_tia_gain << 4) | 26940 (lna2 << 2) | lna1), 0x3, 26941 0); 26942 26943 pi->nphy_rxcal_pwr_idx[tx_core] = txpwrindex; 26944 26945 if (txpwrindex == -1) { 26946 nphy_rxcal_txgain[0] = 0x8ff0 | pi->nphy_gmval; 26947 nphy_rxcal_txgain[1] = 0x8ff0 | pi->nphy_gmval; 26948 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 26949 2, 0x110, 16, 26950 nphy_rxcal_txgain); 26951 } else { 26952 wlc_phy_txpwr_index_nphy(pi, tx_core + 1, txpwrindex, 26953 false); 26954 } 26955 26956 wlc_phy_tx_tone_nphy(pi, (CHSPEC_IS40(pi->radio_chanspec)) ? 26957 NPHY_RXCAL_TONEFREQ_40MHz : 26958 NPHY_RXCAL_TONEFREQ_20MHz, 26959 NPHY_RXCAL_TONEAMP, 0, cal_type, false); 26960 26961 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 26962 i_pwr = DIV_ROUND_CLOSEST(est[rx_core].i_pwr, num_samps); 26963 q_pwr = DIV_ROUND_CLOSEST(est[rx_core].q_pwr, num_samps); 26964 curr_pwr = i_pwr + q_pwr; 26965 26966 switch (gainctrl_dirn) { 26967 case NPHY_RXCAL_GAIN_INIT: 26968 if (curr_pwr > thresh_pwr) { 26969 gainctrl_dirn = NPHY_RXCAL_GAIN_DOWN; 26970 prev_gaintbl_index = curr_gaintbl_index; 26971 curr_gaintbl_index--; 26972 } else { 26973 gainctrl_dirn = NPHY_RXCAL_GAIN_UP; 26974 prev_gaintbl_index = curr_gaintbl_index; 26975 curr_gaintbl_index++; 26976 } 26977 break; 26978 26979 case NPHY_RXCAL_GAIN_UP: 26980 if (curr_pwr > thresh_pwr) { 26981 gainctrl_done = true; 26982 optim_pwr = prev_pwr; 26983 optim_gaintbl_index = prev_gaintbl_index; 26984 } else { 26985 prev_gaintbl_index = curr_gaintbl_index; 26986 curr_gaintbl_index++; 26987 } 26988 break; 26989 26990 case NPHY_RXCAL_GAIN_DOWN: 26991 if (curr_pwr > thresh_pwr) { 26992 prev_gaintbl_index = curr_gaintbl_index; 26993 curr_gaintbl_index--; 26994 } else { 26995 gainctrl_done = true; 26996 optim_pwr = curr_pwr; 26997 optim_gaintbl_index = curr_gaintbl_index; 26998 } 26999 break; 27000 27001 default: 27002 break; 27003 } 27004 27005 if ((curr_gaintbl_index < 0) || 27006 (curr_gaintbl_index > NPHY_IPA_RXCAL_MAXGAININDEX)) { 27007 gainctrl_done = true; 27008 optim_pwr = curr_pwr; 27009 optim_gaintbl_index = prev_gaintbl_index; 27010 } else { 27011 prev_pwr = curr_pwr; 27012 } 27013 27014 wlc_phy_stopplayback_nphy(pi); 27015 } while (!gainctrl_done); 27016 27017 hpvga = nphy_rxcal_gaintbl[optim_gaintbl_index].hpvga; 27018 lpf_biq1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq1; 27019 lpf_biq0 = nphy_rxcal_gaintbl[optim_gaintbl_index].lpf_biq0; 27020 lna2 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna2; 27021 lna1 = nphy_rxcal_gaintbl[optim_gaintbl_index].lna1; 27022 txpwrindex = nphy_rxcal_gaintbl[optim_gaintbl_index].txpwrindex; 27023 27024 actual_log2_pwr = wlc_phy_nbits(optim_pwr); 27025 delta_pwr = desired_log2_pwr - actual_log2_pwr; 27026 27027 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 27028 fine_gain_idx = (int)lpf_biq1 + delta_pwr; 27029 27030 if (fine_gain_idx + (int)lpf_biq0 > 10) 27031 lpf_biq1 = 10 - lpf_biq0; 27032 else 27033 lpf_biq1 = (u16) max(fine_gain_idx, 0); 27034 27035 wlc_phy_rfctrl_override_1tomany_nphy( 27036 pi, 27037 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27038 ((lpf_biq1 << 12) | 27039 (lpf_biq0 << 8) | 27040 (mix_tia_gain << 4) | 27041 (lna2 << 2) | lna1), 0x3, 27042 0); 27043 } else { 27044 hpvga = (u16) max(min(((int)hpvga) + delta_pwr, 10), 0); 27045 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 27046 ((hpvga << 12) | 27047 (lpf_biq1 << 10) | 27048 (lpf_biq0 << 8) | 27049 (mix_tia_gain << 4) | 27050 (lna2 << 2) | 27051 lna1), 0x3, 0); 27052 } 27053 27054 if (rxgain != NULL) { 27055 *rxgain++ = lna1; 27056 *rxgain++ = lna2; 27057 *rxgain++ = mix_tia_gain; 27058 *rxgain++ = lpf_biq0; 27059 *rxgain++ = lpf_biq1; 27060 *rxgain = hpvga; 27061 } 27062 27063 wlc_phy_rx_iq_coeffs_nphy(pi, 1, &save_comp); 27064} 27065 27066static void 27067wlc_phy_rxcal_gainctrl_nphy(struct brcms_phy *pi, u8 rx_core, u16 *rxgain, 27068 u8 cal_type) 27069{ 27070 wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); 27071} 27072 27073static u8 27074wlc_phy_rc_sweep_nphy(struct brcms_phy *pi, u8 core_idx, u8 loopback_type) 27075{ 27076 u32 target_bws[2] = { 9500, 21000 }; 27077 u32 ref_tones[2] = { 3000, 6000 }; 27078 u32 target_bw, ref_tone; 27079 27080 u32 target_pwr_ratios[2] = { 28606, 18468 }; 27081 u32 target_pwr_ratio, pwr_ratio, last_pwr_ratio = 0; 27082 27083 u16 start_rccal_ovr_val = 128; 27084 u16 txlpf_rccal_lpc_ovr_val = 128; 27085 u16 rxlpf_rccal_hpc_ovr_val = 159; 27086 27087 u16 orig_txlpf_rccal_lpc_ovr_val; 27088 u16 orig_rxlpf_rccal_hpc_ovr_val; 27089 u16 radio_addr_offset_rx; 27090 u16 radio_addr_offset_tx; 27091 u16 orig_dcBypass; 27092 u16 orig_RxStrnFilt40Num[6]; 27093 u16 orig_RxStrnFilt40Den[4]; 27094 u16 orig_rfctrloverride[2]; 27095 u16 orig_rfctrlauxreg[2]; 27096 u16 orig_rfctrlrssiothers; 27097 u16 tx_lpf_bw = 4; 27098 27099 u16 rx_lpf_bw, rx_lpf_bws[2] = { 2, 4 }; 27100 u16 lpf_hpc = 7, hpvga_hpc = 7; 27101 27102 s8 rccal_stepsize; 27103 u16 rccal_val, last_rccal_val = 0, best_rccal_val = 0; 27104 u32 ref_iq_vals = 0, target_iq_vals = 0; 27105 u16 num_samps, log_num_samps = 10; 27106 struct phy_iq_est est[PHY_CORE_MAX]; 27107 27108 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27109 return 0; 27110 27111 num_samps = (1 << log_num_samps); 27112 27113 if (CHSPEC_IS40(pi->radio_chanspec)) { 27114 target_bw = target_bws[1]; 27115 target_pwr_ratio = target_pwr_ratios[1]; 27116 ref_tone = ref_tones[1]; 27117 rx_lpf_bw = rx_lpf_bws[1]; 27118 } else { 27119 target_bw = target_bws[0]; 27120 target_pwr_ratio = target_pwr_ratios[0]; 27121 ref_tone = ref_tones[0]; 27122 rx_lpf_bw = rx_lpf_bws[0]; 27123 } 27124 27125 if (core_idx == 0) { 27126 radio_addr_offset_rx = RADIO_2056_RX0; 27127 radio_addr_offset_tx = 27128 (loopback_type == 0) ? RADIO_2056_TX0 : RADIO_2056_TX1; 27129 } else { 27130 radio_addr_offset_rx = RADIO_2056_RX1; 27131 radio_addr_offset_tx = 27132 (loopback_type == 0) ? RADIO_2056_TX1 : RADIO_2056_TX0; 27133 } 27134 27135 orig_txlpf_rccal_lpc_ovr_val = 27136 read_radio_reg(pi, 27137 (RADIO_2056_TX_TXLPF_RCCAL | 27138 radio_addr_offset_tx)); 27139 orig_rxlpf_rccal_hpc_ovr_val = 27140 read_radio_reg(pi, 27141 (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27142 radio_addr_offset_rx)); 27143 27144 orig_dcBypass = ((read_phy_reg(pi, 0x48) >> 8) & 1); 27145 27146 orig_RxStrnFilt40Num[0] = read_phy_reg(pi, 0x267); 27147 orig_RxStrnFilt40Num[1] = read_phy_reg(pi, 0x268); 27148 orig_RxStrnFilt40Num[2] = read_phy_reg(pi, 0x269); 27149 orig_RxStrnFilt40Den[0] = read_phy_reg(pi, 0x26a); 27150 orig_RxStrnFilt40Den[1] = read_phy_reg(pi, 0x26b); 27151 orig_RxStrnFilt40Num[3] = read_phy_reg(pi, 0x26c); 27152 orig_RxStrnFilt40Num[4] = read_phy_reg(pi, 0x26d); 27153 orig_RxStrnFilt40Num[5] = read_phy_reg(pi, 0x26e); 27154 orig_RxStrnFilt40Den[2] = read_phy_reg(pi, 0x26f); 27155 orig_RxStrnFilt40Den[3] = read_phy_reg(pi, 0x270); 27156 27157 orig_rfctrloverride[0] = read_phy_reg(pi, 0xe7); 27158 orig_rfctrloverride[1] = read_phy_reg(pi, 0xec); 27159 orig_rfctrlauxreg[0] = read_phy_reg(pi, 0xf8); 27160 orig_rfctrlauxreg[1] = read_phy_reg(pi, 0xfa); 27161 orig_rfctrlrssiothers = read_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d); 27162 27163 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27164 txlpf_rccal_lpc_ovr_val); 27165 27166 write_radio_reg(pi, 27167 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27168 rxlpf_rccal_hpc_ovr_val); 27169 27170 mod_phy_reg(pi, 0x48, (0x1 << 8), (0x1 << 8)); 27171 27172 write_phy_reg(pi, 0x267, 0x02d4); 27173 write_phy_reg(pi, 0x268, 0x0000); 27174 write_phy_reg(pi, 0x269, 0x0000); 27175 write_phy_reg(pi, 0x26a, 0x0000); 27176 write_phy_reg(pi, 0x26b, 0x0000); 27177 write_phy_reg(pi, 0x26c, 0x02d4); 27178 write_phy_reg(pi, 0x26d, 0x0000); 27179 write_phy_reg(pi, 0x26e, 0x0000); 27180 write_phy_reg(pi, 0x26f, 0x0000); 27181 write_phy_reg(pi, 0x270, 0x0000); 27182 27183 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 8)); 27184 or_phy_reg(pi, (core_idx == 0) ? 0xec : 0xe7, (0x1 << 15)); 27185 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 9)); 27186 or_phy_reg(pi, (core_idx == 0) ? 0xe7 : 0xec, (0x1 << 10)); 27187 27188 mod_phy_reg(pi, (core_idx == 0) ? 0xfa : 0xf8, 27189 (0x7 << 10), (tx_lpf_bw << 10)); 27190 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27191 (0x7 << 0), (hpvga_hpc << 0)); 27192 mod_phy_reg(pi, (core_idx == 0) ? 0xf8 : 0xfa, 27193 (0x7 << 4), (lpf_hpc << 4)); 27194 mod_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, 27195 (0x7 << 8), (rx_lpf_bw << 8)); 27196 27197 rccal_stepsize = 16; 27198 rccal_val = start_rccal_ovr_val + rccal_stepsize; 27199 27200 while (rccal_stepsize >= 0) { 27201 write_radio_reg(pi, 27202 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27203 radio_addr_offset_rx), rccal_val); 27204 27205 if (rccal_stepsize == 16) { 27206 27207 wlc_phy_tx_tone_nphy(pi, ref_tone, NPHY_RXCAL_TONEAMP, 27208 0, 1, false); 27209 udelay(2); 27210 27211 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27212 27213 if (core_idx == 0) 27214 ref_iq_vals = 27215 max_t(u32, (est[0].i_pwr + 27216 est[0].q_pwr) >> 27217 (log_num_samps + 1), 27218 1); 27219 else 27220 ref_iq_vals = 27221 max_t(u32, (est[1].i_pwr + 27222 est[1].q_pwr) >> 27223 (log_num_samps + 1), 27224 1); 27225 27226 wlc_phy_tx_tone_nphy(pi, target_bw, NPHY_RXCAL_TONEAMP, 27227 0, 1, false); 27228 udelay(2); 27229 } 27230 27231 wlc_phy_rx_iq_est_nphy(pi, est, num_samps, 32, 0); 27232 27233 if (core_idx == 0) 27234 target_iq_vals = (est[0].i_pwr + est[0].q_pwr) >> 27235 (log_num_samps + 1); 27236 else 27237 target_iq_vals = 27238 (est[1].i_pwr + 27239 est[1].q_pwr) >> (log_num_samps + 1); 27240 27241 pwr_ratio = (uint) ((target_iq_vals << 16) / ref_iq_vals); 27242 27243 if (rccal_stepsize == 0) 27244 rccal_stepsize--; 27245 else if (rccal_stepsize == 1) { 27246 last_rccal_val = rccal_val; 27247 rccal_val += (pwr_ratio > target_pwr_ratio) ? 1 : -1; 27248 last_pwr_ratio = pwr_ratio; 27249 rccal_stepsize--; 27250 } else { 27251 rccal_stepsize = (rccal_stepsize >> 1); 27252 rccal_val += ((pwr_ratio > target_pwr_ratio) ? 27253 rccal_stepsize : (-rccal_stepsize)); 27254 } 27255 27256 if (rccal_stepsize == -1) { 27257 best_rccal_val = 27258 (abs((int)last_pwr_ratio - 27259 (int)target_pwr_ratio) < 27260 abs((int)pwr_ratio - 27261 (int)target_pwr_ratio)) ? last_rccal_val : 27262 rccal_val; 27263 27264 if (CHSPEC_IS40(pi->radio_chanspec)) { 27265 if ((best_rccal_val > 140) 27266 || (best_rccal_val < 135)) 27267 best_rccal_val = 138; 27268 } else { 27269 if ((best_rccal_val > 142) 27270 || (best_rccal_val < 137)) 27271 best_rccal_val = 140; 27272 } 27273 27274 write_radio_reg(pi, 27275 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27276 radio_addr_offset_rx), best_rccal_val); 27277 } 27278 } 27279 27280 wlc_phy_stopplayback_nphy(pi); 27281 27282 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | radio_addr_offset_tx), 27283 orig_txlpf_rccal_lpc_ovr_val); 27284 write_radio_reg(pi, 27285 (RADIO_2056_RX_RXLPF_RCCAL_HPC | radio_addr_offset_rx), 27286 orig_rxlpf_rccal_hpc_ovr_val); 27287 27288 mod_phy_reg(pi, 0x48, (0x1 << 8), (orig_dcBypass << 8)); 27289 27290 write_phy_reg(pi, 0x267, orig_RxStrnFilt40Num[0]); 27291 write_phy_reg(pi, 0x268, orig_RxStrnFilt40Num[1]); 27292 write_phy_reg(pi, 0x269, orig_RxStrnFilt40Num[2]); 27293 write_phy_reg(pi, 0x26a, orig_RxStrnFilt40Den[0]); 27294 write_phy_reg(pi, 0x26b, orig_RxStrnFilt40Den[1]); 27295 write_phy_reg(pi, 0x26c, orig_RxStrnFilt40Num[3]); 27296 write_phy_reg(pi, 0x26d, orig_RxStrnFilt40Num[4]); 27297 write_phy_reg(pi, 0x26e, orig_RxStrnFilt40Num[5]); 27298 write_phy_reg(pi, 0x26f, orig_RxStrnFilt40Den[2]); 27299 write_phy_reg(pi, 0x270, orig_RxStrnFilt40Den[3]); 27300 27301 write_phy_reg(pi, 0xe7, orig_rfctrloverride[0]); 27302 write_phy_reg(pi, 0xec, orig_rfctrloverride[1]); 27303 write_phy_reg(pi, 0xf8, orig_rfctrlauxreg[0]); 27304 write_phy_reg(pi, 0xfa, orig_rfctrlauxreg[1]); 27305 write_phy_reg(pi, (core_idx == 0) ? 0x7a : 0x7d, orig_rfctrlrssiothers); 27306 27307 pi->nphy_anarxlpf_adjusted = false; 27308 27309 return best_rccal_val - 0x80; 27310} 27311 27312#define WAIT_FOR_SCOPE 4000 27313static int wlc_phy_cal_rxiq_nphy_rev3(struct brcms_phy *pi, 27314 struct nphy_txgains target_gain, 27315 u8 cal_type, bool debug) 27316{ 27317 u16 orig_BBConfig; 27318 u8 core_no, rx_core; 27319 u8 best_rccal[2]; 27320 u16 gain_save[2]; 27321 u16 cal_gain[2]; 27322 struct nphy_iqcal_params cal_params[2]; 27323 u8 rxcore_state; 27324 s8 rxlpf_rccal_hpc, txlpf_rccal_lpc; 27325 s8 txlpf_idac; 27326 bool phyhang_avoid_state = false; 27327 bool skip_rxiqcal = false; 27328 27329 orig_BBConfig = read_phy_reg(pi, 0x01); 27330 mod_phy_reg(pi, 0x01, (0x1 << 15), 0); 27331 27332 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27333 27334 if (NREV_GE(pi->pubpi.phy_rev, 4)) { 27335 phyhang_avoid_state = pi->phyhang_avoid; 27336 pi->phyhang_avoid = false; 27337 } 27338 27339 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27340 27341 for (core_no = 0; core_no <= 1; core_no++) { 27342 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27343 &cal_params[core_no]); 27344 cal_gain[core_no] = cal_params[core_no].cal_gain; 27345 } 27346 27347 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27348 27349 rxcore_state = wlc_phy_rxcore_getstate_nphy( 27350 (struct brcms_phy_pub *) pi); 27351 27352 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27353 27354 skip_rxiqcal = 27355 ((rxcore_state & (1 << rx_core)) == 0) ? true : false; 27356 27357 wlc_phy_rxcal_physetup_nphy(pi, rx_core); 27358 27359 wlc_phy_rxcal_radio_setup_nphy(pi, rx_core); 27360 27361 if ((!skip_rxiqcal) && ((cal_type == 0) || (cal_type == 2))) { 27362 27363 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 0); 27364 27365 wlc_phy_tx_tone_nphy(pi, 27366 (CHSPEC_IS40( 27367 pi->radio_chanspec)) ? 27368 NPHY_RXCAL_TONEFREQ_40MHz : 27369 NPHY_RXCAL_TONEFREQ_20MHz, 27370 NPHY_RXCAL_TONEAMP, 0, cal_type, 27371 false); 27372 27373 if (debug) 27374 mdelay(WAIT_FOR_SCOPE); 27375 27376 wlc_phy_calc_rx_iq_comp_nphy(pi, rx_core + 1); 27377 wlc_phy_stopplayback_nphy(pi); 27378 } 27379 27380 if (((cal_type == 1) || (cal_type == 2)) 27381 && NREV_LT(pi->pubpi.phy_rev, 7)) { 27382 27383 if (rx_core == PHY_CORE_1) { 27384 27385 if (rxcore_state == 1) 27386 wlc_phy_rxcore_setstate_nphy( 27387 (struct brcms_phy_pub *) pi, 3); 27388 27389 wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, 27390 1); 27391 27392 best_rccal[rx_core] = 27393 wlc_phy_rc_sweep_nphy(pi, rx_core, 1); 27394 pi->nphy_rccal_value = best_rccal[rx_core]; 27395 27396 if (rxcore_state == 1) 27397 wlc_phy_rxcore_setstate_nphy( 27398 (struct brcms_phy_pub *) pi, 27399 rxcore_state); 27400 } 27401 } 27402 27403 wlc_phy_rxcal_radio_cleanup_nphy(pi, rx_core); 27404 27405 wlc_phy_rxcal_phycleanup_nphy(pi, rx_core); 27406 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27407 } 27408 27409 if ((cal_type == 1) || (cal_type == 2)) { 27410 27411 best_rccal[0] = best_rccal[1]; 27412 write_radio_reg(pi, 27413 (RADIO_2056_RX_RXLPF_RCCAL_LPC | 27414 RADIO_2056_RX0), (best_rccal[0] | 0x80)); 27415 27416 for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { 27417 rxlpf_rccal_hpc = 27418 (((int)best_rccal[rx_core] - 12) >> 1) + 10; 27419 txlpf_rccal_lpc = ((int)best_rccal[rx_core] - 12) + 10; 27420 27421 if (PHY_IPA(pi)) { 27422 txlpf_rccal_lpc += 27423 (pi->bw == WL_CHANSPEC_BW_40) ? 24 : 12; 27424 txlpf_idac = (pi->bw == WL_CHANSPEC_BW_40) ? 27425 0x0e : 0x13; 27426 WRITE_RADIO_REG2(pi, RADIO_2056, TX, rx_core, 27427 TXLPF_IDAC_4, txlpf_idac); 27428 } 27429 27430 rxlpf_rccal_hpc = max(min_t(u8, rxlpf_rccal_hpc, 31), 27431 0); 27432 txlpf_rccal_lpc = max(min_t(u8, txlpf_rccal_lpc, 31), 27433 0); 27434 27435 write_radio_reg(pi, (RADIO_2056_RX_RXLPF_RCCAL_HPC | 27436 ((rx_core == 27437 PHY_CORE_0) ? RADIO_2056_RX0 : 27438 RADIO_2056_RX1)), 27439 (rxlpf_rccal_hpc | 0x80)); 27440 27441 write_radio_reg(pi, (RADIO_2056_TX_TXLPF_RCCAL | 27442 ((rx_core == 27443 PHY_CORE_0) ? RADIO_2056_TX0 : 27444 RADIO_2056_TX1)), 27445 (txlpf_rccal_lpc | 0x80)); 27446 } 27447 } 27448 27449 write_phy_reg(pi, 0x01, orig_BBConfig); 27450 27451 wlc_phy_resetcca_nphy(pi); 27452 27453 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27454 wlc_phy_rfctrl_override_1tomany_nphy( 27455 pi, 27456 NPHY_REV7_RfctrlOverride_cmd_rxgain, 27457 0, 0x3, 1); 27458 else 27459 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 12), 0, 0x3, 1); 27460 27461 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27462 27463 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27464 gain_save); 27465 27466 if (NREV_GE(pi->pubpi.phy_rev, 4)) 27467 pi->phyhang_avoid = phyhang_avoid_state; 27468 27469 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27470 27471 return 0; 27472} 27473 27474static int 27475wlc_phy_cal_rxiq_nphy_rev2(struct brcms_phy *pi, 27476 struct nphy_txgains target_gain, bool debug) 27477{ 27478 struct phy_iq_est est[PHY_CORE_MAX]; 27479 u8 core_num, rx_core, tx_core; 27480 u16 lna_vals[] = { 0x3, 0x3, 0x1 }; 27481 u16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; 27482 u16 hpf2_vals[] = { 0x2, 0x0, 0x0 }; 27483 s16 curr_hpf1, curr_hpf2, curr_hpf, curr_lna; 27484 s16 desired_log2_pwr, actual_log2_pwr, hpf_change; 27485 u16 orig_RfseqCoreActv, orig_AfectrlCore, orig_AfectrlOverride; 27486 u16 orig_RfctrlIntcRx, orig_RfctrlIntcTx; 27487 u16 num_samps; 27488 u32 i_pwr, q_pwr, tot_pwr[3]; 27489 u8 gain_pass, use_hpf_num; 27490 u16 mask, val1, val2; 27491 u16 core_no; 27492 u16 gain_save[2]; 27493 u16 cal_gain[2]; 27494 struct nphy_iqcal_params cal_params[2]; 27495 u8 phy_bw; 27496 int bcmerror = 0; 27497 bool first_playtone = true; 27498 27499 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27500 27501 if (NREV_LT(pi->pubpi.phy_rev, 2)) 27502 wlc_phy_reapply_txcal_coeffs_nphy(pi); 27503 27504 wlc_phy_table_read_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, gain_save); 27505 27506 for (core_no = 0; core_no <= 1; core_no++) { 27507 wlc_phy_iqcal_gainparams_nphy(pi, core_no, target_gain, 27508 &cal_params[core_no]); 27509 cal_gain[core_no] = cal_params[core_no].cal_gain; 27510 } 27511 27512 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); 27513 27514 num_samps = 1024; 27515 desired_log2_pwr = 13; 27516 27517 for (core_num = 0; core_num < 2; core_num++) { 27518 27519 rx_core = core_num; 27520 tx_core = 1 - core_num; 27521 27522 orig_RfseqCoreActv = read_phy_reg(pi, 0xa2); 27523 orig_AfectrlCore = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27524 0xa6 : 0xa7); 27525 orig_AfectrlOverride = read_phy_reg(pi, 0xa5); 27526 orig_RfctrlIntcRx = read_phy_reg(pi, (rx_core == PHY_CORE_0) ? 27527 0x91 : 0x92); 27528 orig_RfctrlIntcTx = read_phy_reg(pi, (tx_core == PHY_CORE_0) ? 27529 0x91 : 0x92); 27530 27531 mod_phy_reg(pi, 0xa2, (0xf << 12), (1 << tx_core) << 12); 27532 mod_phy_reg(pi, 0xa2, (0xf << 0), (1 << tx_core) << 0); 27533 27534 or_phy_reg(pi, ((rx_core == PHY_CORE_0) ? 0xa6 : 0xa7), 27535 ((0x1 << 1) | (0x1 << 2))); 27536 or_phy_reg(pi, 0xa5, ((0x1 << 1) | (0x1 << 2))); 27537 27538 if (((pi->nphy_rxcalparams) & 0xff000000)) 27539 write_phy_reg(pi, 27540 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27541 (CHSPEC_IS5G(pi->radio_chanspec) ? 27542 0x140 : 0x110)); 27543 else 27544 write_phy_reg(pi, 27545 (rx_core == PHY_CORE_0) ? 0x91 : 0x92, 27546 (CHSPEC_IS5G(pi->radio_chanspec) ? 27547 0x180 : 0x120)); 27548 27549 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 0x92, 27550 (CHSPEC_IS5G(pi->radio_chanspec) ? 0x148 : 27551 0x114)); 27552 27553 mask = RADIO_2055_COUPLE_RX_MASK | RADIO_2055_COUPLE_TX_MASK; 27554 if (rx_core == PHY_CORE_0) { 27555 val1 = RADIO_2055_COUPLE_RX_MASK; 27556 val2 = RADIO_2055_COUPLE_TX_MASK; 27557 } else { 27558 val1 = RADIO_2055_COUPLE_TX_MASK; 27559 val2 = RADIO_2055_COUPLE_RX_MASK; 27560 } 27561 27562 if ((pi->nphy_rxcalparams & 0x10000)) { 27563 mod_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, mask, 27564 val1); 27565 mod_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, mask, 27566 val2); 27567 } 27568 27569 for (gain_pass = 0; gain_pass < 4; gain_pass++) { 27570 27571 if (debug) 27572 mdelay(WAIT_FOR_SCOPE); 27573 27574 if (gain_pass < 3) { 27575 curr_lna = lna_vals[gain_pass]; 27576 curr_hpf1 = hpf1_vals[gain_pass]; 27577 curr_hpf2 = hpf2_vals[gain_pass]; 27578 } else { 27579 27580 if (tot_pwr[1] > 10000) { 27581 curr_lna = lna_vals[2]; 27582 curr_hpf1 = hpf1_vals[2]; 27583 curr_hpf2 = hpf2_vals[2]; 27584 use_hpf_num = 1; 27585 curr_hpf = curr_hpf1; 27586 actual_log2_pwr = 27587 wlc_phy_nbits(tot_pwr[2]); 27588 } else { 27589 if (tot_pwr[0] > 10000) { 27590 curr_lna = lna_vals[1]; 27591 curr_hpf1 = hpf1_vals[1]; 27592 curr_hpf2 = hpf2_vals[1]; 27593 use_hpf_num = 1; 27594 curr_hpf = curr_hpf1; 27595 actual_log2_pwr = 27596 wlc_phy_nbits( 27597 tot_pwr[1]); 27598 } else { 27599 curr_lna = lna_vals[0]; 27600 curr_hpf1 = hpf1_vals[0]; 27601 curr_hpf2 = hpf2_vals[0]; 27602 use_hpf_num = 2; 27603 curr_hpf = curr_hpf2; 27604 actual_log2_pwr = 27605 wlc_phy_nbits( 27606 tot_pwr[0]); 27607 } 27608 } 27609 27610 hpf_change = desired_log2_pwr - actual_log2_pwr; 27611 curr_hpf += hpf_change; 27612 curr_hpf = max(min_t(u16, curr_hpf, 10), 0); 27613 if (use_hpf_num == 1) 27614 curr_hpf1 = curr_hpf; 27615 else 27616 curr_hpf2 = curr_hpf; 27617 } 27618 27619 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 27620 ((curr_hpf2 << 8) | 27621 (curr_hpf1 << 4) | 27622 (curr_lna << 2)), 0x3, 0); 27623 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27624 27625 wlc_phy_stopplayback_nphy(pi); 27626 27627 if (first_playtone) { 27628 bcmerror = wlc_phy_tx_tone_nphy(pi, 4000, 27629 (u16) (pi->nphy_rxcalparams & 27630 0xffff), 0, 0, true); 27631 first_playtone = false; 27632 } else { 27633 phy_bw = (CHSPEC_IS40(pi->radio_chanspec)) ? 27634 40 : 20; 27635 wlc_phy_runsamples_nphy(pi, phy_bw * 8, 0xffff, 27636 0, 0, 0, true); 27637 } 27638 27639 if (bcmerror == 0) { 27640 if (gain_pass < 3) { 27641 27642 wlc_phy_rx_iq_est_nphy(pi, est, 27643 num_samps, 32, 27644 0); 27645 i_pwr = DIV_ROUND_CLOSEST(est[rx_core].i_pwr, 27646 num_samps); 27647 q_pwr = DIV_ROUND_CLOSEST(est[rx_core].q_pwr, 27648 num_samps); 27649 tot_pwr[gain_pass] = i_pwr + q_pwr; 27650 } else { 27651 27652 wlc_phy_calc_rx_iq_comp_nphy(pi, 27653 (1 << 27654 rx_core)); 27655 } 27656 27657 wlc_phy_stopplayback_nphy(pi); 27658 } 27659 27660 if (bcmerror != 0) 27661 break; 27662 } 27663 27664 and_radio_reg(pi, RADIO_2055_CORE1_GEN_SPARE2, ~mask); 27665 and_radio_reg(pi, RADIO_2055_CORE2_GEN_SPARE2, ~mask); 27666 27667 write_phy_reg(pi, (tx_core == PHY_CORE_0) ? 0x91 : 27668 0x92, orig_RfctrlIntcTx); 27669 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0x91 : 27670 0x92, orig_RfctrlIntcRx); 27671 write_phy_reg(pi, 0xa5, orig_AfectrlOverride); 27672 write_phy_reg(pi, (rx_core == PHY_CORE_0) ? 0xa6 : 27673 0xa7, orig_AfectrlCore); 27674 write_phy_reg(pi, 0xa2, orig_RfseqCoreActv); 27675 27676 if (bcmerror != 0) 27677 break; 27678 } 27679 27680 wlc_phy_rfctrl_override_nphy(pi, (0x1 << 10), 0, 0x3, 1); 27681 wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); 27682 27683 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, 27684 gain_save); 27685 27686 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27687 27688 return bcmerror; 27689} 27690 27691int 27692wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, 27693 u8 cal_type, bool debug) 27694{ 27695 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27696 cal_type = 0; 27697 27698 if (NREV_GE(pi->pubpi.phy_rev, 3)) 27699 return wlc_phy_cal_rxiq_nphy_rev3(pi, target_gain, cal_type, 27700 debug); 27701 else 27702 return wlc_phy_cal_rxiq_nphy_rev2(pi, target_gain, debug); 27703} 27704 27705void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi) 27706{ 27707 uint core; 27708 u32 txgain; 27709 u16 rad_gain, dac_gain, bbmult, m1m2; 27710 u8 txpi[2], chan_freq_range; 27711 s32 rfpwr_offset; 27712 27713 if (pi->phyhang_avoid) 27714 wlc_phy_stay_in_carriersearch_nphy(pi, true); 27715 27716 if (pi->sh->sromrev < 4) { 27717 txpi[0] = txpi[1] = 72; 27718 } else { 27719 27720 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, 0); 27721 switch (chan_freq_range) { 27722 case WL_CHAN_FREQ_RANGE_2G: 27723 case WL_CHAN_FREQ_RANGE_5GL: 27724 case WL_CHAN_FREQ_RANGE_5GM: 27725 case WL_CHAN_FREQ_RANGE_5GH: 27726 txpi[0] = 0; 27727 txpi[1] = 0; 27728 break; 27729 default: 27730 txpi[0] = txpi[1] = 91; 27731 break; 27732 } 27733 } 27734 27735 if (NREV_GE(pi->pubpi.phy_rev, 7)) 27736 txpi[0] = txpi[1] = 30; 27737 else if (NREV_GE(pi->pubpi.phy_rev, 3)) 27738 txpi[0] = txpi[1] = 40; 27739 27740 if (NREV_LT(pi->pubpi.phy_rev, 7)) { 27741 27742 if ((txpi[0] < 40) || (txpi[0] > 100) || 27743 (txpi[1] < 40) || (txpi[1] > 100)) 27744 txpi[0] = txpi[1] = 91; 27745 } 27746 27747 pi->nphy_txpwrindex[PHY_CORE_0].index_internal = txpi[0]; 27748 pi->nphy_txpwrindex[PHY_CORE_1].index_internal = txpi[1]; 27749 pi->nphy_txpwrindex[PHY_CORE_0].index_internal_save = txpi[0]; 27750 pi->nphy_txpwrindex[PHY_CORE_1].index_internal_save = txpi[1]; 27751 27752 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 27753 uint phyrev = pi->pubpi.phy_rev; 27754 27755 if (NREV_GE(phyrev, 3)) { 27756 if (PHY_IPA(pi)) { 27757 u32 *tx_gaintbl = 27758 wlc_phy_get_ipa_gaintbl_nphy(pi); 27759 txgain = tx_gaintbl[txpi[core]]; 27760 } else { 27761 if (CHSPEC_IS5G(pi->radio_chanspec)) { 27762 if (NREV_IS(phyrev, 3)) { 27763 txgain = 27764 nphy_tpc_5GHz_txgain_rev3 27765 [txpi[core]]; 27766 } else if (NREV_IS(phyrev, 4)) { 27767 txgain = ( 27768 pi->srom_fem5g.extpagain == 27769 3) ? 27770 nphy_tpc_5GHz_txgain_HiPwrEPA 27771 [txpi[core]] : 27772 nphy_tpc_5GHz_txgain_rev4 27773 [txpi[core]]; 27774 } else { 27775 txgain = 27776 nphy_tpc_5GHz_txgain_rev5 27777 [txpi[core]]; 27778 } 27779 } else { 27780 if (NREV_GE(phyrev, 5) && 27781 (pi->srom_fem2g.extpagain == 3)) { 27782 txgain = 27783 nphy_tpc_txgain_HiPwrEPA 27784 [txpi[core]]; 27785 } else { 27786 txgain = nphy_tpc_txgain_rev3 27787 [txpi[core]]; 27788 } 27789 } 27790 } 27791 } else { 27792 txgain = nphy_tpc_txgain[txpi[core]]; 27793 } 27794 27795 if (NREV_GE(phyrev, 3)) 27796 rad_gain = (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); 27797 else 27798 rad_gain = (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); 27799 27800 if (NREV_GE(phyrev, 7)) 27801 dac_gain = (txgain >> 8) & ((1 << (10 - 8 + 1)) - 1); 27802 else 27803 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 27804 27805 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 27806 27807 if (NREV_GE(phyrev, 3)) 27808 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 27809 0xa5), (0x1 << 8), (0x1 << 8)); 27810 else 27811 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 27812 27813 write_phy_reg(pi, (core == PHY_CORE_0) ? 0xaa : 0xab, dac_gain); 27814 27815 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 27816 &rad_gain); 27817 27818 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 27819 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 27820 m1m2 |= ((core == PHY_CORE_0) ? (bbmult << 8) : (bbmult << 0)); 27821 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 27822 27823 if (PHY_IPA(pi)) { 27824 wlc_phy_table_read_nphy(pi, 27825 (core == 27826 PHY_CORE_0 ? 27827 NPHY_TBL_ID_CORE1TXPWRCTL : 27828 NPHY_TBL_ID_CORE2TXPWRCTL), 1, 27829 576 + txpi[core], 32, 27830 &rfpwr_offset); 27831 27832 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27833 0x29b, (0x1ff << 4), 27834 ((s16) rfpwr_offset) << 4); 27835 27836 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 27837 0x29b, (0x1 << 2), (1) << 2); 27838 27839 } 27840 } 27841 27842 and_phy_reg(pi, 0xbf, (u16) (~(0x1f << 0))); 27843 27844 if (pi->phyhang_avoid) 27845 wlc_phy_stay_in_carriersearch_nphy(pi, false); 27846} 27847 27848static void 27849wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, u16 *pwr_offset, 27850 u8 tmp_max_pwr, u8 rate_start, 27851 u8 rate_end) 27852{ 27853 u8 rate; 27854 u8 word_num, nibble_num; 27855 u8 tmp_nibble; 27856 27857 for (rate = rate_start; rate <= rate_end; rate++) { 27858 word_num = (rate - rate_start) >> 2; 27859 nibble_num = (rate - rate_start) & 0x3; 27860 tmp_nibble = (pwr_offset[word_num] >> 4 * nibble_num) & 0xf; 27861 27862 srom_max[rate] = tmp_max_pwr - 2 * tmp_nibble; 27863 } 27864} 27865 27866static void 27867wlc_phy_txpwr_nphy_po_apply(u8 *srom_max, u8 pwr_offset, 27868 u8 rate_start, u8 rate_end) 27869{ 27870 u8 rate; 27871 27872 for (rate = rate_start; rate <= rate_end; rate++) 27873 srom_max[rate] -= 2 * pwr_offset; 27874} 27875 27876void 27877wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, 27878 u8 rate_mcs_end, u8 rate_ofdm_start) 27879{ 27880 u8 rate1, rate2; 27881 27882 rate2 = rate_ofdm_start; 27883 for (rate1 = rate_mcs_start; rate1 <= rate_mcs_end - 1; rate1++) { 27884 power[rate1] = power[rate2]; 27885 rate2 += (rate1 == rate_mcs_start) ? 2 : 1; 27886 } 27887 power[rate_mcs_end] = power[rate_mcs_end - 1]; 27888} 27889 27890void 27891wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, 27892 u8 rate_ofdm_end, u8 rate_mcs_start) 27893{ 27894 u8 rate1, rate2; 27895 27896 for (rate1 = rate_ofdm_start, rate2 = rate_mcs_start; 27897 rate1 <= rate_ofdm_end; rate1++, rate2++) { 27898 power[rate1] = power[rate2]; 27899 if (rate1 == rate_ofdm_start) 27900 power[++rate1] = power[rate2]; 27901 } 27902} 27903 27904void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi) 27905{ 27906 uint rate1, rate2, band_num; 27907 u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; 27908 u8 tmp_max_pwr = 0; 27909 u16 pwr_offsets1[2], *pwr_offsets2 = NULL; 27910 u8 *tx_srom_max_rate = NULL; 27911 27912 for (band_num = 0; band_num < (CH_2G_GROUP + CH_5G_GROUP); 27913 band_num++) { 27914 switch (band_num) { 27915 case 0: 27916 27917 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_2g, 27918 pi->nphy_pwrctrl_info[1].max_pwr_2g); 27919 27920 pwr_offsets1[0] = pi->cck2gpo; 27921 wlc_phy_txpwr_nphy_srom_convert(pi->tx_srom_max_rate_2g, 27922 pwr_offsets1, 27923 tmp_max_pwr, 27924 TXP_FIRST_CCK, 27925 TXP_LAST_CCK); 27926 27927 pwr_offsets1[0] = (u16) (pi->ofdm2gpo & 0xffff); 27928 pwr_offsets1[1] = 27929 (u16) (pi->ofdm2gpo >> 16) & 0xffff; 27930 27931 pwr_offsets2 = pi->mcs2gpo; 27932 27933 tmp_cddpo = pi->cdd2gpo; 27934 tmp_stbcpo = pi->stbc2gpo; 27935 tmp_bw40po = pi->bw402gpo; 27936 27937 tx_srom_max_rate = pi->tx_srom_max_rate_2g; 27938 break; 27939 case 1: 27940 27941 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gm, 27942 pi->nphy_pwrctrl_info[1].max_pwr_5gm); 27943 27944 pwr_offsets1[0] = (u16) (pi->ofdm5gpo & 0xffff); 27945 pwr_offsets1[1] = 27946 (u16) (pi->ofdm5gpo >> 16) & 0xffff; 27947 27948 pwr_offsets2 = pi->mcs5gpo; 27949 27950 tmp_cddpo = pi->cdd5gpo; 27951 tmp_stbcpo = pi->stbc5gpo; 27952 tmp_bw40po = pi->bw405gpo; 27953 27954 tx_srom_max_rate = pi->tx_srom_max_rate_5g_mid; 27955 break; 27956 case 2: 27957 27958 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gl, 27959 pi->nphy_pwrctrl_info[1].max_pwr_5gl); 27960 27961 pwr_offsets1[0] = (u16) (pi->ofdm5glpo & 0xffff); 27962 pwr_offsets1[1] = 27963 (u16) (pi->ofdm5glpo >> 16) & 0xffff; 27964 27965 pwr_offsets2 = pi->mcs5glpo; 27966 27967 tmp_cddpo = pi->cdd5glpo; 27968 tmp_stbcpo = pi->stbc5glpo; 27969 tmp_bw40po = pi->bw405glpo; 27970 27971 tx_srom_max_rate = pi->tx_srom_max_rate_5g_low; 27972 break; 27973 case 3: 27974 27975 tmp_max_pwr = min(pi->nphy_pwrctrl_info[0].max_pwr_5gh, 27976 pi->nphy_pwrctrl_info[1].max_pwr_5gh); 27977 27978 pwr_offsets1[0] = (u16) (pi->ofdm5ghpo & 0xffff); 27979 pwr_offsets1[1] = 27980 (u16) (pi->ofdm5ghpo >> 16) & 0xffff; 27981 27982 pwr_offsets2 = pi->mcs5ghpo; 27983 27984 tmp_cddpo = pi->cdd5ghpo; 27985 tmp_stbcpo = pi->stbc5ghpo; 27986 tmp_bw40po = pi->bw405ghpo; 27987 27988 tx_srom_max_rate = pi->tx_srom_max_rate_5g_hi; 27989 break; 27990 } 27991 27992 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets1, 27993 tmp_max_pwr, TXP_FIRST_OFDM, 27994 TXP_LAST_OFDM); 27995 27996 wlc_phy_ofdm_to_mcs_powers_nphy(tx_srom_max_rate, 27997 TXP_FIRST_MCS_20_SISO, 27998 TXP_LAST_MCS_20_SISO, 27999 TXP_FIRST_OFDM); 28000 28001 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 28002 tmp_max_pwr, 28003 TXP_FIRST_MCS_20_CDD, 28004 TXP_LAST_MCS_20_CDD); 28005 28006 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28007 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28008 TXP_FIRST_MCS_20_CDD, 28009 TXP_LAST_MCS_20_CDD); 28010 28011 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28012 TXP_FIRST_OFDM_20_CDD, 28013 TXP_LAST_OFDM_20_CDD, 28014 TXP_FIRST_MCS_20_CDD); 28015 28016 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, pwr_offsets2, 28017 tmp_max_pwr, 28018 TXP_FIRST_MCS_20_STBC, 28019 TXP_LAST_MCS_20_STBC); 28020 28021 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28022 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28023 tmp_stbcpo, 28024 TXP_FIRST_MCS_20_STBC, 28025 TXP_LAST_MCS_20_STBC); 28026 28027 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28028 &pwr_offsets2[2], tmp_max_pwr, 28029 TXP_FIRST_MCS_20_SDM, 28030 TXP_LAST_MCS_20_SDM); 28031 28032 if (NPHY_IS_SROM_REINTERPRET) { 28033 28034 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28035 &pwr_offsets2[4], 28036 tmp_max_pwr, 28037 TXP_FIRST_MCS_40_SISO, 28038 TXP_LAST_MCS_40_SISO); 28039 28040 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28041 TXP_FIRST_OFDM_40_SISO, 28042 TXP_LAST_OFDM_40_SISO, 28043 TXP_FIRST_MCS_40_SISO); 28044 28045 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28046 &pwr_offsets2[4], 28047 tmp_max_pwr, 28048 TXP_FIRST_MCS_40_CDD, 28049 TXP_LAST_MCS_40_CDD); 28050 28051 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, tmp_cddpo, 28052 TXP_FIRST_MCS_40_CDD, 28053 TXP_LAST_MCS_40_CDD); 28054 28055 wlc_phy_mcs_to_ofdm_powers_nphy(tx_srom_max_rate, 28056 TXP_FIRST_OFDM_40_CDD, 28057 TXP_LAST_OFDM_40_CDD, 28058 TXP_FIRST_MCS_40_CDD); 28059 28060 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28061 &pwr_offsets2[4], 28062 tmp_max_pwr, 28063 TXP_FIRST_MCS_40_STBC, 28064 TXP_LAST_MCS_40_STBC); 28065 28066 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28067 tmp_stbcpo, 28068 TXP_FIRST_MCS_40_STBC, 28069 TXP_LAST_MCS_40_STBC); 28070 28071 wlc_phy_txpwr_nphy_srom_convert(tx_srom_max_rate, 28072 &pwr_offsets2[6], 28073 tmp_max_pwr, 28074 TXP_FIRST_MCS_40_SDM, 28075 TXP_LAST_MCS_40_SDM); 28076 } else { 28077 28078 for (rate1 = TXP_FIRST_OFDM_40_SISO, rate2 = 28079 TXP_FIRST_OFDM; 28080 rate1 <= TXP_LAST_MCS_40_SDM; 28081 rate1++, rate2++) 28082 tx_srom_max_rate[rate1] = 28083 tx_srom_max_rate[rate2]; 28084 } 28085 28086 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28087 wlc_phy_txpwr_nphy_po_apply(tx_srom_max_rate, 28088 tmp_bw40po, 28089 TXP_FIRST_OFDM_40_SISO, 28090 TXP_LAST_MCS_40_SDM); 28091 28092 tx_srom_max_rate[TXP_MCS_32] = 28093 tx_srom_max_rate[TXP_FIRST_MCS_40_CDD]; 28094 } 28095 28096 return; 28097} 28098 28099void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi) 28100{ 28101 u8 tx_pwr_ctrl_state; 28102 wlc_phy_txpwr_limit_to_tbl_nphy(pi); 28103 wlc_phy_txpwrctrl_pwr_setup_nphy(pi); 28104 28105 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28106 28107 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) { 28108 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, MCTL_PHYLOCK); 28109 (void)bcma_read32(pi->d11core, D11REGOFFS(maccontrol)); 28110 udelay(1); 28111 } 28112 28113 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28114 28115 if (D11REV_IS(pi->sh->corerev, 11) || D11REV_IS(pi->sh->corerev, 12)) 28116 wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); 28117} 28118 28119static bool wlc_phy_txpwr_ison_nphy(struct brcms_phy *pi) 28120{ 28121 return read_phy_reg((pi), 0x1e7) & ((0x1 << 15) | 28122 (0x1 << 14) | (0x1 << 13)); 28123} 28124 28125u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi) 28126{ 28127 u16 tmp; 28128 u16 pwr_idx[2]; 28129 28130 if (wlc_phy_txpwr_ison_nphy(pi)) { 28131 pwr_idx[0] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_0); 28132 pwr_idx[1] = wlc_phy_txpwr_idx_cur_get_nphy(pi, PHY_CORE_1); 28133 28134 tmp = (pwr_idx[0] << 8) | pwr_idx[1]; 28135 } else { 28136 tmp = ((pi->nphy_txpwrindex[PHY_CORE_0].index_internal & 0xff) 28137 << 8) | 28138 (pi->nphy_txpwrindex[PHY_CORE_1].index_internal & 0xff); 28139 } 28140 28141 return tmp; 28142} 28143 28144void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi) 28145{ 28146 if (PHY_IPA(pi) 28147 && (pi->nphy_force_papd_cal 28148 || (wlc_phy_txpwr_ison_nphy(pi) 28149 && 28150 (((u32) 28151 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 0) - 28152 pi->nphy_papd_tx_gain_at_last_cal[0]) >= 4) 28153 || ((u32) 28154 abs(wlc_phy_txpwr_idx_cur_get_nphy(pi, 1) - 28155 pi->nphy_papd_tx_gain_at_last_cal[1]) >= 4))))) 28156 wlc_phy_a4(pi, true); 28157} 28158 28159void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type) 28160{ 28161 u16 mask = 0, val = 0, ishw = 0; 28162 u8 ctr; 28163 uint core; 28164 u32 tbl_offset; 28165 u32 tbl_len; 28166 u16 regval[84]; 28167 28168 if (pi->phyhang_avoid) 28169 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28170 28171 switch (ctrl_type) { 28172 case PHY_TPC_HW_OFF: 28173 case PHY_TPC_HW_ON: 28174 pi->nphy_txpwrctrl = ctrl_type; 28175 break; 28176 default: 28177 break; 28178 } 28179 28180 if (ctrl_type == PHY_TPC_HW_OFF) { 28181 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28182 28183 if (wlc_phy_txpwr_ison_nphy(pi)) { 28184 for (core = 0; core < pi->pubpi.phy_corenum; 28185 core++) 28186 pi->nphy_txpwr_idx[core] = 28187 wlc_phy_txpwr_idx_cur_get_nphy( 28188 pi, 28189 (u8) core); 28190 } 28191 28192 } 28193 28194 tbl_len = 84; 28195 tbl_offset = 64; 28196 for (ctr = 0; ctr < tbl_len; ctr++) 28197 regval[ctr] = 0; 28198 wlc_phy_table_write_nphy(pi, 26, tbl_len, tbl_offset, 16, 28199 regval); 28200 wlc_phy_table_write_nphy(pi, 27, tbl_len, tbl_offset, 16, 28201 regval); 28202 28203 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28204 and_phy_reg(pi, 0x1e7, 28205 (u16) (~((0x1 << 15) | 28206 (0x1 << 14) | (0x1 << 13)))); 28207 else 28208 and_phy_reg(pi, 0x1e7, 28209 (u16) (~((0x1 << 14) | (0x1 << 13)))); 28210 28211 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28212 or_phy_reg(pi, 0x8f, (0x1 << 8)); 28213 or_phy_reg(pi, 0xa5, (0x1 << 8)); 28214 } else { 28215 or_phy_reg(pi, 0xa5, (0x1 << 14)); 28216 } 28217 28218 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28219 mod_phy_reg(pi, 0xdc, 0x00ff, 0x53); 28220 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28221 mod_phy_reg(pi, 0xdc, 0x00ff, 0x5a); 28222 28223 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28224 pi->bw == WL_CHANSPEC_BW_40) 28225 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28226 MHF1_IQSWAP_WAR, BRCM_BAND_ALL); 28227 28228 } else { 28229 28230 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE1TXPWRCTL, 84, 64, 28231 8, pi->adj_pwr_tbl_nphy); 28232 wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_CORE2TXPWRCTL, 84, 64, 28233 8, pi->adj_pwr_tbl_nphy); 28234 28235 ishw = (ctrl_type == PHY_TPC_HW_ON) ? 0x1 : 0x0; 28236 mask = (0x1 << 14) | (0x1 << 13); 28237 val = (ishw << 14) | (ishw << 13); 28238 28239 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28240 mask |= (0x1 << 15); 28241 val |= (ishw << 15); 28242 } 28243 28244 mod_phy_reg(pi, 0x1e7, mask, val); 28245 28246 if (CHSPEC_IS5G(pi->radio_chanspec)) { 28247 if (NREV_GE(pi->pubpi.phy_rev, 7)) { 28248 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x32); 28249 mod_phy_reg(pi, 0x222, (0xff << 0), 0x32); 28250 } else { 28251 mod_phy_reg(pi, 0x1e7, (0x7f << 0), 0x64); 28252 if (NREV_GT(pi->pubpi.phy_rev, 1)) 28253 mod_phy_reg(pi, 0x222, 28254 (0xff << 0), 0x64); 28255 } 28256 } 28257 28258 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28259 if ((pi->nphy_txpwr_idx[0] != 128) 28260 && (pi->nphy_txpwr_idx[1] != 128)) 28261 wlc_phy_txpwr_idx_cur_set_nphy(pi, 28262 pi-> 28263 nphy_txpwr_idx 28264 [0], 28265 pi-> 28266 nphy_txpwr_idx 28267 [1]); 28268 } 28269 28270 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28271 and_phy_reg(pi, 0x8f, ~(0x1 << 8)); 28272 and_phy_reg(pi, 0xa5, ~(0x1 << 8)); 28273 } else { 28274 and_phy_reg(pi, 0xa5, ~(0x1 << 14)); 28275 } 28276 28277 if (NREV_IS(pi->pubpi.phy_rev, 2)) 28278 mod_phy_reg(pi, 0xdc, 0x00ff, 0x3b); 28279 else if (NREV_LT(pi->pubpi.phy_rev, 2)) 28280 mod_phy_reg(pi, 0xdc, 0x00ff, 0x40); 28281 28282 if (NREV_LT(pi->pubpi.phy_rev, 2) && 28283 pi->bw == WL_CHANSPEC_BW_40) 28284 wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, 28285 0x0, BRCM_BAND_ALL); 28286 28287 if (PHY_IPA(pi)) { 28288 mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : 28289 0x29b, (0x1 << 2), (0) << 2); 28290 28291 mod_phy_reg(pi, (1 == PHY_CORE_0) ? 0x297 : 28292 0x29b, (0x1 << 2), (0) << 2); 28293 28294 } 28295 28296 } 28297 28298 if (pi->phyhang_avoid) 28299 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28300} 28301 28302void 28303wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask, s8 txpwrindex, 28304 bool restore_cals) 28305{ 28306 u8 core, txpwrctl_tbl; 28307 u16 tx_ind0, iq_ind0, lo_ind0; 28308 u16 m1m2; 28309 u32 txgain; 28310 u16 rad_gain, dac_gain; 28311 u8 bbmult; 28312 u32 iqcomp; 28313 u16 iqcomp_a, iqcomp_b; 28314 u32 locomp; 28315 u16 tmpval; 28316 u8 tx_pwr_ctrl_state; 28317 s32 rfpwr_offset; 28318 u16 regval[2]; 28319 28320 if (pi->phyhang_avoid) 28321 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28322 28323 tx_ind0 = 192; 28324 iq_ind0 = 320; 28325 lo_ind0 = 448; 28326 28327 for (core = 0; core < pi->pubpi.phy_corenum; core++) { 28328 28329 if ((core_mask & (1 << core)) == 0) 28330 continue; 28331 28332 txpwrctl_tbl = (core == PHY_CORE_0) ? 26 : 27; 28333 28334 if (txpwrindex < 0) { 28335 if (pi->nphy_txpwrindex[core].index < 0) 28336 continue; 28337 28338 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28339 mod_phy_reg(pi, 0x8f, 28340 (0x1 << 8), 28341 pi->nphy_txpwrindex[core]. 28342 AfectrlOverride); 28343 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28344 pi->nphy_txpwrindex[core]. 28345 AfectrlOverride); 28346 } else { 28347 mod_phy_reg(pi, 0xa5, 28348 (0x1 << 14), 28349 pi->nphy_txpwrindex[core]. 28350 AfectrlOverride); 28351 } 28352 28353 write_phy_reg(pi, (core == PHY_CORE_0) ? 28354 0xaa : 0xab, 28355 pi->nphy_txpwrindex[core].AfeCtrlDacGain); 28356 28357 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28358 &pi->nphy_txpwrindex[core]. 28359 rad_gain); 28360 28361 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28362 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28363 m1m2 |= ((core == PHY_CORE_0) ? 28364 (pi->nphy_txpwrindex[core].bbmult << 8) : 28365 (pi->nphy_txpwrindex[core].bbmult << 0)); 28366 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28367 28368 if (restore_cals) { 28369 wlc_phy_table_write_nphy( 28370 pi, 15, 2, (80 + 2 * core), 16, 28371 &pi->nphy_txpwrindex[core].iqcomp_a); 28372 wlc_phy_table_write_nphy( 28373 pi, 15, 1, (85 + core), 16, 28374 &pi->nphy_txpwrindex[core].locomp); 28375 wlc_phy_table_write_nphy( 28376 pi, 15, 1, (93 + core), 16, 28377 &pi->nphy_txpwrindex[core].locomp); 28378 } 28379 28380 wlc_phy_txpwrctrl_enable_nphy(pi, pi->nphy_txpwrctrl); 28381 28382 pi->nphy_txpwrindex[core].index_internal = 28383 pi->nphy_txpwrindex[core].index_internal_save; 28384 } else { 28385 28386 if (pi->nphy_txpwrindex[core].index < 0) { 28387 28388 if (NREV_GE(pi->pubpi.phy_rev, 3)) { 28389 mod_phy_reg(pi, 0x8f, 28390 (0x1 << 8), 28391 pi->nphy_txpwrindex[core]. 28392 AfectrlOverride); 28393 mod_phy_reg(pi, 0xa5, (0x1 << 8), 28394 pi->nphy_txpwrindex[core]. 28395 AfectrlOverride); 28396 } else { 28397 pi->nphy_txpwrindex[core]. 28398 AfectrlOverride = 28399 read_phy_reg(pi, 0xa5); 28400 } 28401 28402 pi->nphy_txpwrindex[core].AfeCtrlDacGain = 28403 read_phy_reg(pi, (core == PHY_CORE_0) ? 28404 0xaa : 0xab); 28405 28406 wlc_phy_table_read_nphy(pi, 7, 1, 28407 (0x110 + core), 16, 28408 &pi-> 28409 nphy_txpwrindex[core]. 28410 rad_gain); 28411 28412 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, 28413 &tmpval); 28414 tmpval >>= ((core == PHY_CORE_0) ? 8 : 0); 28415 tmpval &= 0xff; 28416 pi->nphy_txpwrindex[core].bbmult = (u8) tmpval; 28417 28418 wlc_phy_table_read_nphy(pi, 15, 2, 28419 (80 + 2 * core), 16, 28420 &pi-> 28421 nphy_txpwrindex[core]. 28422 iqcomp_a); 28423 28424 wlc_phy_table_read_nphy(pi, 15, 1, (85 + core), 28425 16, 28426 &pi-> 28427 nphy_txpwrindex[core]. 28428 locomp); 28429 28430 pi->nphy_txpwrindex[core].index_internal_save = 28431 pi->nphy_txpwrindex[core]. 28432 index_internal; 28433 } 28434 28435 tx_pwr_ctrl_state = pi->nphy_txpwrctrl; 28436 wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); 28437 28438 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28439 wlapi_bmac_phyclk_fgc(pi->sh->physhim, ON); 28440 28441 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28442 (tx_ind0 + txpwrindex), 32, 28443 &txgain); 28444 28445 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28446 rad_gain = (txgain >> 16) & 28447 ((1 << (32 - 16 + 1)) - 1); 28448 else 28449 rad_gain = (txgain >> 16) & 28450 ((1 << (28 - 16 + 1)) - 1); 28451 28452 dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); 28453 bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); 28454 28455 if (NREV_GE(pi->pubpi.phy_rev, 3)) 28456 mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 28457 0xa5), (0x1 << 8), (0x1 << 8)); 28458 else 28459 mod_phy_reg(pi, 0xa5, (0x1 << 14), (0x1 << 14)); 28460 28461 write_phy_reg(pi, (core == PHY_CORE_0) ? 28462 0xaa : 0xab, dac_gain); 28463 28464 wlc_phy_table_write_nphy(pi, 7, 1, (0x110 + core), 16, 28465 &rad_gain); 28466 28467 wlc_phy_table_read_nphy(pi, 15, 1, 87, 16, &m1m2); 28468 m1m2 &= ((core == PHY_CORE_0) ? 0x00ff : 0xff00); 28469 m1m2 |= ((core == PHY_CORE_0) ? 28470 (bbmult << 8) : (bbmult << 0)); 28471 28472 wlc_phy_table_write_nphy(pi, 15, 1, 87, 16, &m1m2); 28473 28474 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28475 (iq_ind0 + txpwrindex), 32, 28476 &iqcomp); 28477 iqcomp_a = (iqcomp >> 10) & ((1 << (19 - 10 + 1)) - 1); 28478 iqcomp_b = (iqcomp >> 0) & ((1 << (9 - 0 + 1)) - 1); 28479 28480 if (restore_cals) { 28481 regval[0] = (u16) iqcomp_a; 28482 regval[1] = (u16) iqcomp_b; 28483 wlc_phy_table_write_nphy(pi, 15, 2, 28484 (80 + 2 * core), 16, 28485 regval); 28486 } 28487 28488 wlc_phy_table_read_nphy(pi, txpwrctl_tbl, 1, 28489 (lo_ind0 + txpwrindex), 32, 28490 &locomp); 28491 if (restore_cals) 28492 wlc_phy_table_write_nphy(pi, 15, 1, (85 + core), 28493 16, &locomp); 28494 28495 if (NREV_IS(pi->pubpi.phy_rev, 1)) 28496 wlapi_bmac_phyclk_fgc(pi->sh->physhim, OFF); 28497 28498 if (PHY_IPA(pi)) { 28499 wlc_phy_table_read_nphy(pi, 28500 (core == PHY_CORE_0 ? 28501 NPHY_TBL_ID_CORE1TXPWRCTL : 28502 NPHY_TBL_ID_CORE2TXPWRCTL), 28503 1, 576 + txpwrindex, 32, 28504 &rfpwr_offset); 28505 28506 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28507 0x29b, (0x1ff << 4), 28508 ((s16) rfpwr_offset) << 4); 28509 28510 mod_phy_reg(pi, (core == PHY_CORE_0) ? 0x297 : 28511 0x29b, (0x1 << 2), (1) << 2); 28512 28513 } 28514 28515 wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); 28516 } 28517 28518 pi->nphy_txpwrindex[core].index = txpwrindex; 28519 } 28520 28521 if (pi->phyhang_avoid) 28522 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28523} 28524 28525void 28526wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan, u8 *max_pwr, 28527 u8 txp_rate_idx) 28528{ 28529 u8 chan_freq_range; 28530 28531 chan_freq_range = wlc_phy_get_chan_freq_range_nphy(pi, chan); 28532 switch (chan_freq_range) { 28533 case WL_CHAN_FREQ_RANGE_2G: 28534 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28535 break; 28536 case WL_CHAN_FREQ_RANGE_5GM: 28537 *max_pwr = pi->tx_srom_max_rate_5g_mid[txp_rate_idx]; 28538 break; 28539 case WL_CHAN_FREQ_RANGE_5GL: 28540 *max_pwr = pi->tx_srom_max_rate_5g_low[txp_rate_idx]; 28541 break; 28542 case WL_CHAN_FREQ_RANGE_5GH: 28543 *max_pwr = pi->tx_srom_max_rate_5g_hi[txp_rate_idx]; 28544 break; 28545 default: 28546 *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; 28547 break; 28548 } 28549 28550 return; 28551} 28552 28553void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi, bool enable) 28554{ 28555 u16 clip_off[] = { 0xffff, 0xffff }; 28556 28557 if (enable) { 28558 if (pi->nphy_deaf_count == 0) { 28559 pi->classifier_state = 28560 wlc_phy_classifier_nphy(pi, 0, 0); 28561 wlc_phy_classifier_nphy(pi, (0x7 << 0), 4); 28562 wlc_phy_clip_det_nphy(pi, 0, pi->clip_state); 28563 wlc_phy_clip_det_nphy(pi, 1, clip_off); 28564 } 28565 28566 pi->nphy_deaf_count++; 28567 28568 wlc_phy_resetcca_nphy(pi); 28569 28570 } else { 28571 pi->nphy_deaf_count--; 28572 28573 if (pi->nphy_deaf_count == 0) { 28574 wlc_phy_classifier_nphy(pi, (0x7 << 0), 28575 pi->classifier_state); 28576 wlc_phy_clip_det_nphy(pi, 1, pi->clip_state); 28577 } 28578 } 28579} 28580 28581void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode) 28582{ 28583 wlapi_suspend_mac_and_wait(pi->sh->physhim); 28584 28585 if (mode) { 28586 if (pi->nphy_deaf_count == 0) 28587 wlc_phy_stay_in_carriersearch_nphy(pi, true); 28588 } else if (pi->nphy_deaf_count > 0) { 28589 wlc_phy_stay_in_carriersearch_nphy(pi, false); 28590 } 28591 28592 wlapi_enable_mac(pi->sh->physhim); 28593}