cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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img.h (7280B)


      1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
      2/*
      3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
      4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
      5 * Copyright (C) 2016 Intel Deutschland GmbH
      6 */
      7#ifndef __iwl_fw_img_h__
      8#define __iwl_fw_img_h__
      9#include <linux/types.h>
     10
     11#include "api/dbg-tlv.h"
     12
     13#include "file.h"
     14#include "error-dump.h"
     15
     16/**
     17 * enum iwl_ucode_type
     18 *
     19 * The type of ucode.
     20 *
     21 * @IWL_UCODE_REGULAR: Normal runtime ucode
     22 * @IWL_UCODE_INIT: Initial ucode
     23 * @IWL_UCODE_WOWLAN: Wake on Wireless enabled ucode
     24 * @IWL_UCODE_REGULAR_USNIFFER: Normal runtime ucode when using usniffer image
     25 */
     26enum iwl_ucode_type {
     27	IWL_UCODE_REGULAR,
     28	IWL_UCODE_INIT,
     29	IWL_UCODE_WOWLAN,
     30	IWL_UCODE_REGULAR_USNIFFER,
     31	IWL_UCODE_TYPE_MAX,
     32};
     33
     34/*
     35 * enumeration of ucode section.
     36 * This enumeration is used directly for older firmware (before 16.0).
     37 * For new firmware, there can be up to 4 sections (see below) but the
     38 * first one packaged into the firmware file is the DATA section and
     39 * some debugging code accesses that.
     40 */
     41enum iwl_ucode_sec {
     42	IWL_UCODE_SECTION_DATA,
     43	IWL_UCODE_SECTION_INST,
     44};
     45
     46struct iwl_ucode_capabilities {
     47	u32 max_probe_length;
     48	u32 n_scan_channels;
     49	u32 standard_phy_calibration_size;
     50	u32 flags;
     51	u32 error_log_addr;
     52	u32 error_log_size;
     53	u32 num_stations;
     54	unsigned long _api[BITS_TO_LONGS(NUM_IWL_UCODE_TLV_API)];
     55	unsigned long _capa[BITS_TO_LONGS(NUM_IWL_UCODE_TLV_CAPA)];
     56
     57	const struct iwl_fw_cmd_version *cmd_versions;
     58	u32 n_cmd_versions;
     59};
     60
     61static inline bool
     62fw_has_api(const struct iwl_ucode_capabilities *capabilities,
     63	   iwl_ucode_tlv_api_t api)
     64{
     65	return test_bit((__force long)api, capabilities->_api);
     66}
     67
     68static inline bool
     69fw_has_capa(const struct iwl_ucode_capabilities *capabilities,
     70	    iwl_ucode_tlv_capa_t capa)
     71{
     72	return test_bit((__force long)capa, capabilities->_capa);
     73}
     74
     75/* one for each uCode image (inst/data, init/runtime/wowlan) */
     76struct fw_desc {
     77	const void *data;	/* vmalloc'ed data */
     78	u32 len;		/* size in bytes */
     79	u32 offset;		/* offset in the device */
     80};
     81
     82struct fw_img {
     83	struct fw_desc *sec;
     84	int num_sec;
     85	bool is_dual_cpus;
     86	u32 paging_mem_size;
     87};
     88
     89/*
     90 * Block paging calculations
     91 */
     92#define PAGE_2_EXP_SIZE 12 /* 4K == 2^12 */
     93#define FW_PAGING_SIZE BIT(PAGE_2_EXP_SIZE) /* page size is 4KB */
     94#define PAGE_PER_GROUP_2_EXP_SIZE 3
     95/* 8 pages per group */
     96#define NUM_OF_PAGE_PER_GROUP BIT(PAGE_PER_GROUP_2_EXP_SIZE)
     97/* don't change, support only 32KB size */
     98#define PAGING_BLOCK_SIZE (NUM_OF_PAGE_PER_GROUP * FW_PAGING_SIZE)
     99/* 32K == 2^15 */
    100#define BLOCK_2_EXP_SIZE (PAGE_2_EXP_SIZE + PAGE_PER_GROUP_2_EXP_SIZE)
    101
    102/*
    103 * Image paging calculations
    104 */
    105#define BLOCK_PER_IMAGE_2_EXP_SIZE 5
    106/* 2^5 == 32 blocks per image */
    107#define NUM_OF_BLOCK_PER_IMAGE BIT(BLOCK_PER_IMAGE_2_EXP_SIZE)
    108/* maximum image size 1024KB */
    109#define MAX_PAGING_IMAGE_SIZE (NUM_OF_BLOCK_PER_IMAGE * PAGING_BLOCK_SIZE)
    110
    111/* Virtual address signature */
    112#define PAGING_ADDR_SIG 0xAA000000
    113
    114#define PAGING_CMD_IS_SECURED BIT(9)
    115#define PAGING_CMD_IS_ENABLED BIT(8)
    116#define PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS	0
    117#define PAGING_TLV_SECURE_MASK 1
    118
    119/* FW MSB Mask for regions/cache_control */
    120#define FW_ADDR_CACHE_CONTROL 0xC0000000UL
    121
    122/**
    123 * struct iwl_fw_paging
    124 * @fw_paging_phys: page phy pointer
    125 * @fw_paging_block: pointer to the allocated block
    126 * @fw_paging_size: page size
    127 * @fw_offs: offset in the device
    128 */
    129struct iwl_fw_paging {
    130	dma_addr_t fw_paging_phys;
    131	struct page *fw_paging_block;
    132	u32 fw_paging_size;
    133	u32 fw_offs;
    134};
    135
    136/**
    137 * enum iwl_fw_type - iwlwifi firmware type
    138 * @IWL_FW_DVM: DVM firmware
    139 * @IWL_FW_MVM: MVM firmware
    140 */
    141enum iwl_fw_type {
    142	IWL_FW_DVM,
    143	IWL_FW_MVM,
    144};
    145
    146/**
    147 * struct iwl_fw_dbg - debug data
    148 *
    149 * @dest_tlv: points to debug destination TLV (typically SRAM or DRAM)
    150 * @n_dest_reg: num of reg_ops in dest_tlv
    151 * @conf_tlv: array of pointers to configuration HCMDs
    152 * @trigger_tlv: array of pointers to triggers TLVs
    153 * @trigger_tlv_len: lengths of the @dbg_trigger_tlv entries
    154 * @mem_tlv: Runtime addresses to dump
    155 * @n_mem_tlv: number of runtime addresses
    156 * @dump_mask: bitmask of dump regions
    157*/
    158struct iwl_fw_dbg {
    159	struct iwl_fw_dbg_dest_tlv_v1 *dest_tlv;
    160	u8 n_dest_reg;
    161	struct iwl_fw_dbg_conf_tlv *conf_tlv[FW_DBG_CONF_MAX];
    162	struct iwl_fw_dbg_trigger_tlv *trigger_tlv[FW_DBG_TRIGGER_MAX];
    163	size_t trigger_tlv_len[FW_DBG_TRIGGER_MAX];
    164	struct iwl_fw_dbg_mem_seg_tlv *mem_tlv;
    165	size_t n_mem_tlv;
    166	u32 dump_mask;
    167};
    168
    169struct iwl_dump_exclude {
    170	u32 addr, size;
    171};
    172
    173/**
    174 * struct iwl_fw - variables associated with the firmware
    175 *
    176 * @ucode_ver: ucode version from the ucode file
    177 * @fw_version: firmware version string
    178 * @img: ucode image like ucode_rt, ucode_init, ucode_wowlan.
    179 * @iml_len: length of the image loader image
    180 * @iml: image loader fw image
    181 * @ucode_capa: capabilities parsed from the ucode file.
    182 * @enhance_sensitivity_table: device can do enhanced sensitivity.
    183 * @init_evtlog_ptr: event log offset for init ucode.
    184 * @init_evtlog_size: event log size for init ucode.
    185 * @init_errlog_ptr: error log offfset for init ucode.
    186 * @inst_evtlog_ptr: event log offset for runtime ucode.
    187 * @inst_evtlog_size: event log size for runtime ucode.
    188 * @inst_errlog_ptr: error log offfset for runtime ucode.
    189 * @type: firmware type (&enum iwl_fw_type)
    190 * @human_readable: human readable version
    191 *	we get the ALIVE from the uCode
    192 * @phy_integration_ver: PHY integration version string
    193 * @phy_integration_ver_len: length of @phy_integration_ver
    194 * @dump_excl: image dump exclusion areas for RT image
    195 * @dump_excl_wowlan: image dump exclusion areas for WoWLAN image
    196 */
    197struct iwl_fw {
    198	u32 ucode_ver;
    199
    200	char fw_version[64];
    201
    202	/* ucode images */
    203	struct fw_img img[IWL_UCODE_TYPE_MAX];
    204	size_t iml_len;
    205	u8 *iml;
    206
    207	struct iwl_ucode_capabilities ucode_capa;
    208	bool enhance_sensitivity_table;
    209
    210	u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
    211	u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
    212
    213	struct iwl_tlv_calib_ctrl default_calib[IWL_UCODE_TYPE_MAX];
    214	u32 phy_config;
    215	u8 valid_tx_ant;
    216	u8 valid_rx_ant;
    217
    218	enum iwl_fw_type type;
    219
    220	u8 human_readable[FW_VER_HUMAN_READABLE_SZ];
    221
    222	struct iwl_fw_dbg dbg;
    223
    224	u8 *phy_integration_ver;
    225	u32 phy_integration_ver_len;
    226
    227	struct iwl_dump_exclude dump_excl[2], dump_excl_wowlan[2];
    228};
    229
    230static inline const char *get_fw_dbg_mode_string(int mode)
    231{
    232	switch (mode) {
    233	case SMEM_MODE:
    234		return "SMEM";
    235	case EXTERNAL_MODE:
    236		return "EXTERNAL_DRAM";
    237	case MARBH_MODE:
    238		return "MARBH";
    239	case MIPI_MODE:
    240		return "MIPI";
    241	default:
    242		return "UNKNOWN";
    243	}
    244}
    245
    246static inline bool
    247iwl_fw_dbg_conf_usniffer(const struct iwl_fw *fw, u8 id)
    248{
    249	const struct iwl_fw_dbg_conf_tlv *conf_tlv = fw->dbg.conf_tlv[id];
    250
    251	if (!conf_tlv)
    252		return false;
    253
    254	return conf_tlv->usniffer;
    255}
    256
    257static inline const struct fw_img *
    258iwl_get_ucode_image(const struct iwl_fw *fw, enum iwl_ucode_type ucode_type)
    259{
    260	if (ucode_type >= IWL_UCODE_TYPE_MAX)
    261		return NULL;
    262
    263	return &fw->img[ucode_type];
    264}
    265
    266u8 iwl_fw_lookup_cmd_ver(const struct iwl_fw *fw, u32 cmd_id, u8 def);
    267
    268u8 iwl_fw_lookup_notif_ver(const struct iwl_fw *fw, u8 grp, u8 cmd, u8 def);
    269const char *iwl_fw_lookup_assert_desc(u32 num);
    270
    271#define FW_SYSASSERT_CPU_MASK		0xf0000000
    272#define FW_SYSASSERT_PNVM_MISSING	0x0010070d
    273
    274#endif  /* __iwl_fw_img_h__ */