init.c (4521B)
1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2/* 3 * Copyright (C) 2017 Intel Deutschland GmbH 4 * Copyright (C) 2019-2021 Intel Corporation 5 */ 6#include "iwl-drv.h" 7#include "runtime.h" 8#include "dbg.h" 9#include "debugfs.h" 10 11#include "fw/api/system.h" 12#include "fw/api/commands.h" 13#include "fw/api/rx.h" 14#include "fw/api/datapath.h" 15 16void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt, struct iwl_trans *trans, 17 const struct iwl_fw *fw, 18 const struct iwl_fw_runtime_ops *ops, void *ops_ctx, 19 const struct iwl_dump_sanitize_ops *sanitize_ops, 20 void *sanitize_ctx, 21 struct dentry *dbgfs_dir) 22{ 23 int i; 24 25 memset(fwrt, 0, sizeof(*fwrt)); 26 fwrt->trans = trans; 27 fwrt->fw = fw; 28 fwrt->dev = trans->dev; 29 fwrt->dump.conf = FW_DBG_INVALID; 30 fwrt->ops = ops; 31 fwrt->sanitize_ops = sanitize_ops; 32 fwrt->sanitize_ctx = sanitize_ctx; 33 fwrt->ops_ctx = ops_ctx; 34 for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++) { 35 fwrt->dump.wks[i].idx = i; 36 INIT_DELAYED_WORK(&fwrt->dump.wks[i].wk, iwl_fw_error_dump_wk); 37 } 38 iwl_fwrt_dbgfs_register(fwrt, dbgfs_dir); 39} 40IWL_EXPORT_SYMBOL(iwl_fw_runtime_init); 41 42void iwl_fw_runtime_suspend(struct iwl_fw_runtime *fwrt) 43{ 44 iwl_fw_suspend_timestamp(fwrt); 45 iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_START, NULL); 46} 47IWL_EXPORT_SYMBOL(iwl_fw_runtime_suspend); 48 49void iwl_fw_runtime_resume(struct iwl_fw_runtime *fwrt) 50{ 51 iwl_dbg_tlv_time_point(fwrt, IWL_FW_INI_TIME_POINT_HOST_D3_END, NULL); 52 iwl_fw_resume_timestamp(fwrt); 53} 54IWL_EXPORT_SYMBOL(iwl_fw_runtime_resume); 55 56/* set device type and latency */ 57int iwl_set_soc_latency(struct iwl_fw_runtime *fwrt) 58{ 59 struct iwl_soc_configuration_cmd cmd = {}; 60 struct iwl_host_cmd hcmd = { 61 .id = WIDE_ID(SYSTEM_GROUP, SOC_CONFIGURATION_CMD), 62 .data[0] = &cmd, 63 .len[0] = sizeof(cmd), 64 }; 65 int ret; 66 67 /* 68 * In VER_1 of this command, the discrete value is considered 69 * an integer; In VER_2, it's a bitmask. Since we have only 2 70 * values in VER_1, this is backwards-compatible with VER_2, 71 * as long as we don't set any other bits. 72 */ 73 if (!fwrt->trans->trans_cfg->integrated) 74 cmd.flags = cpu_to_le32(SOC_CONFIG_CMD_FLAGS_DISCRETE); 75 76 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_NONE != 77 SOC_FLAGS_LTR_APPLY_DELAY_NONE); 78 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_200US != 79 SOC_FLAGS_LTR_APPLY_DELAY_200); 80 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_2500US != 81 SOC_FLAGS_LTR_APPLY_DELAY_2500); 82 BUILD_BUG_ON(IWL_CFG_TRANS_LTR_DELAY_1820US != 83 SOC_FLAGS_LTR_APPLY_DELAY_1820); 84 85 if (fwrt->trans->trans_cfg->ltr_delay != IWL_CFG_TRANS_LTR_DELAY_NONE && 86 !WARN_ON(!fwrt->trans->trans_cfg->integrated)) 87 cmd.flags |= le32_encode_bits(fwrt->trans->trans_cfg->ltr_delay, 88 SOC_FLAGS_LTR_APPLY_DELAY_MASK); 89 90 if (iwl_fw_lookup_cmd_ver(fwrt->fw, SCAN_REQ_UMAC, 91 IWL_FW_CMD_VER_UNKNOWN) >= 2 && 92 fwrt->trans->trans_cfg->low_latency_xtal) 93 cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY); 94 95 cmd.latency = cpu_to_le32(fwrt->trans->trans_cfg->xtal_latency); 96 97 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd); 98 if (ret) 99 IWL_ERR(fwrt, "Failed to set soc latency: %d\n", ret); 100 return ret; 101} 102IWL_EXPORT_SYMBOL(iwl_set_soc_latency); 103 104int iwl_configure_rxq(struct iwl_fw_runtime *fwrt) 105{ 106 int i, num_queues, size, ret; 107 struct iwl_rfh_queue_config *cmd; 108 struct iwl_host_cmd hcmd = { 109 .id = WIDE_ID(DATA_PATH_GROUP, RFH_QUEUE_CONFIG_CMD), 110 .dataflags[0] = IWL_HCMD_DFL_NOCOPY, 111 }; 112 113 /* 114 * The default queue is configured via context info, so if we 115 * have a single queue, there's nothing to do here. 116 */ 117 if (fwrt->trans->num_rx_queues == 1) 118 return 0; 119 120 if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_22000) 121 return 0; 122 123 /* skip the default queue */ 124 num_queues = fwrt->trans->num_rx_queues - 1; 125 126 size = struct_size(cmd, data, num_queues); 127 128 cmd = kzalloc(size, GFP_KERNEL); 129 if (!cmd) 130 return -ENOMEM; 131 132 cmd->num_queues = num_queues; 133 134 for (i = 0; i < num_queues; i++) { 135 struct iwl_trans_rxq_dma_data data; 136 137 cmd->data[i].q_num = i + 1; 138 iwl_trans_get_rxq_dma_data(fwrt->trans, i + 1, &data); 139 140 cmd->data[i].fr_bd_cb = cpu_to_le64(data.fr_bd_cb); 141 cmd->data[i].urbd_stts_wrptr = 142 cpu_to_le64(data.urbd_stts_wrptr); 143 cmd->data[i].ur_bd_cb = cpu_to_le64(data.ur_bd_cb); 144 cmd->data[i].fr_bd_wid = cpu_to_le32(data.fr_bd_wid); 145 } 146 147 hcmd.data[0] = cmd; 148 hcmd.len[0] = size; 149 150 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd); 151 152 kfree(cmd); 153 154 if (ret) 155 IWL_ERR(fwrt, "Failed to configure RX queues: %d\n", ret); 156 157 return ret; 158} 159IWL_EXPORT_SYMBOL(iwl_configure_rxq);