ioctl.h (9973B)
1/* 2 * NXP Wireless LAN device driver: ioctl data structures & APIs 3 * 4 * Copyright 2011-2020 NXP 5 * 6 * This software file (the "File") is distributed by NXP 7 * under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 17 * this warranty disclaimer. 18 */ 19 20#ifndef _MWIFIEX_IOCTL_H_ 21#define _MWIFIEX_IOCTL_H_ 22 23#include <net/lib80211.h> 24 25enum { 26 MWIFIEX_SCAN_TYPE_UNCHANGED = 0, 27 MWIFIEX_SCAN_TYPE_ACTIVE, 28 MWIFIEX_SCAN_TYPE_PASSIVE 29}; 30 31struct mwifiex_user_scan { 32 u32 scan_cfg_len; 33 u8 scan_cfg_buf[1]; 34}; 35 36#define MWIFIEX_PROMISC_MODE 1 37#define MWIFIEX_MULTICAST_MODE 2 38#define MWIFIEX_ALL_MULTI_MODE 4 39#define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32 40 41struct mwifiex_multicast_list { 42 u32 mode; 43 u32 num_multicast_addr; 44 u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN]; 45}; 46 47struct mwifiex_chan_freq { 48 u32 channel; 49 u32 freq; 50}; 51 52struct mwifiex_ssid_bssid { 53 struct cfg80211_ssid ssid; 54 u8 bssid[ETH_ALEN]; 55}; 56 57enum { 58 BAND_B = 1, 59 BAND_G = 2, 60 BAND_A = 4, 61 BAND_GN = 8, 62 BAND_AN = 16, 63 BAND_AAC = 32, 64}; 65 66#define MWIFIEX_WPA_PASSHPHRASE_LEN 64 67struct wpa_param { 68 u8 pairwise_cipher_wpa; 69 u8 pairwise_cipher_wpa2; 70 u8 group_cipher; 71 u32 length; 72 u8 passphrase[MWIFIEX_WPA_PASSHPHRASE_LEN]; 73}; 74 75struct wep_key { 76 u8 key_index; 77 u8 is_default; 78 u16 length; 79 u8 key[WLAN_KEY_LEN_WEP104]; 80}; 81 82#define KEY_MGMT_ON_HOST 0x03 83#define MWIFIEX_AUTH_MODE_AUTO 0xFF 84#define BAND_CONFIG_BG 0x00 85#define BAND_CONFIG_A 0x01 86#define MWIFIEX_SEC_CHAN_BELOW 0x30 87#define MWIFIEX_SEC_CHAN_ABOVE 0x10 88#define MWIFIEX_SUPPORTED_RATES 14 89#define MWIFIEX_SUPPORTED_RATES_EXT 32 90#define MWIFIEX_TDLS_SUPPORTED_RATES 8 91#define MWIFIEX_TDLS_DEF_QOS_CAPAB 0xf 92#define MWIFIEX_PRIO_BK 2 93#define MWIFIEX_PRIO_VI 5 94#define MWIFIEX_SUPPORTED_CHANNELS 2 95#define MWIFIEX_OPERATING_CLASSES 16 96 97struct mwifiex_uap_bss_param { 98 u8 channel; 99 u8 band_cfg; 100 u16 rts_threshold; 101 u16 frag_threshold; 102 u8 retry_limit; 103 struct mwifiex_802_11_ssid ssid; 104 u8 bcast_ssid_ctl; 105 u8 radio_ctl; 106 u8 dtim_period; 107 u16 beacon_period; 108 u16 auth_mode; 109 u16 protocol; 110 u16 key_mgmt; 111 u16 key_mgmt_operation; 112 struct wpa_param wpa_cfg; 113 struct wep_key wep_cfg[NUM_WEP_KEYS]; 114 struct ieee80211_ht_cap ht_cap; 115 struct ieee80211_vht_cap vht_cap; 116 u8 rates[MWIFIEX_SUPPORTED_RATES]; 117 u32 sta_ao_timer; 118 u32 ps_sta_ao_timer; 119 u8 qos_info; 120 u8 power_constraint; 121 struct mwifiex_types_wmm_info wmm_info; 122}; 123 124enum { 125 ADHOC_IDLE, 126 ADHOC_STARTED, 127 ADHOC_JOINED, 128 ADHOC_COALESCED 129}; 130 131struct mwifiex_ds_get_stats { 132 u32 mcast_tx_frame; 133 u32 failed; 134 u32 retry; 135 u32 multi_retry; 136 u32 frame_dup; 137 u32 rts_success; 138 u32 rts_failure; 139 u32 ack_failure; 140 u32 rx_frag; 141 u32 mcast_rx_frame; 142 u32 fcs_error; 143 u32 tx_frame; 144 u32 wep_icv_error[4]; 145 u32 bcn_rcv_cnt; 146 u32 bcn_miss_cnt; 147}; 148 149#define MWIFIEX_MAX_VER_STR_LEN 128 150 151struct mwifiex_ver_ext { 152 u32 version_str_sel; 153 char version_str[MWIFIEX_MAX_VER_STR_LEN]; 154}; 155 156struct mwifiex_bss_info { 157 u32 bss_mode; 158 struct cfg80211_ssid ssid; 159 u32 bss_chan; 160 u8 country_code[3]; 161 u32 media_connected; 162 u32 max_power_level; 163 u32 min_power_level; 164 u32 adhoc_state; 165 signed int bcn_nf_last; 166 u32 wep_status; 167 u32 is_hs_configured; 168 u32 is_deep_sleep; 169 u8 bssid[ETH_ALEN]; 170}; 171 172#define MAX_NUM_TID 8 173 174#define MAX_RX_WINSIZE 64 175 176struct mwifiex_ds_rx_reorder_tbl { 177 u16 tid; 178 u8 ta[ETH_ALEN]; 179 u32 start_win; 180 u32 win_size; 181 u32 buffer[MAX_RX_WINSIZE]; 182}; 183 184struct mwifiex_ds_tx_ba_stream_tbl { 185 u16 tid; 186 u8 ra[ETH_ALEN]; 187 u8 amsdu; 188}; 189 190#define DBG_CMD_NUM 5 191#define MWIFIEX_DBG_SDIO_MP_NUM 10 192 193struct tdls_peer_info { 194 u8 peer_addr[ETH_ALEN]; 195}; 196 197struct mwifiex_debug_info { 198 unsigned int debug_mask; 199 u32 int_counter; 200 u32 packets_out[MAX_NUM_TID]; 201 u32 tx_buf_size; 202 u32 curr_tx_buf_size; 203 u32 tx_tbl_num; 204 struct mwifiex_ds_tx_ba_stream_tbl 205 tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED]; 206 u32 rx_tbl_num; 207 struct mwifiex_ds_rx_reorder_tbl rx_tbl 208 [MWIFIEX_MAX_RX_BASTREAM_SUPPORTED]; 209 u32 tdls_peer_num; 210 struct tdls_peer_info tdls_list 211 [MWIFIEX_MAX_TDLS_PEER_SUPPORTED]; 212 u16 ps_mode; 213 u32 ps_state; 214 u8 is_deep_sleep; 215 u8 pm_wakeup_card_req; 216 u32 pm_wakeup_fw_try; 217 u8 is_hs_configured; 218 u8 hs_activated; 219 u32 num_cmd_host_to_card_failure; 220 u32 num_cmd_sleep_cfm_host_to_card_failure; 221 u32 num_tx_host_to_card_failure; 222 u32 num_event_deauth; 223 u32 num_event_disassoc; 224 u32 num_event_link_lost; 225 u32 num_cmd_deauth; 226 u32 num_cmd_assoc_success; 227 u32 num_cmd_assoc_failure; 228 u32 num_tx_timeout; 229 u8 is_cmd_timedout; 230 u16 timeout_cmd_id; 231 u16 timeout_cmd_act; 232 u16 last_cmd_id[DBG_CMD_NUM]; 233 u16 last_cmd_act[DBG_CMD_NUM]; 234 u16 last_cmd_index; 235 u16 last_cmd_resp_id[DBG_CMD_NUM]; 236 u16 last_cmd_resp_index; 237 u16 last_event[DBG_CMD_NUM]; 238 u16 last_event_index; 239 u8 data_sent; 240 u8 cmd_sent; 241 u8 cmd_resp_received; 242 u8 event_received; 243 u32 last_mp_wr_bitmap[MWIFIEX_DBG_SDIO_MP_NUM]; 244 u32 last_mp_wr_ports[MWIFIEX_DBG_SDIO_MP_NUM]; 245 u32 last_mp_wr_len[MWIFIEX_DBG_SDIO_MP_NUM]; 246 u32 last_mp_curr_wr_port[MWIFIEX_DBG_SDIO_MP_NUM]; 247 u8 last_sdio_mp_index; 248}; 249 250#define MWIFIEX_KEY_INDEX_UNICAST 0x40000000 251#define PN_LEN 16 252 253struct mwifiex_ds_encrypt_key { 254 u32 key_disable; 255 u32 key_index; 256 u32 key_len; 257 u8 key_material[WLAN_MAX_KEY_LEN]; 258 u8 mac_addr[ETH_ALEN]; 259 u32 is_wapi_key; 260 u8 pn[PN_LEN]; /* packet number */ 261 u8 pn_len; 262 u8 is_igtk_key; 263 u8 is_current_wep_key; 264 u8 is_rx_seq_valid; 265 u8 is_igtk_def_key; 266}; 267 268struct mwifiex_power_cfg { 269 u32 is_power_auto; 270 u32 is_power_fixed; 271 u32 power_level; 272}; 273 274struct mwifiex_ds_hs_cfg { 275 u32 is_invoke_hostcmd; 276 /* Bit0: non-unicast data 277 * Bit1: unicast data 278 * Bit2: mac events 279 * Bit3: magic packet 280 */ 281 u32 conditions; 282 u32 gpio; 283 u32 gap; 284}; 285 286struct mwifiex_ds_wakeup_reason { 287 u16 hs_wakeup_reason; 288}; 289 290#define DEEP_SLEEP_ON 1 291#define DEEP_SLEEP_OFF 0 292#define DEEP_SLEEP_IDLE_TIME 100 293#define PS_MODE_AUTO 1 294 295struct mwifiex_ds_auto_ds { 296 u16 auto_ds; 297 u16 idle_time; 298}; 299 300struct mwifiex_ds_pm_cfg { 301 union { 302 u32 ps_mode; 303 struct mwifiex_ds_hs_cfg hs_cfg; 304 struct mwifiex_ds_auto_ds auto_deep_sleep; 305 u32 sleep_period; 306 } param; 307}; 308 309struct mwifiex_11ac_vht_cfg { 310 u8 band_config; 311 u8 misc_config; 312 u32 cap_info; 313 u32 mcs_tx_set; 314 u32 mcs_rx_set; 315}; 316 317struct mwifiex_ds_11n_tx_cfg { 318 u16 tx_htcap; 319 u16 tx_htinfo; 320 u16 misc_config; /* Needed for 802.11AC cards only */ 321}; 322 323struct mwifiex_ds_11n_amsdu_aggr_ctrl { 324 u16 enable; 325 u16 curr_buf_size; 326}; 327 328struct mwifiex_ds_ant_cfg { 329 u32 tx_ant; 330 u32 rx_ant; 331}; 332 333#define MWIFIEX_NUM_OF_CMD_BUFFER 50 334#define MWIFIEX_SIZE_OF_CMD_BUFFER 2048 335 336enum { 337 MWIFIEX_IE_TYPE_GEN_IE = 0, 338 MWIFIEX_IE_TYPE_ARP_FILTER, 339}; 340 341enum { 342 MWIFIEX_REG_MAC = 1, 343 MWIFIEX_REG_BBP, 344 MWIFIEX_REG_RF, 345 MWIFIEX_REG_PMIC, 346 MWIFIEX_REG_CAU, 347}; 348 349struct mwifiex_ds_reg_rw { 350 u32 type; 351 u32 offset; 352 u32 value; 353}; 354 355#define MAX_EEPROM_DATA 256 356 357struct mwifiex_ds_read_eeprom { 358 u16 offset; 359 u16 byte_count; 360 u8 value[MAX_EEPROM_DATA]; 361}; 362 363struct mwifiex_ds_mem_rw { 364 u32 addr; 365 u32 value; 366}; 367 368#define IEEE_MAX_IE_SIZE 256 369 370#define MWIFIEX_IE_HDR_SIZE (sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE) 371 372struct mwifiex_ds_misc_gen_ie { 373 u32 type; 374 u32 len; 375 u8 ie_data[IEEE_MAX_IE_SIZE]; 376}; 377 378struct mwifiex_ds_misc_cmd { 379 u32 len; 380 u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER]; 381}; 382 383#define BITMASK_BCN_RSSI_LOW BIT(0) 384#define BITMASK_BCN_RSSI_HIGH BIT(4) 385 386enum subsc_evt_rssi_state { 387 EVENT_HANDLED, 388 RSSI_LOW_RECVD, 389 RSSI_HIGH_RECVD 390}; 391 392struct subsc_evt_cfg { 393 u8 abs_value; 394 u8 evt_freq; 395}; 396 397struct mwifiex_ds_misc_subsc_evt { 398 u16 action; 399 u16 events; 400 struct subsc_evt_cfg bcn_l_rssi_cfg; 401 struct subsc_evt_cfg bcn_h_rssi_cfg; 402}; 403 404#define MWIFIEX_MEF_MAX_BYTESEQ 6 /* non-adjustable */ 405#define MWIFIEX_MEF_MAX_FILTERS 10 406 407struct mwifiex_mef_filter { 408 u16 repeat; 409 u16 offset; 410 s8 byte_seq[MWIFIEX_MEF_MAX_BYTESEQ + 1]; 411 u8 filt_type; 412 u8 filt_action; 413}; 414 415struct mwifiex_mef_entry { 416 u8 mode; 417 u8 action; 418 struct mwifiex_mef_filter filter[MWIFIEX_MEF_MAX_FILTERS]; 419}; 420 421struct mwifiex_ds_mef_cfg { 422 u32 criteria; 423 u16 num_entries; 424 struct mwifiex_mef_entry *mef_entry; 425}; 426 427#define MWIFIEX_MAX_VSIE_LEN (256) 428#define MWIFIEX_MAX_VSIE_NUM (8) 429#define MWIFIEX_VSIE_MASK_CLEAR 0x00 430#define MWIFIEX_VSIE_MASK_SCAN 0x01 431#define MWIFIEX_VSIE_MASK_ASSOC 0x02 432#define MWIFIEX_VSIE_MASK_ADHOC 0x04 433#define MWIFIEX_VSIE_MASK_BGSCAN 0x08 434 435enum { 436 MWIFIEX_FUNC_INIT = 1, 437 MWIFIEX_FUNC_SHUTDOWN, 438}; 439 440enum COALESCE_OPERATION { 441 RECV_FILTER_MATCH_TYPE_EQ = 0x80, 442 RECV_FILTER_MATCH_TYPE_NE, 443}; 444 445enum COALESCE_PACKET_TYPE { 446 PACKET_TYPE_UNICAST = 1, 447 PACKET_TYPE_MULTICAST = 2, 448 PACKET_TYPE_BROADCAST = 3 449}; 450 451#define MWIFIEX_COALESCE_MAX_RULES 8 452#define MWIFIEX_COALESCE_MAX_BYTESEQ 4 /* non-adjustable */ 453#define MWIFIEX_COALESCE_MAX_FILTERS 4 454#define MWIFIEX_MAX_COALESCING_DELAY 100 /* in msecs */ 455 456struct filt_field_param { 457 u8 operation; 458 u8 operand_len; 459 u16 offset; 460 u8 operand_byte_stream[MWIFIEX_COALESCE_MAX_BYTESEQ]; 461}; 462 463struct mwifiex_coalesce_rule { 464 u16 max_coalescing_delay; 465 u8 num_of_fields; 466 u8 pkt_type; 467 struct filt_field_param params[MWIFIEX_COALESCE_MAX_FILTERS]; 468}; 469 470struct mwifiex_ds_coalesce_cfg { 471 u16 num_of_rules; 472 struct mwifiex_coalesce_rule rule[MWIFIEX_COALESCE_MAX_RULES]; 473}; 474 475struct mwifiex_ds_tdls_oper { 476 u16 tdls_action; 477 u8 peer_mac[ETH_ALEN]; 478 u16 capability; 479 u8 qos_info; 480 u8 *ext_capab; 481 u8 ext_capab_len; 482 u8 *supp_rates; 483 u8 supp_rates_len; 484 u8 *ht_capab; 485}; 486 487#endif /* !_MWIFIEX_IOCTL_H_ */