cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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usb.h (3577B)


      1/*
      2 * This file contains definitions for mwifiex USB interface driver.
      3 *
      4 * Copyright 2011-2020 NXP
      5 *
      6 * This software file (the "File") is distributed by NXP
      7 * under the terms of the GNU General Public License Version 2, June 1991
      8 * (the "License").  You may use, redistribute and/or modify this File in
      9 * accordance with the terms and conditions of the License, a copy of which
     10 * is available by writing to the Free Software Foundation, Inc.,
     11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
     12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
     13 *
     14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
     15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
     16 * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
     17 * this warranty disclaimer.
     18 */
     19
     20#ifndef _MWIFIEX_USB_H
     21#define _MWIFIEX_USB_H
     22
     23#include <linux/completion.h>
     24#include <linux/usb.h>
     25
     26#define USB8XXX_VID		0x1286
     27
     28#define USB8766_PID_1		0x2041
     29#define USB8766_PID_2		0x2042
     30#define USB8797_PID_1		0x2043
     31#define USB8797_PID_2		0x2044
     32#define USB8801_PID_1		0x2049
     33#define USB8801_PID_2		0x204a
     34#define USB8997_PID_1		0x2052
     35#define USB8997_PID_2		0x204e
     36
     37
     38#define USB8XXX_FW_DNLD		1
     39#define USB8XXX_FW_READY	2
     40#define USB8XXX_FW_MAX_RETRY	3
     41
     42#define MWIFIEX_TX_DATA_PORT	2
     43#define MWIFIEX_TX_DATA_URB	6
     44#define MWIFIEX_RX_DATA_URB	6
     45#define MWIFIEX_USB_TIMEOUT	100
     46
     47#define USB8766_DEFAULT_FW_NAME	"mrvl/usb8766_uapsta.bin"
     48#define USB8797_DEFAULT_FW_NAME	"mrvl/usb8797_uapsta.bin"
     49#define USB8801_DEFAULT_FW_NAME	"mrvl/usb8801_uapsta.bin"
     50#define USB8997_DEFAULT_FW_NAME	"mrvl/usbusb8997_combo_v4.bin"
     51
     52#define FW_DNLD_TX_BUF_SIZE	620
     53#define FW_DNLD_RX_BUF_SIZE	2048
     54#define FW_HAS_LAST_BLOCK	0x00000004
     55#define FW_CMD_7		0x00000007
     56
     57#define FW_DATA_XMIT_SIZE \
     58	(sizeof(struct fw_header) + dlen + sizeof(u32))
     59
     60struct urb_context {
     61	struct mwifiex_adapter *adapter;
     62	struct sk_buff *skb;
     63	struct urb *urb;
     64	u8 ep;
     65};
     66
     67#define MWIFIEX_USB_TX_AGGR_TMO_MIN	1
     68#define MWIFIEX_USB_TX_AGGR_TMO_MAX	4
     69
     70struct tx_aggr_tmr_cnxt {
     71	struct mwifiex_adapter *adapter;
     72	struct usb_tx_data_port *port;
     73	struct timer_list hold_timer;
     74	bool is_hold_timer_set;
     75	u32 hold_tmo_msecs;
     76};
     77
     78struct usb_tx_aggr {
     79	struct sk_buff_head aggr_list;
     80	int aggr_len;
     81	int aggr_num;
     82	struct tx_aggr_tmr_cnxt timer_cnxt;
     83};
     84
     85struct usb_tx_data_port {
     86	u8 tx_data_ep;
     87	u8 block_status;
     88	atomic_t tx_data_urb_pending;
     89	int tx_data_ix;
     90	struct urb_context tx_data_list[MWIFIEX_TX_DATA_URB];
     91	/* usb tx aggregation*/
     92	struct usb_tx_aggr tx_aggr;
     93	struct sk_buff *skb_aggr[MWIFIEX_TX_DATA_URB];
     94	/* lock for protect tx aggregation data path*/
     95	spinlock_t tx_aggr_lock;
     96};
     97
     98struct usb_card_rec {
     99	struct mwifiex_adapter *adapter;
    100	struct usb_device *udev;
    101	struct usb_interface *intf;
    102	struct completion fw_done;
    103	u8 rx_cmd_ep;
    104	struct urb_context rx_cmd;
    105	atomic_t rx_cmd_urb_pending;
    106	struct urb_context rx_data_list[MWIFIEX_RX_DATA_URB];
    107	u8 usb_boot_state;
    108	u8 rx_data_ep;
    109	atomic_t rx_data_urb_pending;
    110	u8 tx_cmd_ep;
    111	atomic_t tx_cmd_urb_pending;
    112	int bulk_out_maxpktsize;
    113	struct urb_context tx_cmd;
    114	u8 mc_resync_flag;
    115	struct usb_tx_data_port port[MWIFIEX_TX_DATA_PORT];
    116	int rx_cmd_ep_type;
    117	u8 rx_cmd_interval;
    118	int tx_cmd_ep_type;
    119	u8 tx_cmd_interval;
    120};
    121
    122struct fw_header {
    123	__le32 dnld_cmd;
    124	__le32 base_addr;
    125	__le32 data_len;
    126	__le32 crc;
    127};
    128
    129struct fw_sync_header {
    130	__le32 cmd;
    131	__le32 seq_num;
    132} __packed;
    133
    134struct fw_data {
    135	struct fw_header fw_hdr;
    136	__le32 seq_num;
    137	u8 data[];
    138} __packed;
    139
    140#endif /*_MWIFIEX_USB_H */