cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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usb_sdio.c (10071B)


      1// SPDX-License-Identifier: ISC
      2/* Copyright (C) 2020 MediaTek Inc.
      3 *
      4 * Author: Lorenzo Bianconi <lorenzo@kernel.org>
      5 *	   Sean Wang <sean.wang@mediatek.com>
      6 */
      7
      8#include <linux/kernel.h>
      9#include <linux/module.h>
     10#include <linux/usb.h>
     11
     12#include "mt7615.h"
     13#include "mac.h"
     14#include "mcu.h"
     15#include "regs.h"
     16
     17const u32 mt7663_usb_sdio_reg_map[] = {
     18	[MT_TOP_CFG_BASE]	= 0x80020000,
     19	[MT_HW_BASE]		= 0x80000000,
     20	[MT_DMA_SHDL_BASE]	= 0x5000a000,
     21	[MT_HIF_BASE]		= 0x50000000,
     22	[MT_CSR_BASE]		= 0x40000000,
     23	[MT_EFUSE_ADDR_BASE]	= 0x78011000,
     24	[MT_TOP_MISC_BASE]	= 0x81020000,
     25	[MT_PLE_BASE]		= 0x82060000,
     26	[MT_PSE_BASE]		= 0x82068000,
     27	[MT_PP_BASE]		= 0x8206c000,
     28	[MT_WTBL_BASE_ADDR]	= 0x820e0000,
     29	[MT_CFG_BASE]		= 0x820f0000,
     30	[MT_AGG_BASE]		= 0x820f2000,
     31	[MT_ARB_BASE]		= 0x820f3000,
     32	[MT_TMAC_BASE]		= 0x820f4000,
     33	[MT_RMAC_BASE]		= 0x820f5000,
     34	[MT_DMA_BASE]		= 0x820f7000,
     35	[MT_PF_BASE]		= 0x820f8000,
     36	[MT_WTBL_BASE_ON]	= 0x820f9000,
     37	[MT_WTBL_BASE_OFF]	= 0x820f9800,
     38	[MT_LPON_BASE]		= 0x820fb000,
     39	[MT_MIB_BASE]		= 0x820fd000,
     40};
     41EXPORT_SYMBOL_GPL(mt7663_usb_sdio_reg_map);
     42
     43static void
     44mt7663_usb_sdio_write_txwi(struct mt7615_dev *dev, struct mt76_wcid *wcid,
     45			   enum mt76_txq_id qid, struct ieee80211_sta *sta,
     46			   struct ieee80211_key_conf *key, int pid,
     47			   struct sk_buff *skb)
     48{
     49	__le32 *txwi = (__le32 *)(skb->data - MT_USB_TXD_SIZE);
     50
     51	memset(txwi, 0, MT_USB_TXD_SIZE);
     52	mt7615_mac_write_txwi(dev, txwi, skb, wcid, sta, pid, key, false);
     53	skb_push(skb, MT_USB_TXD_SIZE);
     54}
     55
     56static int mt7663_usb_sdio_set_rates(struct mt7615_dev *dev,
     57				     struct mt7615_wtbl_rate_desc *wrd)
     58{
     59	struct mt7615_rate_desc *rate = &wrd->rate;
     60	struct mt7615_sta *sta = wrd->sta;
     61	u32 w5, w27, addr, val;
     62	u16 idx;
     63
     64	lockdep_assert_held(&dev->mt76.mutex);
     65
     66	if (!sta)
     67		return -EINVAL;
     68
     69	if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000))
     70		return -ETIMEDOUT;
     71
     72	addr = mt7615_mac_wtbl_addr(dev, sta->wcid.idx);
     73
     74	w27 = mt76_rr(dev, addr + 27 * 4);
     75	w27 &= ~MT_WTBL_W27_CC_BW_SEL;
     76	w27 |= FIELD_PREP(MT_WTBL_W27_CC_BW_SEL, rate->bw);
     77
     78	w5 = mt76_rr(dev, addr + 5 * 4);
     79	w5 &= ~(MT_WTBL_W5_BW_CAP | MT_WTBL_W5_CHANGE_BW_RATE |
     80		MT_WTBL_W5_MPDU_OK_COUNT |
     81		MT_WTBL_W5_MPDU_FAIL_COUNT |
     82		MT_WTBL_W5_RATE_IDX);
     83	w5 |= FIELD_PREP(MT_WTBL_W5_BW_CAP, rate->bw) |
     84	      FIELD_PREP(MT_WTBL_W5_CHANGE_BW_RATE,
     85			 rate->bw_idx ? rate->bw_idx - 1 : 7);
     86
     87	mt76_wr(dev, MT_WTBL_RIUCR0, w5);
     88
     89	mt76_wr(dev, MT_WTBL_RIUCR1,
     90		FIELD_PREP(MT_WTBL_RIUCR1_RATE0, rate->probe_val) |
     91		FIELD_PREP(MT_WTBL_RIUCR1_RATE1, rate->val[0]) |
     92		FIELD_PREP(MT_WTBL_RIUCR1_RATE2_LO, rate->val[1]));
     93
     94	mt76_wr(dev, MT_WTBL_RIUCR2,
     95		FIELD_PREP(MT_WTBL_RIUCR2_RATE2_HI, rate->val[1] >> 8) |
     96		FIELD_PREP(MT_WTBL_RIUCR2_RATE3, rate->val[1]) |
     97		FIELD_PREP(MT_WTBL_RIUCR2_RATE4, rate->val[2]) |
     98		FIELD_PREP(MT_WTBL_RIUCR2_RATE5_LO, rate->val[2]));
     99
    100	mt76_wr(dev, MT_WTBL_RIUCR3,
    101		FIELD_PREP(MT_WTBL_RIUCR3_RATE5_HI, rate->val[2] >> 4) |
    102		FIELD_PREP(MT_WTBL_RIUCR3_RATE6, rate->val[3]) |
    103		FIELD_PREP(MT_WTBL_RIUCR3_RATE7, rate->val[3]));
    104
    105	mt76_wr(dev, MT_WTBL_UPDATE,
    106		FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, sta->wcid.idx) |
    107		MT_WTBL_UPDATE_RATE_UPDATE |
    108		MT_WTBL_UPDATE_TX_COUNT_CLEAR);
    109
    110	mt76_wr(dev, addr + 27 * 4, w27);
    111
    112	sta->rate_probe = sta->rateset[rate->rateset].probe_rate.idx != -1;
    113
    114	idx = sta->vif->mt76.omac_idx;
    115	idx = idx > HW_BSSID_MAX ? HW_BSSID_0 : idx;
    116	addr = idx > 1 ? MT_LPON_TCR2(idx): MT_LPON_TCR0(idx);
    117
    118	mt76_rmw(dev, addr, MT_LPON_TCR_MODE, MT_LPON_TCR_READ); /* TSF read */
    119	val = mt76_rr(dev, MT_LPON_UTTR0);
    120	sta->rate_set_tsf = (val & ~BIT(0)) | rate->rateset;
    121
    122	if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET))
    123		mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000);
    124
    125	sta->rate_count = 2 * MT7615_RATE_RETRY * sta->n_rates;
    126	sta->wcid.tx_info |= MT_WCID_TX_INFO_SET;
    127
    128	return 0;
    129}
    130
    131static void mt7663_usb_sdio_rate_work(struct work_struct *work)
    132{
    133	struct mt7615_wtbl_rate_desc *wrd, *wrd_next;
    134	struct list_head wrd_list;
    135	struct mt7615_dev *dev;
    136
    137	dev = (struct mt7615_dev *)container_of(work, struct mt7615_dev,
    138						rate_work);
    139
    140	INIT_LIST_HEAD(&wrd_list);
    141	spin_lock_bh(&dev->mt76.lock);
    142	list_splice_init(&dev->wrd_head, &wrd_list);
    143	spin_unlock_bh(&dev->mt76.lock);
    144
    145	list_for_each_entry_safe(wrd, wrd_next, &wrd_list, node) {
    146		list_del(&wrd->node);
    147
    148		mt7615_mutex_acquire(dev);
    149		mt7663_usb_sdio_set_rates(dev, wrd);
    150		mt7615_mutex_release(dev);
    151
    152		kfree(wrd);
    153	}
    154}
    155
    156bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
    157{
    158	struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
    159
    160	mt7615_mutex_acquire(dev);
    161	mt7615_mac_sta_poll(dev);
    162	mt7615_mutex_release(dev);
    163
    164	return false;
    165}
    166EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_status_data);
    167
    168void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
    169				     struct mt76_queue_entry *e)
    170{
    171	unsigned int headroom = MT_USB_TXD_SIZE;
    172
    173	if (mt76_is_usb(mdev))
    174		headroom += MT_USB_HDR_SIZE;
    175	skb_pull(e->skb, headroom);
    176
    177	mt76_tx_complete_skb(mdev, e->wcid, e->skb);
    178}
    179EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_complete_skb);
    180
    181int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
    182				   enum mt76_txq_id qid, struct mt76_wcid *wcid,
    183				   struct ieee80211_sta *sta,
    184				   struct mt76_tx_info *tx_info)
    185{
    186	struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
    187	struct sk_buff *skb = tx_info->skb;
    188	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
    189	struct ieee80211_key_conf *key = info->control.hw_key;
    190	struct mt7615_sta *msta;
    191	int pad, err, pktid;
    192
    193	msta = wcid ? container_of(wcid, struct mt7615_sta, wcid) : NULL;
    194	if (!wcid)
    195		wcid = &dev->mt76.global_wcid;
    196
    197	if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) &&
    198	    msta && !msta->rate_probe) {
    199		/* request to configure sampling rate */
    200		spin_lock_bh(&dev->mt76.lock);
    201		mt7615_mac_set_rates(&dev->phy, msta, &info->control.rates[0],
    202				     msta->rates);
    203		spin_unlock_bh(&dev->mt76.lock);
    204	}
    205
    206	pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb);
    207	mt7663_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb);
    208	if (mt76_is_usb(mdev)) {
    209		u32 len = skb->len;
    210
    211		put_unaligned_le32(len, skb_push(skb, sizeof(len)));
    212		pad = round_up(skb->len, 4) + 4 - skb->len;
    213	} else {
    214		pad = round_up(skb->len, 4) - skb->len;
    215	}
    216
    217	err = mt76_skb_adjust_pad(skb, pad);
    218	if (err)
    219		/* Release pktid in case of error. */
    220		idr_remove(&wcid->pktid, pktid);
    221
    222	return err;
    223}
    224EXPORT_SYMBOL_GPL(mt7663_usb_sdio_tx_prepare_skb);
    225
    226static int mt7663u_dma_sched_init(struct mt7615_dev *dev)
    227{
    228	int i;
    229
    230	mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE),
    231		 MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE,
    232		 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) |
    233		 FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8));
    234
    235	/* disable refill group 5 - group 15 and raise group 2
    236	 * and 3 as high priority.
    237	 */
    238	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffe00006);
    239	mt76_clear(dev, MT_DMA_SHDL(MT_DMASHDL_PAGE), BIT(16));
    240
    241	for (i = 0; i < 5; i++)
    242		mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)),
    243			FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x3) |
    244			FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x1ff));
    245
    246	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210);
    247	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210);
    248
    249	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x4444);
    250
    251	/* group pririority from high to low:
    252	 * 15 (cmd groups) > 4 > 3 > 2 > 1 > 0.
    253	 */
    254	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6501234f);
    255	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987);
    256	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x7004801c);
    257
    258	mt76_wr(dev, MT_UDMA_WLCFG_1,
    259		FIELD_PREP(MT_WL_TX_TMOUT_LMT, 80000) |
    260		FIELD_PREP(MT_WL_RX_AGG_PKT_LMT, 1));
    261
    262	/* setup UDMA Rx Flush */
    263	mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
    264	/* hif reset */
    265	mt76_set(dev, MT_HIF_RST, MT_HIF_LOGIC_RST_N);
    266
    267	mt76_set(dev, MT_UDMA_WLCFG_0,
    268		 MT_WL_RX_AGG_EN | MT_WL_RX_EN | MT_WL_TX_EN |
    269		 MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN |
    270		 MT_WL_TX_TMOUT_FUNC_EN);
    271	mt76_rmw(dev, MT_UDMA_WLCFG_0, MT_WL_RX_AGG_LMT | MT_WL_RX_AGG_TO,
    272		 FIELD_PREP(MT_WL_RX_AGG_LMT, 32) |
    273		 FIELD_PREP(MT_WL_RX_AGG_TO, 100));
    274
    275	return 0;
    276}
    277
    278static int mt7663_usb_sdio_init_hardware(struct mt7615_dev *dev)
    279{
    280	int ret, idx;
    281
    282	ret = mt7615_eeprom_init(dev, MT_EFUSE_BASE);
    283	if (ret < 0)
    284		return ret;
    285
    286	if (mt76_is_usb(&dev->mt76)) {
    287		ret = mt7663u_dma_sched_init(dev);
    288		if (ret)
    289			return ret;
    290	}
    291
    292	set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
    293
    294	/* Beacon and mgmt frames should occupy wcid 0 */
    295	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1);
    296	if (idx)
    297		return -ENOSPC;
    298
    299	dev->mt76.global_wcid.idx = idx;
    300	dev->mt76.global_wcid.hw_key_idx = -1;
    301	rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
    302
    303	return 0;
    304}
    305
    306int mt7663_usb_sdio_register_device(struct mt7615_dev *dev)
    307{
    308	struct ieee80211_hw *hw = mt76_hw(dev);
    309	int err;
    310
    311	INIT_WORK(&dev->rate_work, mt7663_usb_sdio_rate_work);
    312	INIT_LIST_HEAD(&dev->wrd_head);
    313	mt7615_init_device(dev);
    314
    315	err = mt7663_usb_sdio_init_hardware(dev);
    316	if (err)
    317		return err;
    318
    319	hw->extra_tx_headroom += MT_USB_TXD_SIZE;
    320	if (mt76_is_usb(&dev->mt76)) {
    321		hw->extra_tx_headroom += MT_USB_HDR_SIZE;
    322		/* check hw sg support in order to enable AMSDU */
    323		if (dev->mt76.usb.sg_en)
    324			hw->max_tx_fragments = MT_HW_TXP_MAX_BUF_NUM;
    325		else
    326			hw->max_tx_fragments = 1;
    327	}
    328
    329	err = mt76_register_device(&dev->mt76, true, mt76_rates,
    330				   ARRAY_SIZE(mt76_rates));
    331	if (err < 0)
    332		return err;
    333
    334	if (!dev->mt76.usb.sg_en) {
    335		struct ieee80211_sta_vht_cap *vht_cap;
    336
    337		/* decrease max A-MSDU size if SG is not supported */
    338		vht_cap = &dev->mphy.sband_5g.sband.vht_cap;
    339		vht_cap->cap &= ~IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
    340	}
    341
    342	ieee80211_queue_work(hw, &dev->mcu_work);
    343	mt7615_init_txpower(dev, &dev->mphy.sband_2g.sband);
    344	mt7615_init_txpower(dev, &dev->mphy.sband_5g.sband);
    345
    346	return mt7615_init_debugfs(dev);
    347}
    348EXPORT_SYMBOL_GPL(mt7663_usb_sdio_register_device);
    349
    350MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
    351MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
    352MODULE_LICENSE("Dual BSD/GPL");