cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mt76x02_mcu.h (2381B)

      1/* SPDX-License-Identifier: ISC */
      2/*
      3 * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
      4 */
      5
      6#ifndef __MT76x02_MCU_H
      7#define __MT76x02_MCU_H
      8
      9#include "mt76x02.h"
     10
     11#define MT_MCU_RESET_CTL		0x070C
     12#define MT_MCU_INT_LEVEL		0x0718
     13#define MT_MCU_COM_REG0			0x0730
     14#define MT_MCU_COM_REG1			0x0734
     15#define MT_MCU_COM_REG2			0x0738
     16#define MT_MCU_COM_REG3			0x073C
     17
     18#define MT_INBAND_PACKET_MAX_LEN	192
     19#define MT_MCU_MEMMAP_WLAN		0x410000
     20
     21#define MT_MCU_PCIE_REMAP_BASE4		0x074C
     22
     23#define MT_MCU_SEMAPHORE_00		0x07B0
     24#define MT_MCU_SEMAPHORE_01		0x07B4
     25#define MT_MCU_SEMAPHORE_02		0x07B8
     26#define MT_MCU_SEMAPHORE_03		0x07BC
     27
     28#define MT_MCU_ILM_ADDR			0x80000
     29
     30enum mcu_cmd {
     31	CMD_FUN_SET_OP = 1,
     32	CMD_LOAD_CR = 2,
     33	CMD_INIT_GAIN_OP = 3,
     34	CMD_DYNC_VGA_OP = 6,
     35	CMD_TDLS_CH_SW = 7,
     36	CMD_BURST_WRITE = 8,
     37	CMD_READ_MODIFY_WRITE = 9,
     38	CMD_RANDOM_READ = 10,
     39	CMD_BURST_READ = 11,
     40	CMD_RANDOM_WRITE = 12,
     41	CMD_LED_MODE_OP = 16,
     42	CMD_POWER_SAVING_OP = 20,
     43	CMD_WOW_CONFIG = 21,
     44	CMD_WOW_QUERY = 22,
     45	CMD_WOW_FEATURE = 24,
     46	CMD_CARRIER_DETECT_OP = 28,
     47	CMD_RADOR_DETECT_OP = 29,
     48	CMD_SWITCH_CHANNEL_OP = 30,
     49	CMD_CALIBRATION_OP = 31,
     50	CMD_BEACON_OP = 32,
     51	CMD_ANTENNA_OP = 33,
     52};
     53
     54enum mcu_power_mode {
     55	RADIO_OFF = 0x30,
     56	RADIO_ON = 0x31,
     57	RADIO_OFF_AUTO_WAKEUP = 0x32,
     58	RADIO_OFF_ADVANCE = 0x33,
     59	RADIO_ON_ADVANCE = 0x34,
     60};
     61
     62enum mcu_function {
     63	Q_SELECT = 1,
     64	BW_SETTING = 2,
     65	USB2_SW_DISCONNECT = 2,
     66	USB3_SW_DISCONNECT = 3,
     67	LOG_FW_DEBUG_MSG = 4,
     68	GET_FW_VERSION = 5,
     69};
     70
     71struct mt76x02_fw_header {
     72	__le32 ilm_len;
     73	__le32 dlm_len;
     74	__le16 build_ver;
     75	__le16 fw_ver;
     76	u8 pad[4];
     77	char build_time[16];
     78};
     79
     80struct mt76x02_patch_header {
     81	char build_time[16];
     82	char platform[4];
     83	char hw_version[4];
     84	char patch_version[4];
     85	u8 pad[2];
     86};
     87
     88int mt76x02_mcu_cleanup(struct mt76x02_dev *dev);
     89int mt76x02_mcu_calibrate(struct mt76x02_dev *dev, int type, u32 param);
     90int mt76x02_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data,
     91			 int len, bool wait_resp);
     92int mt76x02_mcu_parse_response(struct mt76_dev *mdev, int cmd,
     93			       struct sk_buff *skb, int seq);
     94int mt76x02_mcu_function_select(struct mt76x02_dev *dev, enum mcu_function func,
     95				u32 val);
     96int mt76x02_mcu_set_radio_state(struct mt76x02_dev *dev, bool on);
     97void mt76x02_set_ethtool_fwver(struct mt76x02_dev *dev,
     98			       const struct mt76x02_fw_header *h);
     99
    100#endif /* __MT76x02_MCU_H */