cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mcu.h (1874B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
      4 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
      5 */
      6
      7#ifndef __MT7601U_MCU_H
      8#define __MT7601U_MCU_H
      9
     10struct mt7601u_dev;
     11
     12/* Register definitions */
     13#define MT_MCU_RESET_CTL		0x070C
     14#define MT_MCU_INT_LEVEL		0x0718
     15#define MT_MCU_COM_REG0			0x0730
     16#define MT_MCU_COM_REG1			0x0734
     17#define MT_MCU_COM_REG2			0x0738
     18#define MT_MCU_COM_REG3			0x073C
     19
     20#define MT_MCU_IVB_SIZE			0x40
     21#define MT_MCU_DLM_OFFSET		0x80000
     22
     23#define MT_MCU_MEMMAP_WLAN		0x00410000
     24#define MT_MCU_MEMMAP_BBP		0x40000000
     25#define MT_MCU_MEMMAP_RF		0x80000000
     26
     27#define INBAND_PACKET_MAX_LEN		192
     28
     29enum mcu_cmd {
     30	CMD_FUN_SET_OP = 1,
     31	CMD_LOAD_CR = 2,
     32	CMD_INIT_GAIN_OP = 3,
     33	CMD_DYNC_VGA_OP = 6,
     34	CMD_TDLS_CH_SW = 7,
     35	CMD_BURST_WRITE = 8,
     36	CMD_READ_MODIFY_WRITE = 9,
     37	CMD_RANDOM_READ = 10,
     38	CMD_BURST_READ = 11,
     39	CMD_RANDOM_WRITE = 12,
     40	CMD_LED_MODE_OP = 16,
     41	CMD_POWER_SAVING_OP = 20,
     42	CMD_WOW_CONFIG = 21,
     43	CMD_WOW_QUERY = 22,
     44	CMD_WOW_FEATURE = 24,
     45	CMD_CARRIER_DETECT_OP = 28,
     46	CMD_RADOR_DETECT_OP = 29,
     47	CMD_SWITCH_CHANNEL_OP = 30,
     48	CMD_CALIBRATION_OP = 31,
     49	CMD_BEACON_OP = 32,
     50	CMD_ANTENNA_OP = 33,
     51};
     52
     53enum mcu_function {
     54	Q_SELECT = 1,
     55	ATOMIC_TSSI_SETTING = 5,
     56};
     57
     58enum mcu_power_mode {
     59	RADIO_OFF = 0x30,
     60	RADIO_ON = 0x31,
     61	RADIO_OFF_AUTO_WAKEUP = 0x32,
     62	RADIO_OFF_ADVANCE = 0x33,
     63	RADIO_ON_ADVANCE = 0x34,
     64};
     65
     66enum mcu_calibrate {
     67	MCU_CAL_R = 1,
     68	MCU_CAL_DCOC,
     69	MCU_CAL_LC,
     70	MCU_CAL_LOFT,
     71	MCU_CAL_TXIQ,
     72	MCU_CAL_BW,
     73	MCU_CAL_DPD,
     74	MCU_CAL_RXIQ,
     75	MCU_CAL_TXDCOC,
     76};
     77
     78int mt7601u_mcu_init(struct mt7601u_dev *dev);
     79int mt7601u_mcu_cmd_init(struct mt7601u_dev *dev);
     80void mt7601u_mcu_cmd_deinit(struct mt7601u_dev *dev);
     81
     82int
     83mt7601u_mcu_calibrate(struct mt7601u_dev *dev, enum mcu_calibrate cal, u32 val);
     84int mt7601u_mcu_tssi_read_kick(struct mt7601u_dev *dev, int use_hvga);
     85
     86#endif