cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rt2x00mmio.h (2781B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
      4	<http://rt2x00.serialmonkey.com>
      5
      6 */
      7
      8/*
      9	Module: rt2x00mmio
     10	Abstract: Data structures for the rt2x00mmio module.
     11 */
     12
     13#ifndef RT2X00MMIO_H
     14#define RT2X00MMIO_H
     15
     16#include <linux/io.h>
     17
     18/*
     19 * Register access.
     20 */
     21static inline u32 rt2x00mmio_register_read(struct rt2x00_dev *rt2x00dev,
     22					   const unsigned int offset)
     23{
     24	return readl(rt2x00dev->csr.base + offset);
     25}
     26
     27static inline void rt2x00mmio_register_multiread(struct rt2x00_dev *rt2x00dev,
     28						 const unsigned int offset,
     29						 void *value, const u32 length)
     30{
     31	memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
     32}
     33
     34static inline void rt2x00mmio_register_write(struct rt2x00_dev *rt2x00dev,
     35					     const unsigned int offset,
     36					     u32 value)
     37{
     38	writel(value, rt2x00dev->csr.base + offset);
     39}
     40
     41static inline void rt2x00mmio_register_multiwrite(struct rt2x00_dev *rt2x00dev,
     42						  const unsigned int offset,
     43						  const void *value,
     44						  const u32 length)
     45{
     46	__iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2);
     47}
     48
     49/**
     50 * rt2x00mmio_regbusy_read - Read from register with busy check
     51 * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
     52 * @offset: Register offset
     53 * @field: Field to check if register is busy
     54 * @reg: Pointer to where register contents should be stored
     55 *
     56 * This function will read the given register, and checks if the
     57 * register is busy. If it is, it will sleep for a couple of
     58 * microseconds before reading the register again. If the register
     59 * is not read after a certain timeout, this function will return
     60 * FALSE.
     61 */
     62int rt2x00mmio_regbusy_read(struct rt2x00_dev *rt2x00dev,
     63			    const unsigned int offset,
     64			    const struct rt2x00_field32 field,
     65			    u32 *reg);
     66
     67/**
     68 * struct queue_entry_priv_mmio: Per entry PCI specific information
     69 *
     70 * @desc: Pointer to device descriptor
     71 * @desc_dma: DMA pointer to &desc.
     72 */
     73struct queue_entry_priv_mmio {
     74	__le32 *desc;
     75	dma_addr_t desc_dma;
     76};
     77
     78/**
     79 * rt2x00mmio_rxdone - Handle RX done events
     80 * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
     81 *
     82 * Returns true if there are still rx frames pending and false if all
     83 * pending rx frames were processed.
     84 */
     85bool rt2x00mmio_rxdone(struct rt2x00_dev *rt2x00dev);
     86
     87/**
     88 * rt2x00mmio_flush_queue - Flush data queue
     89 * @queue: Data queue to stop
     90 * @drop: True to drop all pending frames.
     91 *
     92 * This will wait for a maximum of 100ms, waiting for the queues
     93 * to become empty.
     94 */
     95void rt2x00mmio_flush_queue(struct data_queue *queue, bool drop);
     96
     97/*
     98 * Device initialization handlers.
     99 */
    100int rt2x00mmio_initialize(struct rt2x00_dev *rt2x00dev);
    101void rt2x00mmio_uninitialize(struct rt2x00_dev *rt2x00dev);
    102
    103#endif /* RT2X00MMIO_H */