cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

efuse.h (2523B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2009-2012  Realtek Corporation.*/
      3
      4#ifndef __RTL_EFUSE_H_
      5#define __RTL_EFUSE_H_
      6
      7#define EFUSE_IC_ID_OFFSET		506
      8
      9#define EFUSE_MAX_WORD_UNIT		4
     10
     11#define EFUSE_INIT_MAP			0
     12#define EFUSE_MODIFY_MAP		1
     13
     14#define PG_STATE_HEADER			0x01
     15#define PG_STATE_WORD_0			0x02
     16#define PG_STATE_WORD_1			0x04
     17#define PG_STATE_WORD_2			0x08
     18#define PG_STATE_WORD_3			0x10
     19#define PG_STATE_DATA			0x20
     20
     21#define EFUSE_REPEAT_THRESHOLD_		3
     22#define EFUSE_ERROE_HANDLE		1
     23
     24struct efuse_map {
     25	u8 offset;
     26	u8 word_start;
     27	u8 byte_start;
     28	u8 byte_cnts;
     29};
     30
     31struct pgpkt_struct {
     32	u8 offset;
     33	u8 word_en;
     34	u8 data[8];
     35};
     36
     37enum efuse_data_item {
     38	EFUSE_CHIP_ID = 0,
     39	EFUSE_LDO_SETTING,
     40	EFUSE_CLK_SETTING,
     41	EFUSE_SDIO_SETTING,
     42	EFUSE_CCCR,
     43	EFUSE_SDIO_MODE,
     44	EFUSE_OCR,
     45	EFUSE_F0CIS,
     46	EFUSE_F1CIS,
     47	EFUSE_MAC_ADDR,
     48	EFUSE_EEPROM_VER,
     49	EFUSE_CHAN_PLAN,
     50	EFUSE_TXPW_TAB
     51};
     52
     53enum {
     54	VOLTAGE_V25 = 0x03,
     55	LDOE25_SHIFT = 28,
     56};
     57
     58struct efuse_priv {
     59	u8 id[2];
     60	u8 ldo_setting[2];
     61	u8 clk_setting[2];
     62	u8 cccr;
     63	u8 sdio_mode;
     64	u8 ocr[3];
     65	u8 cis0[17];
     66	u8 cis1[48];
     67	u8 mac_addr[6];
     68	u8 eeprom_verno;
     69	u8 channel_plan;
     70	u8 tx_power_b[14];
     71	u8 tx_power_g[14];
     72};
     73
     74void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
     75void efuse_initialize(struct ieee80211_hw *hw);
     76u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
     77int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data);
     78void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
     79void read_efuse(struct ieee80211_hw *hw, u16 _offset,
     80		u16 _size_byte, u8 *pbuf);
     81void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
     82		       u16 offset, u32 *value);
     83void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
     84			u16 offset, u32 value);
     85bool efuse_shadow_update(struct ieee80211_hw *hw);
     86bool efuse_shadow_update_chk(struct ieee80211_hw *hw);
     87void rtl_efuse_shadow_map_update(struct ieee80211_hw *hw);
     88void efuse_force_write_vendor_id(struct ieee80211_hw *hw);
     89void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
     90void efuse_power_switch(struct ieee80211_hw *hw, u8 write, u8 pwrstate);
     91int rtl_get_hwinfo(struct ieee80211_hw *hw, struct rtl_priv *rtlpriv,
     92		   int max_size, u8 *hwinfo, int *params);
     93void rtl_fill_dummy(u8 *pfwbuf, u32 *pfwlen);
     94void rtl_fw_page_write(struct ieee80211_hw *hw, u32 page, const u8 *buffer,
     95		       u32 size);
     96void rtl_fw_block_write(struct ieee80211_hw *hw, const u8 *buffer, u32 size);
     97void rtl_efuse_ops_init(struct ieee80211_hw *hw);
     98#endif