cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

fw.h (7639B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2009-2013  Realtek Corporation.*/
      3
      4#ifndef __RTL92C__FW__H__
      5#define __RTL92C__FW__H__
      6
      7#define FW_8192C_SIZE				0x8000
      8#define FW_8192C_START_ADDRESS			0x1000
      9#define FW_8192C_END_ADDRESS			0x5FFF
     10#define FW_8192C_PAGE_SIZE			4096
     11#define FW_8192C_POLLING_DELAY			5
     12#define FW_8192C_POLLING_TIMEOUT_COUNT		3000
     13
     14#define IS_FW_HEADER_EXIST(_pfwhdr)		\
     15	((le16_to_cpu(_pfwhdr->signature) & 0xFFFF) == 0x88E1)
     16#define USE_OLD_WOWLAN_DEBUG_FW			0
     17
     18#define H2C_88E_RSVDPAGE_LOC_LEN		5
     19#define H2C_88E_PWEMODE_LENGTH			5
     20#define H2C_88E_JOINBSSRPT_LENGTH		1
     21#define H2C_88E_AP_OFFLOAD_LENGTH		3
     22#define H2C_88E_WOWLAN_LENGTH			3
     23#define H2C_88E_KEEP_ALIVE_CTRL_LENGTH		3
     24#if (USE_OLD_WOWLAN_DEBUG_FW == 0)
     25#define H2C_88E_REMOTE_WAKE_CTRL_LEN		1
     26#else
     27#define H2C_88E_REMOTE_WAKE_CTRL_LEN		3
     28#endif
     29#define H2C_88E_AOAC_GLOBAL_INFO_LEN		2
     30#define H2C_88E_AOAC_RSVDPAGE_LOC_LEN		7
     31
     32/* Fw PS state for RPWM.
     33*BIT[2:0] = HW state
     34*BIT[3] = Protocol PS state,
     35*1: register active state , 0: register sleep state
     36*BIT[4] = sub-state
     37*/
     38#define	FW_PS_GO_ON			BIT(0)
     39#define	FW_PS_TX_NULL			BIT(1)
     40#define	FW_PS_RF_ON			BIT(2)
     41#define	FW_PS_REGISTER_ACTIVE		BIT(3)
     42
     43#define	FW_PS_DPS			BIT(0)
     44#define	FW_PS_LCLK			(FW_PS_DPS)
     45#define	FW_PS_RF_OFF			BIT(1)
     46#define	FW_PS_ALL_ON			BIT(2)
     47#define	FW_PS_ST_ACTIVE			BIT(3)
     48#define	FW_PS_ISR_ENABLE		BIT(4)
     49#define	FW_PS_IMR_ENABLE		BIT(5)
     50
     51
     52#define	FW_PS_ACK			BIT(6)
     53#define	FW_PS_TOGGLE			BIT(7)
     54
     55 /* 88E RPWM value*/
     56 /* BIT[0] = 1: 32k, 0: 40M*/
     57#define	FW_PS_CLOCK_OFF			BIT(0)		/* 32k*/
     58#define	FW_PS_CLOCK_ON			0		/*40M*/
     59
     60#define	FW_PS_STATE_MASK		(0x0F)
     61#define	FW_PS_STATE_HW_MASK		(0x07)
     62/*ISR_ENABLE, IMR_ENABLE, and PS mode should be inherited.*/
     63#define	FW_PS_STATE_INT_MASK		(0x3F)
     64
     65#define	FW_PS_STATE(x)			(FW_PS_STATE_MASK & (x))
     66#define	FW_PS_STATE_HW(x)		(FW_PS_STATE_HW_MASK & (x))
     67#define	FW_PS_STATE_INT(x)		(FW_PS_STATE_INT_MASK & (x))
     68#define	FW_PS_ISR_VAL(x)		((x) & 0x70)
     69#define	FW_PS_IMR_MASK(x)		((x) & 0xDF)
     70#define	FW_PS_KEEP_IMR(x)		((x) & 0x20)
     71
     72#define	FW_PS_STATE_S0			(FW_PS_DPS)
     73#define	FW_PS_STATE_S1			(FW_PS_LCLK)
     74#define	FW_PS_STATE_S2			(FW_PS_RF_OFF)
     75#define	FW_PS_STATE_S3			(FW_PS_ALL_ON)
     76#define	FW_PS_STATE_S4			((FW_PS_ST_ACTIVE) | (FW_PS_ALL_ON))
     77/* ((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))*/
     78#define	FW_PS_STATE_ALL_ON_88E		(FW_PS_CLOCK_ON)
     79/* (FW_PS_RF_ON)*/
     80#define	FW_PS_STATE_RF_ON_88E		(FW_PS_CLOCK_ON)
     81/* 0x0*/
     82#define	FW_PS_STATE_RF_OFF_88E	(FW_PS_CLOCK_ON)
     83/* (FW_PS_STATE_RF_OFF)*/
     84#define	FW_PS_STATE_RF_OFF_LOW_PWR_88E	(FW_PS_CLOCK_OFF)
     85
     86#define	FW_PS_STATE_ALL_ON_92C		(FW_PS_STATE_S4)
     87#define	FW_PS_STATE_RF_ON_92C		(FW_PS_STATE_S3)
     88#define	FW_PS_STATE_RF_OFF_92C		(FW_PS_STATE_S2)
     89#define	FW_PS_STATE_RF_OFF_LOW_PWR_92C	(FW_PS_STATE_S1)
     90
     91/* For 88E H2C PwrMode Cmd ID 5.*/
     92#define	FW_PWR_STATE_ACTIVE	((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
     93#define	FW_PWR_STATE_RF_OFF		0
     94
     95#define	FW_PS_IS_ACK(x)			((x) & FW_PS_ACK)
     96#define	FW_PS_IS_CLK_ON(x)		((x) & (FW_PS_RF_OFF | FW_PS_ALL_ON))
     97#define	FW_PS_IS_RF_ON(x)		((x) & (FW_PS_ALL_ON))
     98#define	FW_PS_IS_ACTIVE(x)		((x) & (FW_PS_ST_ACTIVE))
     99#define	FW_PS_IS_CPWM_INT(x)		((x) & 0x40)
    100
    101#define	FW_CLR_PS_STATE(x)		((x) = ((x) & (0xF0)))
    102
    103#define	IS_IN_LOW_POWER_STATE_88E(fwpsstate)		\
    104	(FW_PS_STATE(fwpsstate) == FW_PS_CLOCK_OFF)
    105
    106#define	FW_PWR_STATE_ACTIVE	((FW_PS_RF_ON) | (FW_PS_REGISTER_ACTIVE))
    107#define	FW_PWR_STATE_RF_OFF		0
    108
    109enum rtl8188e_h2c_cmd {
    110	H2C_88E_RSVDPAGE = 0,
    111	H2C_88E_JOINBSSRPT = 1,
    112	H2C_88E_SCAN = 2,
    113	H2C_88E_KEEP_ALIVE_CTRL = 3,
    114	H2C_88E_DISCONNECT_DECISION = 4,
    115#if (USE_OLD_WOWLAN_DEBUG_FW == 1)
    116	H2C_88E_WO_WLAN = 5,
    117#endif
    118	H2C_88E_INIT_OFFLOAD = 6,
    119#if (USE_OLD_WOWLAN_DEBUG_FW == 1)
    120	H2C_88E_REMOTE_WAKE_CTRL = 7,
    121#endif
    122	H2C_88E_AP_OFFLOAD = 8,
    123	H2C_88E_BCN_RSVDPAGE = 9,
    124	H2C_88E_PROBERSP_RSVDPAGE = 10,
    125
    126	H2C_88E_SETPWRMODE = 0x20,
    127	H2C_88E_PS_TUNING_PARA = 0x21,
    128	H2C_88E_PS_TUNING_PARA2 = 0x22,
    129	H2C_88E_PS_LPS_PARA = 0x23,
    130	H2C_88E_P2P_PS_OFFLOAD = 024,
    131
    132#if (USE_OLD_WOWLAN_DEBUG_FW == 0)
    133	H2C_88E_WO_WLAN = 0x80,
    134	H2C_88E_REMOTE_WAKE_CTRL = 0x81,
    135	H2C_88E_AOAC_GLOBAL_INFO = 0x82,
    136	H2C_88E_AOAC_RSVDPAGE = 0x83,
    137#endif
    138	/*Not defined in new 88E H2C CMD Format*/
    139	H2C_88E_RA_MASK,
    140	H2C_88E_SELECTIVE_SUSPEND_ROF_CMD,
    141	H2C_88E_P2P_PS_MODE,
    142	H2C_88E_PSD_RESULT,
    143	/*Not defined CTW CMD for P2P yet*/
    144	H2C_88E_P2P_PS_CTW_CMD,
    145	MAX_88E_H2CCMD
    146};
    147
    148#define pagenum_128(_len)	(u32)(((_len)>>7) + ((_len)&0x7F ? 1 : 0))
    149
    150#define SET_88E_H2CCMD_WOWLAN_FUNC_ENABLE(__cmd, __value)		\
    151	SET_BITS_TO_LE_1BYTE(__cmd, 0, 1, __value)
    152#define SET_88E_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__cmd, __value)	\
    153	SET_BITS_TO_LE_1BYTE(__cmd, 1, 1, __value)
    154#define SET_88E_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__cmd, __value)	\
    155	SET_BITS_TO_LE_1BYTE(__cmd, 2, 1, __value)
    156#define SET_88E_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__cmd, __value)	\
    157	SET_BITS_TO_LE_1BYTE(__cmd, 3, 1, __value)
    158#define SET_88E_H2CCMD_WOWLAN_ALL_PKT_DROP(__cmd, __value)		\
    159	SET_BITS_TO_LE_1BYTE(__cmd, 4, 1, __value)
    160#define SET_88E_H2CCMD_WOWLAN_GPIO_ACTIVE(__cmd, __value)		\
    161	SET_BITS_TO_LE_1BYTE(__cmd, 5, 1, __value)
    162#define SET_88E_H2CCMD_WOWLAN_REKEY_WAKE_UP(__cmd, __value)		\
    163	SET_BITS_TO_LE_1BYTE(__cmd, 6, 1, __value)
    164#define SET_88E_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__cmd, __value)	\
    165	SET_BITS_TO_LE_1BYTE(__cmd, 7, 1, __value)
    166#define SET_88E_H2CCMD_WOWLAN_GPIONUM(__cmd, __value)		\
    167	SET_BITS_TO_LE_1BYTE((__cmd)+1, 0, 8, __value)
    168#define SET_88E_H2CCMD_WOWLAN_GPIO_DURATION(__cmd, __value)		\
    169	SET_BITS_TO_LE_1BYTE((__cmd)+2, 0, 8, __value)
    170
    171
    172static inline void set_h2ccmd_pwrmode_parm_mode(u8 *__ph2ccmd, u8 __val)
    173{
    174	*(u8 *)(__ph2ccmd) = __val;
    175}
    176
    177static inline void set_h2ccmd_pwrmode_parm_rlbm(u8 *__cmd, u8 __value)
    178{
    179	u8p_replace_bits(__cmd + 1, __value, GENMASK(3, 0));
    180}
    181
    182static inline void set_h2ccmd_pwrmode_parm_smart_ps(u8 *__cmd, u8 __value)
    183{
    184	u8p_replace_bits(__cmd + 1, __value, GENMASK(7, 4));
    185}
    186
    187static inline void set_h2ccmd_pwrmode_parm_awake_interval(u8 *__cmd, u8 __value)
    188{
    189	*(u8 *)(__cmd + 2) = __value;
    190}
    191
    192static inline void set_h2ccmd_pwrmode_parm_all_queue_uapsd(u8 *__cmd,
    193							   u8 __value)
    194{
    195	*(u8 *)(__cmd + 3) = __value;
    196}
    197
    198static inline void set_h2ccmd_pwrmode_parm_pwr_state(u8 *__cmd, u8 __value)
    199{
    200	*(u8 *)(__cmd + 4) = __value;
    201}
    202
    203#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val)		\
    204	*(u8 *)(__ph2ccmd) = __val;
    205#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val)		\
    206	*(u8 *)(__ph2ccmd) = __val;
    207#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val)		\
    208	*(u8 *)(__ph2ccmd + 1) = __val;
    209#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val)		\
    210	*(u8 *)(__ph2ccmd + 2) = __val;
    211
    212/* AP_OFFLOAD */
    213#define SET_H2CCMD_AP_OFFLOAD_ON(__cmd, __value)			\
    214	*(u8 *)__cmd = __value;
    215#define SET_H2CCMD_AP_OFFLOAD_HIDDEN(__cmd, __value)		\
    216	*(u8 *)(__cmd + 1) = __value;
    217#define SET_H2CCMD_AP_OFFLOAD_DENYANY(__cmd, __value)		\
    218	*(u8 *)(__cmd + 2) = __value;
    219#define SET_H2CCMD_AP_OFFLOAD_WAKEUP_EVT_RPT(__cmd, __value)	\
    220	*(u8 *)(__cmd + 3) = __value;
    221
    222int rtl88e_download_fw(struct ieee80211_hw *hw,
    223		       bool buse_wake_on_wlan_fw);
    224void rtl88e_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
    225			 u32 cmd_len, u8 *cmdbuffer);
    226void rtl88e_firmware_selfreset(struct ieee80211_hw *hw);
    227void rtl88e_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
    228void rtl88e_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
    229void rtl88e_set_fw_ap_off_load_cmd(struct ieee80211_hw *hw,
    230				   u8 ap_offload_enable);
    231void rtl88e_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
    232void rtl88e_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state);
    233#endif