cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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table.h (1101B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2009-2012  Realtek Corporation.*/
      3
      4#ifndef __RTL92CE_TABLE__H_
      5#define __RTL92CE_TABLE__H_
      6
      7#include <linux/types.h>
      8
      9#define PHY_REG_2TARRAY_LENGTH	374
     10extern u32 RTL8192CEPHY_REG_2TARRAY[PHY_REG_2TARRAY_LENGTH];
     11#define PHY_REG_1TARRAY_LENGTH	374
     12extern u32 RTL8192CEPHY_REG_1TARRAY[PHY_REG_1TARRAY_LENGTH];
     13#define PHY_REG_ARRAY_PGLENGTH	192
     14extern u32 RTL8192CEPHY_REG_ARRAY_PG[PHY_REG_ARRAY_PGLENGTH];
     15#define RADIOA_2TARRAYLENGTH	282
     16extern u32 RTL8192CERADIOA_2TARRAY[RADIOA_2TARRAYLENGTH];
     17#define RADIOB_2TARRAYLENGTH	78
     18extern u32 RTL8192CE_RADIOB_2TARRAY[RADIOB_2TARRAYLENGTH];
     19#define RADIOA_1TARRAYLENGTH	282
     20extern u32 RTL8192CE_RADIOA_1TARRAY[RADIOA_1TARRAYLENGTH];
     21#define RADIOB_1TARRAYLENGTH	1
     22extern u32 RTL8192CE_RADIOB_1TARRAY[RADIOB_1TARRAYLENGTH];
     23#define MAC_2T_ARRAYLENGTH	162
     24extern u32 RTL8192CEMAC_2T_ARRAY[MAC_2T_ARRAYLENGTH];
     25#define AGCTAB_2TARRAYLENGTH	320
     26extern u32 RTL8192CEAGCTAB_2TARRAY[AGCTAB_2TARRAYLENGTH];
     27#define AGCTAB_1TARRAYLENGTH	320
     28extern u32 RTL8192CEAGCTAB_1TARRAY[AGCTAB_1TARRAYLENGTH];
     29
     30#endif