cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

trx.h (11588B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2009-2012  Realtek Corporation.*/
      3
      4#ifndef __RTL92CE_TRX_H__
      5#define __RTL92CE_TRX_H__
      6
      7#define TX_DESC_SIZE				64
      8#define TX_DESC_AGGR_SUBFRAME_SIZE		32
      9
     10#define RX_DESC_SIZE				32
     11#define RX_DRV_INFO_SIZE_UNIT			8
     12
     13#define	TX_DESC_NEXT_DESC_OFFSET		40
     14#define USB_HWDESC_HEADER_LEN			32
     15#define CRCLENGTH				4
     16
     17/* macros to read/write various fields in RX or TX descriptors */
     18
     19static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32  __val)
     20{
     21	le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));
     22}
     23
     24static inline void set_tx_desc_offset(__le32 *__pdesc, u32  __val)
     25{
     26	le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));
     27}
     28
     29static inline void set_tx_desc_bmc(__le32 *__pdesc, u32  __val)
     30{
     31	le32p_replace_bits(__pdesc, __val, BIT(24));
     32}
     33
     34static inline void set_tx_desc_htc(__le32 *__pdesc, u32  __val)
     35{
     36	le32p_replace_bits(__pdesc, __val, BIT(25));
     37}
     38
     39static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32  __val)
     40{
     41	le32p_replace_bits(__pdesc, __val, BIT(26));
     42}
     43
     44static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32  __val)
     45{
     46	le32p_replace_bits(__pdesc, __val, BIT(27));
     47}
     48
     49static inline void set_tx_desc_linip(__le32 *__pdesc, u32  __val)
     50{
     51	le32p_replace_bits(__pdesc, __val, BIT(28));
     52}
     53
     54static inline void set_tx_desc_own(__le32 *__pdesc, u32  __val)
     55{
     56	le32p_replace_bits(__pdesc, __val, BIT(31));
     57}
     58
     59static inline int get_tx_desc_own(__le32 *__pdesc)
     60{
     61	return le32_get_bits(*(__pdesc), BIT(31));
     62}
     63
     64static inline void set_tx_desc_macid(__le32 *__pdesc, u32  __val)
     65{
     66	le32p_replace_bits((__pdesc + 1), __val, GENMASK(4, 0));
     67}
     68
     69static inline void set_tx_desc_agg_break(__le32 *__pdesc, u32  __val)
     70{
     71	le32p_replace_bits((__pdesc + 1), __val, BIT(5));
     72}
     73
     74static inline void set_tx_desc_rdg_enable(__le32 *__pdesc, u32  __val)
     75{
     76	le32p_replace_bits((__pdesc + 1), __val, BIT(7));
     77}
     78
     79static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32  __val)
     80{
     81	le32p_replace_bits((__pdesc + 1), __val, GENMASK(12, 8));
     82}
     83
     84static inline void set_tx_desc_rate_id(__le32 *__pdesc, u32  __val)
     85{
     86	le32p_replace_bits((__pdesc + 1), __val, GENMASK(19, 16));
     87}
     88
     89static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32  __val)
     90{
     91	le32p_replace_bits((__pdesc + 1), __val, GENMASK(23, 22));
     92}
     93
     94static inline void set_tx_desc_more_frag(__le32 *__pdesc, u32  __val)
     95{
     96	le32p_replace_bits((__pdesc + 2), __val, BIT(17));
     97}
     98
     99static inline void set_tx_desc_ampdu_density(__le32 *__pdesc, u32  __val)
    100{
    101	le32p_replace_bits((__pdesc + 2), __val, GENMASK(22, 20));
    102}
    103
    104static inline void set_tx_desc_seq(__le32 *__pdesc, u32  __val)
    105{
    106	le32p_replace_bits((__pdesc + 3), __val, GENMASK(27, 16));
    107}
    108
    109static inline void set_tx_desc_pkt_id(__le32 *__pdesc, u32  __val)
    110{
    111	le32p_replace_bits((__pdesc + 3), __val, GENMASK(31, 28));
    112}
    113
    114static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32  __val)
    115{
    116	le32p_replace_bits((__pdesc + 4), __val, GENMASK(4, 0));
    117}
    118
    119static inline void set_tx_desc_qos(__le32 *__pdesc, u32  __val)
    120{
    121	le32p_replace_bits((__pdesc + 4), __val, BIT(6));
    122}
    123
    124static inline void set_tx_desc_hwseq_en(__le32 *__pdesc, u32  __val)
    125{
    126	le32p_replace_bits((__pdesc + 4), __val, BIT(7));
    127}
    128
    129static inline void set_tx_desc_use_rate(__le32 *__pdesc, u32  __val)
    130{
    131	le32p_replace_bits((__pdesc + 4), __val, BIT(8));
    132}
    133
    134static inline void set_tx_desc_disable_fb(__le32 *__pdesc, u32  __val)
    135{
    136	le32p_replace_bits((__pdesc + 4), __val, BIT(10));
    137}
    138
    139static inline void set_tx_desc_cts2self(__le32 *__pdesc, u32  __val)
    140{
    141	le32p_replace_bits((__pdesc + 4), __val, BIT(11));
    142}
    143
    144static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32  __val)
    145{
    146	le32p_replace_bits((__pdesc + 4), __val, BIT(12));
    147}
    148
    149static inline void set_tx_desc_hw_rts_enable(__le32 *__pdesc, u32  __val)
    150{
    151	le32p_replace_bits((__pdesc + 4), __val, BIT(13));
    152}
    153
    154static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32  __val)
    155{
    156	le32p_replace_bits((__pdesc + 4), __val, GENMASK(21, 20));
    157}
    158
    159static inline void set_tx_desc_data_bw(__le32 *__pdesc, u32  __val)
    160{
    161	le32p_replace_bits((__pdesc + 4), __val, BIT(25));
    162}
    163
    164static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32  __val)
    165{
    166	le32p_replace_bits((__pdesc + 4), __val, BIT(26));
    167}
    168
    169static inline void set_tx_desc_rts_bw(__le32 *__pdesc, u32  __val)
    170{
    171	le32p_replace_bits((__pdesc + 4), __val, BIT(27));
    172}
    173
    174static inline void set_tx_desc_rts_sc(__le32 *__pdesc, u32  __val)
    175{
    176	le32p_replace_bits((__pdesc + 4), __val, GENMASK(29, 28));
    177}
    178
    179static inline void set_tx_desc_rts_stbc(__le32 *__pdesc, u32  __val)
    180{
    181	le32p_replace_bits((__pdesc + 4), __val, GENMASK(31, 30));
    182}
    183
    184static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32  __val)
    185{
    186	le32p_replace_bits((__pdesc + 5), __val, GENMASK(5, 0));
    187}
    188
    189static inline void set_tx_desc_data_shortgi(__le32 *__pdesc, u32  __val)
    190{
    191	le32p_replace_bits((__pdesc + 5), __val, BIT(6));
    192}
    193
    194static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32  __val)
    195{
    196	le32p_replace_bits((__pdesc + 5), __val, GENMASK(12, 8));
    197}
    198
    199static inline void set_tx_desc_rts_rate_fb_limit(__le32 *__pdesc, u32  __val)
    200{
    201	le32p_replace_bits((__pdesc + 5), __val, GENMASK(16, 13));
    202}
    203
    204static inline void set_tx_desc_max_agg_num(__le32 *__pdesc, u32  __val)
    205{
    206	le32p_replace_bits((__pdesc + 6), __val, GENMASK(15, 11));
    207}
    208
    209static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32  __val)
    210{
    211	le32p_replace_bits((__pdesc + 7), __val, GENMASK(15, 0));
    212}
    213
    214static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32  __val)
    215{
    216	*(__pdesc + 8) = cpu_to_le32(__val);
    217}
    218
    219static inline u32 get_tx_desc_tx_buffer_address(__le32 *__pdesc)
    220{
    221	return le32_to_cpu(*((__pdesc + 8)));
    222}
    223
    224static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32  __val)
    225{
    226	*(__pdesc + 10) = cpu_to_le32(__val);
    227}
    228
    229static inline int get_rx_desc_pkt_len(__le32 *__pdesc)
    230{
    231	return le32_get_bits(*(__pdesc), GENMASK(13, 0));
    232}
    233
    234static inline int get_rx_desc_crc32(__le32 *__pdesc)
    235{
    236	return le32_get_bits(*(__pdesc), BIT(14));
    237}
    238
    239static inline int get_rx_desc_icv(__le32 *__pdesc)
    240{
    241	return le32_get_bits(*(__pdesc), BIT(15));
    242}
    243
    244static inline int get_rx_desc_drv_info_size(__le32 *__pdesc)
    245{
    246	return le32_get_bits(*(__pdesc), GENMASK(19, 16));
    247}
    248
    249static inline int get_rx_desc_shift(__le32 *__pdesc)
    250{
    251	return le32_get_bits(*(__pdesc), GENMASK(25, 24));
    252}
    253
    254static inline int get_rx_desc_physt(__le32 *__pdesc)
    255{
    256	return le32_get_bits(*(__pdesc), BIT(26));
    257}
    258
    259static inline int get_rx_desc_swdec(__le32 *__pdesc)
    260{
    261	return le32_get_bits(*(__pdesc), BIT(27));
    262}
    263
    264static inline int get_rx_desc_own(__le32 *__pdesc)
    265{
    266	return le32_get_bits(*(__pdesc), BIT(31));
    267}
    268
    269static inline void set_rx_desc_pkt_len(__le32 *__pdesc, u32  __val)
    270{
    271	le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));
    272}
    273
    274static inline void set_rx_desc_eor(__le32 *__pdesc, u32  __val)
    275{
    276	le32p_replace_bits(__pdesc, __val, BIT(30));
    277}
    278
    279static inline void set_rx_desc_own(__le32 *__pdesc, u32  __val)
    280{
    281	le32p_replace_bits(__pdesc, __val, BIT(31));
    282}
    283
    284static inline int get_rx_desc_paggr(__le32 *__pdesc)
    285{
    286	return le32_get_bits(*((__pdesc + 1)), BIT(14));
    287}
    288
    289static inline int get_rx_desc_faggr(__le32 *__pdesc)
    290{
    291	return le32_get_bits(*((__pdesc + 1)), BIT(15));
    292}
    293
    294static inline int get_rx_desc_rxmcs(__le32 *__pdesc)
    295{
    296	return le32_get_bits(*((__pdesc + 3)), GENMASK(5, 0));
    297}
    298
    299static inline int get_rx_desc_rxht(__le32 *__pdesc)
    300{
    301	return le32_get_bits(*((__pdesc + 3)), BIT(6));
    302}
    303
    304static inline int get_rx_desc_splcp(__le32 *__pdesc)
    305{
    306	return le32_get_bits(*((__pdesc + 3)), BIT(8));
    307}
    308
    309static inline int get_rx_desc_bw(__le32 *__pdesc)
    310{
    311	return le32_get_bits(*((__pdesc + 3)), BIT(9));
    312}
    313
    314static inline u32 get_rx_desc_tsfl(__le32 *__pdesc)
    315{
    316	return le32_to_cpu(*((__pdesc + 5)));
    317}
    318
    319static inline u32 get_rx_desc_buff_addr(__le32 *__pdesc)
    320{
    321	return le32_to_cpu(*((__pdesc + 6)));
    322}
    323
    324static inline void set_rx_desc_buff_addr(__le32 *__pdesc, u32  __val)
    325{
    326	*(__pdesc + 6) = cpu_to_le32(__val);
    327}
    328
    329static inline void clear_pci_tx_desc_content(__le32 *__pdesc, int _size)
    330{
    331	memset(__pdesc, 0, min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET));
    332}
    333
    334struct rx_fwinfo_92c {
    335	u8 gain_trsw[4];
    336	u8 pwdb_all;
    337	u8 cfosho[4];
    338	u8 cfotail[4];
    339	s8 rxevm[2];
    340	s8 rxsnr[4];
    341	u8 pdsnr[2];
    342	u8 csi_current[2];
    343	u8 csi_target[2];
    344	u8 sigevm;
    345	u8 max_ex_pwr;
    346	u8 ex_intf_flag:1;
    347	u8 sgi_en:1;
    348	u8 rxsc:2;
    349	u8 reserve:4;
    350} __packed;
    351
    352struct tx_desc_92c {
    353	u32 pktsize:16;
    354	u32 offset:8;
    355	u32 bmc:1;
    356	u32 htc:1;
    357	u32 lastseg:1;
    358	u32 firstseg:1;
    359	u32 linip:1;
    360	u32 noacm:1;
    361	u32 gf:1;
    362	u32 own:1;
    363
    364	u32 macid:5;
    365	u32 agg_en:1;
    366	u32 bk:1;
    367	u32 rdg_en:1;
    368	u32 queuesel:5;
    369	u32 rd_nav_ext:1;
    370	u32 lsig_txop_en:1;
    371	u32 pifs:1;
    372	u32 rateid:4;
    373	u32 nav_usehdr:1;
    374	u32 en_descid:1;
    375	u32 sectype:2;
    376	u32 pktoffset:8;
    377
    378	u32 rts_rc:6;
    379	u32 data_rc:6;
    380	u32 rsvd0:2;
    381	u32 bar_retryht:2;
    382	u32 rsvd1:1;
    383	u32 morefrag:1;
    384	u32 raw:1;
    385	u32 ccx:1;
    386	u32 ampdudensity:3;
    387	u32 rsvd2:1;
    388	u32 ant_sela:1;
    389	u32 ant_selb:1;
    390	u32 txant_cck:2;
    391	u32 txant_l:2;
    392	u32 txant_ht:2;
    393
    394	u32 nextheadpage:8;
    395	u32 tailpage:8;
    396	u32 seq:12;
    397	u32 pktid:4;
    398
    399	u32 rtsrate:5;
    400	u32 apdcfe:1;
    401	u32 qos:1;
    402	u32 hwseq_enable:1;
    403	u32 userrate:1;
    404	u32 dis_rtsfb:1;
    405	u32 dis_datafb:1;
    406	u32 cts2self:1;
    407	u32 rts_en:1;
    408	u32 hwrts_en:1;
    409	u32 portid:1;
    410	u32 rsvd3:3;
    411	u32 waitdcts:1;
    412	u32 cts2ap_en:1;
    413	u32 txsc:2;
    414	u32 stbc:2;
    415	u32 txshort:1;
    416	u32 txbw:1;
    417	u32 rtsshort:1;
    418	u32 rtsbw:1;
    419	u32 rtssc:2;
    420	u32 rtsstbc:2;
    421
    422	u32 txrate:6;
    423	u32 shortgi:1;
    424	u32 ccxt:1;
    425	u32 txrate_fb_lmt:5;
    426	u32 rtsrate_fb_lmt:4;
    427	u32 retrylmt_en:1;
    428	u32 txretrylmt:6;
    429	u32 usb_txaggnum:8;
    430
    431	u32 txagca:5;
    432	u32 txagcb:5;
    433	u32 usemaxlen:1;
    434	u32 maxaggnum:5;
    435	u32 mcsg1maxlen:4;
    436	u32 mcsg2maxlen:4;
    437	u32 mcsg3maxlen:4;
    438	u32 mcs7sgimaxlen:4;
    439
    440	u32 txbuffersize:16;
    441	u32 mcsg4maxlen:4;
    442	u32 mcsg5maxlen:4;
    443	u32 mcsg6maxlen:4;
    444	u32 mcsg15sgimaxlen:4;
    445
    446	u32 txbuffaddr;
    447	u32 txbufferaddr64;
    448	u32 nextdescaddress;
    449	u32 nextdescaddress64;
    450
    451	u32 reserve_pass_pcie_mm_limit[4];
    452} __packed;
    453
    454struct rx_desc_92c {
    455	u32 length:14;
    456	u32 crc32:1;
    457	u32 icverror:1;
    458	u32 drv_infosize:4;
    459	u32 security:3;
    460	u32 qos:1;
    461	u32 shift:2;
    462	u32 phystatus:1;
    463	u32 swdec:1;
    464	u32 lastseg:1;
    465	u32 firstseg:1;
    466	u32 eor:1;
    467	u32 own:1;
    468
    469	u32 macid:5;
    470	u32 tid:4;
    471	u32 hwrsvd:5;
    472	u32 paggr:1;
    473	u32 faggr:1;
    474	u32 a1_fit:4;
    475	u32 a2_fit:4;
    476	u32 pam:1;
    477	u32 pwr:1;
    478	u32 moredata:1;
    479	u32 morefrag:1;
    480	u32 type:2;
    481	u32 mc:1;
    482	u32 bc:1;
    483
    484	u32 seq:12;
    485	u32 frag:4;
    486	u32 nextpktlen:14;
    487	u32 nextind:1;
    488	u32 rsvd:1;
    489
    490	u32 rxmcs:6;
    491	u32 rxht:1;
    492	u32 amsdu:1;
    493	u32 splcp:1;
    494	u32 bandwidth:1;
    495	u32 htc:1;
    496	u32 tcpchk_rpt:1;
    497	u32 ipcchk_rpt:1;
    498	u32 tcpchk_valid:1;
    499	u32 hwpcerr:1;
    500	u32 hwpcind:1;
    501	u32 iv0:16;
    502
    503	u32 iv1;
    504
    505	u32 tsfl;
    506
    507	u32 bufferaddress;
    508	u32 bufferaddress64;
    509
    510} __packed;
    511
    512void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
    513			  struct ieee80211_hdr *hdr, u8 *pdesc,
    514			  u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
    515			  struct ieee80211_sta *sta,
    516			  struct sk_buff *skb, u8 hw_queue,
    517			  struct rtl_tcb_desc *ptcb_desc);
    518bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw,
    519			   struct rtl_stats *stats,
    520			   struct ieee80211_rx_status *rx_status,
    521			   u8 *pdesc, struct sk_buff *skb);
    522void rtl92ce_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
    523		      u8 desc_name, u8 *val);
    524u64 rtl92ce_get_desc(struct ieee80211_hw *hw, u8 *p_desc,
    525		     bool istx, u8 desc_name);
    526bool rtl92ce_is_tx_desc_closed(struct ieee80211_hw *hw,
    527			       u8 hw_queue, u16 index);
    528void rtl92ce_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);
    529void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
    530			     bool b_firstseg, bool b_lastseg,
    531			     struct sk_buff *skb);
    532#endif