cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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table.h (1164B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2009-2012  Realtek Corporation.*/
      3
      4#ifndef __RTL92DE_TABLE__H_
      5#define __RTL92DE_TABLE__H_
      6
      7/*Created on  2011/ 1/14,  1:35*/
      8
      9#define PHY_REG_2T_ARRAYLENGTH 380
     10extern u32 rtl8192de_phy_reg_2tarray[PHY_REG_2T_ARRAYLENGTH];
     11#define PHY_REG_ARRAY_PG_LENGTH 624
     12extern u32 rtl8192de_phy_reg_array_pg[PHY_REG_ARRAY_PG_LENGTH];
     13#define RADIOA_2T_ARRAYLENGTH 378
     14extern u32 rtl8192de_radioa_2tarray[RADIOA_2T_ARRAYLENGTH];
     15#define RADIOB_2T_ARRAYLENGTH 384
     16extern u32 rtl8192de_radiob_2tarray[RADIOB_2T_ARRAYLENGTH];
     17#define RADIOA_2T_INT_PA_ARRAYLENGTH 378
     18extern u32 rtl8192de_radioa_2t_int_paarray[RADIOA_2T_INT_PA_ARRAYLENGTH];
     19#define RADIOB_2T_INT_PA_ARRAYLENGTH 384
     20extern u32 rtl8192de_radiob_2t_int_paarray[RADIOB_2T_INT_PA_ARRAYLENGTH];
     21#define MAC_2T_ARRAYLENGTH 160
     22extern u32 rtl8192de_mac_2tarray[MAC_2T_ARRAYLENGTH];
     23#define AGCTAB_ARRAYLENGTH 386
     24extern u32 rtl8192de_agctab_array[AGCTAB_ARRAYLENGTH];
     25#define AGCTAB_5G_ARRAYLENGTH 194
     26extern u32 rtl8192de_agctab_5garray[AGCTAB_5G_ARRAYLENGTH];
     27#define AGCTAB_2G_ARRAYLENGTH 194
     28extern u32 rtl8192de_agctab_2garray[AGCTAB_2G_ARRAYLENGTH];
     29
     30#endif