cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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led.c (2969B)


      1// SPDX-License-Identifier: GPL-2.0
      2/* Copyright(c) 2009-2012  Realtek Corporation.*/
      3
      4#include "../wifi.h"
      5#include "../pci.h"
      6#include "reg.h"
      7#include "led.h"
      8
      9static void _rtl92se_init_led(struct ieee80211_hw *hw,
     10			      struct rtl_led *pled, enum rtl_led_pin ledpin)
     11{
     12	pled->hw = hw;
     13	pled->ledpin = ledpin;
     14	pled->ledon = false;
     15}
     16
     17void rtl92se_init_sw_leds(struct ieee80211_hw *hw)
     18{
     19	struct rtl_priv *rtlpriv = rtl_priv(hw);
     20
     21	_rtl92se_init_led(hw, &rtlpriv->ledctl.sw_led0, LED_PIN_LED0);
     22	_rtl92se_init_led(hw, &rtlpriv->ledctl.sw_led1, LED_PIN_LED1);
     23}
     24
     25void rtl92se_sw_led_on(struct ieee80211_hw *hw, struct rtl_led *pled)
     26{
     27	u8 ledcfg;
     28	struct rtl_priv *rtlpriv = rtl_priv(hw);
     29
     30	rtl_dbg(rtlpriv, COMP_LED, DBG_LOUD, "LedAddr:%X ledpin=%d\n",
     31		LEDCFG, pled->ledpin);
     32
     33	ledcfg = rtl_read_byte(rtlpriv, LEDCFG);
     34
     35	switch (pled->ledpin) {
     36	case LED_PIN_GPIO0:
     37		break;
     38	case LED_PIN_LED0:
     39		rtl_write_byte(rtlpriv, LEDCFG, ledcfg & 0xf0);
     40		break;
     41	case LED_PIN_LED1:
     42		rtl_write_byte(rtlpriv, LEDCFG, ledcfg & 0x0f);
     43		break;
     44	default:
     45		pr_err("switch case %#x not processed\n",
     46		       pled->ledpin);
     47		break;
     48	}
     49	pled->ledon = true;
     50}
     51
     52void rtl92se_sw_led_off(struct ieee80211_hw *hw, struct rtl_led *pled)
     53{
     54	struct rtl_priv *rtlpriv;
     55	u8 ledcfg;
     56
     57	rtlpriv = rtl_priv(hw);
     58	if (!rtlpriv || rtlpriv->max_fw_size)
     59		return;
     60	rtl_dbg(rtlpriv, COMP_LED, DBG_LOUD, "LedAddr:%X ledpin=%d\n",
     61		LEDCFG, pled->ledpin);
     62
     63	ledcfg = rtl_read_byte(rtlpriv, LEDCFG);
     64
     65	switch (pled->ledpin) {
     66	case LED_PIN_GPIO0:
     67		break;
     68	case LED_PIN_LED0:
     69		ledcfg &= 0xf0;
     70		if (rtlpriv->ledctl.led_opendrain)
     71			rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(1)));
     72		else
     73			rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(3)));
     74		break;
     75	case LED_PIN_LED1:
     76		ledcfg &= 0x0f;
     77		rtl_write_byte(rtlpriv, LEDCFG, (ledcfg | BIT(3)));
     78		break;
     79	default:
     80		pr_err("switch case %#x not processed\n",
     81		       pled->ledpin);
     82		break;
     83	}
     84	pled->ledon = false;
     85}
     86
     87static void _rtl92se_sw_led_control(struct ieee80211_hw *hw,
     88				    enum led_ctl_mode ledaction)
     89{
     90	struct rtl_priv *rtlpriv = rtl_priv(hw);
     91	struct rtl_led *pled0 = &rtlpriv->ledctl.sw_led0;
     92
     93	switch (ledaction) {
     94	case LED_CTL_POWER_ON:
     95	case LED_CTL_LINK:
     96	case LED_CTL_NO_LINK:
     97		rtl92se_sw_led_on(hw, pled0);
     98		break;
     99	case LED_CTL_POWER_OFF:
    100		rtl92se_sw_led_off(hw, pled0);
    101		break;
    102	default:
    103		break;
    104	}
    105}
    106
    107void rtl92se_led_control(struct ieee80211_hw *hw, enum led_ctl_mode ledaction)
    108{
    109	struct rtl_priv *rtlpriv = rtl_priv(hw);
    110	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
    111
    112	if ((ppsc->rfoff_reason > RF_CHANGE_BY_PS) &&
    113	    (ledaction == LED_CTL_TX ||
    114	    ledaction == LED_CTL_RX ||
    115	    ledaction == LED_CTL_SITE_SURVEY ||
    116	    ledaction == LED_CTL_LINK ||
    117	    ledaction == LED_CTL_NO_LINK ||
    118	    ledaction == LED_CTL_START_TO_LINK ||
    119	    ledaction == LED_CTL_POWER_ON)) {
    120		return;
    121	}
    122	rtl_dbg(rtlpriv, COMP_LED, DBG_LOUD, "ledaction %d\n", ledaction);
    123
    124	_rtl92se_sw_led_control(hw, ledaction);
    125}
    126