cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

trx.c (18730B)


      1// SPDX-License-Identifier: GPL-2.0
      2/* Copyright(c) 2009-2012  Realtek Corporation.*/
      3
      4#include "../wifi.h"
      5#include "../pci.h"
      6#include "../base.h"
      7#include "../stats.h"
      8#include "reg.h"
      9#include "def.h"
     10#include "phy.h"
     11#include "trx.h"
     12#include "led.h"
     13
     14static u8 _rtl8723e_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
     15{
     16	__le16 fc = rtl_get_fc(skb);
     17
     18	if (unlikely(ieee80211_is_beacon(fc)))
     19		return QSLT_BEACON;
     20	if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
     21		return QSLT_MGNT;
     22
     23	return skb->priority;
     24}
     25
     26static void _rtl8723e_query_rxphystatus(struct ieee80211_hw *hw,
     27					struct rtl_stats *pstatus, u8 *pdesc,
     28					struct rx_fwinfo_8723e *p_drvinfo,
     29					bool bpacket_match_bssid,
     30					bool bpacket_toself, bool packet_beacon)
     31{
     32	struct rtl_priv *rtlpriv = rtl_priv(hw);
     33	struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
     34	struct phy_sts_cck_8723e_t *cck_buf;
     35	s8 rx_pwr_all = 0, rx_pwr[4];
     36	u8 rf_rx_num = 0, evm, pwdb_all;
     37	u8 i, max_spatial_stream;
     38	u32 rssi, total_rssi = 0;
     39	bool is_cck = pstatus->is_cck;
     40
     41	/* Record it for next packet processing */
     42	pstatus->packet_matchbssid = bpacket_match_bssid;
     43	pstatus->packet_toself = bpacket_toself;
     44	pstatus->packet_beacon = packet_beacon;
     45	pstatus->rx_mimo_signalquality[0] = -1;
     46	pstatus->rx_mimo_signalquality[1] = -1;
     47
     48	if (is_cck) {
     49		u8 report, cck_highpwr;
     50
     51		/* CCK Driver info Structure is not the same as OFDM packet. */
     52		cck_buf = (struct phy_sts_cck_8723e_t *)p_drvinfo;
     53
     54		/* (1)Hardware does not provide RSSI for CCK */
     55		/* (2)PWDB, Average PWDB calculated by
     56		 * hardware (for rate adaptive)
     57		 */
     58		if (ppsc->rfpwr_state == ERFON)
     59			cck_highpwr = (u8)rtl_get_bbreg(hw,
     60					RFPGA0_XA_HSSIPARAMETER2,
     61					BIT(9));
     62		else
     63			cck_highpwr = false;
     64
     65		if (!cck_highpwr) {
     66			u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
     67			report = cck_buf->cck_agc_rpt & 0xc0;
     68			report = report >> 6;
     69			switch (report) {
     70			case 0x3:
     71				rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
     72				break;
     73			case 0x2:
     74				rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
     75				break;
     76			case 0x1:
     77				rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
     78				break;
     79			case 0x0:
     80				rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
     81				break;
     82			}
     83		} else {
     84			u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
     85			report = p_drvinfo->cfosho[0] & 0x60;
     86			report = report >> 5;
     87			switch (report) {
     88			case 0x3:
     89				rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
     90				break;
     91			case 0x2:
     92				rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
     93				break;
     94			case 0x1:
     95				rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
     96				break;
     97			case 0x0:
     98				rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
     99				break;
    100			}
    101		}
    102
    103		pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
    104		/* CCK gain is smaller than OFDM/MCS gain,  */
    105		/* so we add gain diff by experiences,
    106		 * the val is 6
    107		 */
    108		pwdb_all += 6;
    109		if (pwdb_all > 100)
    110			pwdb_all = 100;
    111		/* modify the offset to make the same
    112		 * gain index with OFDM.
    113		 */
    114		if (pwdb_all > 34 && pwdb_all <= 42)
    115			pwdb_all -= 2;
    116		else if (pwdb_all > 26 && pwdb_all <= 34)
    117			pwdb_all -= 6;
    118		else if (pwdb_all > 14 && pwdb_all <= 26)
    119			pwdb_all -= 8;
    120		else if (pwdb_all > 4 && pwdb_all <= 14)
    121			pwdb_all -= 4;
    122
    123		pstatus->rx_pwdb_all = pwdb_all;
    124		pstatus->recvsignalpower = rx_pwr_all;
    125
    126		/* (3) Get Signal Quality (EVM) */
    127		if (bpacket_match_bssid) {
    128			u8 sq;
    129
    130			if (pstatus->rx_pwdb_all > 40)
    131				sq = 100;
    132			else {
    133				sq = cck_buf->sq_rpt;
    134				if (sq > 64)
    135					sq = 0;
    136				else if (sq < 20)
    137					sq = 100;
    138				else
    139					sq = ((64 - sq) * 100) / 44;
    140			}
    141
    142			pstatus->signalquality = sq;
    143			pstatus->rx_mimo_signalquality[0] = sq;
    144			pstatus->rx_mimo_signalquality[1] = -1;
    145		}
    146	} else {
    147		rtlpriv->dm.rfpath_rxenable[0] =
    148		    rtlpriv->dm.rfpath_rxenable[1] = true;
    149
    150		/* (1)Get RSSI for HT rate */
    151		for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
    152
    153			/* we will judge RF RX path now. */
    154			if (rtlpriv->dm.rfpath_rxenable[i])
    155				rf_rx_num++;
    156
    157			rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
    158				      0x3f) * 2) - 110;
    159
    160			/* Translate DBM to percentage. */
    161			rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
    162			total_rssi += rssi;
    163
    164			/* Get Rx snr value in DB */
    165			rtlpriv->stats.rx_snr_db[i] =
    166				(long)(p_drvinfo->rxsnr[i] / 2);
    167
    168			/* Record Signal Strength for next packet */
    169			if (bpacket_match_bssid)
    170				pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
    171		}
    172
    173		/* (2)PWDB, Average PWDB calculated by
    174		 * hardware (for rate adaptive)
    175		 */
    176		rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
    177
    178		pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
    179		pstatus->rx_pwdb_all = pwdb_all;
    180		pstatus->rxpower = rx_pwr_all;
    181		pstatus->recvsignalpower = rx_pwr_all;
    182
    183		/* (3)EVM of HT rate */
    184		if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
    185		    pstatus->rate <= DESC92C_RATEMCS15)
    186			max_spatial_stream = 2;
    187		else
    188			max_spatial_stream = 1;
    189
    190		for (i = 0; i < max_spatial_stream; i++) {
    191			evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
    192
    193			if (bpacket_match_bssid) {
    194				/* Fill value in RFD, Get the first
    195				 * spatial stream only
    196				 */
    197				if (i == 0)
    198					pstatus->signalquality =
    199						(u8)(evm & 0xff);
    200				pstatus->rx_mimo_signalquality[i] =
    201					(u8)(evm & 0xff);
    202			}
    203		}
    204	}
    205
    206	/* UI BSS List signal strength(in percentage),
    207	 * make it good looking, from 0~100.
    208	 */
    209	if (is_cck)
    210		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
    211			pwdb_all));
    212	else if (rf_rx_num != 0)
    213		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
    214			total_rssi /= rf_rx_num));
    215}
    216
    217static void translate_rx_signal_stuff(struct ieee80211_hw *hw,
    218				      struct sk_buff *skb,
    219				      struct rtl_stats *pstatus, u8 *pdesc,
    220				      struct rx_fwinfo_8723e *p_drvinfo)
    221{
    222	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
    223	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
    224	struct ieee80211_hdr *hdr;
    225	u8 *tmp_buf;
    226	u8 *praddr;
    227	/*u8 *psaddr;*/
    228	u16 fc, type;
    229	bool packet_matchbssid, packet_toself, packet_beacon;
    230
    231	tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
    232
    233	hdr = (struct ieee80211_hdr *)tmp_buf;
    234	fc = le16_to_cpu(hdr->frame_control);
    235	type = WLAN_FC_GET_TYPE(hdr->frame_control);
    236	praddr = hdr->addr1;
    237
    238	packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
    239		(ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
    240		 hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
    241		 hdr->addr2 : hdr->addr3)) &&
    242		 (!pstatus->hwerror) &&
    243		 (!pstatus->crc) && (!pstatus->icv));
    244
    245	packet_toself = packet_matchbssid &&
    246	    (ether_addr_equal(praddr, rtlefuse->dev_addr));
    247
    248	if (ieee80211_is_beacon(hdr->frame_control))
    249		packet_beacon = true;
    250	else
    251		packet_beacon = false;
    252
    253	_rtl8723e_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
    254				    packet_matchbssid, packet_toself,
    255				    packet_beacon);
    256
    257	rtl_process_phyinfo(hw, tmp_buf, pstatus);
    258}
    259
    260bool rtl8723e_rx_query_desc(struct ieee80211_hw *hw,
    261			    struct rtl_stats *status,
    262			    struct ieee80211_rx_status *rx_status,
    263			    u8 *pdesc8, struct sk_buff *skb)
    264{
    265	struct rx_fwinfo_8723e *p_drvinfo;
    266	struct ieee80211_hdr *hdr;
    267	__le32 *pdesc = (__le32 *)pdesc8;
    268	u32 phystatus = get_rx_desc_physt(pdesc);
    269
    270	status->length = (u16)get_rx_desc_pkt_len(pdesc);
    271	status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
    272	    RX_DRV_INFO_SIZE_UNIT;
    273	status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
    274	status->icv = (u16)get_rx_desc_icv(pdesc);
    275	status->crc = (u16)get_rx_desc_crc32(pdesc);
    276	status->hwerror = (status->crc | status->icv);
    277	status->decrypted = !get_rx_desc_swdec(pdesc);
    278	status->rate = (u8)get_rx_desc_rxmcs(pdesc);
    279	status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
    280	status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
    281	status->isfirst_ampdu = (bool)((get_rx_desc_paggr(pdesc) == 1) &&
    282				       (get_rx_desc_faggr(pdesc) == 1));
    283	status->timestamp_low = get_rx_desc_tsfl(pdesc);
    284	status->rx_is40mhzpacket = (bool)get_rx_desc_bw(pdesc);
    285	status->is_ht = (bool)get_rx_desc_rxht(pdesc);
    286
    287	status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
    288
    289	rx_status->freq = hw->conf.chandef.chan->center_freq;
    290	rx_status->band = hw->conf.chandef.chan->band;
    291
    292	hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size
    293			+ status->rx_bufshift);
    294
    295	if (status->crc)
    296		rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
    297
    298	if (status->rx_is40mhzpacket)
    299		rx_status->bw = RATE_INFO_BW_40;
    300
    301	if (status->is_ht)
    302		rx_status->encoding = RX_ENC_HT;
    303
    304	rx_status->flag |= RX_FLAG_MACTIME_START;
    305
    306	/* hw will set status->decrypted true, if it finds the
    307	 * frame is open data frame or mgmt frame.
    308	 * So hw will not decryption robust managment frame
    309	 * for IEEE80211w but still set status->decrypted
    310	 * true, so here we should set it back to undecrypted
    311	 * for IEEE80211w frame, and mac80211 sw will help
    312	 * to decrypt it
    313	 */
    314	if (status->decrypted) {
    315		if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
    316		    (ieee80211_has_protected(hdr->frame_control)))
    317			rx_status->flag |= RX_FLAG_DECRYPTED;
    318		else
    319			rx_status->flag &= ~RX_FLAG_DECRYPTED;
    320	}
    321
    322	/* rate_idx: index of data rate into band's
    323	 * supported rates or MCS index if HT rates
    324	 * are use (RX_FLAG_HT)
    325	 * Notice: this is diff with windows define
    326	 */
    327	rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
    328						   false, status->rate);
    329
    330	rx_status->mactime = status->timestamp_low;
    331	if (phystatus == true) {
    332		p_drvinfo = (struct rx_fwinfo_8723e *)(skb->data +
    333						     status->rx_bufshift);
    334
    335		translate_rx_signal_stuff(hw, skb, status, pdesc8, p_drvinfo);
    336	}
    337	rx_status->signal = status->recvsignalpower + 10;
    338	return true;
    339}
    340
    341void rtl8723e_tx_fill_desc(struct ieee80211_hw *hw,
    342			   struct ieee80211_hdr *hdr, u8 *pdesc_tx,
    343			   u8 *txbd, struct ieee80211_tx_info *info,
    344			   struct ieee80211_sta *sta,
    345			   struct sk_buff *skb,
    346			   u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
    347{
    348	struct rtl_priv *rtlpriv = rtl_priv(hw);
    349	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
    350	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
    351	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
    352	bool b_defaultadapter = true;
    353	/* bool b_trigger_ac = false; */
    354	u8 *pdesc8 = (u8 *)pdesc_tx;
    355	__le32 *pdesc = (__le32 *)pdesc8;
    356	u16 seq_number;
    357	__le16 fc = hdr->frame_control;
    358	u8 fw_qsel = _rtl8723e_map_hwqueue_to_fwqueue(skb, hw_queue);
    359	bool firstseg = ((hdr->seq_ctrl &
    360			  cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
    361
    362	bool lastseg = ((hdr->frame_control &
    363			 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
    364
    365	dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
    366					    skb->len, DMA_TO_DEVICE);
    367	u8 bw_40 = 0;
    368
    369	if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
    370		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    371			"DMA mapping error\n");
    372		return;
    373	}
    374	if (mac->opmode == NL80211_IFTYPE_STATION) {
    375		bw_40 = mac->bw_40;
    376	} else if (mac->opmode == NL80211_IFTYPE_AP ||
    377		mac->opmode == NL80211_IFTYPE_ADHOC) {
    378		if (sta)
    379			bw_40 = sta->deflink.ht_cap.cap &
    380				IEEE80211_HT_CAP_SUP_WIDTH_20_40;
    381	}
    382
    383	seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
    384
    385	rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
    386
    387	clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_8723e));
    388
    389	if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
    390		firstseg = true;
    391		lastseg = true;
    392	}
    393
    394	if (firstseg) {
    395		set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
    396
    397		set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
    398
    399		if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
    400			set_tx_desc_data_shortgi(pdesc, 1);
    401
    402		if (info->flags & IEEE80211_TX_CTL_AMPDU) {
    403			set_tx_desc_agg_break(pdesc, 1);
    404			set_tx_desc_max_agg_num(pdesc, 0x14);
    405		}
    406		set_tx_desc_seq(pdesc, seq_number);
    407
    408		set_tx_desc_rts_enable(pdesc,
    409				       ((ptcb_desc->rts_enable &&
    410					!ptcb_desc->cts_enable) ? 1 : 0));
    411		set_tx_desc_hw_rts_enable(pdesc,
    412					  ((ptcb_desc->rts_enable ||
    413					  ptcb_desc->cts_enable) ? 1 : 0));
    414		set_tx_desc_cts2self(pdesc,
    415				     ((ptcb_desc->cts_enable) ? 1 : 0));
    416		set_tx_desc_rts_stbc(pdesc,
    417				     ((ptcb_desc->rts_stbc) ? 1 : 0));
    418
    419		set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
    420		set_tx_desc_rts_bw(pdesc, 0);
    421		set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
    422		set_tx_desc_rts_short(pdesc,
    423				((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
    424				(ptcb_desc->rts_use_shortpreamble ? 1 : 0)
    425				: (ptcb_desc->rts_use_shortgi ? 1 : 0)));
    426
    427		if (bw_40) {
    428			if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
    429				set_tx_desc_data_bw(pdesc, 1);
    430				set_tx_desc_tx_sub_carrier(pdesc, 3);
    431			} else {
    432				set_tx_desc_data_bw(pdesc, 0);
    433				set_tx_desc_tx_sub_carrier(pdesc,
    434					mac->cur_40_prime_sc);
    435			}
    436		} else {
    437			set_tx_desc_data_bw(pdesc, 0);
    438			set_tx_desc_tx_sub_carrier(pdesc, 0);
    439		}
    440
    441		set_tx_desc_linip(pdesc, 0);
    442		set_tx_desc_pkt_size(pdesc, (u16)skb->len);
    443
    444		if (sta) {
    445			u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;
    446			set_tx_desc_ampdu_density(pdesc, ampdu_density);
    447		}
    448
    449		if (info->control.hw_key) {
    450			struct ieee80211_key_conf *keyconf =
    451			    info->control.hw_key;
    452
    453			switch (keyconf->cipher) {
    454			case WLAN_CIPHER_SUITE_WEP40:
    455			case WLAN_CIPHER_SUITE_WEP104:
    456			case WLAN_CIPHER_SUITE_TKIP:
    457				set_tx_desc_sec_type(pdesc, 0x1);
    458				break;
    459			case WLAN_CIPHER_SUITE_CCMP:
    460				set_tx_desc_sec_type(pdesc, 0x3);
    461				break;
    462			default:
    463				set_tx_desc_sec_type(pdesc, 0x0);
    464				break;
    465
    466			}
    467		}
    468
    469		set_tx_desc_pkt_id(pdesc, 0);
    470		set_tx_desc_queue_sel(pdesc, fw_qsel);
    471
    472		set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
    473		set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
    474		set_tx_desc_disable_fb(pdesc, 0);
    475		set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
    476
    477		if (ieee80211_is_data_qos(fc)) {
    478			if (mac->rdg_en) {
    479				rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    480					"Enable RDG function.\n");
    481				set_tx_desc_rdg_enable(pdesc, 1);
    482				set_tx_desc_htc(pdesc, 1);
    483			}
    484		}
    485	}
    486
    487	set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
    488	set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
    489
    490	set_tx_desc_tx_buffer_size(pdesc, (u16)skb->len);
    491
    492	set_tx_desc_tx_buffer_address(pdesc, mapping);
    493
    494	if (rtlpriv->dm.useramask) {
    495		set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
    496		set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
    497	} else {
    498		set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
    499		set_tx_desc_macid(pdesc, ptcb_desc->ratr_index);
    500	}
    501
    502	if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
    503		set_tx_desc_hwseq_en_8723(pdesc, 1);
    504		/* set_tx_desc_hwseq_en(pdesc, 1); */
    505		/* set_tx_desc_pkt_id(pdesc, 8); */
    506
    507		if (!b_defaultadapter)
    508			set_tx_desc_hwseq_sel_8723(pdesc, 1);
    509	/* set_tx_desc_qos(pdesc, 1); */
    510	}
    511
    512	set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
    513
    514	if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
    515	    is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
    516		set_tx_desc_bmc(pdesc, 1);
    517	}
    518
    519	rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
    520}
    521
    522void rtl8723e_tx_fill_cmddesc(struct ieee80211_hw *hw,
    523			      u8 *pdesc8, bool firstseg,
    524			      bool lastseg, struct sk_buff *skb)
    525{
    526	struct rtl_priv *rtlpriv = rtl_priv(hw);
    527	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
    528	u8 fw_queue = QSLT_BEACON;
    529	__le32 *pdesc = (__le32 *)pdesc8;
    530
    531	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
    532	__le16 fc = hdr->frame_control;
    533
    534	dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
    535					    skb->len, DMA_TO_DEVICE);
    536
    537	if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
    538		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    539			"DMA mapping error\n");
    540		return;
    541	}
    542	clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
    543
    544	if (firstseg)
    545		set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
    546
    547	set_tx_desc_tx_rate(pdesc, DESC92C_RATE1M);
    548
    549	set_tx_desc_seq(pdesc, 0);
    550
    551	set_tx_desc_linip(pdesc, 0);
    552
    553	set_tx_desc_queue_sel(pdesc, fw_queue);
    554
    555	set_tx_desc_first_seg(pdesc, 1);
    556	set_tx_desc_last_seg(pdesc, 1);
    557
    558	set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
    559
    560	set_tx_desc_tx_buffer_address(pdesc, mapping);
    561
    562	set_tx_desc_rate_id(pdesc, 7);
    563	set_tx_desc_macid(pdesc, 0);
    564
    565	set_tx_desc_own(pdesc, 1);
    566
    567	set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
    568
    569	set_tx_desc_first_seg(pdesc, 1);
    570	set_tx_desc_last_seg(pdesc, 1);
    571
    572	set_tx_desc_offset(pdesc, 0x20);
    573
    574	set_tx_desc_use_rate(pdesc, 1);
    575
    576	if (!ieee80211_is_data_qos(fc)) {
    577		set_tx_desc_hwseq_en_8723(pdesc, 1);
    578		/* set_tx_desc_hwseq_en(pdesc, 1); */
    579		/* set_tx_desc_pkt_id(pdesc, 8); */
    580	}
    581
    582	RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
    583		      "H2C Tx Cmd Content\n",
    584		      pdesc, TX_DESC_SIZE);
    585}
    586
    587void rtl8723e_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
    588		       bool istx, u8 desc_name, u8 *val)
    589{
    590	__le32 *pdesc = (__le32 *)pdesc8;
    591
    592	if (istx) {
    593		switch (desc_name) {
    594		case HW_DESC_OWN:
    595			set_tx_desc_own(pdesc, 1);
    596			break;
    597		case HW_DESC_TX_NEXTDESC_ADDR:
    598			set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
    599			break;
    600		default:
    601			WARN_ONCE(true, "rtl8723ae: ERR txdesc :%d not processed\n",
    602				  desc_name);
    603			break;
    604		}
    605	} else {
    606		switch (desc_name) {
    607		case HW_DESC_RXOWN:
    608			set_rx_desc_own(pdesc, 1);
    609			break;
    610		case HW_DESC_RXBUFF_ADDR:
    611			set_rx_desc_buff_addr(pdesc, *(u32 *)val);
    612			break;
    613		case HW_DESC_RXPKT_LEN:
    614			set_rx_desc_pkt_len(pdesc, *(u32 *)val);
    615			break;
    616		case HW_DESC_RXERO:
    617			set_rx_desc_eor(pdesc, 1);
    618			break;
    619		default:
    620			WARN_ONCE(true, "rtl8723ae: ERR rxdesc :%d not processed\n",
    621				  desc_name);
    622			break;
    623		}
    624	}
    625}
    626
    627u64 rtl8723e_get_desc(struct ieee80211_hw *hw,
    628		      u8 *pdesc8, bool istx, u8 desc_name)
    629{
    630	u32 ret = 0;
    631	__le32 *pdesc = (__le32 *)pdesc8;
    632
    633	if (istx) {
    634		switch (desc_name) {
    635		case HW_DESC_OWN:
    636			ret = get_tx_desc_own(pdesc);
    637			break;
    638		case HW_DESC_TXBUFF_ADDR:
    639			ret = get_tx_desc_tx_buffer_address(pdesc);
    640			break;
    641		default:
    642			WARN_ONCE(true, "rtl8723ae: ERR txdesc :%d not processed\n",
    643				  desc_name);
    644			break;
    645		}
    646	} else {
    647		switch (desc_name) {
    648		case HW_DESC_OWN:
    649			ret = get_rx_desc_own(pdesc);
    650			break;
    651		case HW_DESC_RXPKT_LEN:
    652			ret = get_rx_desc_pkt_len(pdesc);
    653			break;
    654		case HW_DESC_RXBUFF_ADDR:
    655			ret = get_rx_desc_buff_addr(pdesc);
    656			break;
    657		default:
    658			WARN_ONCE(true, "rtl8723ae: ERR rxdesc :%d not processed\n",
    659				  desc_name);
    660			break;
    661		}
    662	}
    663	return ret;
    664}
    665
    666bool rtl8723e_is_tx_desc_closed(struct ieee80211_hw *hw,
    667				u8 hw_queue, u16 index)
    668{
    669	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
    670	struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
    671	u8 *entry = (u8 *)(&ring->desc[ring->idx]);
    672	u8 own = (u8)rtl8723e_get_desc(hw, entry, true, HW_DESC_OWN);
    673
    674	/**
    675	 *beacon packet will only use the first
    676	 *descriptor defautly,and the own may not
    677	 *be cleared by the hardware
    678	 */
    679	if (own)
    680		return false;
    681	return true;
    682}
    683
    684void rtl8723e_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
    685{
    686	struct rtl_priv *rtlpriv = rtl_priv(hw);
    687	if (hw_queue == BEACON_QUEUE) {
    688		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
    689	} else {
    690		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
    691			       BIT(0) << (hw_queue));
    692	}
    693}