cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

trx.h (11562B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2009-2012  Realtek Corporation.*/
      3
      4#ifndef __RTL8723E_TRX_H__
      5#define __RTL8723E_TRX_H__
      6
      7#define TX_DESC_SIZE					64
      8#define TX_DESC_AGGR_SUBFRAME_SIZE		32
      9
     10#define RX_DESC_SIZE					32
     11#define RX_DRV_INFO_SIZE_UNIT			8
     12
     13#define	TX_DESC_NEXT_DESC_OFFSET		40
     14#define USB_HWDESC_HEADER_LEN			32
     15#define CRCLENGTH						4
     16
     17static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32 __val)
     18{
     19	le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));
     20}
     21
     22static inline void set_tx_desc_offset(__le32 *__pdesc, u32 __val)
     23{
     24	le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));
     25}
     26
     27static inline void set_tx_desc_bmc(__le32 *__pdesc, u32 __val)
     28{
     29	le32p_replace_bits(__pdesc, __val, BIT(24));
     30}
     31
     32static inline void set_tx_desc_htc(__le32 *__pdesc, u32 __val)
     33{
     34	le32p_replace_bits(__pdesc, __val, BIT(25));
     35}
     36
     37static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32 __val)
     38{
     39	le32p_replace_bits(__pdesc, __val, BIT(26));
     40}
     41
     42static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32 __val)
     43{
     44	le32p_replace_bits(__pdesc, __val, BIT(27));
     45}
     46
     47static inline void set_tx_desc_linip(__le32 *__pdesc, u32 __val)
     48{
     49	le32p_replace_bits(__pdesc, __val, BIT(28));
     50}
     51
     52static inline void set_tx_desc_own(__le32 *__pdesc, u32 __val)
     53{
     54	le32p_replace_bits(__pdesc, __val, BIT(31));
     55}
     56
     57static inline u32 get_tx_desc_own(__le32 *__pdesc)
     58{
     59	return le32_get_bits(*__pdesc, BIT(31));
     60}
     61
     62static inline void set_tx_desc_macid(__le32 *__pdesc, u32 __val)
     63{
     64	le32p_replace_bits((__pdesc + 1), __val, GENMASK(4, 0));
     65}
     66
     67static inline void set_tx_desc_agg_break(__le32 *__pdesc, u32 __val)
     68{
     69	le32p_replace_bits((__pdesc + 1), __val, BIT(5));
     70}
     71
     72static inline void set_tx_desc_rdg_enable(__le32 *__pdesc, u32 __val)
     73{
     74	le32p_replace_bits((__pdesc + 1), __val, BIT(7));
     75}
     76
     77static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32 __val)
     78{
     79	le32p_replace_bits((__pdesc + 1), __val, GENMASK(12, 8));
     80}
     81
     82static inline void set_tx_desc_rate_id(__le32 *__pdesc, u32 __val)
     83{
     84	le32p_replace_bits((__pdesc + 1), __val, GENMASK(19, 16));
     85}
     86
     87static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32 __val)
     88{
     89	le32p_replace_bits((__pdesc + 1), __val, GENMASK(23, 22));
     90}
     91
     92static inline void set_tx_desc_more_frag(__le32 *__pdesc, u32 __val)
     93{
     94	le32p_replace_bits((__pdesc + 2), __val, BIT(17));
     95}
     96
     97static inline void set_tx_desc_ampdu_density(__le32 *__pdesc, u32 __val)
     98{
     99	le32p_replace_bits((__pdesc + 2), __val, GENMASK(22, 20));
    100}
    101
    102static inline void set_tx_desc_seq(__le32 *__pdesc, u32 __val)
    103{
    104	le32p_replace_bits((__pdesc + 3), __val, GENMASK(27, 16));
    105}
    106
    107static inline void set_tx_desc_pkt_id(__le32 *__pdesc, u32 __val)
    108{
    109	le32p_replace_bits((__pdesc + 3), __val, GENMASK(31, 28));
    110}
    111
    112/* For RTL8723 */
    113static inline void set_tx_desc_hwseq_en_8723(__le32 *__pdesc, u32 __val)
    114{
    115	le32p_replace_bits((__pdesc + 3), __val, BIT(31));
    116}
    117
    118static inline void set_tx_desc_hwseq_sel_8723(__le32 *__txdesc, u32 __value)
    119{
    120	le32p_replace_bits((__txdesc + 4), __value, GENMASK(7, 6));
    121}
    122
    123static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32 __val)
    124{
    125	le32p_replace_bits((__pdesc + 4), __val, GENMASK(4, 0));
    126}
    127
    128static inline void set_tx_desc_use_rate(__le32 *__pdesc, u32 __val)
    129{
    130	le32p_replace_bits((__pdesc + 4), __val, BIT(8));
    131}
    132
    133static inline void set_tx_desc_disable_fb(__le32 *__pdesc, u32 __val)
    134{
    135	le32p_replace_bits((__pdesc + 4), __val, BIT(10));
    136}
    137
    138static inline void set_tx_desc_cts2self(__le32 *__pdesc, u32 __val)
    139{
    140	le32p_replace_bits((__pdesc + 4), __val, BIT(11));
    141}
    142
    143static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32 __val)
    144{
    145	le32p_replace_bits((__pdesc + 4), __val, BIT(12));
    146}
    147
    148static inline void set_tx_desc_hw_rts_enable(__le32 *__pdesc, u32 __val)
    149{
    150	le32p_replace_bits((__pdesc + 4), __val, BIT(13));
    151}
    152
    153static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32 __val)
    154{
    155	le32p_replace_bits((__pdesc + 4), __val, GENMASK(21, 20));
    156}
    157
    158static inline void set_tx_desc_data_bw(__le32 *__pdesc, u32 __val)
    159{
    160	le32p_replace_bits((__pdesc + 4), __val, BIT(25));
    161}
    162
    163static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32 __val)
    164{
    165	le32p_replace_bits((__pdesc + 4), __val, BIT(26));
    166}
    167
    168static inline void set_tx_desc_rts_bw(__le32 *__pdesc, u32 __val)
    169{
    170	le32p_replace_bits((__pdesc + 4), __val, BIT(27));
    171}
    172
    173static inline void set_tx_desc_rts_sc(__le32 *__pdesc, u32 __val)
    174{
    175	le32p_replace_bits((__pdesc + 4), __val, GENMASK(29, 28));
    176}
    177
    178static inline void set_tx_desc_rts_stbc(__le32 *__pdesc, u32 __val)
    179{
    180	le32p_replace_bits((__pdesc + 4), __val, GENMASK(31, 30));
    181}
    182
    183static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32 __val)
    184{
    185	le32p_replace_bits((__pdesc + 5), __val, GENMASK(5, 0));
    186}
    187
    188static inline void set_tx_desc_data_shortgi(__le32 *__pdesc, u32 __val)
    189{
    190	le32p_replace_bits((__pdesc + 5), __val, BIT(6));
    191}
    192
    193static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32 __val)
    194{
    195	le32p_replace_bits((__pdesc + 5), __val, GENMASK(12, 8));
    196}
    197
    198static inline void set_tx_desc_rts_rate_fb_limit(__le32 *__pdesc, u32 __val)
    199{
    200	le32p_replace_bits((__pdesc + 5), __val, GENMASK(16, 13));
    201}
    202
    203static inline void set_tx_desc_max_agg_num(__le32 *__pdesc, u32 __val)
    204{
    205	le32p_replace_bits((__pdesc + 6), __val, GENMASK(15, 11));
    206}
    207
    208static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32 __val)
    209{
    210	le32p_replace_bits((__pdesc + 7), __val, GENMASK(15, 0));
    211}
    212
    213static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32 __val)
    214{
    215	*(__pdesc + 8) = cpu_to_le32(__val);
    216}
    217
    218static inline u32 get_tx_desc_tx_buffer_address(__le32 *__pdesc)
    219{
    220	return le32_to_cpu(*(__pdesc + 8));
    221}
    222
    223static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32 __val)
    224{
    225	*(__pdesc + 10) = cpu_to_le32(__val);
    226}
    227
    228static inline u32 get_rx_desc_pkt_len(__le32 *__pdesc)
    229{
    230	return le32_get_bits(*__pdesc, GENMASK(13, 0));
    231}
    232
    233static inline u32 get_rx_desc_crc32(__le32 *__pdesc)
    234{
    235	return le32_get_bits(*__pdesc, BIT(14));
    236}
    237
    238static inline u32 get_rx_desc_icv(__le32 *__pdesc)
    239{
    240	return le32_get_bits(*__pdesc, BIT(15));
    241}
    242
    243static inline u32 get_rx_desc_drv_info_size(__le32 *__pdesc)
    244{
    245	return le32_get_bits(*__pdesc, GENMASK(19, 16));
    246}
    247
    248static inline u32 get_rx_desc_shift(__le32 *__pdesc)
    249{
    250	return le32_get_bits(*__pdesc, GENMASK(25, 24));
    251}
    252
    253static inline u32 get_rx_desc_physt(__le32 *__pdesc)
    254{
    255	return le32_get_bits(*__pdesc, BIT(26));
    256}
    257
    258static inline u32 get_rx_desc_swdec(__le32 *__pdesc)
    259{
    260	return le32_get_bits(*__pdesc, BIT(27));
    261}
    262
    263static inline u32 get_rx_desc_own(__le32 *__pdesc)
    264{
    265	return le32_get_bits(*__pdesc, BIT(31));
    266}
    267
    268static inline void set_rx_desc_pkt_len(__le32 *__pdesc, u32 __val)
    269{
    270	le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));
    271}
    272
    273static inline void set_rx_desc_eor(__le32 *__pdesc, u32 __val)
    274{
    275	le32p_replace_bits(__pdesc, __val, BIT(30));
    276}
    277
    278static inline void set_rx_desc_own(__le32 *__pdesc, u32 __val)
    279{
    280	le32p_replace_bits(__pdesc, __val, BIT(31));
    281}
    282
    283static inline u32 get_rx_desc_paggr(__le32 *__pdesc)
    284{
    285	return le32_get_bits(*(__pdesc + 1), BIT(14));
    286}
    287
    288static inline u32 get_rx_desc_faggr(__le32 *__pdesc)
    289{
    290	return le32_get_bits(*(__pdesc + 1), BIT(15));
    291}
    292
    293static inline u32 get_rx_desc_rxmcs(__le32 *__pdesc)
    294{
    295	return le32_get_bits(*(__pdesc + 3), GENMASK(5, 0));
    296}
    297
    298static inline u32 get_rx_desc_rxht(__le32 *__pdesc)
    299{
    300	return le32_get_bits(*(__pdesc + 3), BIT(6));
    301}
    302
    303static inline u32 get_rx_desc_splcp(__le32 *__pdesc)
    304{
    305	return le32_get_bits(*(__pdesc + 3), BIT(8));
    306}
    307
    308static inline u32 get_rx_desc_bw(__le32 *__pdesc)
    309{
    310	return le32_get_bits(*(__pdesc + 3), BIT(9));
    311}
    312
    313static inline u32 get_rx_desc_tsfl(__le32 *__pdesc)
    314{
    315	return le32_to_cpu(*(__pdesc + 5));
    316}
    317
    318static inline u32 get_rx_desc_buff_addr(__le32 *__pdesc)
    319{
    320	return le32_to_cpu(*(__pdesc + 6));
    321}
    322
    323static inline void set_rx_desc_buff_addr(__le32 *__pdesc, u32 __val)
    324{
    325	*(__pdesc + 6) = cpu_to_le32(__val);
    326}
    327
    328static inline void clear_pci_tx_desc_content(__le32 *__pdesc, u32 _size)
    329{
    330	if (_size > TX_DESC_NEXT_DESC_OFFSET)
    331		memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);
    332	else
    333		memset(__pdesc, 0, _size);
    334}
    335
    336struct rx_fwinfo_8723e {
    337	u8 gain_trsw[4];
    338	u8 pwdb_all;
    339	u8 cfosho[4];
    340	u8 cfotail[4];
    341	s8 rxevm[2];
    342	s8 rxsnr[4];
    343	u8 pdsnr[2];
    344	u8 csi_current[2];
    345	u8 csi_target[2];
    346	u8 sigevm;
    347	u8 max_ex_pwr;
    348	u8 ex_intf_flag:1;
    349	u8 sgi_en:1;
    350	u8 rxsc:2;
    351	u8 reserve:4;
    352} __packed;
    353
    354struct tx_desc_8723e {
    355	u32 pktsize:16;
    356	u32 offset:8;
    357	u32 bmc:1;
    358	u32 htc:1;
    359	u32 lastseg:1;
    360	u32 firstseg:1;
    361	u32 linip:1;
    362	u32 noacm:1;
    363	u32 gf:1;
    364	u32 own:1;
    365
    366	u32 macid:5;
    367	u32 agg_en:1;
    368	u32 bk:1;
    369	u32 rdg_en:1;
    370	u32 queuesel:5;
    371	u32 rd_nav_ext:1;
    372	u32 lsig_txop_en:1;
    373	u32 pifs:1;
    374	u32 rateid:4;
    375	u32 nav_usehdr:1;
    376	u32 en_descid:1;
    377	u32 sectype:2;
    378	u32 pktoffset:8;
    379
    380	u32 rts_rc:6;
    381	u32 data_rc:6;
    382	u32 rsvd0:2;
    383	u32 bar_retryht:2;
    384	u32 rsvd1:1;
    385	u32 morefrag:1;
    386	u32 raw:1;
    387	u32 ccx:1;
    388	u32 ampdudensity:3;
    389	u32 rsvd2:1;
    390	u32 ant_sela:1;
    391	u32 ant_selb:1;
    392	u32 txant_cck:2;
    393	u32 txant_l:2;
    394	u32 txant_ht:2;
    395
    396	u32 nextheadpage:8;
    397	u32 tailpage:8;
    398	u32 seq:12;
    399	u32 pktid:4;
    400
    401	u32 rtsrate:5;
    402	u32 apdcfe:1;
    403	u32 qos:1;
    404	u32 hwseq_enable:1;
    405	u32 userrate:1;
    406	u32 dis_rtsfb:1;
    407	u32 dis_datafb:1;
    408	u32 cts2self:1;
    409	u32 rts_en:1;
    410	u32 hwrts_en:1;
    411	u32 portid:1;
    412	u32 rsvd3:3;
    413	u32 waitdcts:1;
    414	u32 cts2ap_en:1;
    415	u32 txsc:2;
    416	u32 stbc:2;
    417	u32 txshort:1;
    418	u32 txbw:1;
    419	u32 rtsshort:1;
    420	u32 rtsbw:1;
    421	u32 rtssc:2;
    422	u32 rtsstbc:2;
    423
    424	u32 txrate:6;
    425	u32 shortgi:1;
    426	u32 ccxt:1;
    427	u32 txrate_fb_lmt:5;
    428	u32 rtsrate_fb_lmt:4;
    429	u32 retrylmt_en:1;
    430	u32 txretrylmt:6;
    431	u32 usb_txaggnum:8;
    432
    433	u32 txagca:5;
    434	u32 txagcb:5;
    435	u32 usemaxlen:1;
    436	u32 maxaggnum:5;
    437	u32 mcsg1maxlen:4;
    438	u32 mcsg2maxlen:4;
    439	u32 mcsg3maxlen:4;
    440	u32 mcs7sgimaxlen:4;
    441
    442	u32 txbuffersize:16;
    443	u32 mcsg4maxlen:4;
    444	u32 mcsg5maxlen:4;
    445	u32 mcsg6maxlen:4;
    446	u32 mcsg15sgimaxlen:4;
    447
    448	u32 txbuffaddr;
    449	u32 txbufferaddr64;
    450	u32 nextdescaddress;
    451	u32 nextdescaddress64;
    452
    453	u32 reserve_pass_pcie_mm_limit[4];
    454} __packed;
    455
    456struct rx_desc_8723e {
    457	u32 length:14;
    458	u32 crc32:1;
    459	u32 icverror:1;
    460	u32 drv_infosize:4;
    461	u32 security:3;
    462	u32 qos:1;
    463	u32 shift:2;
    464	u32 phystatus:1;
    465	u32 swdec:1;
    466	u32 lastseg:1;
    467	u32 firstseg:1;
    468	u32 eor:1;
    469	u32 own:1;
    470
    471	u32 macid:5;
    472	u32 tid:4;
    473	u32 hwrsvd:5;
    474	u32 paggr:1;
    475	u32 faggr:1;
    476	u32 a1_fit:4;
    477	u32 a2_fit:4;
    478	u32 pam:1;
    479	u32 pwr:1;
    480	u32 moredata:1;
    481	u32 morefrag:1;
    482	u32 type:2;
    483	u32 mc:1;
    484	u32 bc:1;
    485
    486	u32 seq:12;
    487	u32 frag:4;
    488	u32 nextpktlen:14;
    489	u32 nextind:1;
    490	u32 rsvd:1;
    491
    492	u32 rxmcs:6;
    493	u32 rxht:1;
    494	u32 amsdu:1;
    495	u32 splcp:1;
    496	u32 bandwidth:1;
    497	u32 htc:1;
    498	u32 tcpchk_rpt:1;
    499	u32 ipcchk_rpt:1;
    500	u32 tcpchk_valid:1;
    501	u32 hwpcerr:1;
    502	u32 hwpcind:1;
    503	u32 iv0:16;
    504
    505	u32 iv1;
    506
    507	u32 tsfl;
    508
    509	u32 bufferaddress;
    510	u32 bufferaddress64;
    511
    512} __packed;
    513
    514void rtl8723e_tx_fill_desc(struct ieee80211_hw *hw,
    515			   struct ieee80211_hdr *hdr,
    516			   u8 *pdesc, u8 *txbd,
    517			   struct ieee80211_tx_info *info,
    518			   struct ieee80211_sta *sta,
    519			   struct sk_buff *skb, u8 hw_queue,
    520			   struct rtl_tcb_desc *ptcb_desc);
    521bool rtl8723e_rx_query_desc(struct ieee80211_hw *hw,
    522			    struct rtl_stats *status,
    523			    struct ieee80211_rx_status *rx_status,
    524			    u8 *pdesc, struct sk_buff *skb);
    525void rtl8723e_set_desc(struct ieee80211_hw *hw,
    526		       u8 *pdesc, bool istx, u8 desc_name, u8 *val);
    527u64 rtl8723e_get_desc(struct ieee80211_hw *hw,
    528		      u8 *pdesc, bool istx, u8 desc_name);
    529bool rtl8723e_is_tx_desc_closed(struct ieee80211_hw *hw,
    530				u8 hw_queue, u16 index);
    531void rtl8723e_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);
    532void rtl8723e_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
    533			      bool firstseg, bool lastseg,
    534			      struct sk_buff *skb);
    535#endif