cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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def.h (1404B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* Copyright(c) 2009-2014  Realtek Corporation.*/
      3
      4#ifndef __RTL8723BE_DEF_H__
      5#define __RTL8723BE_DEF_H__
      6
      7#define HAL_PRIME_CHNL_OFFSET_DONT_CARE		0
      8#define HAL_PRIME_CHNL_OFFSET_LOWER		1
      9#define HAL_PRIME_CHNL_OFFSET_UPPER		2
     10
     11
     12#define RX_MPDU_QUEUE				0
     13#define CHIP_8723B				(BIT(1) | BIT(2))
     14#define NORMAL_CHIP				BIT(3)
     15#define CHIP_VENDOR_SMIC			BIT(8)
     16/* Currently only for RTL8723B */
     17#define EXT_VENDOR_ID				(BIT(18) | BIT(19))
     18
     19enum rtl_desc_qsel {
     20	QSLT_BK = 0x2,
     21	QSLT_BE = 0x0,
     22	QSLT_VI = 0x5,
     23	QSLT_VO = 0x7,
     24	QSLT_BEACON = 0x10,
     25	QSLT_HIGH = 0x11,
     26	QSLT_MGNT = 0x12,
     27	QSLT_CMD = 0x13,
     28};
     29
     30enum rtl_desc8723e_rate {
     31	DESC92C_RATE1M = 0x00,
     32	DESC92C_RATE2M = 0x01,
     33	DESC92C_RATE5_5M = 0x02,
     34	DESC92C_RATE11M = 0x03,
     35
     36	DESC92C_RATE6M = 0x04,
     37	DESC92C_RATE9M = 0x05,
     38	DESC92C_RATE12M = 0x06,
     39	DESC92C_RATE18M = 0x07,
     40	DESC92C_RATE24M = 0x08,
     41	DESC92C_RATE36M = 0x09,
     42	DESC92C_RATE48M = 0x0a,
     43	DESC92C_RATE54M = 0x0b,
     44
     45	DESC92C_RATEMCS0 = 0x0c,
     46	DESC92C_RATEMCS1 = 0x0d,
     47	DESC92C_RATEMCS2 = 0x0e,
     48	DESC92C_RATEMCS3 = 0x0f,
     49	DESC92C_RATEMCS4 = 0x10,
     50	DESC92C_RATEMCS5 = 0x11,
     51	DESC92C_RATEMCS6 = 0x12,
     52	DESC92C_RATEMCS7 = 0x13,
     53	DESC92C_RATEMCS8 = 0x14,
     54	DESC92C_RATEMCS9 = 0x15,
     55	DESC92C_RATEMCS10 = 0x16,
     56	DESC92C_RATEMCS11 = 0x17,
     57	DESC92C_RATEMCS12 = 0x18,
     58	DESC92C_RATEMCS13 = 0x19,
     59	DESC92C_RATEMCS14 = 0x1a,
     60	DESC92C_RATEMCS15 = 0x1b,
     61};
     62#endif