phy.h (6555B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* Copyright(c) 2009-2010 Realtek Corporation.*/ 3 4#ifndef __RTL8821AE_PHY_H__ 5#define __RTL8821AE_PHY_H__ 6 7/* MAX_TX_COUNT must always be set to 4, otherwise read 8 * efuse table sequence will be wrong. 9 */ 10#define MAX_TX_COUNT 4 11#define TX_1S 0 12#define TX_2S 1 13#define TX_3S 2 14#define TX_4S 3 15 16#define MAX_POWER_INDEX 0x3F 17 18#define MAX_PRECMD_CNT 16 19#define MAX_RFDEPENDCMD_CNT 16 20#define MAX_POSTCMD_CNT 16 21 22#define MAX_DOZE_WAITING_TIMES_9x 64 23 24#define RT_CANNOT_IO(hw) false 25#define HIGHPOWER_RADIOA_ARRAYLEN 22 26 27#define IQK_ADDA_REG_NUM 16 28#define IQK_BB_REG_NUM 9 29#define MAX_TOLERANCE 5 30#define IQK_DELAY_TIME 10 31#define index_mapping_NUM 15 32 33#define APK_BB_REG_NUM 5 34#define APK_AFE_REG_NUM 16 35#define APK_CURVE_REG_NUM 4 36#define PATH_NUM 2 37 38#define LOOP_LIMIT 5 39#define MAX_STALL_TIME 50 40#define ANTENNADIVERSITYVALUE 0x80 41#define MAX_TXPWR_IDX_NMODE_92S 63 42#define RESET_CNT_LIMIT 3 43 44#define IQK_ADDA_REG_NUM 16 45#define IQK_MAC_REG_NUM 4 46 47#define RF6052_MAX_PATH 2 48 49#define CT_OFFSET_MAC_ADDR 0X16 50 51#define CT_OFFSET_CCK_TX_PWR_IDX 0x5A 52#define CT_OFFSET_HT401S_TX_PWR_IDX 0x60 53#define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF 0x66 54#define CT_OFFSET_HT20_TX_PWR_IDX_DIFF 0x69 55#define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF 0x6C 56 57#define CT_OFFSET_HT40_MAX_PWR_OFFSET 0x6F 58#define CT_OFFSET_HT20_MAX_PWR_OFFSET 0x72 59 60#define CT_OFFSET_CHANNEL_PLAH 0x75 61#define CT_OFFSET_THERMAL_METER 0x78 62#define CT_OFFSET_RF_OPTION 0x79 63#define CT_OFFSET_VERSION 0x7E 64#define CT_OFFSET_CUSTOMER_ID 0x7F 65 66#define RTL8821AE_MAX_PATH_NUM 2 67 68#define TARGET_CHNL_NUM_2G_5G_8812 59 69 70enum swchnlcmd_id { 71 CMDID_END, 72 CMDID_SET_TXPOWEROWER_LEVEL, 73 CMDID_BBREGWRITE10, 74 CMDID_WRITEPORT_ULONG, 75 CMDID_WRITEPORT_USHORT, 76 CMDID_WRITEPORT_UCHAR, 77 CMDID_RF_WRITEREG, 78}; 79 80struct swchnlcmd { 81 enum swchnlcmd_id cmdid; 82 u32 para1; 83 u32 para2; 84 u32 msdelay; 85}; 86 87enum hw90_block_e { 88 HW90_BLOCK_MAC = 0, 89 HW90_BLOCK_PHY0 = 1, 90 HW90_BLOCK_PHY1 = 2, 91 HW90_BLOCK_RF = 3, 92 HW90_BLOCK_MAXIMUM = 4, 93}; 94 95enum baseband_config_type { 96 BASEBAND_CONFIG_PHY_REG = 0, 97 BASEBAND_CONFIG_AGC_TAB = 1, 98}; 99 100enum ra_offset_area { 101 RA_OFFSET_LEGACY_OFDM1, 102 RA_OFFSET_LEGACY_OFDM2, 103 RA_OFFSET_HT_OFDM1, 104 RA_OFFSET_HT_OFDM2, 105 RA_OFFSET_HT_OFDM3, 106 RA_OFFSET_HT_OFDM4, 107 RA_OFFSET_HT_CCK, 108}; 109 110enum antenna_path { 111 ANTENNA_NONE, 112 ANTENNA_D, 113 ANTENNA_C, 114 ANTENNA_CD, 115 ANTENNA_B, 116 ANTENNA_BD, 117 ANTENNA_BC, 118 ANTENNA_BCD, 119 ANTENNA_A, 120 ANTENNA_AD, 121 ANTENNA_AC, 122 ANTENNA_ACD, 123 ANTENNA_AB, 124 ANTENNA_ABD, 125 ANTENNA_ABC, 126 ANTENNA_ABCD 127}; 128 129struct r_antenna_select_ofdm { 130 u32 r_tx_antenna:4; 131 u32 r_ant_l:4; 132 u32 r_ant_non_ht:4; 133 u32 r_ant_ht1:4; 134 u32 r_ant_ht2:4; 135 u32 r_ant_ht_s1:4; 136 u32 r_ant_non_ht_s1:4; 137 u32 ofdm_txsc:2; 138 u32 reserved:2; 139}; 140 141struct r_antenna_select_cck { 142 u8 r_cckrx_enable_2:2; 143 u8 r_cckrx_enable:2; 144 u8 r_ccktx_enable:4; 145}; 146 147struct efuse_contents { 148 u8 mac_addr[ETH_ALEN]; 149 u8 cck_tx_power_idx[6]; 150 u8 ht40_1s_tx_power_idx[6]; 151 u8 ht40_2s_tx_power_idx_diff[3]; 152 u8 ht20_tx_power_idx_diff[3]; 153 u8 ofdm_tx_power_idx_diff[3]; 154 u8 ht40_max_power_offset[3]; 155 u8 ht20_max_power_offset[3]; 156 u8 channel_plan; 157 u8 thermal_meter; 158 u8 rf_option[5]; 159 u8 version; 160 u8 oem_id; 161 u8 regulatory; 162}; 163 164struct tx_power_struct { 165 u8 cck[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 166 u8 ht40_1s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 167 u8 ht40_2s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 168 u8 ht20_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 169 u8 legacy_ht_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 170 u8 legacy_ht_txpowerdiff; 171 u8 groupht20[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 172 u8 groupht40[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER]; 173 u8 pwrgroup_cnt; 174 u32 mcs_original_offset[4][16]; 175}; 176enum _ANT_DIV_TYPE { 177 NO_ANTDIV = 0xFF, 178 CG_TRX_HW_ANTDIV = 0x01, 179 CGCS_RX_HW_ANTDIV = 0x02, 180 FIXED_HW_ANTDIV = 0x03, 181 CG_TRX_SMART_ANTDIV = 0x04, 182 CGCS_RX_SW_ANTDIV = 0x05, 183 184}; 185 186u32 rtl8821ae_phy_query_bb_reg(struct ieee80211_hw *hw, 187 u32 regaddr, u32 bitmask); 188void rtl8821ae_phy_set_bb_reg(struct ieee80211_hw *hw, 189 u32 regaddr, u32 bitmask, u32 data); 190u32 rtl8821ae_phy_query_rf_reg(struct ieee80211_hw *hw, 191 enum radio_path rfpath, u32 regaddr, 192 u32 bitmask); 193void rtl8821ae_phy_set_rf_reg(struct ieee80211_hw *hw, 194 enum radio_path rfpath, u32 regaddr, 195 u32 bitmask, u32 data); 196bool rtl8821ae_phy_mac_config(struct ieee80211_hw *hw); 197bool rtl8821ae_phy_bb_config(struct ieee80211_hw *hw); 198bool rtl8821ae_phy_rf_config(struct ieee80211_hw *hw); 199void rtl8821ae_phy_switch_wirelessband(struct ieee80211_hw *hw, 200 u8 band); 201void rtl8821ae_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw); 202void rtl8821ae_phy_get_txpower_level(struct ieee80211_hw *hw, 203 long *powerlevel); 204void rtl8821ae_phy_set_txpower_level(struct ieee80211_hw *hw, 205 u8 channel); 206void rtl8821ae_phy_scan_operation_backup(struct ieee80211_hw *hw, 207 u8 operation); 208void rtl8821ae_phy_set_bw_mode_callback(struct ieee80211_hw *hw); 209void rtl8821ae_phy_set_bw_mode(struct ieee80211_hw *hw, 210 enum nl80211_channel_type ch_type); 211void rtl8821ae_phy_sw_chnl_callback(struct ieee80211_hw *hw); 212u8 rtl8821ae_phy_sw_chnl(struct ieee80211_hw *hw); 213void rtl8821ae_phy_iq_calibrate(struct ieee80211_hw *hw, 214 bool b_recovery); 215void rtl8812ae_phy_iq_calibrate(struct ieee80211_hw *hw, 216 bool b_recovery); 217void rtl8821ae_phy_ap_calibrate(struct ieee80211_hw *hw, s8 delta); 218void rtl8821ae_phy_lc_calibrate(struct ieee80211_hw *hw); 219void rtl8821ae_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain); 220bool rtl8812ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, 221 enum radio_path rfpath); 222bool rtl8821ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, 223 enum radio_path rfpath); 224bool rtl8821ae_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype); 225bool rtl8821ae_phy_set_rf_power_state(struct ieee80211_hw *hw, 226 enum rf_pwrstate rfpwr_state); 227u8 _rtl8812ae_get_right_chnl_place_for_iqk(u8 chnl); 228void rtl8821ae_phy_set_txpower_level_by_path(struct ieee80211_hw *hw, 229 u8 channel, u8 path); 230void rtl8812ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index, 231 u8 thermal_value, u8 threshold); 232void rtl8821ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index, 233 u8 thermal_value, u8 threshold); 234void rtl8821ae_reset_iqk_result(struct ieee80211_hw *hw); 235u32 phy_get_tx_swing_8812A(struct ieee80211_hw *hw, u8 band, u8 rf_path); 236 237#endif