cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

trx.c (27782B)


      1// SPDX-License-Identifier: GPL-2.0
      2/* Copyright(c) 2009-2010  Realtek Corporation.*/
      3
      4#include "../wifi.h"
      5#include "../pci.h"
      6#include "../base.h"
      7#include "../stats.h"
      8#include "reg.h"
      9#include "def.h"
     10#include "trx.h"
     11#include "led.h"
     12#include "dm.h"
     13#include "phy.h"
     14#include "fw.h"
     15
     16static u8 _rtl8821ae_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
     17{
     18	__le16 fc = rtl_get_fc(skb);
     19
     20	if (unlikely(ieee80211_is_beacon(fc)))
     21		return QSLT_BEACON;
     22	if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
     23		return QSLT_MGNT;
     24
     25	return skb->priority;
     26}
     27
     28static u16 odm_cfo(s8 value)
     29{
     30	int ret_val;
     31
     32	if (value < 0) {
     33		ret_val = 0 - value;
     34		ret_val = (ret_val << 1) + (ret_val >> 1);
     35		/* set bit12 as 1 for negative cfo */
     36		ret_val = ret_val | BIT(12);
     37	} else {
     38		ret_val = value;
     39		ret_val = (ret_val << 1) + (ret_val >> 1);
     40	}
     41	return ret_val;
     42}
     43
     44static u8 _rtl8821ae_evm_dbm_jaguar(s8 value)
     45{
     46	s8 ret_val = value;
     47
     48	/* -33dB~0dB to 33dB ~ 0dB*/
     49	if (ret_val == -128)
     50		ret_val = 127;
     51	else if (ret_val < 0)
     52		ret_val = 0 - ret_val;
     53
     54	ret_val  = ret_val >> 1;
     55	return ret_val;
     56}
     57
     58static void query_rxphystatus(struct ieee80211_hw *hw,
     59			      struct rtl_stats *pstatus, __le32 *pdesc,
     60			      struct rx_fwinfo_8821ae *p_drvinfo,
     61			      bool bpacket_match_bssid,
     62			      bool bpacket_toself, bool packet_beacon)
     63{
     64	struct rtl_priv *rtlpriv = rtl_priv(hw);
     65	struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
     66	struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
     67	struct rtl_phy *rtlphy = &rtlpriv->phy;
     68	s8 rx_pwr_all = 0, rx_pwr[4];
     69	u8 rf_rx_num = 0, evm, evmdbm, pwdb_all;
     70	u8 i, max_spatial_stream;
     71	u32 rssi, total_rssi = 0;
     72	bool is_cck = pstatus->is_cck;
     73	u8 lan_idx, vga_idx;
     74
     75	/* Record it for next packet processing */
     76	pstatus->packet_matchbssid = bpacket_match_bssid;
     77	pstatus->packet_toself = bpacket_toself;
     78	pstatus->packet_beacon = packet_beacon;
     79	pstatus->rx_mimo_signalquality[0] = -1;
     80	pstatus->rx_mimo_signalquality[1] = -1;
     81
     82	if (is_cck) {
     83		u8 cck_highpwr;
     84		u8 cck_agc_rpt;
     85
     86		cck_agc_rpt = p_phystrpt->cfosho[0];
     87
     88		/* (1)Hardware does not provide RSSI for CCK
     89		 * (2)PWDB, Average PWDB calculated by
     90		 * hardware (for rate adaptive)
     91		 */
     92		cck_highpwr = (u8)rtlphy->cck_high_power;
     93
     94		lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
     95		vga_idx = (cck_agc_rpt & 0x1f);
     96		if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE) {
     97			switch (lan_idx) {
     98			case 7:
     99				if (vga_idx <= 27)
    100					/*VGA_idx = 27~2*/
    101					rx_pwr_all = -100 + 2*(27-vga_idx);
    102				else
    103					rx_pwr_all = -100;
    104				break;
    105			case 6:
    106				/*VGA_idx = 2~0*/
    107				rx_pwr_all = -48 + 2*(2-vga_idx);
    108				break;
    109			case 5:
    110				/*VGA_idx = 7~5*/
    111				rx_pwr_all = -42 + 2*(7-vga_idx);
    112				break;
    113			case 4:
    114				/*VGA_idx = 7~4*/
    115				rx_pwr_all = -36 + 2*(7-vga_idx);
    116				break;
    117			case 3:
    118				/*VGA_idx = 7~0*/
    119				rx_pwr_all = -24 + 2*(7-vga_idx);
    120				break;
    121			case 2:
    122				if (cck_highpwr)
    123					/*VGA_idx = 5~0*/
    124					rx_pwr_all = -12 + 2*(5-vga_idx);
    125				else
    126					rx_pwr_all = -6 + 2*(5-vga_idx);
    127				break;
    128			case 1:
    129				rx_pwr_all = 8-2*vga_idx;
    130				break;
    131			case 0:
    132				rx_pwr_all = 14-2*vga_idx;
    133				break;
    134			default:
    135				break;
    136			}
    137			rx_pwr_all += 6;
    138			pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
    139			if (!cck_highpwr) {
    140				if (pwdb_all >= 80)
    141					pwdb_all =
    142					  ((pwdb_all - 80)<<1) +
    143					 ((pwdb_all - 80)>>1) + 80;
    144				else if ((pwdb_all <= 78) && (pwdb_all >= 20))
    145					pwdb_all += 3;
    146				if (pwdb_all > 100)
    147					pwdb_all = 100;
    148			}
    149		} else { /* 8821 */
    150			s8 pout = -6;
    151
    152			switch (lan_idx) {
    153			case 5:
    154				rx_pwr_all = pout - 32 - (2*vga_idx);
    155					break;
    156			case 4:
    157				rx_pwr_all = pout - 24 - (2*vga_idx);
    158					break;
    159			case 2:
    160				rx_pwr_all = pout - 11 - (2*vga_idx);
    161					break;
    162			case 1:
    163				rx_pwr_all = pout + 5 - (2*vga_idx);
    164					break;
    165			case 0:
    166				rx_pwr_all = pout + 21 - (2*vga_idx);
    167					break;
    168			}
    169			pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
    170		}
    171
    172		pstatus->rx_pwdb_all = pwdb_all;
    173		pstatus->recvsignalpower = rx_pwr_all;
    174
    175		/* (3) Get Signal Quality (EVM) */
    176		if (bpacket_match_bssid) {
    177			u8 sq;
    178
    179			if (pstatus->rx_pwdb_all > 40) {
    180				sq = 100;
    181			} else {
    182				sq = p_phystrpt->pwdb_all;
    183				if (sq > 64)
    184					sq = 0;
    185				else if (sq < 20)
    186					sq = 100;
    187				else
    188					sq = ((64 - sq) * 100) / 44;
    189			}
    190
    191			pstatus->signalquality = sq;
    192			pstatus->rx_mimo_signalquality[0] = sq;
    193			pstatus->rx_mimo_signalquality[1] = -1;
    194		}
    195	} else {
    196		/* (1)Get RSSI for HT rate */
    197		for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
    198			/* we will judge RF RX path now. */
    199			if (rtlpriv->dm.rfpath_rxenable[i])
    200				rf_rx_num++;
    201
    202			rx_pwr[i] = (p_phystrpt->gain_trsw[i] & 0x7f) - 110;
    203
    204			/* Translate DBM to percentage. */
    205			rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
    206			total_rssi += rssi;
    207
    208			/* Get Rx snr value in DB */
    209			pstatus->rx_snr[i] = p_phystrpt->rxsnr[i] / 2;
    210			rtlpriv->stats.rx_snr_db[i] = p_phystrpt->rxsnr[i] / 2;
    211
    212			pstatus->cfo_short[i] = odm_cfo(p_phystrpt->cfosho[i]);
    213			pstatus->cfo_tail[i] = odm_cfo(p_phystrpt->cfotail[i]);
    214			/* Record Signal Strength for next packet */
    215			pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
    216		}
    217
    218		/* (2)PWDB, Average PWDB calculated by
    219		 * hardware (for rate adaptive)
    220		 */
    221		rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
    222
    223		pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
    224		pstatus->rx_pwdb_all = pwdb_all;
    225		pstatus->rxpower = rx_pwr_all;
    226		pstatus->recvsignalpower = rx_pwr_all;
    227
    228		/* (3)EVM of HT rate */
    229		if ((pstatus->is_ht && pstatus->rate >= DESC_RATEMCS8 &&
    230		     pstatus->rate <= DESC_RATEMCS15) ||
    231		    (pstatus->is_vht &&
    232		     pstatus->rate >= DESC_RATEVHT2SS_MCS0 &&
    233		     pstatus->rate <= DESC_RATEVHT2SS_MCS9))
    234			max_spatial_stream = 2;
    235		else
    236			max_spatial_stream = 1;
    237
    238		for (i = 0; i < max_spatial_stream; i++) {
    239			evm = rtl_evm_db_to_percentage(p_phystrpt->rxevm[i]);
    240			evmdbm = _rtl8821ae_evm_dbm_jaguar(p_phystrpt->rxevm[i]);
    241
    242			if (bpacket_match_bssid) {
    243				/* Fill value in RFD, Get the first
    244				 * spatial stream only
    245				 */
    246				if (i == 0)
    247					pstatus->signalquality = evm;
    248				pstatus->rx_mimo_signalquality[i] = evm;
    249				pstatus->rx_mimo_evm_dbm[i] = evmdbm;
    250			}
    251		}
    252		if (bpacket_match_bssid) {
    253			for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
    254				rtl_priv(hw)->dm.cfo_tail[i] =
    255					(s8)p_phystrpt->cfotail[i];
    256
    257			rtl_priv(hw)->dm.packet_count++;
    258		}
    259	}
    260
    261	/* UI BSS List signal strength(in percentage),
    262	 * make it good looking, from 0~100.
    263	 */
    264	if (is_cck)
    265		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
    266			pwdb_all));
    267	else if (rf_rx_num != 0)
    268		pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
    269			total_rssi /= rf_rx_num));
    270	/*HW antenna diversity*/
    271	rtldm->fat_table.antsel_rx_keep_0 = p_phystrpt->antidx_anta;
    272	rtldm->fat_table.antsel_rx_keep_1 = p_phystrpt->antidx_antb;
    273}
    274
    275static void translate_rx_signal_stuff(struct ieee80211_hw *hw,
    276				      struct sk_buff *skb,
    277				      struct rtl_stats *pstatus, __le32 *pdesc,
    278				      struct rx_fwinfo_8821ae *p_drvinfo)
    279{
    280	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
    281	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
    282	struct ieee80211_hdr *hdr;
    283	u8 *tmp_buf;
    284	u8 *praddr;
    285	u8 *psaddr;
    286	__le16 fc;
    287	bool packet_matchbssid, packet_toself, packet_beacon;
    288
    289	tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
    290
    291	hdr = (struct ieee80211_hdr *)tmp_buf;
    292	fc = hdr->frame_control;
    293	praddr = hdr->addr1;
    294	psaddr = ieee80211_get_SA(hdr);
    295	ether_addr_copy(pstatus->psaddr, psaddr);
    296
    297	packet_matchbssid = (!ieee80211_is_ctl(fc) &&
    298			     (ether_addr_equal(mac->bssid,
    299					       ieee80211_has_tods(fc) ?
    300					       hdr->addr1 :
    301					       ieee80211_has_fromds(fc) ?
    302					       hdr->addr2 : hdr->addr3)) &&
    303			      (!pstatus->hwerror) &&
    304			      (!pstatus->crc) && (!pstatus->icv));
    305
    306	packet_toself = packet_matchbssid &&
    307	    (ether_addr_equal(praddr, rtlefuse->dev_addr));
    308
    309	if (ieee80211_is_beacon(hdr->frame_control))
    310		packet_beacon = true;
    311	else
    312		packet_beacon = false;
    313
    314	if (packet_beacon && packet_matchbssid)
    315		rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
    316
    317	if (packet_matchbssid &&
    318	    ieee80211_is_data_qos(hdr->frame_control) &&
    319	    !is_multicast_ether_addr(ieee80211_get_DA(hdr))) {
    320		struct ieee80211_qos_hdr *hdr_qos =
    321			(struct ieee80211_qos_hdr *)tmp_buf;
    322		u16 tid = le16_to_cpu(hdr_qos->qos_ctrl) & 0xf;
    323
    324		if (tid != 0 && tid != 3)
    325			rtl_priv(hw)->dm.dbginfo.num_non_be_pkt++;
    326	}
    327
    328	query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
    329			  packet_matchbssid, packet_toself,
    330			  packet_beacon);
    331	/*_rtl8821ae_smart_antenna(hw, pstatus); */
    332	rtl_process_phyinfo(hw, tmp_buf, pstatus);
    333}
    334
    335static void rtl8821ae_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
    336				       __le32 *virtualaddress)
    337{
    338	u32 dwtmp = 0;
    339
    340	memset(virtualaddress, 0, 8);
    341
    342	set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
    343	if (ptcb_desc->empkt_num == 1) {
    344		dwtmp = ptcb_desc->empkt_len[0];
    345	} else {
    346		dwtmp = ptcb_desc->empkt_len[0];
    347		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
    348		dwtmp += ptcb_desc->empkt_len[1];
    349	}
    350	set_earlymode_len0(virtualaddress, dwtmp);
    351
    352	if (ptcb_desc->empkt_num <= 3) {
    353		dwtmp = ptcb_desc->empkt_len[2];
    354	} else {
    355		dwtmp = ptcb_desc->empkt_len[2];
    356		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
    357		dwtmp += ptcb_desc->empkt_len[3];
    358	}
    359	set_earlymode_len1(virtualaddress, dwtmp);
    360	if (ptcb_desc->empkt_num <= 5) {
    361		dwtmp = ptcb_desc->empkt_len[4];
    362	} else {
    363		dwtmp = ptcb_desc->empkt_len[4];
    364		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
    365		dwtmp += ptcb_desc->empkt_len[5];
    366	}
    367	set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
    368	set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
    369	if (ptcb_desc->empkt_num <= 7) {
    370		dwtmp = ptcb_desc->empkt_len[6];
    371	} else {
    372		dwtmp = ptcb_desc->empkt_len[6];
    373		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
    374		dwtmp += ptcb_desc->empkt_len[7];
    375	}
    376	set_earlymode_len3(virtualaddress, dwtmp);
    377	if (ptcb_desc->empkt_num <= 9) {
    378		dwtmp = ptcb_desc->empkt_len[8];
    379	} else {
    380		dwtmp = ptcb_desc->empkt_len[8];
    381		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0)+4;
    382		dwtmp += ptcb_desc->empkt_len[9];
    383	}
    384	set_earlymode_len4(virtualaddress, dwtmp);
    385}
    386
    387static bool rtl8821ae_get_rxdesc_is_ht(struct ieee80211_hw *hw, __le32 *pdesc)
    388{
    389	struct rtl_priv *rtlpriv = rtl_priv(hw);
    390	u8 rx_rate = 0;
    391
    392	rx_rate = get_rx_desc_rxmcs(pdesc);
    393
    394	rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
    395
    396	if ((rx_rate >= DESC_RATEMCS0) && (rx_rate <= DESC_RATEMCS15))
    397		return true;
    398	return false;
    399}
    400
    401static bool rtl8821ae_get_rxdesc_is_vht(struct ieee80211_hw *hw, __le32 *pdesc)
    402{
    403	struct rtl_priv *rtlpriv = rtl_priv(hw);
    404	u8 rx_rate = 0;
    405
    406	rx_rate = get_rx_desc_rxmcs(pdesc);
    407
    408	rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD, "rx_rate=0x%02x.\n", rx_rate);
    409
    410	if (rx_rate >= DESC_RATEVHT1SS_MCS0)
    411		return true;
    412	return false;
    413}
    414
    415static u8 rtl8821ae_get_rx_vht_nss(struct ieee80211_hw *hw, __le32 *pdesc)
    416{
    417	u8 rx_rate = 0;
    418	u8 vht_nss = 0;
    419
    420	rx_rate = get_rx_desc_rxmcs(pdesc);
    421	if ((rx_rate >= DESC_RATEVHT1SS_MCS0) &&
    422	    (rx_rate <= DESC_RATEVHT1SS_MCS9))
    423		vht_nss = 1;
    424	else if ((rx_rate >= DESC_RATEVHT2SS_MCS0) &&
    425		 (rx_rate <= DESC_RATEVHT2SS_MCS9))
    426		vht_nss = 2;
    427
    428	return vht_nss;
    429}
    430
    431bool rtl8821ae_rx_query_desc(struct ieee80211_hw *hw,
    432			     struct rtl_stats *status,
    433			     struct ieee80211_rx_status *rx_status,
    434			     u8 *pdesc8, struct sk_buff *skb)
    435{
    436	struct rtl_priv *rtlpriv = rtl_priv(hw);
    437	struct rx_fwinfo_8821ae *p_drvinfo;
    438	struct ieee80211_hdr *hdr;
    439	u8 wake_match;
    440	__le32 *pdesc = (__le32 *)pdesc8;
    441	u32 phystatus = get_rx_desc_physt(pdesc);
    442
    443	status->length = (u16)get_rx_desc_pkt_len(pdesc);
    444	status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
    445	    RX_DRV_INFO_SIZE_UNIT;
    446	status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
    447	status->icv = (u16)get_rx_desc_icv(pdesc);
    448	status->crc = (u16)get_rx_desc_crc32(pdesc);
    449	status->hwerror = (status->crc | status->icv);
    450	status->decrypted = !get_rx_desc_swdec(pdesc);
    451	status->rate = (u8)get_rx_desc_rxmcs(pdesc);
    452	status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
    453	status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
    454	status->isfirst_ampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
    455	status->timestamp_low = get_rx_desc_tsfl(pdesc);
    456	status->rx_packet_bw = get_rx_desc_bw(pdesc);
    457	status->macid = get_rx_desc_macid(pdesc);
    458	status->is_short_gi = !(bool)get_rx_desc_splcp(pdesc);
    459	status->is_ht = rtl8821ae_get_rxdesc_is_ht(hw, pdesc);
    460	status->is_vht = rtl8821ae_get_rxdesc_is_vht(hw, pdesc);
    461	status->vht_nss = rtl8821ae_get_rx_vht_nss(hw, pdesc);
    462	status->is_cck = RTL8821AE_RX_HAL_IS_CCK_RATE(status->rate);
    463
    464	rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
    465		"rx_packet_bw=%s,is_ht %d, is_vht %d, vht_nss=%d,is_short_gi %d.\n",
    466		(status->rx_packet_bw == 2) ? "80M" :
    467		(status->rx_packet_bw == 1) ? "40M" : "20M",
    468		status->is_ht, status->is_vht, status->vht_nss,
    469		status->is_short_gi);
    470
    471	if (get_rx_status_desc_rpt_sel(pdesc))
    472		status->packet_report_type = C2H_PACKET;
    473	else
    474		status->packet_report_type = NORMAL_RX;
    475
    476	if (get_rx_status_desc_pattern_match(pdesc))
    477		wake_match = BIT(2);
    478	else if (get_rx_status_desc_magic_match(pdesc))
    479		wake_match = BIT(1);
    480	else if (get_rx_status_desc_unicast_match(pdesc))
    481		wake_match = BIT(0);
    482	else
    483		wake_match = 0;
    484
    485	if (wake_match)
    486		rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
    487			"GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
    488			wake_match);
    489	rx_status->freq = hw->conf.chandef.chan->center_freq;
    490	rx_status->band = hw->conf.chandef.chan->band;
    491
    492	hdr = (struct ieee80211_hdr *)(skb->data +
    493	      status->rx_drvinfo_size + status->rx_bufshift);
    494
    495	if (status->crc)
    496		rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
    497
    498	if (status->rx_packet_bw == HT_CHANNEL_WIDTH_20_40)
    499		rx_status->bw = RATE_INFO_BW_40;
    500	else if (status->rx_packet_bw == HT_CHANNEL_WIDTH_80)
    501		rx_status->bw = RATE_INFO_BW_80;
    502	if (status->is_ht)
    503		rx_status->encoding = RX_ENC_HT;
    504	if (status->is_vht)
    505		rx_status->encoding = RX_ENC_VHT;
    506
    507	if (status->is_short_gi)
    508		rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
    509
    510	rx_status->nss = status->vht_nss;
    511	rx_status->flag |= RX_FLAG_MACTIME_START;
    512
    513	/* hw will set status->decrypted true, if it finds the
    514	 * frame is open data frame or mgmt frame.
    515	 * So hw will not decryption robust managment frame
    516	 * for IEEE80211w but still set status->decrypted
    517	 * true, so here we should set it back to undecrypted
    518	 * for IEEE80211w frame, and mac80211 sw will help
    519	 * to decrypt it
    520	 */
    521	if (status->decrypted) {
    522		if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
    523		    (ieee80211_has_protected(hdr->frame_control)))
    524			rx_status->flag |= RX_FLAG_DECRYPTED;
    525		else
    526			rx_status->flag &= ~RX_FLAG_DECRYPTED;
    527	}
    528
    529	/* rate_idx: index of data rate into band's
    530	 * supported rates or MCS index if HT rates
    531	 * are use (RX_FLAG_HT)
    532	 */
    533	rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
    534						   status->is_vht,
    535						   status->rate);
    536
    537	rx_status->mactime = status->timestamp_low;
    538	if (phystatus) {
    539		p_drvinfo = (struct rx_fwinfo_8821ae *)(skb->data +
    540			    status->rx_bufshift);
    541
    542		translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo);
    543	}
    544	rx_status->signal = status->recvsignalpower + 10;
    545	if (status->packet_report_type == TX_REPORT2) {
    546		status->macid_valid_entry[0] =
    547		  get_rx_rpt2_desc_macid_valid_1(pdesc);
    548		status->macid_valid_entry[1] =
    549		  get_rx_rpt2_desc_macid_valid_2(pdesc);
    550	}
    551	return true;
    552}
    553
    554static u8 rtl8821ae_bw_mapping(struct ieee80211_hw *hw,
    555			       struct rtl_tcb_desc *ptcb_desc)
    556{
    557	struct rtl_priv *rtlpriv = rtl_priv(hw);
    558	struct rtl_phy *rtlphy = &rtlpriv->phy;
    559	u8 bw_setting_of_desc = 0;
    560
    561	rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    562		"%s, current_chan_bw %d, packet_bw %d\n",
    563		__func__,
    564		rtlphy->current_chan_bw, ptcb_desc->packet_bw);
    565
    566	if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
    567		if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80)
    568			bw_setting_of_desc = 2;
    569		else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40)
    570			bw_setting_of_desc = 1;
    571		else
    572			bw_setting_of_desc = 0;
    573	} else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
    574		if ((ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) ||
    575		    (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80))
    576			bw_setting_of_desc = 1;
    577		else
    578			bw_setting_of_desc = 0;
    579	} else {
    580		bw_setting_of_desc = 0;
    581	}
    582	return bw_setting_of_desc;
    583}
    584
    585static u8 rtl8821ae_sc_mapping(struct ieee80211_hw *hw,
    586			       struct rtl_tcb_desc *ptcb_desc)
    587{
    588	struct rtl_priv *rtlpriv = rtl_priv(hw);
    589	struct rtl_phy *rtlphy = &rtlpriv->phy;
    590	struct rtl_mac *mac = rtl_mac(rtlpriv);
    591	u8 sc_setting_of_desc = 0;
    592
    593	if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_80) {
    594		if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_80) {
    595			sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
    596		} else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
    597			if (mac->cur_80_prime_sc ==
    598			    HAL_PRIME_CHNL_OFFSET_LOWER)
    599				sc_setting_of_desc =
    600					VHT_DATA_SC_40_LOWER_OF_80MHZ;
    601			else if (mac->cur_80_prime_sc ==
    602				 HAL_PRIME_CHNL_OFFSET_UPPER)
    603				sc_setting_of_desc =
    604					VHT_DATA_SC_40_UPPER_OF_80MHZ;
    605			else
    606				rtl_dbg(rtlpriv, COMP_SEND, DBG_LOUD,
    607					"%s: Not Correct Primary40MHz Setting\n",
    608					__func__);
    609		} else {
    610			if ((mac->cur_40_prime_sc ==
    611			     HAL_PRIME_CHNL_OFFSET_LOWER) &&
    612			    (mac->cur_80_prime_sc  ==
    613			     HAL_PRIME_CHNL_OFFSET_LOWER))
    614				sc_setting_of_desc =
    615					VHT_DATA_SC_20_LOWEST_OF_80MHZ;
    616			else if ((mac->cur_40_prime_sc ==
    617				  HAL_PRIME_CHNL_OFFSET_UPPER) &&
    618				 (mac->cur_80_prime_sc ==
    619				  HAL_PRIME_CHNL_OFFSET_LOWER))
    620				sc_setting_of_desc =
    621					VHT_DATA_SC_20_LOWER_OF_80MHZ;
    622			else if ((mac->cur_40_prime_sc ==
    623				  HAL_PRIME_CHNL_OFFSET_LOWER) &&
    624				 (mac->cur_80_prime_sc ==
    625				  HAL_PRIME_CHNL_OFFSET_UPPER))
    626				sc_setting_of_desc =
    627					VHT_DATA_SC_20_UPPER_OF_80MHZ;
    628			else if ((mac->cur_40_prime_sc ==
    629				  HAL_PRIME_CHNL_OFFSET_UPPER) &&
    630				 (mac->cur_80_prime_sc ==
    631				  HAL_PRIME_CHNL_OFFSET_UPPER))
    632				sc_setting_of_desc =
    633					VHT_DATA_SC_20_UPPERST_OF_80MHZ;
    634			else
    635				rtl_dbg(rtlpriv, COMP_SEND, DBG_LOUD,
    636					"%s: Not Correct Primary40MHz Setting\n",
    637					__func__);
    638		}
    639	} else if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
    640		if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
    641			sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
    642		} else if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20) {
    643			if (mac->cur_40_prime_sc ==
    644				HAL_PRIME_CHNL_OFFSET_UPPER) {
    645				sc_setting_of_desc =
    646					VHT_DATA_SC_20_UPPER_OF_80MHZ;
    647			} else if (mac->cur_40_prime_sc ==
    648				HAL_PRIME_CHNL_OFFSET_LOWER){
    649				sc_setting_of_desc =
    650					VHT_DATA_SC_20_LOWER_OF_80MHZ;
    651			} else {
    652				sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
    653			}
    654		}
    655	} else {
    656		sc_setting_of_desc = VHT_DATA_SC_DONOT_CARE;
    657	}
    658
    659	return sc_setting_of_desc;
    660}
    661
    662void rtl8821ae_tx_fill_desc(struct ieee80211_hw *hw,
    663			    struct ieee80211_hdr *hdr, u8 *pdesc8, u8 *txbd,
    664			    struct ieee80211_tx_info *info,
    665			    struct ieee80211_sta *sta,
    666			    struct sk_buff *skb,
    667			    u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
    668{
    669	struct rtl_priv *rtlpriv = rtl_priv(hw);
    670	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
    671	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
    672	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
    673	struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
    674	u16 seq_number;
    675	__le16 fc = hdr->frame_control;
    676	unsigned int buf_len = 0;
    677	unsigned int skb_len = skb->len;
    678	u8 fw_qsel = _rtl8821ae_map_hwqueue_to_fwqueue(skb, hw_queue);
    679	bool firstseg = ((hdr->seq_ctrl &
    680			  cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
    681	bool lastseg = ((hdr->frame_control &
    682			 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
    683	dma_addr_t mapping;
    684	u8 short_gi = 0;
    685	bool tmp_bool;
    686	__le32 *pdesc = (__le32 *)pdesc8;
    687
    688	seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
    689	rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
    690	/* reserve 8 byte for AMPDU early mode */
    691	if (rtlhal->earlymode_enable) {
    692		skb_push(skb, EM_HDR_LEN);
    693		memset(skb->data, 0, EM_HDR_LEN);
    694	}
    695	buf_len = skb->len;
    696	mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,
    697				 DMA_TO_DEVICE);
    698	if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
    699		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    700			"DMA mapping error\n");
    701		return;
    702	}
    703	clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_8821ae));
    704	if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
    705		firstseg = true;
    706		lastseg = true;
    707	}
    708	if (firstseg) {
    709		if (rtlhal->earlymode_enable) {
    710			set_tx_desc_pkt_offset(pdesc, 1);
    711			set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +
    712					   EM_HDR_LEN);
    713			if (ptcb_desc->empkt_num) {
    714				rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    715					"Insert 8 byte.pTcb->EMPktNum:%d\n",
    716					ptcb_desc->empkt_num);
    717				rtl8821ae_insert_emcontent(ptcb_desc,
    718							   (__le32 *)skb->data);
    719			}
    720		} else {
    721			set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
    722		}
    723
    724
    725		/* ptcb_desc->use_driver_rate = true; */
    726		set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
    727		if (ptcb_desc->hw_rate > DESC_RATEMCS0)
    728			short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
    729		else
    730			short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
    731
    732		set_tx_desc_data_shortgi(pdesc, short_gi);
    733
    734		if (info->flags & IEEE80211_TX_CTL_AMPDU) {
    735			set_tx_desc_agg_enable(pdesc, 1);
    736			set_tx_desc_max_agg_num(pdesc, 0x1f);
    737		}
    738		set_tx_desc_seq(pdesc, seq_number);
    739		set_tx_desc_rts_enable(pdesc,
    740				       ((ptcb_desc->rts_enable &&
    741					!ptcb_desc->cts_enable) ? 1 : 0));
    742		set_tx_desc_hw_rts_enable(pdesc, 0);
    743		set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
    744
    745		set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
    746		set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
    747		tmp_bool = ((ptcb_desc->rts_rate <= DESC_RATE54M) ?
    748			    (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
    749			    (ptcb_desc->rts_use_shortgi ? 1 : 0));
    750		set_tx_desc_rts_short(pdesc, tmp_bool);
    751
    752		if (ptcb_desc->tx_enable_sw_calc_duration)
    753			set_tx_desc_nav_use_hdr(pdesc, 1);
    754
    755		set_tx_desc_data_bw(pdesc,
    756				    rtl8821ae_bw_mapping(hw, ptcb_desc));
    757
    758		set_tx_desc_tx_sub_carrier(pdesc,
    759					   rtl8821ae_sc_mapping(hw, ptcb_desc));
    760
    761		set_tx_desc_linip(pdesc, 0);
    762		set_tx_desc_pkt_size(pdesc, (u16)skb_len);
    763		if (sta) {
    764			u8 ampdu_density = sta->deflink.ht_cap.ampdu_density;
    765
    766			set_tx_desc_ampdu_density(pdesc, ampdu_density);
    767		}
    768		if (info->control.hw_key) {
    769			struct ieee80211_key_conf *keyconf =
    770				info->control.hw_key;
    771			switch (keyconf->cipher) {
    772			case WLAN_CIPHER_SUITE_WEP40:
    773			case WLAN_CIPHER_SUITE_WEP104:
    774			case WLAN_CIPHER_SUITE_TKIP:
    775				set_tx_desc_sec_type(pdesc, 0x1);
    776				break;
    777			case WLAN_CIPHER_SUITE_CCMP:
    778				set_tx_desc_sec_type(pdesc, 0x3);
    779				break;
    780			default:
    781				set_tx_desc_sec_type(pdesc, 0x0);
    782				break;
    783			}
    784		}
    785
    786		set_tx_desc_queue_sel(pdesc, fw_qsel);
    787		set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
    788		set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
    789		set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?
    790				       1 : 0);
    791		set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
    792
    793		if (ieee80211_is_data_qos(fc)) {
    794			if (mac->rdg_en) {
    795				rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    796					"Enable RDG function.\n");
    797				set_tx_desc_rdg_enable(pdesc, 1);
    798				set_tx_desc_htc(pdesc, 1);
    799			}
    800		}
    801		/* tx report */
    802		rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
    803	}
    804
    805	set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
    806	set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
    807	set_tx_desc_tx_buffer_size(pdesc, buf_len);
    808	set_tx_desc_tx_buffer_address(pdesc, mapping);
    809	/* if (rtlpriv->dm.useramask) { */
    810	if (1) {
    811		set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
    812		set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
    813	} else {
    814		set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
    815		set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
    816	}
    817	if (!ieee80211_is_data_qos(fc))  {
    818		set_tx_desc_hwseq_en(pdesc, 1);
    819		set_tx_desc_hwseq_sel(pdesc, 0);
    820	}
    821	set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
    822	if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
    823	    is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
    824		set_tx_desc_bmc(pdesc, 1);
    825	}
    826
    827	rtl8821ae_dm_set_tx_ant_by_tx_info(hw, pdesc8, ptcb_desc->mac_id);
    828	rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
    829}
    830
    831void rtl8821ae_tx_fill_cmddesc(struct ieee80211_hw *hw,
    832			       u8 *pdesc8, bool firstseg,
    833			       bool lastseg, struct sk_buff *skb)
    834{
    835	struct rtl_priv *rtlpriv = rtl_priv(hw);
    836	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
    837	u8 fw_queue = QSLT_BEACON;
    838	__le32 *pdesc = (__le32 *)pdesc8;
    839
    840	dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
    841					    skb->len, DMA_TO_DEVICE);
    842
    843	if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
    844		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
    845			"DMA mapping error\n");
    846		return;
    847	}
    848	clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
    849
    850	set_tx_desc_first_seg(pdesc, 1);
    851	set_tx_desc_last_seg(pdesc, 1);
    852
    853	set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
    854
    855	set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
    856
    857	set_tx_desc_use_rate(pdesc, 1);
    858	set_tx_desc_tx_rate(pdesc, DESC_RATE1M);
    859	set_tx_desc_disable_fb(pdesc, 1);
    860
    861	set_tx_desc_data_bw(pdesc, 0);
    862
    863	set_tx_desc_hwseq_en(pdesc, 1);
    864
    865	set_tx_desc_queue_sel(pdesc, fw_queue);
    866
    867	set_tx_desc_tx_buffer_size(pdesc, skb->len);
    868
    869	set_tx_desc_tx_buffer_address(pdesc, mapping);
    870
    871	set_tx_desc_macid(pdesc, 0);
    872
    873	set_tx_desc_own(pdesc, 1);
    874
    875	RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
    876		      "H2C Tx Cmd Content\n",
    877		      pdesc8, TX_DESC_SIZE);
    878}
    879
    880void rtl8821ae_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
    881			bool istx, u8 desc_name, u8 *val)
    882{
    883	__le32 *pdesc = (__le32 *)pdesc8;
    884
    885	if (istx) {
    886		switch (desc_name) {
    887		case HW_DESC_OWN:
    888			set_tx_desc_own(pdesc, 1);
    889			break;
    890		case HW_DESC_TX_NEXTDESC_ADDR:
    891			set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
    892			break;
    893		default:
    894			WARN_ONCE(true,
    895				  "rtl8821ae: ERR txdesc :%d not processed\n",
    896				  desc_name);
    897			break;
    898		}
    899	} else {
    900		switch (desc_name) {
    901		case HW_DESC_RXOWN:
    902			set_rx_desc_own(pdesc, 1);
    903			break;
    904		case HW_DESC_RXBUFF_ADDR:
    905			set_rx_desc_buff_addr(pdesc, *(u32 *)val);
    906			break;
    907		case HW_DESC_RXPKT_LEN:
    908			set_rx_desc_pkt_len(pdesc, *(u32 *)val);
    909			break;
    910		case HW_DESC_RXERO:
    911			set_rx_desc_eor(pdesc, 1);
    912			break;
    913		default:
    914			WARN_ONCE(true,
    915				  "rtl8821ae: ERR rxdesc :%d not processed\n",
    916				  desc_name);
    917			break;
    918		}
    919	}
    920}
    921
    922u64 rtl8821ae_get_desc(struct ieee80211_hw *hw,
    923		       u8 *pdesc8, bool istx, u8 desc_name)
    924{
    925	u32 ret = 0;
    926	__le32 *pdesc = (__le32 *)pdesc8;
    927
    928	if (istx) {
    929		switch (desc_name) {
    930		case HW_DESC_OWN:
    931			ret = get_tx_desc_own(pdesc);
    932			break;
    933		case HW_DESC_TXBUFF_ADDR:
    934			ret = get_tx_desc_tx_buffer_address(pdesc);
    935			break;
    936		default:
    937			WARN_ONCE(true,
    938				  "rtl8821ae: ERR txdesc :%d not processed\n",
    939				  desc_name);
    940			break;
    941		}
    942	} else {
    943		switch (desc_name) {
    944		case HW_DESC_OWN:
    945			ret = get_rx_desc_own(pdesc);
    946			break;
    947		case HW_DESC_RXPKT_LEN:
    948			ret = get_rx_desc_pkt_len(pdesc);
    949			break;
    950		case HW_DESC_RXBUFF_ADDR:
    951			ret = get_rx_desc_buff_addr(pdesc);
    952			break;
    953		default:
    954			WARN_ONCE(true,
    955				  "rtl8821ae: ERR rxdesc :%d not processed\n",
    956				  desc_name);
    957			break;
    958		}
    959	}
    960	return ret;
    961}
    962
    963bool rtl8821ae_is_tx_desc_closed(struct ieee80211_hw *hw,
    964				 u8 hw_queue, u16 index)
    965{
    966	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
    967	struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
    968	u8 *entry = (u8 *)(&ring->desc[ring->idx]);
    969	u8 own = (u8)rtl8821ae_get_desc(hw, entry, true, HW_DESC_OWN);
    970
    971	/**
    972	 *beacon packet will only use the first
    973	 *descriptor defautly,and the own may not
    974	 *be cleared by the hardware
    975	 */
    976	if (own)
    977		return false;
    978	return true;
    979}
    980
    981void rtl8821ae_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
    982{
    983	struct rtl_priv *rtlpriv = rtl_priv(hw);
    984
    985	if (hw_queue == BEACON_QUEUE) {
    986		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
    987	} else {
    988		rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
    989			       BIT(0) << (hw_queue));
    990	}
    991}