cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rtw8852c_table.h (1624B)


      1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
      2/* Copyright(c) 2019-2022  Realtek Corporation
      3 */
      4
      5#ifndef __RTW89_8852C_TABLE_H__
      6#define __RTW89_8852C_TABLE_H__
      7
      8#include "core.h"
      9
     10extern const struct rtw89_phy_table rtw89_8852c_phy_bb_table;
     11extern const struct rtw89_phy_table rtw89_8852c_phy_bb_gain_table;
     12extern const struct rtw89_phy_table rtw89_8852c_phy_radioa_table;
     13extern const struct rtw89_phy_table rtw89_8852c_phy_radiob_table;
     14extern const struct rtw89_phy_table rtw89_8852c_phy_nctl_table;
     15extern const struct rtw89_txpwr_table rtw89_8852c_byr_table;
     16extern const struct rtw89_phy_tssi_dbw_table rtw89_8852c_tssi_dbw_table;
     17extern const struct rtw89_txpwr_track_cfg rtw89_8852c_trk_cfg;
     18extern const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM]
     19				    [RTW89_REGD_NUM];
     20extern const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM]
     21					[RTW89_RS_LMT_NUM][RTW89_BF_NUM]
     22					[RTW89_REGD_NUM][RTW89_2G_CH_NUM];
     23extern const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
     24					[RTW89_RS_LMT_NUM][RTW89_BF_NUM]
     25					[RTW89_REGD_NUM][RTW89_5G_CH_NUM];
     26extern const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM]
     27					[RTW89_RS_LMT_NUM][RTW89_BF_NUM]
     28					[RTW89_REGD_NUM][RTW89_6G_CH_NUM];
     29extern const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM]
     30					   [RTW89_REGD_NUM][RTW89_2G_CH_NUM];
     31extern const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM]
     32					   [RTW89_REGD_NUM][RTW89_5G_CH_NUM];
     33extern const s8 rtw89_8852c_txpwr_lmt_ru_6g[RTW89_RU_NUM][RTW89_NTX_NUM]
     34					   [RTW89_REGD_NUM][RTW89_6G_CH_NUM];
     35
     36#endif