cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

rsi_main.h (10007B)


      1/*
      2 * Copyright (c) 2014 Redpine Signals Inc.
      3 *
      4 * Permission to use, copy, modify, and/or distribute this software for any
      5 * purpose with or without fee is hereby granted, provided that the above
      6 * copyright notice and this permission notice appear in all copies.
      7 *
      8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
      9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     15 */
     16
     17#ifndef __RSI_MAIN_H__
     18#define __RSI_MAIN_H__
     19
     20#include <linux/string.h>
     21#include <linux/skbuff.h>
     22#include <net/mac80211.h>
     23#include <net/rsi_91x.h>
     24
     25struct rsi_sta {
     26	struct ieee80211_sta *sta;
     27	s16 sta_id;
     28	u16 seq_start[IEEE80211_NUM_TIDS];
     29	bool start_tx_aggr[IEEE80211_NUM_TIDS];
     30};
     31
     32struct rsi_hw;
     33
     34#include "rsi_ps.h"
     35
     36#define ERR_ZONE                        BIT(0)  /* For Error Msgs             */
     37#define INFO_ZONE                       BIT(1)  /* For General Status Msgs    */
     38#define INIT_ZONE                       BIT(2)  /* For Driver Init Seq Msgs   */
     39#define MGMT_TX_ZONE                    BIT(3)  /* For TX Mgmt Path Msgs      */
     40#define MGMT_RX_ZONE                    BIT(4)  /* For RX Mgmt Path Msgs      */
     41#define DATA_TX_ZONE                    BIT(5)  /* For TX Data Path Msgs      */
     42#define DATA_RX_ZONE                    BIT(6)  /* For RX Data Path Msgs      */
     43#define FSM_ZONE                        BIT(7)  /* For State Machine Msgs     */
     44#define ISR_ZONE                        BIT(8)  /* For Interrupt Msgs         */
     45
     46enum RSI_FSM_STATES {
     47	FSM_FW_NOT_LOADED,
     48	FSM_CARD_NOT_READY,
     49	FSM_COMMON_DEV_PARAMS_SENT,
     50	FSM_BOOT_PARAMS_SENT,
     51	FSM_EEPROM_READ_MAC_ADDR,
     52	FSM_EEPROM_READ_RF_TYPE,
     53	FSM_RESET_MAC_SENT,
     54	FSM_RADIO_CAPS_SENT,
     55	FSM_BB_RF_PROG_SENT,
     56	FSM_MAC_INIT_DONE,
     57
     58	NUM_FSM_STATES
     59};
     60
     61extern u32 rsi_zone_enabled;
     62extern __printf(2, 3) void rsi_dbg(u32 zone, const char *fmt, ...);
     63
     64#define RSI_MAX_BANDS			2
     65#define RSI_MAX_VIFS                    3
     66#define NUM_EDCA_QUEUES                 4
     67#define IEEE80211_ADDR_LEN              6
     68#define FRAME_DESC_SZ                   16
     69#define MIN_802_11_HDR_LEN              24
     70#define RSI_DEF_KEEPALIVE               90
     71#define RSI_WOW_KEEPALIVE                5
     72#define RSI_BCN_MISS_THRESHOLD           24
     73
     74#define DATA_QUEUE_WATER_MARK           400
     75#define MIN_DATA_QUEUE_WATER_MARK       300
     76#define MULTICAST_WATER_MARK            200
     77#define MAC_80211_HDR_FRAME_CONTROL     0
     78#define WME_NUM_AC                      4
     79#define NUM_SOFT_QUEUES                 6
     80#define MAX_HW_QUEUES                   12
     81#define INVALID_QUEUE                   0xff
     82#define MAX_CONTINUOUS_VO_PKTS          8
     83#define MAX_CONTINUOUS_VI_PKTS          4
     84
     85/* Hardware queue info */
     86#define BROADCAST_HW_Q			9
     87#define MGMT_HW_Q			10
     88#define BEACON_HW_Q			11
     89
     90#define IEEE80211_MGMT_FRAME            0x00
     91#define IEEE80211_CTL_FRAME             0x04
     92
     93#define RSI_MAX_ASSOC_STAS		32
     94#define IEEE80211_QOS_TID               0x0f
     95#define IEEE80211_NONQOS_TID            16
     96
     97#define MAX_DEBUGFS_ENTRIES             4
     98
     99#define TID_TO_WME_AC(_tid) (      \
    100	((_tid) == 0 || (_tid) == 3) ? BE_Q : \
    101	((_tid) < 3) ? BK_Q : \
    102	((_tid) < 6) ? VI_Q : \
    103	VO_Q)
    104
    105#define WME_AC(_q) (    \
    106	((_q) == BK_Q) ? IEEE80211_AC_BK : \
    107	((_q) == BE_Q) ? IEEE80211_AC_BE : \
    108	((_q) == VI_Q) ? IEEE80211_AC_VI : \
    109	IEEE80211_AC_VO)
    110
    111/* WoWLAN flags */
    112#define RSI_WOW_ENABLED			BIT(0)
    113#define RSI_WOW_NO_CONNECTION		BIT(1)
    114
    115#define RSI_MAX_RX_PKTS		64
    116
    117enum rsi_dev_model {
    118	RSI_DEV_9113 = 0,
    119	RSI_DEV_9116
    120};
    121
    122struct version_info {
    123	u16 major;
    124	u16 minor;
    125	u8 release_num;
    126	u8 patch_num;
    127	union {
    128		struct {
    129			u8 fw_ver[8];
    130		} info;
    131	} ver;
    132} __packed;
    133
    134struct skb_info {
    135	s8 rssi;
    136	u32 flags;
    137	u16 channel;
    138	s8 tid;
    139	s8 sta_id;
    140	u8 internal_hdr_size;
    141	struct ieee80211_vif *vif;
    142	u8 vap_id;
    143	bool have_key;
    144};
    145
    146enum edca_queue {
    147	BK_Q,
    148	BE_Q,
    149	VI_Q,
    150	VO_Q,
    151	MGMT_SOFT_Q,
    152	MGMT_BEACON_Q
    153};
    154
    155struct security_info {
    156	u32 ptk_cipher;
    157	u32 gtk_cipher;
    158};
    159
    160struct wmm_qinfo {
    161	s32 weight;
    162	s32 wme_params;
    163	s32 pkt_contended;
    164	s32 txop;
    165};
    166
    167struct transmit_q_stats {
    168	u32 total_tx_pkt_send[NUM_EDCA_QUEUES + 2];
    169	u32 total_tx_pkt_freed[NUM_EDCA_QUEUES + 2];
    170};
    171
    172#define MAX_BGSCAN_CHANNELS_DUAL_BAND	38
    173#define MAX_BGSCAN_PROBE_REQ_LEN	0x64
    174#define RSI_DEF_BGSCAN_THRLD		0x0
    175#define RSI_DEF_ROAM_THRLD		0xa
    176#define RSI_BGSCAN_PERIODICITY		0x1e
    177#define RSI_ACTIVE_SCAN_TIME		0x14
    178#define RSI_PASSIVE_SCAN_TIME		0x46
    179#define RSI_CHANNEL_SCAN_TIME		20
    180struct rsi_bgscan_params {
    181	u16 bgscan_threshold;
    182	u16 roam_threshold;
    183	u16 bgscan_periodicity;
    184	u8 num_bgscan_channels;
    185	u8 two_probe;
    186	u16 active_scan_duration;
    187	u16 passive_scan_duration;
    188};
    189
    190struct vif_priv {
    191	bool is_ht;
    192	bool sgi;
    193	u16 seq_start;
    194	int vap_id;
    195};
    196
    197struct rsi_event {
    198	atomic_t event_condition;
    199	wait_queue_head_t event_queue;
    200};
    201
    202struct rsi_thread {
    203	void (*thread_function)(void *);
    204	struct completion completion;
    205	struct task_struct *task;
    206	struct rsi_event event;
    207	atomic_t thread_done;
    208};
    209
    210struct cqm_info {
    211	s8 last_cqm_event_rssi;
    212	int rssi_thold;
    213	u32 rssi_hyst;
    214};
    215
    216enum rsi_dfs_regions {
    217	RSI_REGION_FCC = 0,
    218	RSI_REGION_ETSI,
    219	RSI_REGION_TELEC,
    220	RSI_REGION_WORLD
    221};
    222
    223struct rsi_9116_features {
    224	u8 pll_mode;
    225	u8 rf_type;
    226	u8 wireless_mode;
    227	u8 afe_type;
    228	u8 enable_ppe;
    229	u8 dpd;
    230	u32 sifs_tx_enable;
    231	u32 ps_options;
    232};
    233
    234struct rsi_rate_config {
    235	u32 configured_mask;	/* configured by mac80211 bits 0-11=legacy 12+ mcs */
    236	u16 fixed_hw_rate;
    237	bool fixed_enabled;
    238};
    239
    240struct rsi_common {
    241	struct rsi_hw *priv;
    242	struct vif_priv vif_info[RSI_MAX_VIFS];
    243
    244	void *coex_cb;
    245	bool mgmt_q_block;
    246	struct version_info lmac_ver;
    247
    248	struct rsi_thread tx_thread;
    249	struct sk_buff_head tx_queue[NUM_EDCA_QUEUES + 2];
    250	struct completion wlan_init_completion;
    251	/* Mutex declaration */
    252	struct mutex mutex;
    253	/* Mutex used for tx thread */
    254	struct mutex tx_lock;
    255	/* Mutex used for rx thread */
    256	struct mutex rx_lock;
    257	u8 endpoint;
    258
    259	/* Channel/band related */
    260	u8 band;
    261	u8 num_supp_bands;
    262	u8 channel_width;
    263
    264	u16 rts_threshold;
    265	u32 bitrate_mask[RSI_MAX_BANDS];
    266	struct rsi_rate_config rate_config[RSI_MAX_BANDS];
    267
    268	u8 rf_reset;
    269	struct transmit_q_stats tx_stats;
    270	struct security_info secinfo;
    271	struct wmm_qinfo tx_qinfo[NUM_EDCA_QUEUES];
    272	struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
    273	u8 mac_addr[IEEE80211_ADDR_LEN];
    274
    275	/* state related */
    276	u32 fsm_state;
    277	bool init_done;
    278	u8 bb_rf_prog_count;
    279	bool iface_down;
    280
    281	/* Generic */
    282	u8 channel;
    283	u8 *rx_data_pkt;
    284	u8 mac_id;
    285	u8 radio_id;
    286	u16 rate_pwr[20];
    287
    288	/* WMM algo related */
    289	u8 selected_qnum;
    290	u32 pkt_cnt;
    291	u8 min_weight;
    292
    293	/* bgscan related */
    294	struct cqm_info cqm_info;
    295
    296	bool hw_data_qs_blocked;
    297	u8 driver_mode;
    298	u8 coex_mode;
    299	u16 oper_mode;
    300	u8 lp_ps_handshake_mode;
    301	u8 ulp_ps_handshake_mode;
    302	u8 uapsd_bitmap;
    303	u8 rf_power_val;
    304	u8 wlan_rf_power_mode;
    305	u8 obm_ant_sel_val;
    306	int tx_power;
    307	u8 ant_in_use;
    308	/* Mutex used for writing packet to bus */
    309	struct mutex tx_bus_mutex;
    310	bool hibernate_resume;
    311	bool reinit_hw;
    312	u8 wow_flags;
    313	u16 beacon_interval;
    314	u8 dtim_cnt;
    315
    316	/* AP mode parameters */
    317	u8 beacon_enabled;
    318	u16 beacon_cnt;
    319	struct rsi_sta stations[RSI_MAX_ASSOC_STAS + 1];
    320	int num_stations;
    321	int max_stations;
    322	struct ieee80211_key_conf *key;
    323
    324	/* Wi-Fi direct mode related */
    325	bool p2p_enabled;
    326	struct timer_list roc_timer;
    327	struct ieee80211_vif *roc_vif;
    328
    329	bool eapol4_confirm;
    330	bool bt_defer_attach;
    331	void *bt_adapter;
    332
    333	struct cfg80211_scan_request *hwscan;
    334	struct rsi_bgscan_params bgscan;
    335	struct rsi_9116_features w9116_features;
    336	u8 bgscan_en;
    337	u8 mac_ops_resumed;
    338};
    339
    340struct eepromrw_info {
    341	u32 offset;
    342	u32 length;
    343	u8  write;
    344	u16 eeprom_erase;
    345	u8 data[480];
    346};
    347
    348struct eeprom_read {
    349	u16 length;
    350	u16 off_set;
    351};
    352
    353struct rsi_hw {
    354	struct rsi_common *priv;
    355	enum rsi_dev_model device_model;
    356	struct ieee80211_hw *hw;
    357	struct ieee80211_vif *vifs[RSI_MAX_VIFS];
    358	struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
    359	struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
    360
    361	struct device *device;
    362	u8 sc_nvifs;
    363
    364	enum rsi_host_intf rsi_host_intf;
    365	u16 block_size;
    366	enum ps_state ps_state;
    367	struct rsi_ps_info ps_info;
    368	spinlock_t ps_lock; /*To protect power save config*/
    369	u32 usb_buffer_status_reg;
    370#ifdef CONFIG_RSI_DEBUGFS
    371	struct rsi_debugfs *dfsentry;
    372	u8 num_debugfs_entries;
    373#endif
    374	char *fw_file_name;
    375	struct timer_list bl_cmd_timer;
    376	bool blcmd_timer_expired;
    377	u32 flash_capacity;
    378	struct eepromrw_info eeprom;
    379	u32 interrupt_status;
    380	u8 dfs_region;
    381	char country[2];
    382	void *rsi_dev;
    383	struct rsi_host_intf_ops *host_intf_ops;
    384	int (*check_hw_queue_status)(struct rsi_hw *adapter, u8 q_num);
    385	int (*determine_event_timeout)(struct rsi_hw *adapter);
    386};
    387
    388void rsi_print_version(struct rsi_common *common);
    389
    390struct rsi_host_intf_ops {
    391	int (*read_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
    392	int (*write_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
    393	int (*master_access_msword)(struct rsi_hw *adapter, u16 ms_word);
    394	int (*read_reg_multiple)(struct rsi_hw *adapter, u32 addr,
    395				 u8 *data, u16 count);
    396	int (*write_reg_multiple)(struct rsi_hw *adapter, u32 addr,
    397				  u8 *data, u16 count);
    398	int (*master_reg_read)(struct rsi_hw *adapter, u32 addr,
    399			       u32 *read_buf, u16 size);
    400	int (*master_reg_write)(struct rsi_hw *adapter,
    401				unsigned long addr, unsigned long data,
    402				u16 size);
    403	int (*load_data_master_write)(struct rsi_hw *adapter, u32 addr,
    404				      u32 instructions_size, u16 block_size,
    405				      u8 *fw);
    406	int (*reinit_device)(struct rsi_hw *adapter);
    407	int (*ta_reset)(struct rsi_hw *adapter);
    408};
    409
    410enum rsi_host_intf rsi_get_host_intf(void *priv);
    411void rsi_set_bt_context(void *priv, void *bt_context);
    412void rsi_attach_bt(struct rsi_common *common);
    413
    414#endif