cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cw1200_spi.c (10612B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Mac80211 SPI driver for ST-Ericsson CW1200 device
      4 *
      5 * Copyright (c) 2011, Sagrad Inc.
      6 * Author:  Solomon Peachy <speachy@sagrad.com>
      7 *
      8 * Based on cw1200_sdio.c
      9 * Copyright (c) 2010, ST-Ericsson
     10 * Author: Dmitry Tarnyagin <dmitry.tarnyagin@lockless.no>
     11 */
     12
     13#include <linux/module.h>
     14#include <linux/gpio.h>
     15#include <linux/delay.h>
     16#include <linux/spinlock.h>
     17#include <linux/interrupt.h>
     18#include <net/mac80211.h>
     19
     20#include <linux/spi/spi.h>
     21#include <linux/device.h>
     22
     23#include "cw1200.h"
     24#include "hwbus.h"
     25#include <linux/platform_data/net-cw1200.h>
     26#include "hwio.h"
     27
     28MODULE_AUTHOR("Solomon Peachy <speachy@sagrad.com>");
     29MODULE_DESCRIPTION("mac80211 ST-Ericsson CW1200 SPI driver");
     30MODULE_LICENSE("GPL");
     31MODULE_ALIAS("spi:cw1200_wlan_spi");
     32
     33/* #define SPI_DEBUG */
     34
     35struct hwbus_priv {
     36	struct spi_device	*func;
     37	struct cw1200_common	*core;
     38	const struct cw1200_platform_data_spi *pdata;
     39	spinlock_t		lock; /* Serialize all bus operations */
     40	wait_queue_head_t       wq;
     41	int claimed;
     42};
     43
     44#define SDIO_TO_SPI_ADDR(addr) ((addr & 0x1f)>>2)
     45#define SET_WRITE 0x7FFF /* usage: and operation */
     46#define SET_READ 0x8000  /* usage: or operation */
     47
     48/* Notes on byte ordering:
     49   LE:  B0 B1 B2 B3
     50   BE:  B3 B2 B1 B0
     51
     52   Hardware expects 32-bit data to be written as 16-bit BE words:
     53
     54   B1 B0 B3 B2
     55*/
     56
     57static int cw1200_spi_memcpy_fromio(struct hwbus_priv *self,
     58				     unsigned int addr,
     59				     void *dst, int count)
     60{
     61	int ret, i;
     62	u16 regaddr;
     63	struct spi_message      m;
     64
     65	struct spi_transfer     t_addr = {
     66		.tx_buf         = &regaddr,
     67		.len            = sizeof(regaddr),
     68	};
     69	struct spi_transfer     t_msg = {
     70		.rx_buf         = dst,
     71		.len            = count,
     72	};
     73
     74	regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
     75	regaddr |= SET_READ;
     76	regaddr |= (count>>1);
     77
     78#ifdef SPI_DEBUG
     79	pr_info("READ : %04d from 0x%02x (%04x)\n", count, addr, regaddr);
     80#endif
     81
     82	/* Header is LE16 */
     83	regaddr = cpu_to_le16(regaddr);
     84
     85	/* We have to byteswap if the SPI bus is limited to 8b operation
     86	   or we are running on a Big Endian system
     87	*/
     88#if defined(__LITTLE_ENDIAN)
     89	if (self->func->bits_per_word == 8)
     90#endif
     91		regaddr = swab16(regaddr);
     92
     93	spi_message_init(&m);
     94	spi_message_add_tail(&t_addr, &m);
     95	spi_message_add_tail(&t_msg, &m);
     96	ret = spi_sync(self->func, &m);
     97
     98#ifdef SPI_DEBUG
     99	pr_info("READ : ");
    100	for (i = 0; i < t_addr.len; i++)
    101		printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
    102	printk(" : ");
    103	for (i = 0; i < t_msg.len; i++)
    104		printk("%02x ", ((u8 *)t_msg.rx_buf)[i]);
    105	printk("\n");
    106#endif
    107
    108	/* We have to byteswap if the SPI bus is limited to 8b operation
    109	   or we are running on a Big Endian system
    110	*/
    111#if defined(__LITTLE_ENDIAN)
    112	if (self->func->bits_per_word == 8)
    113#endif
    114	{
    115		uint16_t *buf = (uint16_t *)dst;
    116		for (i = 0; i < ((count + 1) >> 1); i++)
    117			buf[i] = swab16(buf[i]);
    118	}
    119
    120	return ret;
    121}
    122
    123static int cw1200_spi_memcpy_toio(struct hwbus_priv *self,
    124				   unsigned int addr,
    125				   const void *src, int count)
    126{
    127	int rval, i;
    128	u16 regaddr;
    129	struct spi_transfer     t_addr = {
    130		.tx_buf         = &regaddr,
    131		.len            = sizeof(regaddr),
    132	};
    133	struct spi_transfer     t_msg = {
    134		.tx_buf         = src,
    135		.len            = count,
    136	};
    137	struct spi_message      m;
    138
    139	regaddr = (SDIO_TO_SPI_ADDR(addr))<<12;
    140	regaddr &= SET_WRITE;
    141	regaddr |= (count>>1);
    142
    143#ifdef SPI_DEBUG
    144	pr_info("WRITE: %04d  to  0x%02x (%04x)\n", count, addr, regaddr);
    145#endif
    146
    147	/* Header is LE16 */
    148	regaddr = cpu_to_le16(regaddr);
    149
    150	/* We have to byteswap if the SPI bus is limited to 8b operation
    151	   or we are running on a Big Endian system
    152	*/
    153#if defined(__LITTLE_ENDIAN)
    154	if (self->func->bits_per_word == 8)
    155#endif
    156	{
    157		uint16_t *buf = (uint16_t *)src;
    158	        regaddr = swab16(regaddr);
    159		for (i = 0; i < ((count + 1) >> 1); i++)
    160			buf[i] = swab16(buf[i]);
    161	}
    162
    163#ifdef SPI_DEBUG
    164	pr_info("WRITE: ");
    165	for (i = 0; i < t_addr.len; i++)
    166		printk("%02x ", ((u8 *)t_addr.tx_buf)[i]);
    167	printk(" : ");
    168	for (i = 0; i < t_msg.len; i++)
    169		printk("%02x ", ((u8 *)t_msg.tx_buf)[i]);
    170	printk("\n");
    171#endif
    172
    173	spi_message_init(&m);
    174	spi_message_add_tail(&t_addr, &m);
    175	spi_message_add_tail(&t_msg, &m);
    176	rval = spi_sync(self->func, &m);
    177
    178#ifdef SPI_DEBUG
    179	pr_info("WROTE: %d\n", m.actual_length);
    180#endif
    181
    182#if defined(__LITTLE_ENDIAN)
    183	/* We have to byteswap if the SPI bus is limited to 8b operation */
    184	if (self->func->bits_per_word == 8)
    185#endif
    186	{
    187		uint16_t *buf = (uint16_t *)src;
    188		for (i = 0; i < ((count + 1) >> 1); i++)
    189			buf[i] = swab16(buf[i]);
    190	}
    191	return rval;
    192}
    193
    194static void cw1200_spi_lock(struct hwbus_priv *self)
    195{
    196	unsigned long flags;
    197
    198	DECLARE_WAITQUEUE(wait, current);
    199
    200	might_sleep();
    201
    202	add_wait_queue(&self->wq, &wait);
    203	spin_lock_irqsave(&self->lock, flags);
    204	while (1) {
    205		set_current_state(TASK_UNINTERRUPTIBLE);
    206		if (!self->claimed)
    207			break;
    208		spin_unlock_irqrestore(&self->lock, flags);
    209		schedule();
    210		spin_lock_irqsave(&self->lock, flags);
    211	}
    212	set_current_state(TASK_RUNNING);
    213	self->claimed = 1;
    214	spin_unlock_irqrestore(&self->lock, flags);
    215	remove_wait_queue(&self->wq, &wait);
    216
    217	return;
    218}
    219
    220static void cw1200_spi_unlock(struct hwbus_priv *self)
    221{
    222	unsigned long flags;
    223
    224	spin_lock_irqsave(&self->lock, flags);
    225	self->claimed = 0;
    226	spin_unlock_irqrestore(&self->lock, flags);
    227	wake_up(&self->wq);
    228
    229	return;
    230}
    231
    232static irqreturn_t cw1200_spi_irq_handler(int irq, void *dev_id)
    233{
    234	struct hwbus_priv *self = dev_id;
    235
    236	if (self->core) {
    237		cw1200_spi_lock(self);
    238		cw1200_irq_handler(self->core);
    239		cw1200_spi_unlock(self);
    240		return IRQ_HANDLED;
    241	} else {
    242		return IRQ_NONE;
    243	}
    244}
    245
    246static int cw1200_spi_irq_subscribe(struct hwbus_priv *self)
    247{
    248	int ret;
    249
    250	pr_debug("SW IRQ subscribe\n");
    251
    252	ret = request_threaded_irq(self->func->irq, NULL,
    253				   cw1200_spi_irq_handler,
    254				   IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
    255				   "cw1200_wlan_irq", self);
    256	if (WARN_ON(ret < 0))
    257		goto exit;
    258
    259	ret = enable_irq_wake(self->func->irq);
    260	if (WARN_ON(ret))
    261		goto free_irq;
    262
    263	return 0;
    264
    265free_irq:
    266	free_irq(self->func->irq, self);
    267exit:
    268	return ret;
    269}
    270
    271static void cw1200_spi_irq_unsubscribe(struct hwbus_priv *self)
    272{
    273	pr_debug("SW IRQ unsubscribe\n");
    274	disable_irq_wake(self->func->irq);
    275	free_irq(self->func->irq, self);
    276}
    277
    278static int cw1200_spi_off(const struct cw1200_platform_data_spi *pdata)
    279{
    280	if (pdata->reset) {
    281		gpio_set_value(pdata->reset, 0);
    282		msleep(30); /* Min is 2 * CLK32K cycles */
    283		gpio_free(pdata->reset);
    284	}
    285
    286	if (pdata->power_ctrl)
    287		pdata->power_ctrl(pdata, false);
    288	if (pdata->clk_ctrl)
    289		pdata->clk_ctrl(pdata, false);
    290
    291	return 0;
    292}
    293
    294static int cw1200_spi_on(const struct cw1200_platform_data_spi *pdata)
    295{
    296	/* Ensure I/Os are pulled low */
    297	if (pdata->reset) {
    298		gpio_request(pdata->reset, "cw1200_wlan_reset");
    299		gpio_direction_output(pdata->reset, 0);
    300	}
    301	if (pdata->powerup) {
    302		gpio_request(pdata->powerup, "cw1200_wlan_powerup");
    303		gpio_direction_output(pdata->powerup, 0);
    304	}
    305	if (pdata->reset || pdata->powerup)
    306		msleep(10); /* Settle time? */
    307
    308	/* Enable 3v3 and 1v8 to hardware */
    309	if (pdata->power_ctrl) {
    310		if (pdata->power_ctrl(pdata, true)) {
    311			pr_err("power_ctrl() failed!\n");
    312			return -1;
    313		}
    314	}
    315
    316	/* Enable CLK32K */
    317	if (pdata->clk_ctrl) {
    318		if (pdata->clk_ctrl(pdata, true)) {
    319			pr_err("clk_ctrl() failed!\n");
    320			return -1;
    321		}
    322		msleep(10); /* Delay until clock is stable for 2 cycles */
    323	}
    324
    325	/* Enable POWERUP signal */
    326	if (pdata->powerup) {
    327		gpio_set_value(pdata->powerup, 1);
    328		msleep(250); /* or more..? */
    329	}
    330	/* Enable RSTn signal */
    331	if (pdata->reset) {
    332		gpio_set_value(pdata->reset, 1);
    333		msleep(50); /* Or more..? */
    334	}
    335	return 0;
    336}
    337
    338static size_t cw1200_spi_align_size(struct hwbus_priv *self, size_t size)
    339{
    340	return size & 1 ? size + 1 : size;
    341}
    342
    343static int cw1200_spi_pm(struct hwbus_priv *self, bool suspend)
    344{
    345	return irq_set_irq_wake(self->func->irq, suspend);
    346}
    347
    348static const struct hwbus_ops cw1200_spi_hwbus_ops = {
    349	.hwbus_memcpy_fromio	= cw1200_spi_memcpy_fromio,
    350	.hwbus_memcpy_toio	= cw1200_spi_memcpy_toio,
    351	.lock			= cw1200_spi_lock,
    352	.unlock			= cw1200_spi_unlock,
    353	.align_size		= cw1200_spi_align_size,
    354	.power_mgmt		= cw1200_spi_pm,
    355};
    356
    357/* Probe Function to be called by SPI stack when device is discovered */
    358static int cw1200_spi_probe(struct spi_device *func)
    359{
    360	const struct cw1200_platform_data_spi *plat_data =
    361		dev_get_platdata(&func->dev);
    362	struct hwbus_priv *self;
    363	int status;
    364
    365	/* Sanity check speed */
    366	if (func->max_speed_hz > 52000000)
    367		func->max_speed_hz = 52000000;
    368	if (func->max_speed_hz < 1000000)
    369		func->max_speed_hz = 1000000;
    370
    371	/* Fix up transfer size */
    372	if (plat_data->spi_bits_per_word)
    373		func->bits_per_word = plat_data->spi_bits_per_word;
    374	if (!func->bits_per_word)
    375		func->bits_per_word = 16;
    376
    377	/* And finally.. */
    378	func->mode = SPI_MODE_0;
    379
    380	pr_info("cw1200_wlan_spi: Probe called (CS %d M %d BPW %d CLK %d)\n",
    381		func->chip_select, func->mode, func->bits_per_word,
    382		func->max_speed_hz);
    383
    384	if (cw1200_spi_on(plat_data)) {
    385		pr_err("spi_on() failed!\n");
    386		return -1;
    387	}
    388
    389	if (spi_setup(func)) {
    390		pr_err("spi_setup() failed!\n");
    391		return -1;
    392	}
    393
    394	self = devm_kzalloc(&func->dev, sizeof(*self), GFP_KERNEL);
    395	if (!self) {
    396		pr_err("Can't allocate SPI hwbus_priv.");
    397		return -ENOMEM;
    398	}
    399
    400	self->pdata = plat_data;
    401	self->func = func;
    402	spin_lock_init(&self->lock);
    403
    404	spi_set_drvdata(func, self);
    405
    406	init_waitqueue_head(&self->wq);
    407
    408	status = cw1200_spi_irq_subscribe(self);
    409
    410	status = cw1200_core_probe(&cw1200_spi_hwbus_ops,
    411				   self, &func->dev, &self->core,
    412				   self->pdata->ref_clk,
    413				   self->pdata->macaddr,
    414				   self->pdata->sdd_file,
    415				   self->pdata->have_5ghz);
    416
    417	if (status) {
    418		cw1200_spi_irq_unsubscribe(self);
    419		cw1200_spi_off(plat_data);
    420	}
    421
    422	return status;
    423}
    424
    425/* Disconnect Function to be called by SPI stack when device is disconnected */
    426static void cw1200_spi_disconnect(struct spi_device *func)
    427{
    428	struct hwbus_priv *self = spi_get_drvdata(func);
    429
    430	if (self) {
    431		cw1200_spi_irq_unsubscribe(self);
    432		if (self->core) {
    433			cw1200_core_release(self->core);
    434			self->core = NULL;
    435		}
    436	}
    437	cw1200_spi_off(dev_get_platdata(&func->dev));
    438}
    439
    440static int __maybe_unused cw1200_spi_suspend(struct device *dev)
    441{
    442	struct hwbus_priv *self = spi_get_drvdata(to_spi_device(dev));
    443
    444	if (!cw1200_can_suspend(self->core))
    445		return -EAGAIN;
    446
    447	/* XXX notify host that we have to keep CW1200 powered on? */
    448	return 0;
    449}
    450
    451static SIMPLE_DEV_PM_OPS(cw1200_pm_ops, cw1200_spi_suspend, NULL);
    452
    453static struct spi_driver spi_driver = {
    454	.probe		= cw1200_spi_probe,
    455	.remove		= cw1200_spi_disconnect,
    456	.driver = {
    457		.name		= "cw1200_wlan_spi",
    458		.pm		= IS_ENABLED(CONFIG_PM) ? &cw1200_pm_ops : NULL,
    459	},
    460};
    461
    462module_spi_driver(spi_driver);