cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rx.h (2571B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * This file is part of wl1251
      4 *
      5 * Copyright (c) 1998-2007 Texas Instruments Incorporated
      6 * Copyright (C) 2008 Nokia Corporation
      7 */
      8
      9#ifndef __WL1251_RX_H__
     10#define __WL1251_RX_H__
     11
     12#include <linux/bitops.h>
     13
     14#include "wl1251.h"
     15
     16/*
     17 * RX PATH
     18 *
     19 * The Rx path uses a double buffer and an rx_contro structure, each located
     20 * at a fixed address in the device memory. The host keeps track of which
     21 * buffer is available and alternates between them on a per packet basis.
     22 * The size of each of the two buffers is large enough to hold the longest
     23 * 802.3 packet.
     24 * The RX path goes like that:
     25 * 1) The target generates an interrupt each time a new packet is received.
     26 *   There are 2 RX interrupts, one for each buffer.
     27 * 2) The host reads the received packet from one of the double buffers.
     28 * 3) The host triggers a target interrupt.
     29 * 4) The target prepares the next RX packet.
     30 */
     31
     32#define WL1251_RX_MAX_RSSI -30
     33#define WL1251_RX_MIN_RSSI -95
     34
     35#define WL1251_RX_ALIGN_TO 4
     36#define WL1251_RX_ALIGN(len) (((len) + WL1251_RX_ALIGN_TO - 1) & \
     37			     ~(WL1251_RX_ALIGN_TO - 1))
     38
     39#define SHORT_PREAMBLE_BIT   BIT(0)
     40#define OFDM_RATE_BIT        BIT(6)
     41#define PBCC_RATE_BIT        BIT(7)
     42
     43#define PLCP_HEADER_LENGTH 8
     44#define RX_DESC_PACKETID_SHIFT 11
     45#define RX_MAX_PACKET_ID 3
     46
     47#define RX_DESC_VALID_FCS         0x0001
     48#define RX_DESC_MATCH_RXADDR1     0x0002
     49#define RX_DESC_MCAST             0x0004
     50#define RX_DESC_STAINTIM          0x0008
     51#define RX_DESC_VIRTUAL_BM        0x0010
     52#define RX_DESC_BCAST             0x0020
     53#define RX_DESC_MATCH_SSID        0x0040
     54#define RX_DESC_MATCH_BSSID       0x0080
     55#define RX_DESC_ENCRYPTION_MASK   0x0300
     56#define RX_DESC_MEASURMENT        0x0400
     57#define RX_DESC_SEQNUM_MASK       0x1800
     58#define	RX_DESC_MIC_FAIL	  0x2000
     59#define	RX_DESC_DECRYPT_FAIL	  0x4000
     60
     61struct wl1251_rx_descriptor {
     62	u32 timestamp; /* In microseconds */
     63	u16 length; /* Paylod length, including headers */
     64	u16 flags;
     65
     66	/*
     67	 * 0 - 802.11
     68	 * 1 - 802.3
     69	 * 2 - IP
     70	 * 3 - Raw Codec
     71	 */
     72	u8 type;
     73
     74	/*
     75	 * Received Rate:
     76	 * 0x0A - 1MBPS
     77	 * 0x14 - 2MBPS
     78	 * 0x37 - 5_5MBPS
     79	 * 0x0B - 6MBPS
     80	 * 0x0F - 9MBPS
     81	 * 0x6E - 11MBPS
     82	 * 0x0A - 12MBPS
     83	 * 0x0E - 18MBPS
     84	 * 0xDC - 22MBPS
     85	 * 0x09 - 24MBPS
     86	 * 0x0D - 36MBPS
     87	 * 0x08 - 48MBPS
     88	 * 0x0C - 54MBPS
     89	 */
     90	u8 rate;
     91
     92	u8 mod_pre; /* Modulation and preamble */
     93	u8 channel;
     94
     95	/*
     96	 * 0 - 2.4 Ghz
     97	 * 1 - 5 Ghz
     98	 */
     99	u8 band;
    100
    101	s8 rssi; /* in dB */
    102	u8 rcpi; /* in dB */
    103	u8 snr; /* in dB */
    104} __packed;
    105
    106void wl1251_rx(struct wl1251 *wl);
    107
    108#endif