cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spi.h (1358B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * This file is part of wl1251
      4 *
      5 * Copyright (c) 1998-2007 Texas Instruments Incorporated
      6 * Copyright (C) 2008 Nokia Corporation
      7 */
      8
      9#ifndef __WL1251_SPI_H__
     10#define __WL1251_SPI_H__
     11
     12#include "cmd.h"
     13#include "acx.h"
     14#include "reg.h"
     15
     16#define WSPI_CMD_READ                 0x40000000
     17#define WSPI_CMD_WRITE                0x00000000
     18#define WSPI_CMD_FIXED                0x20000000
     19#define WSPI_CMD_BYTE_LENGTH          0x1FFE0000
     20#define WSPI_CMD_BYTE_LENGTH_OFFSET   17
     21#define WSPI_CMD_BYTE_ADDR            0x0001FFFF
     22
     23#define WSPI_INIT_CMD_CRC_LEN       5
     24
     25#define WSPI_INIT_CMD_START         0x00
     26#define WSPI_INIT_CMD_TX            0x40
     27/* the extra bypass bit is sampled by the TNET as '1' */
     28#define WSPI_INIT_CMD_BYPASS_BIT    0x80
     29#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
     30#define WSPI_INIT_CMD_EN_FIXEDBUSY  0x80
     31#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
     32#define WSPI_INIT_CMD_IOD           0x40
     33#define WSPI_INIT_CMD_IP            0x20
     34#define WSPI_INIT_CMD_CS            0x10
     35#define WSPI_INIT_CMD_WS            0x08
     36#define WSPI_INIT_CMD_WSPI          0x01
     37#define WSPI_INIT_CMD_END           0x01
     38
     39#define WSPI_INIT_CMD_LEN           8
     40
     41#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
     42		((WL1251_BUSY_WORD_LEN - 4) / sizeof(u32))
     43#define HW_ACCESS_WSPI_INIT_CMD_MASK  0
     44
     45#endif /* __WL1251_SPI_H__ */