cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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io.c (1088B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * This file is part of wl18xx
      4 *
      5 * Copyright (C) 2011 Texas Instruments
      6 */
      7
      8#include "../wlcore/wlcore.h"
      9#include "../wlcore/io.h"
     10
     11#include "io.h"
     12
     13int wl18xx_top_reg_write(struct wl1271 *wl, int addr, u16 val)
     14{
     15	u32 tmp;
     16	int ret;
     17
     18	if (WARN_ON(addr % 2))
     19		return -EINVAL;
     20
     21	if ((addr % 4) == 0) {
     22		ret = wlcore_read32(wl, addr, &tmp);
     23		if (ret < 0)
     24			goto out;
     25
     26		tmp = (tmp & 0xffff0000) | val;
     27		ret = wlcore_write32(wl, addr, tmp);
     28	} else {
     29		ret = wlcore_read32(wl, addr - 2, &tmp);
     30		if (ret < 0)
     31			goto out;
     32
     33		tmp = (tmp & 0xffff) | (val << 16);
     34		ret = wlcore_write32(wl, addr - 2, tmp);
     35	}
     36
     37out:
     38	return ret;
     39}
     40
     41int wl18xx_top_reg_read(struct wl1271 *wl, int addr, u16 *out)
     42{
     43	u32 val = 0;
     44	int ret;
     45
     46	if (WARN_ON(addr % 2))
     47		return -EINVAL;
     48
     49	if ((addr % 4) == 0) {
     50		/* address is 4-bytes aligned */
     51		ret = wlcore_read32(wl, addr, &val);
     52		if (ret >= 0 && out)
     53			*out = val & 0xffff;
     54	} else {
     55		ret = wlcore_read32(wl, addr - 2, &val);
     56		if (ret >= 0 && out)
     57			*out = (val & 0xffff0000) >> 16;
     58	}
     59
     60	return ret;
     61}