cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

io.h (6039B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * This file is part of wl1271
      4 *
      5 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
      6 * Copyright (C) 2008-2010 Nokia Corporation
      7 *
      8 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
      9 */
     10
     11#ifndef __IO_H__
     12#define __IO_H__
     13
     14#include <linux/irqreturn.h>
     15
     16#define HW_ACCESS_MEMORY_MAX_RANGE	0x1FFC0
     17
     18#define HW_PARTITION_REGISTERS_ADDR     0x1FFC0
     19#define HW_PART0_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR)
     20#define HW_PART0_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 4)
     21#define HW_PART1_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 8)
     22#define HW_PART1_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 12)
     23#define HW_PART2_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 16)
     24#define HW_PART2_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 20)
     25#define HW_PART3_SIZE_ADDR              (HW_PARTITION_REGISTERS_ADDR + 24)
     26#define HW_PART3_START_ADDR             (HW_PARTITION_REGISTERS_ADDR + 28)
     27
     28#define HW_ACCESS_REGISTER_SIZE         4
     29
     30#define HW_ACCESS_PRAM_MAX_RANGE	0x3c000
     31
     32struct wl1271;
     33
     34void wlcore_disable_interrupts(struct wl1271 *wl);
     35void wlcore_disable_interrupts_nosync(struct wl1271 *wl);
     36void wlcore_enable_interrupts(struct wl1271 *wl);
     37void wlcore_synchronize_interrupts(struct wl1271 *wl);
     38
     39void wl1271_io_reset(struct wl1271 *wl);
     40void wl1271_io_init(struct wl1271 *wl);
     41int wlcore_translate_addr(struct wl1271 *wl, int addr);
     42
     43/* Raw target IO, address is not translated */
     44static inline int __must_check wlcore_raw_write(struct wl1271 *wl, int addr,
     45						void *buf, size_t len,
     46						bool fixed)
     47{
     48	int ret;
     49
     50	if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
     51	    WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
     52		     addr != HW_ACCESS_ELP_CTRL_REG)))
     53		return -EIO;
     54
     55	ret = wl->if_ops->write(wl->dev, addr, buf, len, fixed);
     56	if (ret && wl->state != WLCORE_STATE_OFF)
     57		set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
     58
     59	return ret;
     60}
     61
     62static inline int __must_check wlcore_raw_read(struct wl1271 *wl, int addr,
     63					       void *buf, size_t len,
     64					       bool fixed)
     65{
     66	int ret;
     67
     68	if (test_bit(WL1271_FLAG_IO_FAILED, &wl->flags) ||
     69	    WARN_ON((test_bit(WL1271_FLAG_IN_ELP, &wl->flags) &&
     70		     addr != HW_ACCESS_ELP_CTRL_REG)))
     71		return -EIO;
     72
     73	ret = wl->if_ops->read(wl->dev, addr, buf, len, fixed);
     74	if (ret && wl->state != WLCORE_STATE_OFF)
     75		set_bit(WL1271_FLAG_IO_FAILED, &wl->flags);
     76
     77	return ret;
     78}
     79
     80static inline int __must_check wlcore_raw_read_data(struct wl1271 *wl, int reg,
     81						    void *buf, size_t len,
     82						    bool fixed)
     83{
     84	return wlcore_raw_read(wl, wl->rtable[reg], buf, len, fixed);
     85}
     86
     87static inline int __must_check wlcore_raw_write_data(struct wl1271 *wl, int reg,
     88						     void *buf, size_t len,
     89						     bool fixed)
     90{
     91	return wlcore_raw_write(wl, wl->rtable[reg], buf, len, fixed);
     92}
     93
     94static inline int __must_check wlcore_raw_read32(struct wl1271 *wl, int addr,
     95						 u32 *val)
     96{
     97	int ret;
     98
     99	ret = wlcore_raw_read(wl, addr, wl->buffer_32,
    100			      sizeof(*wl->buffer_32), false);
    101	if (ret < 0)
    102		return ret;
    103
    104	if (val)
    105		*val = le32_to_cpu(*wl->buffer_32);
    106
    107	return 0;
    108}
    109
    110static inline int __must_check wlcore_raw_write32(struct wl1271 *wl, int addr,
    111						  u32 val)
    112{
    113	*wl->buffer_32 = cpu_to_le32(val);
    114	return wlcore_raw_write(wl, addr, wl->buffer_32,
    115				sizeof(*wl->buffer_32), false);
    116}
    117
    118static inline int __must_check wlcore_read(struct wl1271 *wl, int addr,
    119					   void *buf, size_t len, bool fixed)
    120{
    121	int physical;
    122
    123	physical = wlcore_translate_addr(wl, addr);
    124
    125	return wlcore_raw_read(wl, physical, buf, len, fixed);
    126}
    127
    128static inline int __must_check wlcore_write(struct wl1271 *wl, int addr,
    129					    void *buf, size_t len, bool fixed)
    130{
    131	int physical;
    132
    133	physical = wlcore_translate_addr(wl, addr);
    134
    135	return wlcore_raw_write(wl, physical, buf, len, fixed);
    136}
    137
    138static inline int __must_check wlcore_write_data(struct wl1271 *wl, int reg,
    139						 void *buf, size_t len,
    140						 bool fixed)
    141{
    142	return wlcore_write(wl, wl->rtable[reg], buf, len, fixed);
    143}
    144
    145static inline int __must_check wlcore_read_data(struct wl1271 *wl, int reg,
    146						void *buf, size_t len,
    147						bool fixed)
    148{
    149	return wlcore_read(wl, wl->rtable[reg], buf, len, fixed);
    150}
    151
    152static inline int __must_check wlcore_read_hwaddr(struct wl1271 *wl, int hwaddr,
    153						  void *buf, size_t len,
    154						  bool fixed)
    155{
    156	int physical;
    157	int addr;
    158
    159	/* Convert from FW internal address which is chip arch dependent */
    160	addr = wl->ops->convert_hwaddr(wl, hwaddr);
    161
    162	physical = wlcore_translate_addr(wl, addr);
    163
    164	return wlcore_raw_read(wl, physical, buf, len, fixed);
    165}
    166
    167static inline int __must_check wlcore_read32(struct wl1271 *wl, int addr,
    168					     u32 *val)
    169{
    170	return wlcore_raw_read32(wl, wlcore_translate_addr(wl, addr), val);
    171}
    172
    173static inline int __must_check wlcore_write32(struct wl1271 *wl, int addr,
    174					      u32 val)
    175{
    176	return wlcore_raw_write32(wl, wlcore_translate_addr(wl, addr), val);
    177}
    178
    179static inline int __must_check wlcore_read_reg(struct wl1271 *wl, int reg,
    180					       u32 *val)
    181{
    182	return wlcore_raw_read32(wl,
    183				 wlcore_translate_addr(wl, wl->rtable[reg]),
    184				 val);
    185}
    186
    187static inline int __must_check wlcore_write_reg(struct wl1271 *wl, int reg,
    188						u32 val)
    189{
    190	return wlcore_raw_write32(wl,
    191				  wlcore_translate_addr(wl, wl->rtable[reg]),
    192				  val);
    193}
    194
    195static inline void wl1271_power_off(struct wl1271 *wl)
    196{
    197	int ret = 0;
    198
    199	if (!test_bit(WL1271_FLAG_GPIO_POWER, &wl->flags))
    200		return;
    201
    202	if (wl->if_ops->power)
    203		ret = wl->if_ops->power(wl->dev, false);
    204	if (!ret)
    205		clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
    206}
    207
    208static inline int wl1271_power_on(struct wl1271 *wl)
    209{
    210	int ret = 0;
    211
    212	if (wl->if_ops->power)
    213		ret = wl->if_ops->power(wl->dev, true);
    214	if (ret == 0)
    215		set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
    216
    217	return ret;
    218}
    219
    220int wlcore_set_partition(struct wl1271 *wl,
    221			 const struct wlcore_partition_set *p);
    222
    223bool wl1271_set_block_size(struct wl1271 *wl);
    224
    225/* Functions from wl1271_main.c */
    226
    227int wl1271_tx_dummy_packet(struct wl1271 *wl);
    228
    229#endif