cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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t7xx_hif_dpmaif.h (4937B)

      1/* SPDX-License-Identifier: GPL-2.0-only
      2 *
      3 * Copyright (c) 2021, MediaTek Inc.
      4 * Copyright (c) 2021-2022, Intel Corporation.
      5 *
      6 * Authors:
      7 *  Amir Hanania <amir.hanania@intel.com>
      8 *  Haijun Liu <haijun.liu@mediatek.com>
      9 *  Moises Veleta <moises.veleta@intel.com>
     10 *  Ricardo Martinez <ricardo.martinez@linux.intel.com>
     11 *
     12 * Contributors:
     13 *  Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
     14 *  Eliot Lee <eliot.lee@intel.com>
     15 *  Sreehari Kancharla <sreehari.kancharla@intel.com>
     16 */
     17
     18#ifndef __T7XX_HIF_DPMAIF_H__
     19#define __T7XX_HIF_DPMAIF_H__
     20
     21#include <linux/bitmap.h>
     22#include <linux/mm_types.h>
     23#include <linux/sched.h>
     24#include <linux/skbuff.h>
     25#include <linux/spinlock.h>
     26#include <linux/types.h>
     27#include <linux/wait.h>
     28#include <linux/workqueue.h>
     29
     30#include "t7xx_dpmaif.h"
     31#include "t7xx_pci.h"
     32#include "t7xx_state_monitor.h"
     33
     34/* SKB control buffer */
     35struct t7xx_skb_cb {
     36	u8	netif_idx;
     37	u8	txq_number;
     38	u8	rx_pkt_type;
     39};
     40
     41#define T7XX_SKB_CB(__skb)	((struct t7xx_skb_cb *)(__skb)->cb)
     42
     43enum dpmaif_rdwr {
     44	DPMAIF_READ,
     45	DPMAIF_WRITE,
     46};
     47
     48/* Structure of DL BAT */
     49struct dpmaif_cur_rx_skb_info {
     50	bool			msg_pit_received;
     51	struct sk_buff		*cur_skb;
     52	unsigned int		cur_chn_idx;
     53	unsigned int		check_sum;
     54	unsigned int		pit_dp;
     55	unsigned int		pkt_type;
     56	int			err_payload;
     57};
     58
     59struct dpmaif_bat {
     60	unsigned int		p_buffer_addr;
     61	unsigned int		buffer_addr_ext;
     62};
     63
     64struct dpmaif_bat_skb {
     65	struct sk_buff		*skb;
     66	dma_addr_t		data_bus_addr;
     67	unsigned int		data_len;
     68};
     69
     70struct dpmaif_bat_page {
     71	struct page		*page;
     72	dma_addr_t		data_bus_addr;
     73	unsigned int		offset;
     74	unsigned int		data_len;
     75};
     76
     77enum bat_type {
     78	BAT_TYPE_NORMAL,
     79	BAT_TYPE_FRAG,
     80};
     81
     82struct dpmaif_bat_request {
     83	void			*bat_base;
     84	dma_addr_t		bat_bus_addr;
     85	unsigned int		bat_size_cnt;
     86	unsigned int		bat_wr_idx;
     87	unsigned int		bat_release_rd_idx;
     88	void			*bat_skb;
     89	unsigned int		pkt_buf_sz;
     90	unsigned long		*bat_bitmap;
     91	atomic_t		refcnt;
     92	spinlock_t		mask_lock; /* Protects BAT mask */
     93	enum bat_type		type;
     94};
     95
     96struct dpmaif_rx_queue {
     97	unsigned int		index;
     98	bool			que_started;
     99	unsigned int		budget;
    100
    101	void			*pit_base;
    102	dma_addr_t		pit_bus_addr;
    103	unsigned int		pit_size_cnt;
    104
    105	unsigned int		pit_rd_idx;
    106	unsigned int		pit_wr_idx;
    107	unsigned int		pit_release_rd_idx;
    108
    109	struct dpmaif_bat_request *bat_req;
    110	struct dpmaif_bat_request *bat_frag;
    111
    112	wait_queue_head_t	rx_wq;
    113	struct task_struct	*rx_thread;
    114	struct sk_buff_head	skb_list;
    115	unsigned int		skb_list_max_len;
    116
    117	struct workqueue_struct	*worker;
    118	struct work_struct	dpmaif_rxq_work;
    119
    120	atomic_t		rx_processing;
    121
    122	struct dpmaif_ctrl	*dpmaif_ctrl;
    123	unsigned int		expect_pit_seq;
    124	unsigned int		pit_remain_release_cnt;
    125	struct dpmaif_cur_rx_skb_info rx_data_info;
    126};
    127
    128struct dpmaif_tx_queue {
    129	unsigned int		index;
    130	bool			que_started;
    131	atomic_t		tx_budget;
    132	void			*drb_base;
    133	dma_addr_t		drb_bus_addr;
    134	unsigned int		drb_size_cnt;
    135	unsigned int		drb_wr_idx;
    136	unsigned int		drb_rd_idx;
    137	unsigned int		drb_release_rd_idx;
    138	void			*drb_skb_base;
    139	wait_queue_head_t	req_wq;
    140	struct workqueue_struct	*worker;
    141	struct work_struct	dpmaif_tx_work;
    142	spinlock_t		tx_lock; /* Protects txq DRB */
    143	atomic_t		tx_processing;
    144
    145	struct dpmaif_ctrl	*dpmaif_ctrl;
    146	struct sk_buff_head	tx_skb_head;
    147};
    148
    149struct dpmaif_isr_para {
    150	struct dpmaif_ctrl	*dpmaif_ctrl;
    151	unsigned char		pcie_int;
    152	unsigned char		dlq_id;
    153};
    154
    155enum dpmaif_state {
    156	DPMAIF_STATE_MIN,
    157	DPMAIF_STATE_PWROFF,
    158	DPMAIF_STATE_PWRON,
    159	DPMAIF_STATE_EXCEPTION,
    160	DPMAIF_STATE_MAX
    161};
    162
    163enum dpmaif_txq_state {
    164	DMPAIF_TXQ_STATE_IRQ,
    165	DMPAIF_TXQ_STATE_FULL,
    166};
    167
    168struct dpmaif_callbacks {
    169	void (*state_notify)(struct t7xx_pci_dev *t7xx_dev,
    170			     enum dpmaif_txq_state state, int txq_number);
    171	void (*recv_skb)(struct t7xx_pci_dev *t7xx_dev, struct sk_buff *skb);
    172};
    173
    174struct dpmaif_ctrl {
    175	struct device			*dev;
    176	struct t7xx_pci_dev		*t7xx_dev;
    177	struct md_pm_entity		dpmaif_pm_entity;
    178	enum dpmaif_state		state;
    179	bool				dpmaif_sw_init_done;
    180	struct dpmaif_hw_info		hw_info;
    181	struct dpmaif_tx_queue		txq[DPMAIF_TXQ_NUM];
    182	struct dpmaif_rx_queue		rxq[DPMAIF_RXQ_NUM];
    183
    184	unsigned char			rxq_int_mapping[DPMAIF_RXQ_NUM];
    185	struct dpmaif_isr_para		isr_para[DPMAIF_RXQ_NUM];
    186
    187	struct dpmaif_bat_request	bat_req;
    188	struct dpmaif_bat_request	bat_frag;
    189	struct workqueue_struct		*bat_release_wq;
    190	struct work_struct		bat_release_work;
    191
    192	wait_queue_head_t		tx_wq;
    193	struct task_struct		*tx_thread;
    194
    195	struct dpmaif_callbacks		*callbacks;
    196};
    197
    198struct dpmaif_ctrl *t7xx_dpmaif_hif_init(struct t7xx_pci_dev *t7xx_dev,
    199					 struct dpmaif_callbacks *callbacks);
    200void t7xx_dpmaif_hif_exit(struct dpmaif_ctrl *dpmaif_ctrl);
    201int t7xx_dpmaif_md_state_callback(struct dpmaif_ctrl *dpmaif_ctrl, enum md_state state);
    202unsigned int t7xx_ring_buf_get_next_wr_idx(unsigned int buf_len, unsigned int buf_idx);
    203unsigned int t7xx_ring_buf_rd_wr_count(unsigned int total_cnt, unsigned int rd_idx,
    204				       unsigned int wr_idx, enum dpmaif_rdwr);
    205
    206#endif /* __T7XX_HIF_DPMAIF_H__ */