phy_common.c (1595B)
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Link Layer for Samsung S3FWRN5 NCI based Driver 4 * 5 * Copyright (C) 2015 Samsung Electrnoics 6 * Robert Baldyga <r.baldyga@samsung.com> 7 * Copyright (C) 2020 Samsung Electrnoics 8 * Bongsu Jeon <bongsu.jeon@samsung.com> 9 */ 10 11#include <linux/gpio.h> 12#include <linux/delay.h> 13#include <linux/module.h> 14 15#include "phy_common.h" 16 17void s3fwrn5_phy_set_wake(void *phy_id, bool wake) 18{ 19 struct phy_common *phy = phy_id; 20 21 mutex_lock(&phy->mutex); 22 gpio_set_value(phy->gpio_fw_wake, wake); 23 if (wake) 24 msleep(S3FWRN5_EN_WAIT_TIME); 25 mutex_unlock(&phy->mutex); 26} 27EXPORT_SYMBOL(s3fwrn5_phy_set_wake); 28 29bool s3fwrn5_phy_power_ctrl(struct phy_common *phy, enum s3fwrn5_mode mode) 30{ 31 if (phy->mode == mode) 32 return false; 33 34 phy->mode = mode; 35 36 gpio_set_value(phy->gpio_en, 1); 37 gpio_set_value(phy->gpio_fw_wake, 0); 38 if (mode == S3FWRN5_MODE_FW) 39 gpio_set_value(phy->gpio_fw_wake, 1); 40 41 if (mode != S3FWRN5_MODE_COLD) { 42 msleep(S3FWRN5_EN_WAIT_TIME); 43 gpio_set_value(phy->gpio_en, 0); 44 msleep(S3FWRN5_EN_WAIT_TIME); 45 } 46 47 return true; 48} 49EXPORT_SYMBOL(s3fwrn5_phy_power_ctrl); 50 51void s3fwrn5_phy_set_mode(void *phy_id, enum s3fwrn5_mode mode) 52{ 53 struct phy_common *phy = phy_id; 54 55 mutex_lock(&phy->mutex); 56 57 s3fwrn5_phy_power_ctrl(phy, mode); 58 59 mutex_unlock(&phy->mutex); 60} 61EXPORT_SYMBOL(s3fwrn5_phy_set_mode); 62 63enum s3fwrn5_mode s3fwrn5_phy_get_mode(void *phy_id) 64{ 65 struct phy_common *phy = phy_id; 66 enum s3fwrn5_mode mode; 67 68 mutex_lock(&phy->mutex); 69 70 mode = phy->mode; 71 72 mutex_unlock(&phy->mutex); 73 74 return mode; 75} 76EXPORT_SYMBOL(s3fwrn5_phy_get_mode);