cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sunxi_sid.c (5495B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Allwinner sunXi SoCs Security ID support.
      4 *
      5 * Copyright (c) 2013 Oliver Schinagl <oliver@schinagl.nl>
      6 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
      7 */
      8
      9#include <linux/device.h>
     10#include <linux/io.h>
     11#include <linux/iopoll.h>
     12#include <linux/module.h>
     13#include <linux/nvmem-provider.h>
     14#include <linux/of.h>
     15#include <linux/of_device.h>
     16#include <linux/platform_device.h>
     17#include <linux/slab.h>
     18#include <linux/random.h>
     19
     20/* Registers and special values for doing register-based SID readout on H3 */
     21#define SUN8I_SID_PRCTL		0x40
     22#define SUN8I_SID_RDKEY		0x60
     23
     24#define SUN8I_SID_OFFSET_MASK	0x1FF
     25#define SUN8I_SID_OFFSET_SHIFT	16
     26#define SUN8I_SID_OP_LOCK	(0xAC << 8)
     27#define SUN8I_SID_READ		BIT(1)
     28
     29struct sunxi_sid_cfg {
     30	u32	value_offset;
     31	u32	size;
     32	bool	need_register_readout;
     33};
     34
     35struct sunxi_sid {
     36	void __iomem		*base;
     37	u32			value_offset;
     38};
     39
     40static int sunxi_sid_read(void *context, unsigned int offset,
     41			  void *val, size_t bytes)
     42{
     43	struct sunxi_sid *sid = context;
     44
     45	memcpy_fromio(val, sid->base + sid->value_offset + offset, bytes);
     46
     47	return 0;
     48}
     49
     50static int sun8i_sid_register_readout(const struct sunxi_sid *sid,
     51				      const unsigned int offset,
     52				      u32 *out)
     53{
     54	u32 reg_val;
     55	int ret;
     56
     57	/* Set word, lock access, and set read command */
     58	reg_val = (offset & SUN8I_SID_OFFSET_MASK)
     59		  << SUN8I_SID_OFFSET_SHIFT;
     60	reg_val |= SUN8I_SID_OP_LOCK | SUN8I_SID_READ;
     61	writel(reg_val, sid->base + SUN8I_SID_PRCTL);
     62
     63	ret = readl_poll_timeout(sid->base + SUN8I_SID_PRCTL, reg_val,
     64				 !(reg_val & SUN8I_SID_READ), 100, 250000);
     65	if (ret)
     66		return ret;
     67
     68	if (out)
     69		*out = readl(sid->base + SUN8I_SID_RDKEY);
     70
     71	writel(0, sid->base + SUN8I_SID_PRCTL);
     72
     73	return 0;
     74}
     75
     76/*
     77 * On Allwinner H3, the value on the 0x200 offset of the SID controller seems
     78 * to be not reliable at all.
     79 * Read by the registers instead.
     80 */
     81static int sun8i_sid_read_by_reg(void *context, unsigned int offset,
     82				 void *val, size_t bytes)
     83{
     84	struct sunxi_sid *sid = context;
     85	u32 word;
     86	int ret;
     87
     88	/* .stride = 4 so offset is guaranteed to be aligned */
     89	while (bytes >= 4) {
     90		ret = sun8i_sid_register_readout(sid, offset, val);
     91		if (ret)
     92			return ret;
     93
     94		val += 4;
     95		offset += 4;
     96		bytes -= 4;
     97	}
     98
     99	if (!bytes)
    100		return 0;
    101
    102	/* Handle any trailing bytes */
    103	ret = sun8i_sid_register_readout(sid, offset, &word);
    104	if (ret)
    105		return ret;
    106
    107	memcpy(val, &word, bytes);
    108
    109	return 0;
    110}
    111
    112static int sunxi_sid_probe(struct platform_device *pdev)
    113{
    114	struct device *dev = &pdev->dev;
    115	struct resource *res;
    116	struct nvmem_config *nvmem_cfg;
    117	struct nvmem_device *nvmem;
    118	struct sunxi_sid *sid;
    119	int size;
    120	char *randomness;
    121	const struct sunxi_sid_cfg *cfg;
    122
    123	sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
    124	if (!sid)
    125		return -ENOMEM;
    126
    127	cfg = of_device_get_match_data(dev);
    128	if (!cfg)
    129		return -EINVAL;
    130	sid->value_offset = cfg->value_offset;
    131
    132	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
    133	sid->base = devm_ioremap_resource(dev, res);
    134	if (IS_ERR(sid->base))
    135		return PTR_ERR(sid->base);
    136
    137	size = cfg->size;
    138
    139	nvmem_cfg = devm_kzalloc(dev, sizeof(*nvmem_cfg), GFP_KERNEL);
    140	if (!nvmem_cfg)
    141		return -ENOMEM;
    142
    143	nvmem_cfg->dev = dev;
    144	nvmem_cfg->name = "sunxi-sid";
    145	nvmem_cfg->type = NVMEM_TYPE_OTP;
    146	nvmem_cfg->read_only = true;
    147	nvmem_cfg->size = cfg->size;
    148	nvmem_cfg->word_size = 1;
    149	nvmem_cfg->stride = 4;
    150	nvmem_cfg->priv = sid;
    151	if (cfg->need_register_readout)
    152		nvmem_cfg->reg_read = sun8i_sid_read_by_reg;
    153	else
    154		nvmem_cfg->reg_read = sunxi_sid_read;
    155
    156	nvmem = devm_nvmem_register(dev, nvmem_cfg);
    157	if (IS_ERR(nvmem))
    158		return PTR_ERR(nvmem);
    159
    160	randomness = kzalloc(size, GFP_KERNEL);
    161	if (!randomness)
    162		return -ENOMEM;
    163
    164	nvmem_cfg->reg_read(sid, 0, randomness, size);
    165	add_device_randomness(randomness, size);
    166	kfree(randomness);
    167
    168	platform_set_drvdata(pdev, nvmem);
    169
    170	return 0;
    171}
    172
    173static const struct sunxi_sid_cfg sun4i_a10_cfg = {
    174	.size = 0x10,
    175};
    176
    177static const struct sunxi_sid_cfg sun7i_a20_cfg = {
    178	.size = 0x200,
    179};
    180
    181static const struct sunxi_sid_cfg sun8i_h3_cfg = {
    182	.value_offset = 0x200,
    183	.size = 0x100,
    184	.need_register_readout = true,
    185};
    186
    187static const struct sunxi_sid_cfg sun20i_d1_cfg = {
    188	.value_offset = 0x200,
    189	.size = 0x100,
    190};
    191
    192static const struct sunxi_sid_cfg sun50i_a64_cfg = {
    193	.value_offset = 0x200,
    194	.size = 0x100,
    195	.need_register_readout = true,
    196};
    197
    198static const struct sunxi_sid_cfg sun50i_h6_cfg = {
    199	.value_offset = 0x200,
    200	.size = 0x200,
    201};
    202
    203static const struct of_device_id sunxi_sid_of_match[] = {
    204	{ .compatible = "allwinner,sun4i-a10-sid", .data = &sun4i_a10_cfg },
    205	{ .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
    206	{ .compatible = "allwinner,sun8i-a83t-sid", .data = &sun50i_a64_cfg },
    207	{ .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
    208	{ .compatible = "allwinner,sun20i-d1-sid", .data = &sun20i_d1_cfg },
    209	{ .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
    210	{ .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
    211	{ .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },
    212	{/* sentinel */},
    213};
    214MODULE_DEVICE_TABLE(of, sunxi_sid_of_match);
    215
    216static struct platform_driver sunxi_sid_driver = {
    217	.probe = sunxi_sid_probe,
    218	.driver = {
    219		.name = "eeprom-sunxi-sid",
    220		.of_match_table = sunxi_sid_of_match,
    221	},
    222};
    223module_platform_driver(sunxi_sid_driver);
    224
    225MODULE_AUTHOR("Oliver Schinagl <oliver@schinagl.nl>");
    226MODULE_DESCRIPTION("Allwinner sunxi security id driver");
    227MODULE_LICENSE("GPL");