cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pci-versatile.c (4936B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Copyright 2004 Koninklijke Philips Electronics NV
      4 *
      5 * Conversion to platform driver and DT:
      6 * Copyright 2014 Linaro Ltd.
      7 *
      8 * 14/04/2005 Initial version, colin.king@philips.com
      9 */
     10#include <linux/kernel.h>
     11#include <linux/module.h>
     12#include <linux/of_address.h>
     13#include <linux/of_pci.h>
     14#include <linux/of_platform.h>
     15#include <linux/pci.h>
     16#include <linux/platform_device.h>
     17
     18#include "../pci.h"
     19
     20static void __iomem *versatile_pci_base;
     21static void __iomem *versatile_cfg_base[2];
     22
     23#define PCI_IMAP(m)		(versatile_pci_base + ((m) * 4))
     24#define PCI_SMAP(m)		(versatile_pci_base + 0x14 + ((m) * 4))
     25#define PCI_SELFID		(versatile_pci_base + 0xc)
     26
     27#define VP_PCI_DEVICE_ID		0x030010ee
     28#define VP_PCI_CLASS_ID			0x0b400000
     29
     30static u32 pci_slot_ignore;
     31
     32static int __init versatile_pci_slot_ignore(char *str)
     33{
     34	int slot;
     35
     36	while (get_option(&str, &slot)) {
     37		if ((slot < 0) || (slot > 31))
     38			pr_err("Illegal slot value: %d\n", slot);
     39		else
     40			pci_slot_ignore |= (1 << slot);
     41	}
     42	return 1;
     43}
     44__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
     45
     46
     47static void __iomem *versatile_map_bus(struct pci_bus *bus,
     48				       unsigned int devfn, int offset)
     49{
     50	unsigned int busnr = bus->number;
     51
     52	if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
     53		return NULL;
     54
     55	return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
     56}
     57
     58static struct pci_ops pci_versatile_ops = {
     59	.map_bus = versatile_map_bus,
     60	.read	= pci_generic_config_read32,
     61	.write	= pci_generic_config_write,
     62};
     63
     64static int versatile_pci_probe(struct platform_device *pdev)
     65{
     66	struct device *dev = &pdev->dev;
     67	struct resource *res;
     68	struct resource_entry *entry;
     69	int i, myslot = -1, mem = 1;
     70	u32 val;
     71	void __iomem *local_pci_cfg_base;
     72	struct pci_host_bridge *bridge;
     73
     74	bridge = devm_pci_alloc_host_bridge(dev, 0);
     75	if (!bridge)
     76		return -ENOMEM;
     77
     78	versatile_pci_base = devm_platform_ioremap_resource(pdev, 0);
     79	if (IS_ERR(versatile_pci_base))
     80		return PTR_ERR(versatile_pci_base);
     81
     82	versatile_cfg_base[0] = devm_platform_ioremap_resource(pdev, 1);
     83	if (IS_ERR(versatile_cfg_base[0]))
     84		return PTR_ERR(versatile_cfg_base[0]);
     85
     86	res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
     87	versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
     88	if (IS_ERR(versatile_cfg_base[1]))
     89		return PTR_ERR(versatile_cfg_base[1]);
     90
     91	resource_list_for_each_entry(entry, &bridge->windows) {
     92		if (resource_type(entry->res) == IORESOURCE_MEM) {
     93			writel(entry->res->start >> 28, PCI_IMAP(mem));
     94			writel(__pa(PAGE_OFFSET) >> 28, PCI_SMAP(mem));
     95			mem++;
     96		}
     97	}
     98
     99	/*
    100	 * We need to discover the PCI core first to configure itself
    101	 * before the main PCI probing is performed
    102	 */
    103	for (i = 0; i < 32; i++) {
    104		if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
    105		    (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
    106			myslot = i;
    107			break;
    108		}
    109	}
    110	if (myslot == -1) {
    111		dev_err(dev, "Cannot find PCI core!\n");
    112		return -EIO;
    113	}
    114	/*
    115	 * Do not to map Versatile FPGA PCI device into memory space
    116	 */
    117	pci_slot_ignore |= (1 << myslot);
    118
    119	dev_info(dev, "PCI core found (slot %d)\n", myslot);
    120
    121	writel(myslot, PCI_SELFID);
    122	local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
    123
    124	val = readl(local_pci_cfg_base + PCI_COMMAND);
    125	val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
    126	writel(val, local_pci_cfg_base + PCI_COMMAND);
    127
    128	/*
    129	 * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
    130	 */
    131	writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_0);
    132	writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_1);
    133	writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_2);
    134
    135	/*
    136	 * For many years the kernel and QEMU were symbiotically buggy
    137	 * in that they both assumed the same broken IRQ mapping.
    138	 * QEMU therefore attempts to auto-detect old broken kernels
    139	 * so that they still work on newer QEMU as they did on old
    140	 * QEMU. Since we now use the correct (ie matching-hardware)
    141	 * IRQ mapping we write a definitely different value to a
    142	 * PCI_INTERRUPT_LINE register to tell QEMU that we expect
    143	 * real hardware behaviour and it need not be backwards
    144	 * compatible for us. This write is harmless on real hardware.
    145	 */
    146	writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
    147
    148	pci_add_flags(PCI_REASSIGN_ALL_BUS);
    149
    150	bridge->ops = &pci_versatile_ops;
    151
    152	return pci_host_probe(bridge);
    153}
    154
    155static const struct of_device_id versatile_pci_of_match[] = {
    156	{ .compatible = "arm,versatile-pci", },
    157	{ },
    158};
    159MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
    160
    161static struct platform_driver versatile_pci_driver = {
    162	.driver = {
    163		.name = "versatile-pci",
    164		.of_match_table = versatile_pci_of_match,
    165		.suppress_bind_attrs = true,
    166	},
    167	.probe = versatile_pci_probe,
    168};
    169module_platform_driver(versatile_pci_driver);
    170
    171MODULE_DESCRIPTION("Versatile PCI driver");
    172MODULE_LICENSE("GPL v2");