cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pd6729.c (18742B)


      1/*
      2 * Driver for the Cirrus PD6729 PCI-PCMCIA bridge.
      3 *
      4 * Based on the i82092.c driver.
      5 *
      6 * This software may be used and distributed according to the terms of
      7 * the GNU General Public License, incorporated herein by reference.
      8 */
      9
     10#include <linux/kernel.h>
     11#include <linux/module.h>
     12#include <linux/slab.h>
     13#include <linux/pci.h>
     14#include <linux/init.h>
     15#include <linux/workqueue.h>
     16#include <linux/interrupt.h>
     17#include <linux/device.h>
     18#include <linux/io.h>
     19
     20#include <pcmcia/ss.h>
     21
     22
     23#include "pd6729.h"
     24#include "i82365.h"
     25#include "cirrus.h"
     26
     27MODULE_LICENSE("GPL");
     28MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge");
     29MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>");
     30
     31#define MAX_SOCKETS 2
     32
     33/*
     34 * simple helper functions
     35 * External clock time, in nanoseconds.  120 ns = 8.33 MHz
     36 */
     37#define to_cycles(ns)	((ns)/120)
     38
     39#ifndef NO_IRQ
     40#define NO_IRQ	((unsigned int)(0))
     41#endif
     42
     43/*
     44 * PARAMETERS
     45 *  irq_mode=n
     46 *     Specifies the interrupt delivery mode.  The default (1) is to use PCI
     47 *     interrupts; a value of 0 selects ISA interrupts. This must be set for
     48 *     correct operation of PCI card readers.
     49 */
     50
     51static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */
     52
     53module_param(irq_mode, int, 0444);
     54MODULE_PARM_DESC(irq_mode,
     55		"interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1");
     56
     57static DEFINE_SPINLOCK(port_lock);
     58
     59/* basic value read/write functions */
     60
     61static unsigned char indirect_read(struct pd6729_socket *socket,
     62				   unsigned short reg)
     63{
     64	unsigned long port;
     65	unsigned char val;
     66	unsigned long flags;
     67
     68	spin_lock_irqsave(&port_lock, flags);
     69	reg += socket->number * 0x40;
     70	port = socket->io_base;
     71	outb(reg, port);
     72	val = inb(port + 1);
     73	spin_unlock_irqrestore(&port_lock, flags);
     74
     75	return val;
     76}
     77
     78static unsigned short indirect_read16(struct pd6729_socket *socket,
     79				      unsigned short reg)
     80{
     81	unsigned long port;
     82	unsigned short tmp;
     83	unsigned long flags;
     84
     85	spin_lock_irqsave(&port_lock, flags);
     86	reg  = reg + socket->number * 0x40;
     87	port = socket->io_base;
     88	outb(reg, port);
     89	tmp = inb(port + 1);
     90	reg++;
     91	outb(reg, port);
     92	tmp = tmp | (inb(port + 1) << 8);
     93	spin_unlock_irqrestore(&port_lock, flags);
     94
     95	return tmp;
     96}
     97
     98static void indirect_write(struct pd6729_socket *socket, unsigned short reg,
     99			   unsigned char value)
    100{
    101	unsigned long port;
    102	unsigned long flags;
    103
    104	spin_lock_irqsave(&port_lock, flags);
    105	reg = reg + socket->number * 0x40;
    106	port = socket->io_base;
    107	outb(reg, port);
    108	outb(value, port + 1);
    109	spin_unlock_irqrestore(&port_lock, flags);
    110}
    111
    112static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg,
    113			    unsigned char mask)
    114{
    115	unsigned long port;
    116	unsigned char val;
    117	unsigned long flags;
    118
    119	spin_lock_irqsave(&port_lock, flags);
    120	reg = reg + socket->number * 0x40;
    121	port = socket->io_base;
    122	outb(reg, port);
    123	val = inb(port + 1);
    124	val |= mask;
    125	outb(reg, port);
    126	outb(val, port + 1);
    127	spin_unlock_irqrestore(&port_lock, flags);
    128}
    129
    130static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg,
    131			      unsigned char mask)
    132{
    133	unsigned long port;
    134	unsigned char val;
    135	unsigned long flags;
    136
    137	spin_lock_irqsave(&port_lock, flags);
    138	reg = reg + socket->number * 0x40;
    139	port = socket->io_base;
    140	outb(reg, port);
    141	val = inb(port + 1);
    142	val &= ~mask;
    143	outb(reg, port);
    144	outb(val, port + 1);
    145	spin_unlock_irqrestore(&port_lock, flags);
    146}
    147
    148static void indirect_write16(struct pd6729_socket *socket, unsigned short reg,
    149			     unsigned short value)
    150{
    151	unsigned long port;
    152	unsigned char val;
    153	unsigned long flags;
    154
    155	spin_lock_irqsave(&port_lock, flags);
    156	reg = reg + socket->number * 0x40;
    157	port = socket->io_base;
    158
    159	outb(reg, port);
    160	val = value & 255;
    161	outb(val, port + 1);
    162
    163	reg++;
    164
    165	outb(reg, port);
    166	val = value >> 8;
    167	outb(val, port + 1);
    168	spin_unlock_irqrestore(&port_lock, flags);
    169}
    170
    171/* Interrupt handler functionality */
    172
    173static irqreturn_t pd6729_interrupt(int irq, void *dev)
    174{
    175	struct pd6729_socket *socket = (struct pd6729_socket *)dev;
    176	int i;
    177	int loopcount = 0;
    178	int handled = 0;
    179	unsigned int events, active = 0;
    180
    181	while (1) {
    182		loopcount++;
    183		if (loopcount > 20) {
    184			printk(KERN_ERR "pd6729: infinite eventloop "
    185			       "in interrupt\n");
    186			break;
    187		}
    188
    189		active = 0;
    190
    191		for (i = 0; i < MAX_SOCKETS; i++) {
    192			unsigned int csc;
    193
    194			/* card status change register */
    195			csc = indirect_read(&socket[i], I365_CSC);
    196			if (csc == 0)  /* no events on this socket */
    197				continue;
    198
    199			handled = 1;
    200			events = 0;
    201
    202			if (csc & I365_CSC_DETECT) {
    203				events |= SS_DETECT;
    204				dev_vdbg(&socket[i].socket.dev,
    205					"Card detected in socket %i!\n", i);
    206			}
    207
    208			if (indirect_read(&socket[i], I365_INTCTL)
    209						& I365_PC_IOCARD) {
    210				/* For IO/CARDS, bit 0 means "read the card" */
    211				events |= (csc & I365_CSC_STSCHG)
    212						? SS_STSCHG : 0;
    213			} else {
    214				/* Check for battery/ready events */
    215				events |= (csc & I365_CSC_BVD1)
    216						? SS_BATDEAD : 0;
    217				events |= (csc & I365_CSC_BVD2)
    218						? SS_BATWARN : 0;
    219				events |= (csc & I365_CSC_READY)
    220						? SS_READY : 0;
    221			}
    222
    223			if (events)
    224				pcmcia_parse_events(&socket[i].socket, events);
    225
    226			active |= events;
    227		}
    228
    229		if (active == 0) /* no more events to handle */
    230			break;
    231	}
    232	return IRQ_RETVAL(handled);
    233}
    234
    235/* socket functions */
    236
    237static void pd6729_interrupt_wrapper(struct timer_list *t)
    238{
    239	struct pd6729_socket *socket = from_timer(socket, t, poll_timer);
    240
    241	pd6729_interrupt(0, (void *)socket);
    242	mod_timer(&socket->poll_timer, jiffies + HZ);
    243}
    244
    245static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value)
    246{
    247	struct pd6729_socket *socket
    248			= container_of(sock, struct pd6729_socket, socket);
    249	unsigned int status;
    250	unsigned int data;
    251	struct pd6729_socket *t;
    252
    253	/* Interface Status Register */
    254	status = indirect_read(socket, I365_STATUS);
    255	*value = 0;
    256
    257	if ((status & I365_CS_DETECT) == I365_CS_DETECT)
    258		*value |= SS_DETECT;
    259
    260	/*
    261	 * IO cards have a different meaning of bits 0,1
    262	 * Also notice the inverse-logic on the bits
    263	 */
    264	if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) {
    265		/* IO card */
    266		if (!(status & I365_CS_STSCHG))
    267			*value |= SS_STSCHG;
    268	} else {
    269		/* non I/O card */
    270		if (!(status & I365_CS_BVD1))
    271			*value |= SS_BATDEAD;
    272		if (!(status & I365_CS_BVD2))
    273			*value |= SS_BATWARN;
    274	}
    275
    276	if (status & I365_CS_WRPROT)
    277		*value |= SS_WRPROT;	/* card is write protected */
    278
    279	if (status & I365_CS_READY)
    280		*value |= SS_READY;	/* card is not busy */
    281
    282	if (status & I365_CS_POWERON)
    283		*value |= SS_POWERON;	/* power is applied to the card */
    284
    285	t = (socket->number) ? socket : socket + 1;
    286	indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA);
    287	data = indirect_read16(t, PD67_EXT_DATA);
    288	*value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD;
    289
    290	return 0;
    291}
    292
    293
    294static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
    295{
    296	struct pd6729_socket *socket
    297			= container_of(sock, struct pd6729_socket, socket);
    298	unsigned char reg, data;
    299
    300	/* First, set the global controller options */
    301	indirect_write(socket, I365_GBLCTL, 0x00);
    302	indirect_write(socket, I365_GENCTL, 0x00);
    303
    304	/* Values for the IGENC register */
    305	socket->card_irq = state->io_irq;
    306
    307	reg = 0;
    308	/* The reset bit has "inverse" logic */
    309	if (!(state->flags & SS_RESET))
    310		reg |= I365_PC_RESET;
    311	if (state->flags & SS_IOCARD)
    312		reg |= I365_PC_IOCARD;
    313
    314	/* IGENC, Interrupt and General Control Register */
    315	indirect_write(socket, I365_INTCTL, reg);
    316
    317	/* Power registers */
    318
    319	reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
    320
    321	if (state->flags & SS_PWR_AUTO) {
    322		dev_dbg(&sock->dev, "Auto power\n");
    323		reg |= I365_PWR_AUTO;	/* automatic power mngmnt */
    324	}
    325	if (state->flags & SS_OUTPUT_ENA) {
    326		dev_dbg(&sock->dev, "Power Enabled\n");
    327		reg |= I365_PWR_OUT;	/* enable power */
    328	}
    329
    330	switch (state->Vcc) {
    331	case 0:
    332		break;
    333	case 33:
    334		dev_dbg(&sock->dev,
    335			"setting voltage to Vcc to 3.3V on socket %i\n",
    336			socket->number);
    337		reg |= I365_VCC_5V;
    338		indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
    339		break;
    340	case 50:
    341		dev_dbg(&sock->dev,
    342			"setting voltage to Vcc to 5V on socket %i\n",
    343			socket->number);
    344		reg |= I365_VCC_5V;
    345		indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
    346		break;
    347	default:
    348		dev_dbg(&sock->dev,
    349			"pd6729_set_socket called with invalid VCC power "
    350			"value: %i\n", state->Vcc);
    351		return -EINVAL;
    352	}
    353
    354	switch (state->Vpp) {
    355	case 0:
    356		dev_dbg(&sock->dev, "not setting Vpp on socket %i\n",
    357			socket->number);
    358		break;
    359	case 33:
    360	case 50:
    361		dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n",
    362			socket->number);
    363		reg |= I365_VPP1_5V;
    364		break;
    365	case 120:
    366		dev_dbg(&sock->dev, "setting Vpp to 12.0\n");
    367		reg |= I365_VPP1_12V;
    368		break;
    369	default:
    370		dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with "
    371			"invalid VPP power value: %i\n", state->Vpp);
    372		return -EINVAL;
    373	}
    374
    375	/* only write if changed */
    376	if (reg != indirect_read(socket, I365_POWER))
    377		indirect_write(socket, I365_POWER, reg);
    378
    379	if (irq_mode == 1) {
    380		/* all interrupts are to be done as PCI interrupts */
    381		data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ;
    382	} else
    383		data = 0;
    384
    385	indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1);
    386	indirect_write(socket, PD67_EXT_DATA, data);
    387
    388	/* Enable specific interrupt events */
    389
    390	reg = 0x00;
    391	if (state->csc_mask & SS_DETECT)
    392		reg |= I365_CSC_DETECT;
    393
    394	if (state->flags & SS_IOCARD) {
    395		if (state->csc_mask & SS_STSCHG)
    396			reg |= I365_CSC_STSCHG;
    397	} else {
    398		if (state->csc_mask & SS_BATDEAD)
    399			reg |= I365_CSC_BVD1;
    400		if (state->csc_mask & SS_BATWARN)
    401			reg |= I365_CSC_BVD2;
    402		if (state->csc_mask & SS_READY)
    403			reg |= I365_CSC_READY;
    404	}
    405	if (irq_mode == 1)
    406		reg |= 0x30;	/* management IRQ: PCI INTA# = "irq 3" */
    407	indirect_write(socket, I365_CSCINT, reg);
    408
    409	reg = indirect_read(socket, I365_INTCTL);
    410	if (irq_mode == 1)
    411		reg |= 0x03;	/* card IRQ: PCI INTA# = "irq 3" */
    412	else
    413		reg |= socket->card_irq;
    414	indirect_write(socket, I365_INTCTL, reg);
    415
    416	/* now clear the (probably bogus) pending stuff by doing a dummy read */
    417	(void)indirect_read(socket, I365_CSC);
    418
    419	return 0;
    420}
    421
    422static int pd6729_set_io_map(struct pcmcia_socket *sock,
    423			     struct pccard_io_map *io)
    424{
    425	struct pd6729_socket *socket
    426			= container_of(sock, struct pd6729_socket, socket);
    427	unsigned char map, ioctl;
    428
    429	map = io->map;
    430
    431	/* Check error conditions */
    432	if (map > 1) {
    433		dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n");
    434		return -EINVAL;
    435	}
    436
    437	/* Turn off the window before changing anything */
    438	if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map))
    439		indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
    440
    441	/* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n",
    442	   io->start, io->stop);*/
    443
    444	/* write the new values */
    445	indirect_write16(socket, I365_IO(map)+I365_W_START, io->start);
    446	indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop);
    447
    448	ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
    449
    450	if (io->flags & MAP_0WS)
    451		ioctl |= I365_IOCTL_0WS(map);
    452	if (io->flags & MAP_16BIT)
    453		ioctl |= I365_IOCTL_16BIT(map);
    454	if (io->flags & MAP_AUTOSZ)
    455		ioctl |= I365_IOCTL_IOCS16(map);
    456
    457	indirect_write(socket, I365_IOCTL, ioctl);
    458
    459	/* Turn the window back on if needed */
    460	if (io->flags & MAP_ACTIVE)
    461		indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
    462
    463	return 0;
    464}
    465
    466static int pd6729_set_mem_map(struct pcmcia_socket *sock,
    467			      struct pccard_mem_map *mem)
    468{
    469	struct pd6729_socket *socket
    470			 = container_of(sock, struct pd6729_socket, socket);
    471	unsigned short base, i;
    472	unsigned char map;
    473
    474	map = mem->map;
    475	if (map > 4) {
    476		dev_warn(&sock->dev, "invalid map requested\n");
    477		return -EINVAL;
    478	}
    479
    480	if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) {
    481		dev_warn(&sock->dev, "invalid invalid address / speed\n");
    482		return -EINVAL;
    483	}
    484
    485	/* Turn off the window before changing anything */
    486	if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map))
    487		indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
    488
    489	/* write the start address */
    490	base = I365_MEM(map);
    491	i = (mem->res->start >> 12) & 0x0fff;
    492	if (mem->flags & MAP_16BIT)
    493		i |= I365_MEM_16BIT;
    494	if (mem->flags & MAP_0WS)
    495		i |= I365_MEM_0WS;
    496	indirect_write16(socket, base + I365_W_START, i);
    497
    498	/* write the stop address */
    499
    500	i = (mem->res->end >> 12) & 0x0fff;
    501	switch (to_cycles(mem->speed)) {
    502	case 0:
    503		break;
    504	case 1:
    505		i |= I365_MEM_WS0;
    506		break;
    507	case 2:
    508		i |= I365_MEM_WS1;
    509		break;
    510	default:
    511		i |= I365_MEM_WS1 | I365_MEM_WS0;
    512		break;
    513	}
    514
    515	indirect_write16(socket, base + I365_W_STOP, i);
    516
    517	/* Take care of high byte */
    518	indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map));
    519	indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24);
    520
    521	/* card start */
    522
    523	i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff;
    524	if (mem->flags & MAP_WRPROT)
    525		i |= I365_MEM_WRPROT;
    526	if (mem->flags & MAP_ATTRIB) {
    527		/* dev_dbg(&sock->dev, "requesting attribute memory for "
    528		   "socket %i\n", socket->number);*/
    529		i |= I365_MEM_REG;
    530	} else {
    531		/* dev_dbg(&sock->dev, "requesting normal memory for "
    532		   "socket %i\n", socket->number);*/
    533	}
    534	indirect_write16(socket, base + I365_W_OFF, i);
    535
    536	/* Enable the window if necessary */
    537	if (mem->flags & MAP_ACTIVE)
    538		indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
    539
    540	return 0;
    541}
    542
    543static int pd6729_init(struct pcmcia_socket *sock)
    544{
    545	int i;
    546	struct resource res = { .end = 0x0fff };
    547	pccard_io_map io = { 0, 0, 0, 0, 1 };
    548	pccard_mem_map mem = { .res = &res, };
    549
    550	pd6729_set_socket(sock, &dead_socket);
    551	for (i = 0; i < 2; i++) {
    552		io.map = i;
    553		pd6729_set_io_map(sock, &io);
    554	}
    555	for (i = 0; i < 5; i++) {
    556		mem.map = i;
    557		pd6729_set_mem_map(sock, &mem);
    558	}
    559
    560	return 0;
    561}
    562
    563
    564/* the pccard structure and its functions */
    565static struct pccard_operations pd6729_operations = {
    566	.init			= pd6729_init,
    567	.get_status		= pd6729_get_status,
    568	.set_socket		= pd6729_set_socket,
    569	.set_io_map		= pd6729_set_io_map,
    570	.set_mem_map		= pd6729_set_mem_map,
    571};
    572
    573static irqreturn_t pd6729_test(int irq, void *dev)
    574{
    575	pr_devel("-> hit on irq %d\n", irq);
    576	return IRQ_HANDLED;
    577}
    578
    579static int pd6729_check_irq(int irq)
    580{
    581	int ret;
    582
    583	ret = request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x",
    584			  pd6729_test);
    585	if (ret)
    586		return -1;
    587
    588	free_irq(irq, pd6729_test);
    589	return 0;
    590}
    591
    592static u_int pd6729_isa_scan(void)
    593{
    594	u_int mask0, mask = 0;
    595	int i;
    596
    597	if (irq_mode == 1) {
    598		printk(KERN_INFO "pd6729: PCI card interrupts, "
    599		       "PCI status changes\n");
    600		return 0;
    601	}
    602
    603	mask0 = PD67_MASK;
    604
    605	/* just find interrupts that aren't in use */
    606	for (i = 0; i < 16; i++)
    607		if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0))
    608			mask |= (1 << i);
    609
    610	printk(KERN_INFO "pd6729: ISA irqs = ");
    611	for (i = 0; i < 16; i++)
    612		if (mask & (1<<i))
    613			printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i);
    614
    615	if (mask == 0)
    616		printk("none!");
    617	else
    618		printk("  polling status changes.\n");
    619
    620	return mask;
    621}
    622
    623static int pd6729_pci_probe(struct pci_dev *dev,
    624				      const struct pci_device_id *id)
    625{
    626	int i, j, ret;
    627	u_int mask;
    628	char configbyte;
    629	struct pd6729_socket *socket;
    630
    631	socket = kcalloc(MAX_SOCKETS, sizeof(struct pd6729_socket),
    632			 GFP_KERNEL);
    633	if (!socket) {
    634		dev_warn(&dev->dev, "failed to kzalloc socket.\n");
    635		return -ENOMEM;
    636	}
    637
    638	ret = pci_enable_device(dev);
    639	if (ret) {
    640		dev_warn(&dev->dev, "failed to enable pci_device.\n");
    641		goto err_out_free_mem;
    642	}
    643
    644	if (!pci_resource_start(dev, 0)) {
    645		dev_warn(&dev->dev, "refusing to load the driver as the "
    646			"io_base is NULL.\n");
    647		ret = -ENOMEM;
    648		goto err_out_disable;
    649	}
    650
    651	dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx "
    652		"on irq %d\n",
    653		(unsigned long long)pci_resource_start(dev, 0), dev->irq);
    654	/*
    655	 * Since we have no memory BARs some firmware may not
    656	 * have had PCI_COMMAND_MEMORY enabled, yet the device needs it.
    657	 */
    658	pci_read_config_byte(dev, PCI_COMMAND, &configbyte);
    659	if (!(configbyte & PCI_COMMAND_MEMORY)) {
    660		dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n");
    661		configbyte |= PCI_COMMAND_MEMORY;
    662		pci_write_config_byte(dev, PCI_COMMAND, configbyte);
    663	}
    664
    665	ret = pci_request_regions(dev, "pd6729");
    666	if (ret) {
    667		dev_warn(&dev->dev, "pci request region failed.\n");
    668		goto err_out_disable;
    669	}
    670
    671	if (dev->irq == NO_IRQ)
    672		irq_mode = 0;	/* fall back to ISA interrupt mode */
    673
    674	mask = pd6729_isa_scan();
    675	if (irq_mode == 0 && mask == 0) {
    676		dev_warn(&dev->dev, "no ISA interrupt is available.\n");
    677		ret = -ENODEV;
    678		goto err_out_free_res;
    679	}
    680
    681	for (i = 0; i < MAX_SOCKETS; i++) {
    682		socket[i].io_base = pci_resource_start(dev, 0);
    683		socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
    684		socket[i].socket.map_size = 0x1000;
    685		socket[i].socket.irq_mask = mask;
    686		socket[i].socket.pci_irq  = dev->irq;
    687		socket[i].socket.cb_dev = dev;
    688		socket[i].socket.owner = THIS_MODULE;
    689
    690		socket[i].number = i;
    691
    692		socket[i].socket.ops = &pd6729_operations;
    693		socket[i].socket.resource_ops = &pccard_nonstatic_ops;
    694		socket[i].socket.dev.parent = &dev->dev;
    695		socket[i].socket.driver_data = &socket[i];
    696	}
    697
    698	pci_set_drvdata(dev, socket);
    699	if (irq_mode == 1) {
    700		/* Register the interrupt handler */
    701		ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED,
    702				  "pd6729", socket);
    703		if (ret) {
    704			dev_err(&dev->dev, "Failed to register irq %d\n",
    705				dev->irq);
    706			goto err_out_free_res;
    707		}
    708	} else {
    709		/* poll Card status change */
    710		timer_setup(&socket->poll_timer, pd6729_interrupt_wrapper, 0);
    711		mod_timer(&socket->poll_timer, jiffies + HZ);
    712	}
    713
    714	for (i = 0; i < MAX_SOCKETS; i++) {
    715		ret = pcmcia_register_socket(&socket[i].socket);
    716		if (ret) {
    717			dev_warn(&dev->dev, "pcmcia_register_socket failed.\n");
    718			for (j = 0; j < i ; j++)
    719				pcmcia_unregister_socket(&socket[j].socket);
    720			goto err_out_free_res2;
    721		}
    722	}
    723
    724	return 0;
    725
    726err_out_free_res2:
    727	if (irq_mode == 1)
    728		free_irq(dev->irq, socket);
    729	else
    730		del_timer_sync(&socket->poll_timer);
    731err_out_free_res:
    732	pci_release_regions(dev);
    733err_out_disable:
    734	pci_disable_device(dev);
    735
    736err_out_free_mem:
    737	kfree(socket);
    738	return ret;
    739}
    740
    741static void pd6729_pci_remove(struct pci_dev *dev)
    742{
    743	int i;
    744	struct pd6729_socket *socket = pci_get_drvdata(dev);
    745
    746	for (i = 0; i < MAX_SOCKETS; i++) {
    747		/* Turn off all interrupt sources */
    748		indirect_write(&socket[i], I365_CSCINT, 0);
    749		indirect_write(&socket[i], I365_INTCTL, 0);
    750
    751		pcmcia_unregister_socket(&socket[i].socket);
    752	}
    753
    754	if (irq_mode == 1)
    755		free_irq(dev->irq, socket);
    756	else
    757		del_timer_sync(&socket->poll_timer);
    758	pci_release_regions(dev);
    759	pci_disable_device(dev);
    760
    761	kfree(socket);
    762}
    763
    764static const struct pci_device_id pd6729_pci_ids[] = {
    765	{ PCI_DEVICE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729) },
    766	{ }
    767};
    768MODULE_DEVICE_TABLE(pci, pd6729_pci_ids);
    769
    770static struct pci_driver pd6729_pci_driver = {
    771	.name		= "pd6729",
    772	.id_table	= pd6729_pci_ids,
    773	.probe		= pd6729_pci_probe,
    774	.remove		= pd6729_pci_remove,
    775};
    776
    777module_pci_driver(pd6729_pci_driver);